1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Broadcom BCM2712 GPIO units (pinctrl only)
5 * Copyright (C) 2021-3 Raspberry Pi Ltd.
6 * Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
8 * Based heavily on the BCM2835 GPIO & pinctrl driver, which was inspired by:
9 * pinctrl-nomadik.c, please see original file for copyright information
10 * pinctrl-tegra.c, please see original file for copyright information
13 #include <linux/bitmap.h>
14 #include <linux/bug.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/err.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/of_address.h>
23 #include <linux/pinctrl/consumer.h>
24 #include <linux/pinctrl/machine.h>
25 #include <linux/pinctrl/pinconf.h>
26 #include <linux/pinctrl/pinctrl.h>
27 #include <linux/pinctrl/pinmux.h>
28 #include <linux/pinctrl/pinconf-generic.h>
29 #include <linux/platform_device.h>
30 #include <linux/seq_file.h>
31 #include <linux/slab.h>
32 #include <linux/spinlock.h>
33 #include <linux/types.h>
35 #define MODULE_NAME "pinctrl-bcm2712"
37 /* Register offsets */
39 #define BCM2712_PULL_NONE 0
40 #define BCM2712_PULL_DOWN 1
41 #define BCM2712_PULL_UP 2
42 #define BCM2712_PULL_MASK 0x3
44 #define BCM2712_FSEL_COUNT 9
45 #define BCM2712_FSEL_MASK 0xf
49 #define PIN(i, f1, f2, f3, f4, f5, f6, f7, f8) \
63 #define REG_BIT_INVALID 0xffff
65 #define BIT_TO_REG(b) (((b) >> 5) << 2)
66 #define BIT_TO_SHIFT(b) ((b) & 0x1f)
68 #define GPIO_REGS(n, mr, mb, pr, pb) \
69 [n] = { ((mr)*4)*8 + (mb)*4, ((pr)*4)*8 + (pb)*2 }
71 #define EMMC_REGS(n, r, b) \
72 [n] = { 0, ((r)*4)*8 + (b)*2 }
74 #define AGPIO_REGS(n, mr, mb, pr, pb) \
75 [n] = { ((mr)*4)*8 + (mb)*4, ((pr)*4)*8 + (pb)*2 }
77 #define SGPIO_REGS(n, mr, mb) \
78 [n+32] = { ((mr)*4)*8 + (mb)*4, REG_BIT_INVALID }
80 #define GPIO_PIN(a) PINCTRL_PIN(a, "gpio" #a)
81 #define AGPIO_PIN(a) PINCTRL_PIN(a, "aon_gpio" #a)
82 #define SGPIO_PIN(a) PINCTRL_PIN(a+32, "aon_sgpio" #a)
89 struct bcm2712_pinctrl {
92 struct pinctrl_dev *pctl_dev;
93 struct pinctrl_desc pctl_desc;
94 const struct pin_regs *pin_regs;
95 const struct bcm2712_pin_funcs *pin_funcs;
96 const char *const *gpio_groups;
97 struct pinctrl_gpio_range gpio_range;
101 struct bcm_plat_data {
102 const struct pinctrl_desc *pctl_desc;
103 const struct pinctrl_gpio_range *gpio_range;
104 const struct pin_regs *pin_regs;
105 const struct bcm2712_pin_funcs *pin_funcs;
108 struct bcm2712_pin_funcs {
109 u8 funcs[BCM2712_FSEL_COUNT - 1];
122 func_aon_cpu_standbyb,
123 func_aon_fp_4sec_resetb,
144 func_hdmi_tx0_auto_i2c,
146 func_hdmi_tx1_auto_i2c,
200 static const struct pin_regs bcm2712_c0_gpio_pin_regs[] = {
201 GPIO_REGS(0, 0, 0, 7, 7),
202 GPIO_REGS(1, 0, 1, 7, 8),
203 GPIO_REGS(2, 0, 2, 7, 9),
204 GPIO_REGS(3, 0, 3, 7, 10),
205 GPIO_REGS(4, 0, 4, 7, 11),
206 GPIO_REGS(5, 0, 5, 7, 12),
207 GPIO_REGS(6, 0, 6, 7, 13),
208 GPIO_REGS(7, 0, 7, 7, 14),
209 GPIO_REGS(8, 1, 0, 8, 0),
210 GPIO_REGS(9, 1, 1, 8, 1),
211 GPIO_REGS(10, 1, 2, 8, 2),
212 GPIO_REGS(11, 1, 3, 8, 3),
213 GPIO_REGS(12, 1, 4, 8, 4),
214 GPIO_REGS(13, 1, 5, 8, 5),
215 GPIO_REGS(14, 1, 6, 8, 6),
216 GPIO_REGS(15, 1, 7, 8, 7),
217 GPIO_REGS(16, 2, 0, 8, 8),
218 GPIO_REGS(17, 2, 1, 8, 9),
219 GPIO_REGS(18, 2, 2, 8, 10),
220 GPIO_REGS(19, 2, 3, 8, 11),
221 GPIO_REGS(20, 2, 4, 8, 12),
222 GPIO_REGS(21, 2, 5, 8, 13),
223 GPIO_REGS(22, 2, 6, 8, 14),
224 GPIO_REGS(23, 2, 7, 9, 0),
225 GPIO_REGS(24, 3, 0, 9, 1),
226 GPIO_REGS(25, 3, 1, 9, 2),
227 GPIO_REGS(26, 3, 2, 9, 3),
228 GPIO_REGS(27, 3, 3, 9, 4),
229 GPIO_REGS(28, 3, 4, 9, 5),
230 GPIO_REGS(29, 3, 5, 9, 6),
231 GPIO_REGS(30, 3, 6, 9, 7),
232 GPIO_REGS(31, 3, 7, 9, 8),
233 GPIO_REGS(32, 4, 0, 9, 9),
234 GPIO_REGS(33, 4, 1, 9, 10),
235 GPIO_REGS(34, 4, 2, 9, 11),
236 GPIO_REGS(35, 4, 3, 9, 12),
237 GPIO_REGS(36, 4, 4, 9, 13),
238 GPIO_REGS(37, 4, 5, 9, 14),
239 GPIO_REGS(38, 4, 6, 10, 0),
240 GPIO_REGS(39, 4, 7, 10, 1),
241 GPIO_REGS(40, 5, 0, 10, 2),
242 GPIO_REGS(41, 5, 1, 10, 3),
243 GPIO_REGS(42, 5, 2, 10, 4),
244 GPIO_REGS(43, 5, 3, 10, 5),
245 GPIO_REGS(44, 5, 4, 10, 6),
246 GPIO_REGS(45, 5, 5, 10, 7),
247 GPIO_REGS(46, 5, 6, 10, 8),
248 GPIO_REGS(47, 5, 7, 10, 9),
249 GPIO_REGS(48, 6, 0, 10, 10),
250 GPIO_REGS(49, 6, 1, 10, 11),
251 GPIO_REGS(50, 6, 2, 10, 12),
252 GPIO_REGS(51, 6, 3, 10, 13),
253 GPIO_REGS(52, 6, 4, 10, 14),
254 GPIO_REGS(53, 6, 5, 11, 0),
255 EMMC_REGS(54, 11, 1), /* EMMC_CMD */
256 EMMC_REGS(55, 11, 2), /* EMMC_DS */
257 EMMC_REGS(56, 11, 3), /* EMMC_CLK */
258 EMMC_REGS(57, 11, 4), /* EMMC_DAT0 */
259 EMMC_REGS(58, 11, 5), /* EMMC_DAT1 */
260 EMMC_REGS(59, 11, 6), /* EMMC_DAT2 */
261 EMMC_REGS(60, 11, 7), /* EMMC_DAT3 */
262 EMMC_REGS(61, 11, 8), /* EMMC_DAT4 */
263 EMMC_REGS(62, 11, 9), /* EMMC_DAT5 */
264 EMMC_REGS(63, 11, 10), /* EMMC_DAT6 */
265 EMMC_REGS(64, 11, 11), /* EMMC_DAT7 */
268 static struct pin_regs bcm2712_c0_aon_gpio_pin_regs[] = {
269 AGPIO_REGS(0, 3, 0, 6, 10),
270 AGPIO_REGS(1, 3, 1, 6, 11),
271 AGPIO_REGS(2, 3, 2, 6, 12),
272 AGPIO_REGS(3, 3, 3, 6, 13),
273 AGPIO_REGS(4, 3, 4, 6, 14),
274 AGPIO_REGS(5, 3, 5, 7, 0),
275 AGPIO_REGS(6, 3, 6, 7, 1),
276 AGPIO_REGS(7, 3, 7, 7, 2),
277 AGPIO_REGS(8, 4, 0, 7, 3),
278 AGPIO_REGS(9, 4, 1, 7, 4),
279 AGPIO_REGS(10, 4, 2, 7, 5),
280 AGPIO_REGS(11, 4, 3, 7, 6),
281 AGPIO_REGS(12, 4, 4, 7, 7),
282 AGPIO_REGS(13, 4, 5, 7, 8),
283 AGPIO_REGS(14, 4, 6, 7, 9),
284 AGPIO_REGS(15, 4, 7, 7, 10),
285 AGPIO_REGS(16, 5, 0, 7, 11),
294 static const struct pinctrl_pin_desc bcm2712_c0_gpio_pins[] = {
349 PINCTRL_PIN(54, "emmc_cmd"),
350 PINCTRL_PIN(55, "emmc_ds"),
351 PINCTRL_PIN(56, "emmc_clk"),
352 PINCTRL_PIN(57, "emmc_dat0"),
353 PINCTRL_PIN(58, "emmc_dat1"),
354 PINCTRL_PIN(59, "emmc_dat2"),
355 PINCTRL_PIN(60, "emmc_dat3"),
356 PINCTRL_PIN(61, "emmc_dat4"),
357 PINCTRL_PIN(62, "emmc_dat5"),
358 PINCTRL_PIN(63, "emmc_dat6"),
359 PINCTRL_PIN(64, "emmc_dat7"),
362 static struct pinctrl_pin_desc bcm2712_c0_aon_gpio_pins[] = {
388 static const struct pin_regs bcm2712_d0_gpio_pin_regs[] = {
389 GPIO_REGS(1, 0, 0, 4, 5),
390 GPIO_REGS(2, 0, 1, 4, 6),
391 GPIO_REGS(3, 0, 2, 4, 7),
392 GPIO_REGS(4, 0, 3, 4, 8),
393 GPIO_REGS(10, 0, 4, 4, 9),
394 GPIO_REGS(11, 0, 5, 4, 10),
395 GPIO_REGS(12, 0, 6, 4, 11),
396 GPIO_REGS(13, 0, 7, 4, 12),
397 GPIO_REGS(14, 1, 0, 4, 13),
398 GPIO_REGS(15, 1, 1, 4, 14),
399 GPIO_REGS(18, 1, 2, 5, 0),
400 GPIO_REGS(19, 1, 3, 5, 1),
401 GPIO_REGS(20, 1, 4, 5, 2),
402 GPIO_REGS(21, 1, 5, 5, 3),
403 GPIO_REGS(22, 1, 6, 5, 4),
404 GPIO_REGS(23, 1, 7, 5, 5),
405 GPIO_REGS(24, 2, 0, 5, 6),
406 GPIO_REGS(25, 2, 1, 5, 7),
407 GPIO_REGS(26, 2, 2, 5, 8),
408 GPIO_REGS(27, 2, 3, 5, 9),
409 GPIO_REGS(28, 2, 4, 5, 10),
410 GPIO_REGS(29, 2, 5, 5, 11),
411 GPIO_REGS(30, 2, 6, 5, 12),
412 GPIO_REGS(31, 2, 7, 5, 13),
413 GPIO_REGS(32, 3, 0, 5, 14),
414 GPIO_REGS(33, 3, 1, 6, 0),
415 GPIO_REGS(34, 3, 2, 6, 1),
416 GPIO_REGS(35, 3, 3, 6, 2),
419 static struct pin_regs bcm2712_d0_aon_gpio_pin_regs[] = {
420 AGPIO_REGS(0, 3, 0, 5, 9),
421 AGPIO_REGS(1, 3, 1, 5, 10),
422 AGPIO_REGS(2, 3, 2, 5, 11),
423 AGPIO_REGS(3, 3, 3, 5, 12),
424 AGPIO_REGS(4, 3, 4, 5, 13),
425 AGPIO_REGS(5, 3, 5, 5, 14),
426 AGPIO_REGS(6, 3, 6, 6, 0),
427 AGPIO_REGS(8, 3, 7, 6, 1),
428 AGPIO_REGS(9, 4, 0, 6, 2),
429 AGPIO_REGS(12, 4, 1, 6, 3),
430 AGPIO_REGS(13, 4, 2, 6, 4),
431 AGPIO_REGS(14, 4, 3, 6, 5),
440 static const struct pinctrl_pin_desc bcm2712_d0_gpio_pins[] = {
471 static struct pinctrl_pin_desc bcm2712_d0_aon_gpio_pins[] = {
492 static const char * const bcm2712_func_names[] = {
502 FUNC(aon_cpu_standbyb),
503 FUNC(aon_fp_4sec_resetb),
524 FUNC(hdmi_tx0_auto_i2c),
526 FUNC(hdmi_tx1_auto_i2c),
578 static const struct bcm2712_pin_funcs bcm2712_c0_aon_gpio_pin_funcs[] = {
579 PIN(0, ir_in, vc_spi0, vc_uart3, vc_i2c3, te0, vc_i2c0, _, _),
580 PIN(1, vc_pwm0, vc_spi0, vc_uart3, vc_i2c3, te1, aon_pwm, vc_i2c0, vc_pwm1),
581 PIN(2, vc_pwm0, vc_spi0, vc_uart3, ctl_hdmi_5v, fl0, aon_pwm, ir_in, vc_pwm1),
582 PIN(3, ir_in, vc_spi0, vc_uart3, aon_fp_4sec_resetb, fl1, sd_card_g, aon_gpclk, _),
583 PIN(4, gpclk0, vc_spi0, vc_i2csl, aon_gpclk, pm_led_out, aon_pwm, sd_card_g, vc_pwm0),
584 PIN(5, gpclk1, ir_in, vc_i2csl, clk_observe, aon_pwm, sd_card_g, vc_pwm0, _),
585 PIN(6, uart1, vc_uart4, gpclk2, ctl_hdmi_5v, vc_uart0, vc_spi3, _, _),
586 PIN(7, uart1, vc_uart4, gpclk0, aon_pwm, vc_uart0, vc_spi3, _, _),
587 PIN(8, uart1, vc_uart4, vc_i2csl, ctl_hdmi_5v, vc_uart0, vc_spi3, _, _),
588 PIN(9, uart1, vc_uart4, vc_i2csl, aon_pwm, vc_uart0, vc_spi3, _, _),
589 PIN(10, tsio, ctl_hdmi_5v, sc0, spdif_out, vc_spi5, usb_pwr, aon_gpclk, sd_card_f),
590 PIN(11, tsio, uart0, sc0, aud_fs_clk0, vc_spi5, usb_vbus, vc_uart2, sd_card_f),
591 PIN(12, tsio, uart0, vc_uart0, tsio, vc_spi5, usb_pwr, vc_uart2, sd_card_f),
592 PIN(13, bsc_m1, uart0, vc_uart0, uui, vc_spi5, arm_jtag, vc_uart2, vc_i2c3),
593 PIN(14, bsc_m1, uart0, vc_uart0, uui, vc_spi5, arm_jtag, vc_uart2, vc_i2c3),
594 PIN(15, ir_in, aon_fp_4sec_resetb, vc_uart0, pm_led_out, ctl_hdmi_5v, aon_pwm, aon_gpclk, _),
595 PIN(16, aon_cpu_standbyb, gpclk0, pm_led_out, ctl_hdmi_5v, vc_pwm0, usb_pwr, aud_fs_clk0, _),
598 static const struct bcm2712_pin_funcs bcm2712_c0_aon_sgpio_pin_funcs[] = {
599 PIN(0, hdmi_tx0_bsc, hdmi_tx0_auto_i2c, bsc_m0, vc_i2c0, _, _, _, _),
600 PIN(1, hdmi_tx0_bsc, hdmi_tx0_auto_i2c, bsc_m0, vc_i2c0, _, _, _, _),
601 PIN(2, hdmi_tx1_bsc, hdmi_tx1_auto_i2c, bsc_m1, vc_i2c4, ctl_hdmi_5v, _, _, _),
602 PIN(3, hdmi_tx1_bsc, hdmi_tx1_auto_i2c, bsc_m1, vc_i2c4, _, _, _, _),
603 PIN(4, avs_pmu_bsc, bsc_m2, vc_i2c5, ctl_hdmi_5v, _, _, _, _),
604 PIN(5, avs_pmu_bsc, bsc_m2, vc_i2c5, _, _, _, _, _),
607 static const struct bcm2712_pin_funcs bcm2712_c0_gpio_pin_funcs[] = {
608 PIN(0, bsc_m3, vc_i2c0, gpclk0, enet0, vc_pwm1, vc_spi0, ir_in, _),
609 PIN(1, bsc_m3, vc_i2c0, gpclk1, enet0, vc_pwm1, sr_edm_sense, vc_spi0, vc_uart3),
610 PIN(2, pdm, i2s_in, gpclk2, vc_spi4, pkt, vc_spi0, vc_uart3, _),
611 PIN(3, pdm, i2s_in, vc_spi4, pkt, vc_spi0, vc_uart3, _, _),
612 PIN(4, pdm, i2s_in, arm_jtag, vc_spi4, pkt, vc_spi0, vc_uart3, _),
613 PIN(5, pdm, vc_i2c3, arm_jtag, sd_card_e, vc_spi4, pkt, vc_pcm, vc_i2c5),
614 PIN(6, pdm, vc_i2c3, arm_jtag, sd_card_e, vc_spi4, pkt, vc_pcm, vc_i2c5),
615 PIN(7, i2s_out, spdif_out, arm_jtag, sd_card_e, vc_i2c3, enet0_rgmii, vc_pcm, vc_spi4),
616 PIN(8, i2s_out, aud_fs_clk0, arm_jtag, sd_card_e, vc_i2c3, enet0_mii, vc_pcm, vc_spi4),
617 PIN(9, i2s_out, aud_fs_clk0, arm_jtag, sd_card_e, enet0_mii, sd_card_c, vc_spi4, _),
618 PIN(10, bsc_m3, mtsif_alt1, i2s_in, i2s_out, vc_spi5, enet0_mii, sd_card_c, vc_spi4),
619 PIN(11, bsc_m3, mtsif_alt1, i2s_in, i2s_out, vc_spi5, enet0_mii, sd_card_c, vc_spi4),
620 PIN(12, spi_s, mtsif_alt1, i2s_in, i2s_out, vc_spi5, vc_i2csl, sd0, sd_card_d),
621 PIN(13, spi_s, mtsif_alt1, i2s_out, usb_vbus, vc_spi5, vc_i2csl, sd0, sd_card_d),
622 PIN(14, spi_s, vc_i2csl, enet0_rgmii, arm_jtag, vc_spi5, vc_pwm0, vc_i2c4, sd_card_d),
623 PIN(15, spi_s, vc_i2csl, vc_spi3, arm_jtag, vc_pwm0, vc_i2c4, gpclk0, _),
624 PIN(16, sd_card_b, i2s_out, vc_spi3, i2s_in, sd0, enet0_rgmii, gpclk1, _),
625 PIN(17, sd_card_b, i2s_out, vc_spi3, i2s_in, ext_sc_clk, sd0, enet0_rgmii, gpclk2),
626 PIN(18, sd_card_b, i2s_out, vc_spi3, i2s_in, sd0, enet0_rgmii, vc_pwm1, _),
627 PIN(19, sd_card_b, usb_pwr, vc_spi3, pkt, spdif_out, sd0, ir_in, vc_pwm1),
628 PIN(20, sd_card_b, uui, vc_uart0, arm_jtag, uart2, usb_pwr, vc_pcm, vc_uart4),
629 PIN(21, usb_pwr, uui, vc_uart0, arm_jtag, uart2, sd_card_b, vc_pcm, vc_uart4),
630 PIN(22, usb_pwr, enet0, vc_uart0, mtsif, uart2, usb_vbus, vc_pcm, vc_i2c5),
631 PIN(23, usb_vbus, enet0, vc_uart0, mtsif, uart2, i2s_out, vc_pcm, vc_i2c5),
632 PIN(24, mtsif, pkt, uart0, enet0_rgmii, enet0_rgmii, vc_i2c4, vc_uart3, _),
633 PIN(25, mtsif, pkt, sc0, uart0, enet0_rgmii, enet0_rgmii, vc_i2c4, vc_uart3),
634 PIN(26, mtsif, pkt, sc0, uart0, enet0_rgmii, vc_uart4, vc_spi5, _),
635 PIN(27, mtsif, pkt, sc0, uart0, enet0_rgmii, vc_uart4, vc_spi5, _),
636 PIN(28, mtsif, pkt, sc0, enet0_rgmii, vc_uart4, vc_spi5, _, _),
637 PIN(29, mtsif, pkt, sc0, enet0_rgmii, vc_uart4, vc_spi5, _, _),
638 PIN(30, mtsif, pkt, sc0, sd2, enet0_rgmii, gpclk0, vc_pwm0, _),
639 PIN(31, mtsif, pkt, sc0, sd2, enet0_rgmii, vc_spi3, vc_pwm0, _),
640 PIN(32, mtsif, pkt, sc0, sd2, enet0_rgmii, vc_spi3, vc_uart3, _),
641 PIN(33, mtsif, pkt, sd2, enet0_rgmii, vc_spi3, vc_uart3, _, _),
642 PIN(34, mtsif, pkt, ext_sc_clk, sd2, enet0_rgmii, vc_spi3, vc_i2c5, _),
643 PIN(35, mtsif, pkt, sd2, enet0_rgmii, vc_spi3, vc_i2c5, _, _),
644 PIN(36, sd0, mtsif, sc0, i2s_in, vc_uart3, vc_uart2, _, _),
645 PIN(37, sd0, mtsif, sc0, vc_spi0, i2s_in, vc_uart3, vc_uart2, _),
646 PIN(38, sd0, mtsif_alt, sc0, vc_spi0, i2s_in, vc_uart3, vc_uart2, _),
647 PIN(39, sd0, mtsif_alt, sc0, vc_spi0, vc_uart3, vc_uart2, _, _),
648 PIN(40, sd0, mtsif_alt, sc0, vc_spi0, bsc_m3, _, _, _),
649 PIN(41, sd0, mtsif_alt, sc0, vc_spi0, bsc_m3, _, _, _),
650 PIN(42, vc_spi0, mtsif_alt, vc_i2c0, sd_card_a, mtsif_alt1, arm_jtag, pdm, spi_m),
651 PIN(43, vc_spi0, mtsif_alt, vc_i2c0, sd_card_a, mtsif_alt1, arm_jtag, pdm, spi_m),
652 PIN(44, vc_spi0, mtsif_alt, enet0, sd_card_a, mtsif_alt1, arm_jtag, pdm, spi_m),
653 PIN(45, vc_spi0, mtsif_alt, enet0, sd_card_a, mtsif_alt1, arm_jtag, pdm, spi_m),
654 PIN(46, vc_spi0, mtsif_alt, sd_card_a, mtsif_alt1, arm_jtag, pdm, spi_m, _),
655 PIN(47, enet0, mtsif_alt, i2s_out, mtsif_alt1, arm_jtag, _, _, _),
656 PIN(48, sc0, usb_pwr, spdif_out, mtsif, _, _, _, _),
657 PIN(49, sc0, usb_pwr, aud_fs_clk0, mtsif, _, _, _, _),
658 PIN(50, sc0, usb_vbus, sc0, _, _, _, _, _),
659 PIN(51, sc0, enet0, sc0, sr_edm_sense, _, _, _, _),
660 PIN(52, sc0, enet0, vc_pwm1, _, _, _, _, _),
661 PIN(53, sc0, enet0_rgmii, ext_sc_clk, _, _, _, _, _),
664 static const struct bcm2712_pin_funcs bcm2712_d0_aon_gpio_pin_funcs[] = {
665 PIN(0, ir_in, vc_spi0, vc_uart0, vc_i2c3, uart0, vc_i2c0, _, _),
666 PIN(1, vc_pwm0, vc_spi0, vc_uart0, vc_i2c3, uart0, aon_pwm, vc_i2c0, vc_pwm1),
667 PIN(2, vc_pwm0, vc_spi0, vc_uart0, ctl_hdmi_5v, uart0, aon_pwm, ir_in, vc_pwm1),
668 PIN(3, ir_in, vc_spi0, vc_uart0, uart0, sd_card_g, aon_gpclk, _, _),
669 PIN(4, gpclk0, vc_spi0, pm_led_out, aon_pwm, sd_card_g, vc_pwm0, _, _),
670 PIN(5, gpclk1, ir_in, aon_pwm, sd_card_g, vc_pwm0, _, _, _),
671 PIN(6, uart1, vc_uart2, ctl_hdmi_5v, gpclk2, vc_spi3, _, _, _),
672 PIN(7, _, _, _, _, _, _, _, _),
673 PIN(8, uart1, vc_uart2, ctl_hdmi_5v, vc_spi0, vc_spi3, _, _, _),
674 PIN(9, uart1, vc_uart2, vc_uart0, aon_pwm, vc_spi0, vc_uart2, vc_spi3, _),
675 PIN(10, _, _, _, _, _, _, _, _),
676 PIN(11, _, _, _, _, _, _, _, _),
677 PIN(12, uart1, vc_uart2, vc_uart0, vc_spi0, usb_pwr, vc_uart2, vc_spi3, _),
678 PIN(13, bsc_m1, vc_uart0, uui, vc_spi0, arm_jtag, vc_uart2, vc_i2c3, _),
679 PIN(14, bsc_m1, aon_gpclk, vc_uart0, uui, vc_spi0, arm_jtag, vc_uart2, vc_i2c3),
682 static const struct bcm2712_pin_funcs bcm2712_d0_aon_sgpio_pin_funcs[] = {
683 PIN(0, hdmi_tx0_bsc, hdmi_tx0_auto_i2c, bsc_m0, vc_i2c0, _, _, _, _),
684 PIN(1, hdmi_tx0_bsc, hdmi_tx0_auto_i2c, bsc_m0, vc_i2c0, _, _, _, _),
685 PIN(2, hdmi_tx1_bsc, hdmi_tx1_auto_i2c, bsc_m1, vc_i2c0, ctl_hdmi_5v, _, _, _),
686 PIN(3, hdmi_tx1_bsc, hdmi_tx1_auto_i2c, bsc_m1, vc_i2c0, _, _, _, _),
687 PIN(4, avs_pmu_bsc, bsc_m2, vc_i2c3, ctl_hdmi_5v, _, _, _, _),
688 PIN(5, avs_pmu_bsc, bsc_m2, vc_i2c3, _, _, _, _, _),
691 static const struct bcm2712_pin_funcs bcm2712_d0_gpio_pin_funcs[] = {
692 PIN(1, vc_i2c0, usb_pwr, gpclk0, sd_card_e, vc_spi3, sr_edm_sense, vc_spi0, vc_uart0),
693 PIN(2, vc_i2c0, usb_pwr, gpclk1, sd_card_e, vc_spi3, clk_observe, vc_spi0, vc_uart0),
694 PIN(3, vc_i2c3, usb_vbus, gpclk2, sd_card_e, vc_spi3, vc_spi0, vc_uart0, _),
695 PIN(4, vc_i2c3, vc_pwm1, vc_spi3, sd_card_e, vc_spi3, vc_spi0, vc_uart0, _),
696 PIN(10, bsc_m3, vc_pwm1, vc_spi3, sd_card_e, vc_spi3, gpclk0, _, _),
697 PIN(11, bsc_m3, vc_spi3, clk_observe, sd_card_c, gpclk1, _, _, _),
698 PIN(12, spi_s, vc_spi3, sd_card_c, sd_card_d, _, _, _, _),
699 PIN(13, spi_s, vc_spi3, sd_card_c, sd_card_d, _, _, _, _),
700 PIN(14, spi_s, uui, arm_jtag, vc_pwm0, vc_i2c0, sd_card_d, _, _),
701 PIN(15, spi_s, uui, arm_jtag, vc_pwm0, vc_i2c0, gpclk0, _, _),
702 PIN(18, sd_card_f, vc_pwm1, _, _, _, _, _, _),
703 PIN(19, sd_card_f, usb_pwr, vc_pwm1, _, _, _, _, _),
704 PIN(20, vc_i2c3, uui, vc_uart0, arm_jtag, vc_uart2, _, _, _),
705 PIN(21, vc_i2c3, uui, vc_uart0, arm_jtag, vc_uart2, _, _, _),
706 PIN(22, sd_card_f, vc_uart0, vc_i2c3, _, _, _, _, _),
707 PIN(23, vc_uart0, vc_i2c3, _, _, _, _, _, _),
708 PIN(24, sd_card_b, vc_spi0, arm_jtag, uart0, usb_pwr, vc_uart2, vc_uart0, _),
709 PIN(25, sd_card_b, vc_spi0, arm_jtag, uart0, usb_pwr, vc_uart2, vc_uart0, _),
710 PIN(26, sd_card_b, vc_spi0, arm_jtag, uart0, usb_vbus, vc_uart2, vc_spi0, _),
711 PIN(27, sd_card_b, vc_spi0, arm_jtag, uart0, vc_uart2, vc_spi0, _, _),
712 PIN(28, sd_card_b, vc_spi0, arm_jtag, vc_i2c0, vc_spi0, _, _, _),
713 PIN(29, arm_jtag, vc_i2c0, vc_spi0, _, _, _, _, _),
714 PIN(30, sd2, gpclk0, vc_pwm0, _, _, _, _, _),
715 PIN(31, sd2, vc_spi3, vc_pwm0, _, _, _, _, _),
716 PIN(32, sd2, vc_spi3, vc_uart3, _, _, _, _, _),
717 PIN(33, sd2, vc_spi3, vc_uart3, _, _, _, _, _),
718 PIN(34, sd2, vc_spi3, vc_i2c5, _, _, _, _, _),
719 PIN(35, sd2, vc_spi3, vc_i2c5, _, _, _, _, _),
722 static inline u32 bcm2712_reg_rd(struct bcm2712_pinctrl *pc, unsigned reg)
724 return readl(pc->base + reg);
727 static inline void bcm2712_reg_wr(struct bcm2712_pinctrl *pc, unsigned reg,
730 writel(val, pc->base + reg);
733 static enum bcm2712_funcs bcm2712_pinctrl_fsel_get(
734 struct bcm2712_pinctrl *pc, unsigned pin)
736 u32 bit = pc->pin_regs[pin].mux_bit;
737 enum bcm2712_funcs func;
744 val = bcm2712_reg_rd(pc, BIT_TO_REG(bit));
745 fsel = (val >> BIT_TO_SHIFT(bit)) & BCM2712_FSEL_MASK;
746 func = pc->pin_funcs[pin].funcs[fsel];
747 if (func >= func_count)
748 func = (enum bcm2712_funcs)fsel;
750 dev_dbg(pc->dev, "get %04x: %08x (%u => %s)\n",
751 BIT_TO_REG(bit), val, pin,
752 bcm2712_func_names[func]);
757 static void bcm2712_pinctrl_fsel_set(
758 struct bcm2712_pinctrl *pc, unsigned pin,
759 enum bcm2712_funcs func)
761 u32 bit = pc->pin_regs[pin].mux_bit, val;
768 if (!bit || func >= func_count)
771 fsel = BCM2712_FSEL_COUNT;
773 if (func >= BCM2712_FSEL_COUNT) {
774 /* Convert to an fsel number */
775 pin_funcs = pc->pin_funcs[pin].funcs;
776 for (i = 1; i < BCM2712_FSEL_COUNT; i++) {
777 if (pin_funcs[i - 1] == func) {
783 fsel = (enum bcm2712_funcs)func;
785 if (fsel >= BCM2712_FSEL_COUNT)
788 spin_lock_irqsave(&pc->lock, flags);
790 val = bcm2712_reg_rd(pc, BIT_TO_REG(bit));
791 cur = (val >> BIT_TO_SHIFT(bit)) & BCM2712_FSEL_MASK;
793 dev_dbg(pc->dev, "read %04x: %08x (%u => %s)\n",
794 BIT_TO_REG(bit), val, pin,
795 bcm2712_func_names[cur]);
798 val &= ~(BCM2712_FSEL_MASK << BIT_TO_SHIFT(bit));
799 val |= fsel << BIT_TO_SHIFT(bit);
801 dev_dbg(pc->dev, "write %04x: %08x (%u <= %s)\n",
802 BIT_TO_REG(bit), val, pin,
803 bcm2712_func_names[fsel]);
804 bcm2712_reg_wr(pc, BIT_TO_REG(bit), val);
807 spin_unlock_irqrestore(&pc->lock, flags);
810 static int bcm2712_pctl_get_groups_count(struct pinctrl_dev *pctldev)
812 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
814 return pc->pctl_desc.npins;
817 static const char *bcm2712_pctl_get_group_name(struct pinctrl_dev *pctldev,
820 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
822 return pc->gpio_groups[selector];
825 static int bcm2712_pctl_get_group_pins(struct pinctrl_dev *pctldev,
827 const unsigned **pins,
830 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
832 *pins = &pc->pctl_desc.pins[selector].number;
838 static void bcm2712_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
842 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
843 enum bcm2712_funcs fsel = bcm2712_pinctrl_fsel_get(pc, offset);
844 const char *fname = bcm2712_func_names[fsel];
846 seq_printf(s, "function %s", fname);
849 static void bcm2712_pctl_dt_free_map(struct pinctrl_dev *pctldev,
850 struct pinctrl_map *maps, unsigned num_maps)
854 for (i = 0; i < num_maps; i++)
855 if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
856 kfree(maps[i].data.configs.configs);
861 static const struct pinctrl_ops bcm2712_pctl_ops = {
862 .get_groups_count = bcm2712_pctl_get_groups_count,
863 .get_group_name = bcm2712_pctl_get_group_name,
864 .get_group_pins = bcm2712_pctl_get_group_pins,
865 .pin_dbg_show = bcm2712_pctl_pin_dbg_show,
866 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
867 .dt_free_map = bcm2712_pctl_dt_free_map,
870 static int bcm2712_pmx_free(struct pinctrl_dev *pctldev,
873 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
875 /* disable by setting to GPIO */
876 bcm2712_pinctrl_fsel_set(pc, offset, func_gpio);
880 static int bcm2712_pmx_get_functions_count(struct pinctrl_dev *pctldev)
885 static const char *bcm2712_pmx_get_function_name(struct pinctrl_dev *pctldev,
888 return (selector < func_count) ? bcm2712_func_names[selector] : NULL;
891 static int bcm2712_pmx_get_function_groups(struct pinctrl_dev *pctldev,
893 const char * const **groups,
894 unsigned * const num_groups)
896 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
897 /* every pin can do every function */
898 *groups = pc->gpio_groups;
899 *num_groups = pc->pctl_desc.npins;
904 static int bcm2712_pmx_set(struct pinctrl_dev *pctldev,
905 unsigned func_selector,
906 unsigned group_selector)
908 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
910 bcm2712_pinctrl_fsel_set(pc, group_selector, func_selector);
914 static int bcm2712_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
915 struct pinctrl_gpio_range *range,
918 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
920 bcm2712_pinctrl_fsel_set(pc, pin, func_gpio);
925 static void bcm2712_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
926 struct pinctrl_gpio_range *range,
929 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
931 /* disable by setting to GPIO */
932 bcm2712_pinctrl_fsel_set(pc, offset, func_gpio);
935 static const struct pinmux_ops bcm2712_pmx_ops = {
936 .free = bcm2712_pmx_free,
937 .get_functions_count = bcm2712_pmx_get_functions_count,
938 .get_function_name = bcm2712_pmx_get_function_name,
939 .get_function_groups = bcm2712_pmx_get_function_groups,
940 .set_mux = bcm2712_pmx_set,
941 .gpio_request_enable = bcm2712_pmx_gpio_request_enable,
942 .gpio_disable_free = bcm2712_pmx_gpio_disable_free,
945 static unsigned int bcm2712_pull_config_get(struct bcm2712_pinctrl *pc,
948 u32 bit = pc->pin_regs[pin].pad_bit, val;
950 if (unlikely(bit == REG_BIT_INVALID))
951 return BCM2712_PULL_NONE;
953 val = bcm2712_reg_rd(pc, BIT_TO_REG(bit));
954 return (val >> BIT_TO_SHIFT(bit)) & BCM2712_PULL_MASK;
957 static void bcm2712_pull_config_set(struct bcm2712_pinctrl *pc,
958 unsigned int pin, unsigned int arg)
960 u32 bit = pc->pin_regs[pin].pad_bit, val;
963 if (unlikely(bit == REG_BIT_INVALID)) {
964 dev_warn(pc->dev, "can't set pulls for %s\n", pc->gpio_groups[pin]);
968 spin_lock_irqsave(&pc->lock, flags);
970 val = bcm2712_reg_rd(pc, BIT_TO_REG(bit));
971 val &= ~(BCM2712_PULL_MASK << BIT_TO_SHIFT(bit));
972 val |= (arg << BIT_TO_SHIFT(bit));
973 bcm2712_reg_wr(pc, BIT_TO_REG(bit), val);
975 spin_unlock_irqrestore(&pc->lock, flags);
978 static int bcm2712_pinconf_get(struct pinctrl_dev *pctldev,
979 unsigned pin, unsigned long *config)
981 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
982 enum pin_config_param param = pinconf_to_config_param(*config);
986 case PIN_CONFIG_BIAS_DISABLE:
987 arg = (bcm2712_pull_config_get(pc, pin) == BCM2712_PULL_NONE);
989 case PIN_CONFIG_BIAS_PULL_DOWN:
990 arg = (bcm2712_pull_config_get(pc, pin) == BCM2712_PULL_DOWN);
992 case PIN_CONFIG_BIAS_PULL_UP:
993 arg = (bcm2712_pull_config_get(pc, pin) == BCM2712_PULL_UP);
999 *config = pinconf_to_config_packed(param, arg);
1004 static int bcm2712_pinconf_set(struct pinctrl_dev *pctldev,
1005 unsigned int pin, unsigned long *configs,
1006 unsigned int num_configs)
1008 struct bcm2712_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
1012 for (i = 0; i < num_configs; i++) {
1013 param = pinconf_to_config_param(configs[i]);
1014 arg = pinconf_to_config_argument(configs[i]);
1017 case PIN_CONFIG_BIAS_DISABLE:
1018 bcm2712_pull_config_set(pc, pin, BCM2712_PULL_NONE);
1020 case PIN_CONFIG_BIAS_PULL_DOWN:
1021 bcm2712_pull_config_set(pc, pin, BCM2712_PULL_DOWN);
1023 case PIN_CONFIG_BIAS_PULL_UP:
1024 bcm2712_pull_config_set(pc, pin, BCM2712_PULL_UP);
1029 } /* for each config */
1034 static const struct pinconf_ops bcm2712_pinconf_ops = {
1036 .pin_config_get = bcm2712_pinconf_get,
1037 .pin_config_set = bcm2712_pinconf_set,
1040 static const struct pinctrl_desc bcm2712_c0_pinctrl_desc = {
1041 .name = "pinctrl-bcm2712",
1042 .pins = bcm2712_c0_gpio_pins,
1043 .npins = ARRAY_SIZE(bcm2712_c0_gpio_pins),
1044 .pctlops = &bcm2712_pctl_ops,
1045 .pmxops = &bcm2712_pmx_ops,
1046 .confops = &bcm2712_pinconf_ops,
1047 .owner = THIS_MODULE,
1050 static const struct pinctrl_desc bcm2712_c0_aon_pinctrl_desc = {
1051 .name = "aon-pinctrl-bcm2712",
1052 .pins = bcm2712_c0_aon_gpio_pins,
1053 .npins = ARRAY_SIZE(bcm2712_c0_aon_gpio_pins),
1054 .pctlops = &bcm2712_pctl_ops,
1055 .pmxops = &bcm2712_pmx_ops,
1056 .confops = &bcm2712_pinconf_ops,
1057 .owner = THIS_MODULE,
1060 static const struct pinctrl_desc bcm2712_d0_pinctrl_desc = {
1061 .name = "pinctrl-bcm2712",
1062 .pins = bcm2712_d0_gpio_pins,
1063 .npins = ARRAY_SIZE(bcm2712_d0_gpio_pins),
1064 .pctlops = &bcm2712_pctl_ops,
1065 .pmxops = &bcm2712_pmx_ops,
1066 .confops = &bcm2712_pinconf_ops,
1067 .owner = THIS_MODULE,
1070 static const struct pinctrl_desc bcm2712_d0_aon_pinctrl_desc = {
1071 .name = "aon-pinctrl-bcm2712",
1072 .pins = bcm2712_d0_aon_gpio_pins,
1073 .npins = ARRAY_SIZE(bcm2712_d0_aon_gpio_pins),
1074 .pctlops = &bcm2712_pctl_ops,
1075 .pmxops = &bcm2712_pmx_ops,
1076 .confops = &bcm2712_pinconf_ops,
1077 .owner = THIS_MODULE,
1080 static const struct pinctrl_gpio_range bcm2712_c0_pinctrl_gpio_range = {
1081 .name = "pinctrl-bcm2712",
1082 .npins = ARRAY_SIZE(bcm2712_c0_gpio_pins),
1085 static const struct pinctrl_gpio_range bcm2712_c0_aon_pinctrl_gpio_range = {
1086 .name = "aon-pinctrl-bcm2712",
1087 .npins = ARRAY_SIZE(bcm2712_c0_aon_gpio_pins),
1090 static const struct pinctrl_gpio_range bcm2712_d0_pinctrl_gpio_range = {
1091 .name = "pinctrl-bcm2712",
1092 .npins = ARRAY_SIZE(bcm2712_d0_gpio_pins),
1095 static const struct pinctrl_gpio_range bcm2712_d0_aon_pinctrl_gpio_range = {
1096 .name = "aon-pinctrl-bcm2712",
1097 .npins = ARRAY_SIZE(bcm2712_d0_aon_gpio_pins),
1100 static const struct bcm_plat_data bcm2712_c0_plat_data = {
1101 .pctl_desc = &bcm2712_c0_pinctrl_desc,
1102 .gpio_range = &bcm2712_c0_pinctrl_gpio_range,
1103 .pin_regs = bcm2712_c0_gpio_pin_regs,
1104 .pin_funcs = bcm2712_c0_gpio_pin_funcs,
1107 static const struct bcm_plat_data bcm2712_c0_aon_plat_data = {
1108 .pctl_desc = &bcm2712_c0_aon_pinctrl_desc,
1109 .gpio_range = &bcm2712_c0_aon_pinctrl_gpio_range,
1110 .pin_regs = bcm2712_c0_aon_gpio_pin_regs,
1111 .pin_funcs = bcm2712_c0_aon_gpio_pin_funcs,
1114 static const struct bcm_plat_data bcm2712_d0_plat_data = {
1115 .pctl_desc = &bcm2712_d0_pinctrl_desc,
1116 .gpio_range = &bcm2712_d0_pinctrl_gpio_range,
1117 .pin_regs = bcm2712_d0_gpio_pin_regs,
1118 .pin_funcs = bcm2712_d0_gpio_pin_funcs,
1121 static const struct bcm_plat_data bcm2712_d0_aon_plat_data = {
1122 .pctl_desc = &bcm2712_d0_aon_pinctrl_desc,
1123 .gpio_range = &bcm2712_d0_aon_pinctrl_gpio_range,
1124 .pin_regs = bcm2712_d0_aon_gpio_pin_regs,
1125 .pin_funcs = bcm2712_d0_aon_gpio_pin_funcs,
1128 static const struct of_device_id bcm2712_pinctrl_match[] = {
1130 .compatible = "brcm,bcm2712-pinctrl",
1131 .data = &bcm2712_c0_plat_data,
1134 .compatible = "brcm,bcm2712-aon-pinctrl",
1135 .data = &bcm2712_c0_aon_plat_data,
1139 .compatible = "brcm,bcm2712c0-pinctrl",
1140 .data = &bcm2712_c0_plat_data,
1143 .compatible = "brcm,bcm2712c0-aon-pinctrl",
1144 .data = &bcm2712_c0_aon_plat_data,
1148 .compatible = "brcm,bcm2712d0-pinctrl",
1149 .data = &bcm2712_d0_plat_data,
1152 .compatible = "brcm,bcm2712d0-aon-pinctrl",
1153 .data = &bcm2712_d0_aon_plat_data,
1158 static int bcm2712_pinctrl_probe(struct platform_device *pdev)
1160 struct device *dev = &pdev->dev;
1161 struct device_node *np = dev->of_node;
1162 const struct bcm_plat_data *pdata;
1163 const struct of_device_id *match;
1164 struct bcm2712_pinctrl *pc;
1168 match = of_match_node(bcm2712_pinctrl_match, np);
1171 pdata = match->data;
1173 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
1177 platform_set_drvdata(pdev, pc);
1179 spin_lock_init(&pc->lock);
1181 pc->base = devm_of_iomap(dev, np, 0, NULL);
1182 if (IS_ERR(pc->base)) {
1183 dev_err(dev, "could not get IO memory\n");
1184 return PTR_ERR(pc->base);
1187 pc->pctl_desc = *pdata->pctl_desc;
1188 num_pins = pc->pctl_desc.npins;
1189 names = devm_kmalloc_array(dev, num_pins, sizeof(const char *),
1193 for (i = 0; i < num_pins; i++)
1194 names[i] = pc->pctl_desc.pins[i].name;
1195 pc->gpio_groups = names;
1196 pc->pin_regs = pdata->pin_regs;
1197 pc->pin_funcs = pdata->pin_funcs;
1198 pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
1199 if (IS_ERR(pc->pctl_dev))
1200 return PTR_ERR(pc->pctl_dev);
1202 pc->gpio_range = *pdata->gpio_range;
1203 pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
1208 static struct platform_driver bcm2712_pinctrl_driver = {
1209 .probe = bcm2712_pinctrl_probe,
1211 .name = MODULE_NAME,
1212 .of_match_table = bcm2712_pinctrl_match,
1213 .suppress_bind_attrs = true,
1216 builtin_platform_driver(bcm2712_pinctrl_driver);