2 # PINCTRL infrastructure and drivers
8 bool "Support pin controllers"
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
30 config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
49 This option enables pin multiplexing through the generic pinctrl
50 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
53 The driver is typically controlled by the device tree.
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
59 This option enables pin configuration through the generic pinctrl
62 config PINCONF_RECURSIVE
63 bool "Support recursive binding for pin configuration nodes"
64 depends on PINCTRL_FULL
65 default n if ARCH_STM32MP
68 In the Linux pinctrl binding, the pin configuration nodes need not be
69 direct children of the pin controller device (may be grandchildren for
70 example). It is define is each individual pin controller device.
71 Say Y here if you want to keep this behavior with the pinconfig
72 u-class: all sub are recursively bounded.
73 If the option is disabled, this behavior is deactivated and only
74 the direct children of pin controller will be assumed as pin
75 configuration; you can save memory footprint when this feature is
79 bool "Support pin controllers in SPL"
80 depends on SPL && SPL_DM
82 This option is an SPL-variant of the PINCTRL option.
83 See the help of PINCTRL for details.
86 bool "Support pin controllers in TPL"
87 depends on TPL && TPL_DM
89 This option is an TPL variant of the PINCTRL option.
90 See the help of PINCTRL for details.
92 config SPL_PINCTRL_FULL
93 bool "Support full pin controllers in SPL"
94 depends on SPL_PINCTRL && SPL_OF_CONTROL
95 default n if TARGET_STM32F746_DISCO
98 This option is an SPL-variant of the PINCTRL_FULL option.
99 See the help of PINCTRL_FULL for details.
101 config TPL_PINCTRL_FULL
102 bool "Support full pin controllers in TPL"
103 depends on TPL_PINCTRL && TPL_OF_CONTROL
105 This option is an TPL-variant of the PINCTRL_FULL option.
106 See the help of PINCTRL_FULL for details.
108 config SPL_PINCTRL_GENERIC
109 bool "Support generic pin controllers in SPL"
110 depends on SPL_PINCTRL_FULL
113 This option is an SPL-variant of the PINCTRL_GENERIC option.
114 See the help of PINCTRL_GENERIC for details.
117 bool "Support pin multiplexing controllers in SPL"
118 depends on SPL_PINCTRL_GENERIC
121 This option is an SPL-variant of the PINMUX option.
122 See the help of PINMUX for details.
123 The pinctrl subsystem can add a substantial overhead to the SPL
124 image since it typically requires quite a few tables either in the
125 driver or in the device tree. If this is acceptable and you need
126 to adjust pin multiplexing in SPL in order to boot into U-Boot,
127 enable this option. You will need to enable device tree in SPL
131 bool "Support pin configuration controllers in SPL"
132 depends on SPL_PINCTRL_GENERIC
134 This option is an SPL-variant of the PINCONF option.
135 See the help of PINCONF for details.
137 config SPL_PINCONF_RECURSIVE
138 bool "Support recursive binding for pin configuration nodes in SPL"
139 depends on SPL_PINCTRL_FULL
140 default n if ARCH_STM32MP
143 This option is an SPL-variant of the PINCONF_RECURSIVE option.
144 See the help of PINCONF_RECURSIVE for details.
146 if PINCTRL || SPL_PINCTRL
149 bool "Apple pinctrl driver"
150 depends on DM && PINCTRL_GENERIC && ARCH_APPLE
153 Support pin multiplexing on Apple SoCs.
155 The driver is controlled by a device tree node which contains
156 both the GPIO definitions and pin control functions for each
157 available multiplex function.
159 config PINCTRL_AR933X
160 bool "QCA/Athores ar933x pin control driver"
161 depends on DM && SOC_AR933X
163 Support pin multiplexing control on QCA/Athores ar933x SoCs.
164 The driver is controlled by a device tree node which contains
165 both the GPIO definitions and pin control functions for each
166 available multiplex function.
169 bool "AT91 pinctrl driver"
172 This option is to enable the AT91 pinctrl driver for AT91 PIO
175 AT91 PIO controller is a combined gpio-controller, pin-mux and
176 pin-config module. Each I/O pin may be dedicated as a general-purpose
177 I/O or be assigned to a function of an embedded peripheral. Each I/O
178 pin has a glitch filter providing rejection of glitches lower than
179 one-half of peripheral clock cycle and a debouncing filter providing
180 rejection of unwanted pulses from key or push button operations. You
181 can also control the multi-driver capability, pull-up and pull-down
182 feature on each I/O pin.
184 config PINCTRL_AT91PIO4
185 bool "AT91 PIO4 pinctrl driver"
188 This option is to enable the AT91 pinctrl driver for AT91 PIO4
189 controller which is available on SAMA5D2 SoC.
192 bool "Standard Intel pin-control and pin-mux driver"
194 Recent Intel chips such as Apollo Lake (APL) use a common pin control
195 and GPIO scheme. The settings for this come from an SoC-specific
196 driver which must be separately enabled. The driver supports setting
197 pins on start-up and changing the GPIO attributes.
200 bool "Microchip PIC32 pin-control and pin-mux driver"
201 depends on DM && MACH_PIC32
204 Supports individual pin selection and configuration for each
205 remappable peripheral available on Microchip PIC32
206 SoCs. This driver is controlled by a device tree node which
207 contains both GPIO definition and pin control functions.
209 config PINCTRL_QCA953X
210 bool "QCA/Athores qca953x pin control driver"
211 depends on DM && SOC_QCA953X
213 Support pin multiplexing control on QCA/Athores qca953x SoCs.
215 The driver is controlled by a device tree node which contains both
216 the GPIO definitions and pin control functions for each available
220 bool "QE based pinctrl driver, like on mpc83xx"
223 This option is to enable the QE pinctrl driver for QE based io
226 config PINCTRL_ROCKCHIP_RV1108
227 bool "Rockchip rv1108 pin control driver"
230 Support pin multiplexing control on Rockchip rv1108 SoC.
232 The driver is controlled by a device tree node which contains
233 both the GPIO definitions and pin control functions for each
234 available multiplex function.
236 config PINCTRL_SANDBOX
237 bool "Sandbox pinctrl driver"
240 This enables pinctrl driver for sandbox.
242 Currently, this driver actually does nothing but print debug
243 messages when pinctrl operations are invoked.
245 config PINCTRL_SINGLE
246 bool "Single register pin-control and pin-multiplex driver"
249 This enables pinctrl driver for systems using a single register for
250 pin configuration and multiplexing. TI's AM335X SoCs are examples of
253 Depending on the platform make sure to also enable OF_TRANSLATE and
254 eventually SPL_OF_TRANSLATE to get correct address translations.
257 bool "STMicroelectronics STi pin-control and pin-mux driver"
258 depends on DM && ARCH_STI
261 Support pin multiplexing control on STMicrolectronics STi SoCs.
263 The driver is controlled by a device tree node which contains both
264 the GPIO definitions and pin control functions for each available
268 bool "ST STM32 pin control driver"
271 Supports pin multiplexing control on stm32 SoCs.
273 The driver is controlled by a device tree node which contains both
274 the GPIO definitions and pin control functions for each available
278 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
279 depends on DM && PINCTRL_FULL
281 I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
283 Supports pin multiplexing control on stm32 SoCs.
285 The driver is controlled by a device tree node which contains both
286 the GPIO definitions and pin control functions for each available
289 config SPL_PINCTRL_STMFX
290 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
291 depends on SPL_PINCTRL_FULL
293 This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
294 See the help of PINCTRL_STMFX for details.
296 config ASPEED_AST2500_PINCTRL
297 bool "Aspeed AST2500 pin control driver"
298 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
301 Support pin multiplexing control on Aspeed ast2500 SoC. The driver
302 uses Generic Pinctrl framework and is compatible with the Linux
303 driver, i.e. it uses the same device tree configuration.
305 config ASPEED_AST2600_PINCTRL
306 bool "Aspeed AST2600 pin control driver"
307 depends on DM && PINCTRL_GENERIC && ASPEED_AST2600
310 Support pin multiplexing control on Aspeed ast2600 SoC. The driver
311 uses Generic Pinctrl framework and is compatible with the Linux
312 driver, i.e. it uses the same device tree configuration.
315 bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
316 depends on DM && PINCTRL_GENERIC
318 Support pin multiplexing on the K210. The "FPIOA" can remap any
319 supported function to any multifunctional IO pin. It can also perform
320 basic GPIO functions, such as reading the current value of a pin.
323 source "drivers/pinctrl/broadcom/Kconfig"
324 source "drivers/pinctrl/exynos/Kconfig"
325 source "drivers/pinctrl/intel/Kconfig"
326 source "drivers/pinctrl/mediatek/Kconfig"
327 source "drivers/pinctrl/meson/Kconfig"
328 source "drivers/pinctrl/mscc/Kconfig"
329 source "drivers/pinctrl/mtmips/Kconfig"
330 source "drivers/pinctrl/mvebu/Kconfig"
331 source "drivers/pinctrl/nexell/Kconfig"
332 source "drivers/pinctrl/nxp/Kconfig"
333 source "drivers/pinctrl/renesas/Kconfig"
334 source "drivers/pinctrl/rockchip/Kconfig"
335 source "drivers/pinctrl/uniphier/Kconfig"