1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
13 #include <generic-phy.h>
14 #include <linux/libfdt.h>
16 #include <reset-uclass.h>
20 #include <linux/bitops.h>
21 #include <linux/compat.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 /* Default PHY_SEL and REFCLKSEL configuration */
26 #define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
28 /* ports parameters overriding */
29 #define STIH407_USB_PICOPHY_PARAM_DEF 0x39a4dc
31 #define PHYPARAM_REG 1
36 struct regmap *regmap;
37 struct reset_ctl global_ctl;
38 struct reset_ctl port_ctl;
43 static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
47 ret = reset_deassert(&phy->global_ctl);
49 pr_err("PHY global deassert failed: %d", ret);
53 ret = reset_deassert(&phy->port_ctl);
55 pr_err("PHY port deassert failed: %d", ret);
60 static int sti_usb_phy_init(struct phy *usb_phy)
62 struct udevice *dev = usb_phy->dev;
63 struct sti_usb_phy *phy = dev_get_priv(dev);
66 /* set ctrl picophy value */
67 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl;
68 /* CTRL_PORT mask is 0x1f */
69 clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
71 /* set ports parameters overriding */
72 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param;
73 /* PARAM_DEF mask is 0xffffffff */
74 clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
76 return sti_usb_phy_deassert(phy);
79 static int sti_usb_phy_exit(struct phy *usb_phy)
81 struct udevice *dev = usb_phy->dev;
82 struct sti_usb_phy *phy = dev_get_priv(dev);
85 ret = reset_assert(&phy->port_ctl);
87 pr_err("PHY port assert failed: %d", ret);
91 ret = reset_assert(&phy->global_ctl);
93 pr_err("PHY global assert failed: %d", ret);
98 struct phy_ops sti_usb_phy_ops = {
99 .init = sti_usb_phy_init,
100 .exit = sti_usb_phy_exit,
103 int sti_usb_phy_probe(struct udevice *dev)
105 struct sti_usb_phy *priv = dev_get_priv(dev);
106 struct udevice *syscon;
107 struct ofnode_phandle_args syscfg_phandle;
108 u32 cells[PHYPARAM_NB];
111 /* get corresponding syscon phandle */
112 ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
116 pr_err("Can't get syscfg phandle: %d\n", ret);
120 ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
123 pr_err("unable to find syscon device (%d)\n", ret);
127 priv->regmap = syscon_get_regmap(syscon);
129 pr_err("unable to find regmap\n");
133 /* get phy param offset */
134 count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
139 pr_err("Bad PHY st,syscfg property %d\n", count);
143 if (count > PHYPARAM_NB) {
144 pr_err("Unsupported PHY param count %d\n", count);
148 priv->param = cells[PHYPARAM_REG];
149 priv->ctrl = cells[PHYCTRL_REG];
151 /* get global reset control */
152 ret = reset_get_by_name(dev, "global", &priv->global_ctl);
154 pr_err("can't get global reset for %s (%d)", dev->name, ret);
158 /* get port reset control */
159 ret = reset_get_by_name(dev, "port", &priv->port_ctl);
161 pr_err("can't get port reset for %s (%d)", dev->name, ret);
168 static const struct udevice_id sti_usb_phy_ids[] = {
169 { .compatible = "st,stih407-usb2-phy" },
173 U_BOOT_DRIVER(sti_usb_phy) = {
174 .name = "sti_usb_phy",
176 .of_match = sti_usb_phy_ids,
177 .probe = sti_usb_phy_probe,
178 .ops = &sti_usb_phy_ops,
179 .priv_auto_alloc_size = sizeof(struct sti_usb_phy),