1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
14 #include <generic-phy.h>
15 #include <linux/libfdt.h>
17 #include <reset-uclass.h>
21 #include <linux/bitops.h>
22 #include <linux/compat.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 /* Default PHY_SEL and REFCLKSEL configuration */
27 #define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
29 /* ports parameters overriding */
30 #define STIH407_USB_PICOPHY_PARAM_DEF 0x39a4dc
32 #define PHYPARAM_REG 1
37 struct regmap *regmap;
38 struct reset_ctl global_ctl;
39 struct reset_ctl port_ctl;
44 static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
48 ret = reset_deassert(&phy->global_ctl);
50 pr_err("PHY global deassert failed: %d", ret);
54 ret = reset_deassert(&phy->port_ctl);
56 pr_err("PHY port deassert failed: %d", ret);
61 static int sti_usb_phy_init(struct phy *usb_phy)
63 struct udevice *dev = usb_phy->dev;
64 struct sti_usb_phy *phy = dev_get_priv(dev);
67 /* set ctrl picophy value */
68 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl;
69 /* CTRL_PORT mask is 0x1f */
70 clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
72 /* set ports parameters overriding */
73 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param;
74 /* PARAM_DEF mask is 0xffffffff */
75 clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
77 return sti_usb_phy_deassert(phy);
80 static int sti_usb_phy_exit(struct phy *usb_phy)
82 struct udevice *dev = usb_phy->dev;
83 struct sti_usb_phy *phy = dev_get_priv(dev);
86 ret = reset_assert(&phy->port_ctl);
88 pr_err("PHY port assert failed: %d", ret);
92 ret = reset_assert(&phy->global_ctl);
94 pr_err("PHY global assert failed: %d", ret);
99 struct phy_ops sti_usb_phy_ops = {
100 .init = sti_usb_phy_init,
101 .exit = sti_usb_phy_exit,
104 int sti_usb_phy_probe(struct udevice *dev)
106 struct sti_usb_phy *priv = dev_get_priv(dev);
107 struct udevice *syscon;
108 struct ofnode_phandle_args syscfg_phandle;
109 u32 cells[PHYPARAM_NB];
112 /* get corresponding syscon phandle */
113 ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
117 pr_err("Can't get syscfg phandle: %d\n", ret);
121 ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
124 pr_err("unable to find syscon device (%d)\n", ret);
128 priv->regmap = syscon_get_regmap(syscon);
130 pr_err("unable to find regmap\n");
134 /* get phy param offset */
135 count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
140 pr_err("Bad PHY st,syscfg property %d\n", count);
144 if (count > PHYPARAM_NB) {
145 pr_err("Unsupported PHY param count %d\n", count);
149 priv->param = cells[PHYPARAM_REG];
150 priv->ctrl = cells[PHYCTRL_REG];
152 /* get global reset control */
153 ret = reset_get_by_name(dev, "global", &priv->global_ctl);
155 pr_err("can't get global reset for %s (%d)", dev->name, ret);
159 /* get port reset control */
160 ret = reset_get_by_name(dev, "port", &priv->port_ctl);
162 pr_err("can't get port reset for %s (%d)", dev->name, ret);
169 static const struct udevice_id sti_usb_phy_ids[] = {
170 { .compatible = "st,stih407-usb2-phy" },
174 U_BOOT_DRIVER(sti_usb_phy) = {
175 .name = "sti_usb_phy",
177 .of_match = sti_usb_phy_ids,
178 .probe = sti_usb_phy_probe,
179 .ops = &sti_usb_phy_ops,
180 .priv_auto = sizeof(struct sti_usb_phy),