drivers/phy/realtek/phy-rtk-usb3.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  phy-rtk-usb3.c RTK usb3.0 phy driver
   4  *
   5  * copyright (c) 2023 realtek semiconductor corporation
   6  *
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/of.h>
  11 #include <linux/of_device.h>
  12 #include <linux/of_address.h>
  13 #include <linux/uaccess.h>
  14 #include <linux/debugfs.h>
  15 #include <linux/nvmem-consumer.h>
  16 #include <linux/regmap.h>
  17 #include <linux/sys_soc.h>
  18 #include <linux/mfd/syscon.h>
  19 #include <linux/phy/phy.h>
  20 #include <linux/usb.h>
  21 #include <linux/usb/hcd.h>
  22 #include <linux/usb/phy.h>
  23
  24 #define USB_MDIO_CTRL_PHY_BUSY BIT(7)
  25 #define USB_MDIO_CTRL_PHY_WRITE BIT(0)
  26 #define USB_MDIO_CTRL_PHY_ADDR_SHIFT 8
  27 #define USB_MDIO_CTRL_PHY_DATA_SHIFT 16
  28
  29 #define MAX_USB_PHY_DATA_SIZE 0x30
  30 #define PHY_ADDR_0X09 0x09
  31 #define PHY_ADDR_0X0B 0x0b
  32 #define PHY_ADDR_0X0D 0x0d
  33 #define PHY_ADDR_0X10 0x10
  34 #define PHY_ADDR_0X1F 0x1f
  35 #define PHY_ADDR_0X20 0x20
  36 #define PHY_ADDR_0X21 0x21
  37 #define PHY_ADDR_0X30 0x30
  38
  39 #define REG_0X09_FORCE_CALIBRATION BIT(9)
  40 #define REG_0X0B_RX_OFFSET_RANGE_MASK 0xc
  41 #define REG_0X0D_RX_DEBUG_TEST_EN BIT(6)
  42 #define REG_0X10_DEBUG_MODE_SETTING 0x3c0
  43 #define REG_0X10_DEBUG_MODE_SETTING_MASK 0x3f8
  44 #define REG_0X1F_RX_OFFSET_CODE_MASK 0x1e
  45
  46 #define USB_U3_TX_LFPS_SWING_TRIM_SHIFT 4
  47 #define USB_U3_TX_LFPS_SWING_TRIM_MASK 0xf
  48 #define AMPLITUDE_CONTROL_COARSE_MASK 0xff
  49 #define AMPLITUDE_CONTROL_FINE_MASK 0xffff
  50 #define AMPLITUDE_CONTROL_COARSE_DEFAULT 0xff
  51 #define AMPLITUDE_CONTROL_FINE_DEFAULT 0xffff
  52
  53 #define PHY_ADDR_MAP_ARRAY_INDEX(addr) (addr)
  54 #define ARRAY_INDEX_MAP_PHY_ADDR(index) (index)
  55
  56 struct phy_reg {
  57         void __iomem *reg_mdio_ctl;
  58 };
  59
  60 struct phy_data {
  61         u8 addr;
  62         u16 data;
  63 };
  64
  65 struct phy_cfg {
  66         int param_size;
  67         struct phy_data param[MAX_USB_PHY_DATA_SIZE];
  68
  69         bool check_efuse;
  70         bool do_toggle;
  71         bool do_toggle_once;
  72         bool use_default_parameter;
  73         bool check_rx_front_end_offset;
  74 };
  75
  76 struct phy_parameter {
  77         struct phy_reg phy_reg;
  78
  79         /* Get from efuse */
  80         u8 efuse_usb_u3_tx_lfps_swing_trim;
  81
  82         /* Get from dts */
  83         u32 amplitude_control_coarse;
  84         u32 amplitude_control_fine;
  85 };
  86
  87 struct rtk_phy {
  88         struct usb_phy phy;
  89         struct device *dev;
  90
  91         struct phy_cfg *phy_cfg;
  92         int num_phy;
  93         struct phy_parameter *phy_parameter;
  94
  95         struct dentry *debug_dir;
  96 };
  97
  98 #define PHY_IO_TIMEOUT_USEC             (50000)
  99 #define PHY_IO_DELAY_US                 (100)
 100
 101 static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
 102 {
 103         int ret;
 104         unsigned int val;
 105
 106         ret = read_poll_timeout(readl, val, ((val & mask) == result),
 107                                 PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg);
 108         if (ret) {
 109                 pr_err("%s can't program USB phy\n", __func__);
 110                 return -ETIMEDOUT;
 111         }
 112
 113         return 0;
 114 }
 115
 116 static int rtk_phy3_wait_vbusy(struct phy_reg *phy_reg)
 117 {
 118         return utmi_wait_register(phy_reg->reg_mdio_ctl, USB_MDIO_CTRL_PHY_BUSY, 0);
 119 }
 120
 121 static u16 rtk_phy_read(struct phy_reg *phy_reg, char addr)
 122 {
 123         unsigned int tmp;
 124         u32 value;
 125
 126         tmp = (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT);
 127
 128         writel(tmp, phy_reg->reg_mdio_ctl);
 129
 130         rtk_phy3_wait_vbusy(phy_reg);
 131
 132         value = readl(phy_reg->reg_mdio_ctl);
 133         value = value >> USB_MDIO_CTRL_PHY_DATA_SHIFT;
 134
 135         return (u16)value;
 136 }
 137
 138 static int rtk_phy_write(struct phy_reg *phy_reg, char addr, u16 data)
 139 {
 140         unsigned int val;
 141
 142         val = USB_MDIO_CTRL_PHY_WRITE |
 143                     (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT) |
 144                     (data << USB_MDIO_CTRL_PHY_DATA_SHIFT);
 145
 146         writel(val, phy_reg->reg_mdio_ctl);
 147
 148         rtk_phy3_wait_vbusy(phy_reg);
 149
 150         return 0;
 151 }
 152
 153 static void do_rtk_usb3_phy_toggle(struct rtk_phy *rtk_phy, int index, bool connect)
 154 {
 155         struct phy_cfg *phy_cfg = rtk_phy->phy_cfg;
 156         struct phy_reg *phy_reg;
 157         struct phy_parameter *phy_parameter;
 158         struct phy_data *phy_data;
 159         u8 addr;
 160         u16 data;
 161         int i;
 162
 163         phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
 164         phy_reg = &phy_parameter->phy_reg;
 165
 166         if (!phy_cfg->do_toggle)
 167                 return;
 168
 169         i = PHY_ADDR_MAP_ARRAY_INDEX(PHY_ADDR_0X09);
 170         phy_data = phy_cfg->param + i;
 171         addr = phy_data->addr;
 172         data = phy_data->data;
 173
 174         if (!addr && !data) {
 175                 addr = PHY_ADDR_0X09;
 176                 data = rtk_phy_read(phy_reg, addr);
 177                 phy_data->addr = addr;
 178                 phy_data->data = data;
 179         }
 180
 181         rtk_phy_write(phy_reg, addr, data & (~REG_0X09_FORCE_CALIBRATION));
 182         mdelay(1);
 183         rtk_phy_write(phy_reg, addr, data | REG_0X09_FORCE_CALIBRATION);
 184 }
 185
 186 static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index)
 187 {
 188         struct phy_cfg *phy_cfg;
 189         struct phy_reg *phy_reg;
 190         struct phy_parameter *phy_parameter;
 191         int i = 0;
 192
 193         phy_cfg = rtk_phy->phy_cfg;
 194         phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
 195         phy_reg = &phy_parameter->phy_reg;
 196
 197         if (phy_cfg->use_default_parameter)
 198                 goto do_toggle;
 199
 200         for (i = 0; i < phy_cfg->param_size; i++) {
 201                 struct phy_data *phy_data = phy_cfg->param + i;
 202                 u8 addr = phy_data->addr;
 203                 u16 data = phy_data->data;
 204
 205                 if (!addr && !data)
 206                         continue;
 207
 208                 rtk_phy_write(phy_reg, addr, data);
 209         }
 210
 211 do_toggle:
 212         if (phy_cfg->do_toggle_once)
 213                 phy_cfg->do_toggle = true;
 214
 215         do_rtk_usb3_phy_toggle(rtk_phy, index, false);
 216
 217         if (phy_cfg->do_toggle_once) {
 218                 u16 check_value = 0;
 219                 int count = 10;
 220                 u16 value_0x0d, value_0x10;
 221
 222                 /* Enable Debug mode by set 0x0D and 0x10 */
 223                 value_0x0d = rtk_phy_read(phy_reg, PHY_ADDR_0X0D);
 224                 value_0x10 = rtk_phy_read(phy_reg, PHY_ADDR_0X10);
 225
 226                 rtk_phy_write(phy_reg, PHY_ADDR_0X0D,
 227                               value_0x0d | REG_0X0D_RX_DEBUG_TEST_EN);
 228                 rtk_phy_write(phy_reg, PHY_ADDR_0X10,
 229                               (value_0x10 & ~REG_0X10_DEBUG_MODE_SETTING_MASK) |
 230                               REG_0X10_DEBUG_MODE_SETTING);
 231
 232                 check_value = rtk_phy_read(phy_reg, PHY_ADDR_0X30);
 233
 234                 while (!(check_value & BIT(15))) {
 235                         check_value = rtk_phy_read(phy_reg, PHY_ADDR_0X30);
 236                         mdelay(1);
 237                         if (count-- < 0)
 238                                 break;
 239                 }
 240
 241                 if (!(check_value & BIT(15)))
 242                         dev_info(rtk_phy->dev, "toggle fail addr=0x%02x, data=0x%04x\n",
 243                                  PHY_ADDR_0X30, check_value);
 244
 245                 /* Disable Debug mode by set 0x0D and 0x10 to default*/
 246                 rtk_phy_write(phy_reg, PHY_ADDR_0X0D, value_0x0d);
 247                 rtk_phy_write(phy_reg, PHY_ADDR_0X10, value_0x10);
 248
 249                 phy_cfg->do_toggle = false;
 250         }
 251
 252         if (phy_cfg->check_rx_front_end_offset) {
 253                 u16 rx_offset_code, rx_offset_range;
 254                 u16 code_mask = REG_0X1F_RX_OFFSET_CODE_MASK;
 255                 u16 range_mask = REG_0X0B_RX_OFFSET_RANGE_MASK;
 256                 bool do_update = false;
 257
 258                 rx_offset_code = rtk_phy_read(phy_reg, PHY_ADDR_0X1F);
 259                 if (((rx_offset_code & code_mask) == 0x0) ||
 260                     ((rx_offset_code & code_mask) == code_mask))
 261                         do_update = true;
 262
 263                 rx_offset_range = rtk_phy_read(phy_reg, PHY_ADDR_0X0B);
 264                 if (((rx_offset_range & range_mask) == range_mask) && do_update) {
 265                         dev_warn(rtk_phy->dev, "Don't update rx_offset_range (rx_offset_code=0x%x, rx_offset_range=0x%x)\n",
 266                                  rx_offset_code, rx_offset_range);
 267                         do_update = false;
 268                 }
 269
 270                 if (do_update) {
 271                         u16 tmp1, tmp2;
 272
 273                         tmp1 = rx_offset_range & (~range_mask);
 274                         tmp2 = rx_offset_range & range_mask;
 275                         tmp2 += (1 << 2);
 276                         rx_offset_range = tmp1 | (tmp2 & range_mask);
 277                         rtk_phy_write(phy_reg, PHY_ADDR_0X0B, rx_offset_range);
 278                         goto do_toggle;
 279                 }
 280         }
 281
 282         return 0;
 283 }
 284
 285 static int rtk_phy_init(struct phy *phy)
 286 {
 287         struct rtk_phy *rtk_phy = phy_get_drvdata(phy);
 288         int ret = 0;
 289         int i;
 290         unsigned long phy_init_time = jiffies;
 291
 292         for (i = 0; i < rtk_phy->num_phy; i++)
 293                 ret = do_rtk_phy_init(rtk_phy, i);
 294
 295         dev_dbg(rtk_phy->dev, "Initialized RTK USB 3.0 PHY (take %dms)\n",
 296                 jiffies_to_msecs(jiffies - phy_init_time));
 297
 298         return ret;
 299 }
 300
 301 static int rtk_phy_exit(struct phy *phy)
 302 {
 303         return 0;
 304 }
 305
 306 static const struct phy_ops ops = {
 307         .init           = rtk_phy_init,
 308         .exit           = rtk_phy_exit,
 309         .owner          = THIS_MODULE,
 310 };
 311
 312 static void rtk_phy_toggle(struct usb_phy *usb3_phy, bool connect, int port)
 313 {
 314         int index = port;
 315         struct rtk_phy *rtk_phy = NULL;
 316
 317         rtk_phy = dev_get_drvdata(usb3_phy->dev);
 318
 319         if (index > rtk_phy->num_phy) {
 320                 dev_err(rtk_phy->dev, "%s: The port=%d is not in usb phy (num_phy=%d)\n",
 321                         __func__, index, rtk_phy->num_phy);
 322                 return;
 323         }
 324
 325         do_rtk_usb3_phy_toggle(rtk_phy, index, connect);
 326 }
 327
 328 static int rtk_phy_notify_port_status(struct usb_phy *x, int port,
 329                                       u16 portstatus, u16 portchange)
 330 {
 331         bool connect = false;
 332
 333         pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n",
 334                  __func__, port, (int)portstatus, (int)portchange);
 335         if (portstatus & USB_PORT_STAT_CONNECTION)
 336                 connect = true;
 337
 338         if (portchange & USB_PORT_STAT_C_CONNECTION)
 339                 rtk_phy_toggle(x, connect, port);
 340
 341         return 0;
 342 }
 343
 344 #ifdef CONFIG_DEBUG_FS
 345 static struct dentry *create_phy_debug_root(void)
 346 {
 347         struct dentry *phy_debug_root;
 348
 349         phy_debug_root = debugfs_lookup("phy", usb_debug_root);
 350         if (!phy_debug_root)
 351                 phy_debug_root = debugfs_create_dir("phy", usb_debug_root);
 352
 353         return phy_debug_root;
 354 }
 355
 356 static int rtk_usb3_parameter_show(struct seq_file *s, void *unused)
 357 {
 358         struct rtk_phy *rtk_phy = s->private;
 359         struct phy_cfg *phy_cfg;
 360         int i, index;
 361
 362         phy_cfg = rtk_phy->phy_cfg;
 363
 364         seq_puts(s, "Property:\n");
 365         seq_printf(s, "  check_efuse: %s\n",
 366                    phy_cfg->check_efuse ? "Enable" : "Disable");
 367         seq_printf(s, "  do_toggle: %s\n",
 368                    phy_cfg->do_toggle ? "Enable" : "Disable");
 369         seq_printf(s, "  do_toggle_once: %s\n",
 370                    phy_cfg->do_toggle_once ? "Enable" : "Disable");
 371         seq_printf(s, "  use_default_parameter: %s\n",
 372                    phy_cfg->use_default_parameter ? "Enable" : "Disable");
 373
 374         for (index = 0; index < rtk_phy->num_phy; index++) {
 375                 struct phy_reg *phy_reg;
 376                 struct phy_parameter *phy_parameter;
 377
 378                 phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
 379                 phy_reg = &phy_parameter->phy_reg;
 380
 381                 seq_printf(s, "PHY %d:\n", index);
 382
 383                 for (i = 0; i < phy_cfg->param_size; i++) {
 384                         struct phy_data *phy_data = phy_cfg->param + i;
 385                         u8 addr = ARRAY_INDEX_MAP_PHY_ADDR(i);
 386                         u16 data = phy_data->data;
 387
 388                         if (!phy_data->addr && !data)
 389                                 seq_printf(s, "  addr = 0x%02x, data = none   ==> read value = 0x%04x\n",
 390                                            addr, rtk_phy_read(phy_reg, addr));
 391                         else
 392                                 seq_printf(s, "  addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n",
 393                                            addr, data, rtk_phy_read(phy_reg, addr));
 394                 }
 395
 396                 seq_puts(s, "PHY Property:\n");
 397                 seq_printf(s, "  efuse_usb_u3_tx_lfps_swing_trim: 0x%x\n",
 398                            (int)phy_parameter->efuse_usb_u3_tx_lfps_swing_trim);
 399                 seq_printf(s, "  amplitude_control_coarse: 0x%x\n",
 400                            (int)phy_parameter->amplitude_control_coarse);
 401                 seq_printf(s, "  amplitude_control_fine: 0x%x\n",
 402                            (int)phy_parameter->amplitude_control_fine);
 403         }
 404
 405         return 0;
 406 }
 407 DEFINE_SHOW_ATTRIBUTE(rtk_usb3_parameter);
 408
 409 static inline void create_debug_files(struct rtk_phy *rtk_phy)
 410 {
 411         struct dentry *phy_debug_root = NULL;
 412
 413         phy_debug_root = create_phy_debug_root();
 414
 415         if (!phy_debug_root)
 416                 return;
 417
 418         rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), phy_debug_root);
 419         if (!rtk_phy->debug_dir)
 420                 return;
 421
 422         if (!debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy,
 423                                  &rtk_usb3_parameter_fops))
 424                 goto file_error;
 425
 426         return;
 427
 428 file_error:
 429         debugfs_remove_recursive(rtk_phy->debug_dir);
 430 }
 431
 432 static inline void remove_debug_files(struct rtk_phy *rtk_phy)
 433 {
 434         debugfs_remove_recursive(rtk_phy->debug_dir);
 435 }
 436 #else
 437 static inline void create_debug_files(struct rtk_phy *rtk_phy) { }
 438 static inline void remove_debug_files(struct rtk_phy *rtk_phy) { }
 439 #endif /* CONFIG_DEBUG_FS */
 440
 441 static int get_phy_data_by_efuse(struct rtk_phy *rtk_phy,
 442                                  struct phy_parameter *phy_parameter, int index)
 443 {
 444         struct phy_cfg *phy_cfg = rtk_phy->phy_cfg;
 445         u8 value = 0;
 446         struct nvmem_cell *cell;
 447
 448         if (!phy_cfg->check_efuse)
 449                 goto out;
 450
 451         cell = nvmem_cell_get(rtk_phy->dev, "usb_u3_tx_lfps_swing_trim");
 452         if (IS_ERR(cell)) {
 453                 dev_dbg(rtk_phy->dev, "%s no usb_u3_tx_lfps_swing_trim: %ld\n",
 454                         __func__, PTR_ERR(cell));
 455         } else {
 456                 unsigned char *buf;
 457                 size_t buf_size;
 458
 459                 buf = nvmem_cell_read(cell, &buf_size);
 460                 if (!IS_ERR(buf)) {
 461                         value = buf[0] & USB_U3_TX_LFPS_SWING_TRIM_MASK;
 462                         kfree(buf);
 463                 }
 464                 nvmem_cell_put(cell);
 465         }
 466
 467         if (value > 0 && value < 0x8)
 468                 phy_parameter->efuse_usb_u3_tx_lfps_swing_trim = 0x8;
 469         else
 470                 phy_parameter->efuse_usb_u3_tx_lfps_swing_trim = (u8)value;
 471
 472 out:
 473         return 0;
 474 }
 475
 476 static void update_amplitude_control_value(struct rtk_phy *rtk_phy,
 477                                            struct phy_parameter *phy_parameter)
 478 {
 479         struct phy_cfg *phy_cfg;
 480         struct phy_reg *phy_reg;
 481
 482         phy_reg = &phy_parameter->phy_reg;
 483         phy_cfg = rtk_phy->phy_cfg;
 484
 485         if (phy_parameter->amplitude_control_coarse != AMPLITUDE_CONTROL_COARSE_DEFAULT) {
 486                 u16 val_mask = AMPLITUDE_CONTROL_COARSE_MASK;
 487                 u16 data;
 488
 489                 if (!phy_cfg->param[PHY_ADDR_0X20].addr && !phy_cfg->param[PHY_ADDR_0X20].data) {
 490                         phy_cfg->param[PHY_ADDR_0X20].addr = PHY_ADDR_0X20;
 491                         data = rtk_phy_read(phy_reg, PHY_ADDR_0X20);
 492                 } else {
 493                         data = phy_cfg->param[PHY_ADDR_0X20].data;
 494                 }
 495
 496                 data &= (~val_mask);
 497                 data |= (phy_parameter->amplitude_control_coarse & val_mask);
 498
 499                 phy_cfg->param[PHY_ADDR_0X20].data = data;
 500         }
 501
 502         if (phy_parameter->efuse_usb_u3_tx_lfps_swing_trim) {
 503                 u8 efuse_val = phy_parameter->efuse_usb_u3_tx_lfps_swing_trim;
 504                 u16 val_mask = USB_U3_TX_LFPS_SWING_TRIM_MASK;
 505                 int val_shift = USB_U3_TX_LFPS_SWING_TRIM_SHIFT;
 506                 u16 data;
 507
 508                 if (!phy_cfg->param[PHY_ADDR_0X20].addr && !phy_cfg->param[PHY_ADDR_0X20].data) {
 509                         phy_cfg->param[PHY_ADDR_0X20].addr = PHY_ADDR_0X20;
 510                         data = rtk_phy_read(phy_reg, PHY_ADDR_0X20);
 511                 } else {
 512                         data = phy_cfg->param[PHY_ADDR_0X20].data;
 513                 }
 514
 515                 data &= ~(val_mask << val_shift);
 516                 data |= ((efuse_val & val_mask) << val_shift);
 517
 518                 phy_cfg->param[PHY_ADDR_0X20].data = data;
 519         }
 520
 521         if (phy_parameter->amplitude_control_fine != AMPLITUDE_CONTROL_FINE_DEFAULT) {
 522                 u16 val_mask = AMPLITUDE_CONTROL_FINE_MASK;
 523
 524                 if (!phy_cfg->param[PHY_ADDR_0X21].addr && !phy_cfg->param[PHY_ADDR_0X21].data)
 525                         phy_cfg->param[PHY_ADDR_0X21].addr = PHY_ADDR_0X21;
 526
 527                 phy_cfg->param[PHY_ADDR_0X21].data =
 528                             phy_parameter->amplitude_control_fine & val_mask;
 529         }
 530 }
 531
 532 static int parse_phy_data(struct rtk_phy *rtk_phy)
 533 {
 534         struct device *dev = rtk_phy->dev;
 535         struct phy_parameter *phy_parameter;
 536         int ret = 0;
 537         int index;
 538
 539         rtk_phy->phy_parameter = devm_kzalloc(dev, sizeof(struct phy_parameter) *
 540                                               rtk_phy->num_phy, GFP_KERNEL);
 541         if (!rtk_phy->phy_parameter)
 542                 return -ENOMEM;
 543
 544         for (index = 0; index < rtk_phy->num_phy; index++) {
 545                 phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
 546
 547                 phy_parameter->phy_reg.reg_mdio_ctl = of_iomap(dev->of_node, 0) + index;
 548
 549                 /* Amplitude control address 0x20 bit 0 to bit 7 */
 550                 if (of_property_read_u32(dev->of_node, "realtek,amplitude-control-coarse-tuning",
 551                                          &phy_parameter->amplitude_control_coarse))
 552                         phy_parameter->amplitude_control_coarse = AMPLITUDE_CONTROL_COARSE_DEFAULT;
 553
 554                 /* Amplitude control address 0x21 bit 0 to bit 16 */
 555                 if (of_property_read_u32(dev->of_node, "realtek,amplitude-control-fine-tuning",
 556                                          &phy_parameter->amplitude_control_fine))
 557                         phy_parameter->amplitude_control_fine = AMPLITUDE_CONTROL_FINE_DEFAULT;
 558
 559                 get_phy_data_by_efuse(rtk_phy, phy_parameter, index);
 560
 561                 update_amplitude_control_value(rtk_phy, phy_parameter);
 562         }
 563
 564         return ret;
 565 }
 566
 567 static int rtk_usb3phy_probe(struct platform_device *pdev)
 568 {
 569         struct rtk_phy *rtk_phy;
 570         struct device *dev = &pdev->dev;
 571         struct phy *generic_phy;
 572         struct phy_provider *phy_provider;
 573         const struct phy_cfg *phy_cfg;
 574         int ret;
 575
 576         phy_cfg = of_device_get_match_data(dev);
 577         if (!phy_cfg) {
 578                 dev_err(dev, "phy config are not assigned!\n");
 579                 return -EINVAL;
 580         }
 581
 582         rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL);
 583         if (!rtk_phy)
 584                 return -ENOMEM;
 585
 586         rtk_phy->dev                    = &pdev->dev;
 587         rtk_phy->phy.dev                = rtk_phy->dev;
 588         rtk_phy->phy.label              = "rtk-usb3phy";
 589         rtk_phy->phy.notify_port_status = rtk_phy_notify_port_status;
 590
 591         rtk_phy->phy_cfg = devm_kzalloc(dev, sizeof(*phy_cfg), GFP_KERNEL);
 592
 593         memcpy(rtk_phy->phy_cfg, phy_cfg, sizeof(*phy_cfg));
 594
 595         rtk_phy->num_phy = 1;
 596
 597         ret = parse_phy_data(rtk_phy);
 598         if (ret)
 599                 goto err;
 600
 601         platform_set_drvdata(pdev, rtk_phy);
 602
 603         generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops);
 604         if (IS_ERR(generic_phy))
 605                 return PTR_ERR(generic_phy);
 606
 607         phy_set_drvdata(generic_phy, rtk_phy);
 608
 609         phy_provider = devm_of_phy_provider_register(rtk_phy->dev, of_phy_simple_xlate);
 610         if (IS_ERR(phy_provider))
 611                 return PTR_ERR(phy_provider);
 612
 613         ret = usb_add_phy_dev(&rtk_phy->phy);
 614         if (ret)
 615                 goto err;
 616
 617         create_debug_files(rtk_phy);
 618
 619 err:
 620         return ret;
 621 }
 622
 623 static void rtk_usb3phy_remove(struct platform_device *pdev)
 624 {
 625         struct rtk_phy *rtk_phy = platform_get_drvdata(pdev);
 626
 627         remove_debug_files(rtk_phy);
 628
 629         usb_remove_phy(&rtk_phy->phy);
 630 }
 631
 632 static const struct phy_cfg rtd1295_phy_cfg = {
 633         .param_size = MAX_USB_PHY_DATA_SIZE,
 634         .param = {  [0] = {0x01, 0x4008},  [1] = {0x01, 0xe046},
 635                     [2] = {0x02, 0x6046},  [3] = {0x03, 0x2779},
 636                     [4] = {0x04, 0x72f5},  [5] = {0x05, 0x2ad3},
 637                     [6] = {0x06, 0x000e},  [7] = {0x07, 0x2e00},
 638                     [8] = {0x08, 0x3591},  [9] = {0x09, 0x525c},
 639                    [10] = {0x0a, 0xa600}, [11] = {0x0b, 0xa904},
 640                    [12] = {0x0c, 0xc000}, [13] = {0x0d, 0xef1c},
 641                    [14] = {0x0e, 0x2000}, [15] = {0x0f, 0x0000},
 642                    [16] = {0x10, 0x000c}, [17] = {0x11, 0x4c00},
 643                    [18] = {0x12, 0xfc00}, [19] = {0x13, 0x0c81},
 644                    [20] = {0x14, 0xde01}, [21] = {0x15, 0x0000},
 645                    [22] = {0x16, 0x0000}, [23] = {0x17, 0x0000},
 646                    [24] = {0x18, 0x0000}, [25] = {0x19, 0x4004},
 647                    [26] = {0x1a, 0x1260}, [27] = {0x1b, 0xff00},
 648                    [28] = {0x1c, 0xcb00}, [29] = {0x1d, 0xa03f},
 649                    [30] = {0x1e, 0xc2e0}, [31] = {0x1f, 0x2807},
 650                    [32] = {0x20, 0x947a}, [33] = {0x21, 0x88aa},
 651                    [34] = {0x22, 0x0057}, [35] = {0x23, 0xab66},
 652                    [36] = {0x24, 0x0800}, [37] = {0x25, 0x0000},
 653                    [38] = {0x26, 0x040a}, [39] = {0x27, 0x01d6},
 654                    [40] = {0x28, 0xf8c2}, [41] = {0x29, 0x3080},
 655                    [42] = {0x2a, 0x3082}, [43] = {0x2b, 0x2078},
 656                    [44] = {0x2c, 0xffff}, [45] = {0x2d, 0xffff},
 657                    [46] = {0x2e, 0x0000}, [47] = {0x2f, 0x0040}, },
 658         .check_efuse = false,
 659         .do_toggle = true,
 660         .do_toggle_once = false,
 661         .use_default_parameter = false,
 662         .check_rx_front_end_offset = false,
 663 };
 664
 665 static const struct phy_cfg rtd1619_phy_cfg = {
 666         .param_size = MAX_USB_PHY_DATA_SIZE,
 667         .param = {  [8] = {0x08, 0x3591},
 668                    [38] = {0x26, 0x840b},
 669                    [40] = {0x28, 0xf842}, },
 670         .check_efuse = false,
 671         .do_toggle = true,
 672         .do_toggle_once = false,
 673         .use_default_parameter = false,
 674         .check_rx_front_end_offset = false,
 675 };
 676
 677 static const struct phy_cfg rtd1319_phy_cfg = {
 678         .param_size = MAX_USB_PHY_DATA_SIZE,
 679         .param = {  [1] = {0x01, 0xac86},
 680                     [6] = {0x06, 0x0003},
 681                     [9] = {0x09, 0x924c},
 682                    [10] = {0x0a, 0xa608},
 683                    [11] = {0x0b, 0xb905},
 684                    [14] = {0x0e, 0x2010},
 685                    [32] = {0x20, 0x705a},
 686                    [33] = {0x21, 0xf645},
 687                    [34] = {0x22, 0x0013},
 688                    [35] = {0x23, 0xcb66},
 689                    [41] = {0x29, 0xff00}, },
 690         .check_efuse = true,
 691         .do_toggle = true,
 692         .do_toggle_once = false,
 693         .use_default_parameter = false,
 694         .check_rx_front_end_offset = false,
 695 };
 696
 697 static const struct phy_cfg rtd1619b_phy_cfg = {
 698         .param_size = MAX_USB_PHY_DATA_SIZE,
 699         .param = {  [1] = {0x01, 0xac8c},
 700                     [6] = {0x06, 0x0017},
 701                     [9] = {0x09, 0x724c},
 702                    [10] = {0x0a, 0xb610},
 703                    [11] = {0x0b, 0xb90d},
 704                    [13] = {0x0d, 0xef2a},
 705                    [15] = {0x0f, 0x9050},
 706                    [16] = {0x10, 0x000c},
 707                    [32] = {0x20, 0x70ff},
 708                    [34] = {0x22, 0x0013},
 709                    [35] = {0x23, 0xdb66},
 710                    [38] = {0x26, 0x8609},
 711                    [41] = {0x29, 0xff13},
 712                    [42] = {0x2a, 0x3070}, },
 713         .check_efuse = true,
 714         .do_toggle = false,
 715         .do_toggle_once = true,
 716         .use_default_parameter = false,
 717         .check_rx_front_end_offset = false,
 718 };
 719
 720 static const  struct phy_cfg rtd1319d_phy_cfg = {
 721         .param_size = MAX_USB_PHY_DATA_SIZE,
 722         .param = {  [1] = {0x01, 0xac89},
 723                     [4] = {0x04, 0xf2f5},
 724                     [6] = {0x06, 0x0017},
 725                     [9] = {0x09, 0x424c},
 726                    [10] = {0x0a, 0x9610},
 727                    [11] = {0x0b, 0x9901},
 728                    [12] = {0x0c, 0xf000},
 729                    [13] = {0x0d, 0xef2a},
 730                    [14] = {0x0e, 0x1000},
 731                    [15] = {0x0f, 0x9050},
 732                    [32] = {0x20, 0x7077},
 733                    [35] = {0x23, 0x0b62},
 734                    [37] = {0x25, 0x10ec},
 735                    [42] = {0x2a, 0x3070}, },
 736         .check_efuse = true,
 737         .do_toggle = false,
 738         .do_toggle_once = true,
 739         .use_default_parameter = false,
 740         .check_rx_front_end_offset = true,
 741 };
 742
 743 static const struct of_device_id usbphy_rtk_dt_match[] = {
 744         { .compatible = "realtek,rtd1295-usb3phy", .data = &rtd1295_phy_cfg },
 745         { .compatible = "realtek,rtd1319-usb3phy", .data = &rtd1319_phy_cfg },
 746         { .compatible = "realtek,rtd1319d-usb3phy", .data = &rtd1319d_phy_cfg },
 747         { .compatible = "realtek,rtd1619-usb3phy", .data = &rtd1619_phy_cfg },
 748         { .compatible = "realtek,rtd1619b-usb3phy", .data = &rtd1619b_phy_cfg },
 749         {},
 750 };
 751 MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match);
 752
 753 static struct platform_driver rtk_usb3phy_driver = {
 754         .probe          = rtk_usb3phy_probe,
 755         .remove_new     = rtk_usb3phy_remove,
 756         .driver         = {
 757                 .name   = "rtk-usb3phy",
 758                 .of_match_table = usbphy_rtk_dt_match,
 759         },
 760 };
 761
 762 module_platform_driver(rtk_usb3phy_driver);
 763
 764 MODULE_LICENSE("GPL");
 765 MODULE_ALIAS("platform: rtk-usb3phy");
 766 MODULE_AUTHOR("Stanley Chang <stanley_chang@realtek.com>");
 767 MODULE_DESCRIPTION("Realtek usb 3.0 phy driver");