1 /* SPDX-License-Identifier: GPL-2.0
3 * ARM CoreSight Architecture PMU driver.
4 * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8 #ifndef __ARM_CSPMU_H__
9 #define __ARM_CSPMU_H__
11 #include <linux/bitfield.h>
12 #include <linux/cpumask.h>
13 #include <linux/device.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/perf_event.h>
17 #include <linux/platform_device.h>
18 #include <linux/types.h>
20 #define to_arm_cspmu(p) (container_of(p, struct arm_cspmu, pmu))
22 #define ARM_CSPMU_EXT_ATTR(_name, _func, _config) \
23 (&((struct dev_ext_attribute[]){ \
25 .attr = __ATTR(_name, 0444, _func, NULL), \
26 .var = (void *)_config \
30 #define ARM_CSPMU_FORMAT_ATTR(_name, _config) \
31 ARM_CSPMU_EXT_ATTR(_name, arm_cspmu_sysfs_format_show, (char *)_config)
33 #define ARM_CSPMU_EVENT_ATTR(_name, _config) \
34 PMU_EVENT_ATTR_ID(_name, arm_cspmu_sysfs_event_show, _config)
37 /* Default event id mask */
38 #define ARM_CSPMU_EVENT_MASK GENMASK_ULL(63, 0)
40 /* Default filter value mask */
41 #define ARM_CSPMU_FILTER_MASK GENMASK_ULL(63, 0)
43 /* Default event format */
44 #define ARM_CSPMU_FORMAT_EVENT_ATTR \
45 ARM_CSPMU_FORMAT_ATTR(event, "config:0-32")
47 /* Default filter format */
48 #define ARM_CSPMU_FORMAT_FILTER_ATTR \
49 ARM_CSPMU_FORMAT_ATTR(filter, "config1:0-31")
52 * This is the default event number for cycle count, if supported, since the
53 * ARM Coresight PMU specification does not define a standard event code
56 #define ARM_CSPMU_EVT_CYCLES_DEFAULT (0x1ULL << 32)
59 * The ARM Coresight PMU supports up to 256 event counters.
60 * If the counters are larger-than 32-bits, then the PMU includes at
63 #define ARM_CSPMU_MAX_HW_CNTRS 256
65 /* The cycle counter, if implemented, is located at counter[31]. */
66 #define ARM_CSPMU_CYCLE_CNTR_IDX 31
68 /* PMIIDR register field */
69 #define ARM_CSPMU_PMIIDR_IMPLEMENTER GENMASK(11, 0)
70 #define ARM_CSPMU_PMIIDR_PRODUCTID GENMASK(31, 20)
74 /* This tracks the events assigned to each counter in the PMU. */
75 struct arm_cspmu_hw_events {
76 /* The events that are active on the PMU for a given logical index. */
77 struct perf_event **events;
80 * Each bit indicates a logical counter is being used (or not) for an
81 * event. If cycle counter is supported and there is a gap between
82 * regular and cycle counter, the last logical counter is mapped to
83 * cycle counter. Otherwise, logical and physical have 1-to-1 mapping.
85 DECLARE_BITMAP(used_ctrs, ARM_CSPMU_MAX_HW_CNTRS);
88 /* Contains ops to query vendor/implementer specific attribute. */
89 struct arm_cspmu_impl_ops {
90 /* Get event attributes */
91 struct attribute **(*get_event_attrs)(const struct arm_cspmu *cspmu);
92 /* Get format attributes */
93 struct attribute **(*get_format_attrs)(const struct arm_cspmu *cspmu);
94 /* Get string identifier */
95 const char *(*get_identifier)(const struct arm_cspmu *cspmu);
96 /* Get PMU name to register to core perf */
97 const char *(*get_name)(const struct arm_cspmu *cspmu);
98 /* Check if the event corresponds to cycle count event */
99 bool (*is_cycle_counter_event)(const struct perf_event *event);
100 /* Decode event type/id from configs */
101 u32 (*event_type)(const struct perf_event *event);
102 /* Decode filter value from configs */
103 u32 (*event_filter)(const struct perf_event *event);
104 /* Hide/show unsupported events */
105 umode_t (*event_attr_is_visible)(struct kobject *kobj,
106 struct attribute *attr, int unused);
109 /* Vendor/implementer descriptor. */
110 struct arm_cspmu_impl {
112 struct arm_cspmu_impl_ops ops;
116 /* Coresight PMU descriptor. */
121 const char *identifier;
124 cpumask_t associated_cpus;
125 cpumask_t active_cpu;
126 struct hlist_node cpuhp_node;
129 bool has_atomic_dword;
131 u32 num_logical_ctrs;
133 int cycle_counter_logical_idx;
135 struct arm_cspmu_hw_events hw_events;
137 struct arm_cspmu_impl impl;
140 /* Default function to show event attribute in sysfs. */
141 ssize_t arm_cspmu_sysfs_event_show(struct device *dev,
142 struct device_attribute *attr,
145 /* Default function to show format attribute in sysfs. */
146 ssize_t arm_cspmu_sysfs_format_show(struct device *dev,
147 struct device_attribute *attr,
150 #endif /* __ARM_CSPMU_H__ */