Added uart_gpio_conf() in serial_init(), seperated uart port configuration from cpu_i...
[platform/kernel/u-boot.git] / drivers / pci_indirect.c
1 /*
2  * Support for indirect PCI bridges.
3  *
4  * Copyright (C) 1998 Gabriel Paubert.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11
12 #include <common.h>
13
14 #ifdef CONFIG_PCI
15 #if (!defined(__I386__) && !defined(CONFIG_IXDP425))
16
17 #include <asm/processor.h>
18 #include <asm/io.h>
19 #include <pci.h>
20
21 #define cfg_read(val, addr, type, op)   *val = op((type)(addr))
22 #define cfg_write(val, addr, type, op)  op((type *)(addr), (val))
23
24 #ifdef CONFIG_IXP425
25 extern unsigned char    in_8 (volatile unsigned *addr);
26 extern unsigned short   in_le16 (volatile unsigned *addr);
27 extern unsigned         in_le32 (volatile unsigned *addr);
28 extern void             out_8 (volatile unsigned *addr, char val);
29 extern void             out_le16 (volatile unsigned *addr, unsigned short val);
30 extern void             out_le32 (volatile unsigned *addr, unsigned int val);
31 #endif  /* CONFIG_IXP425 */
32
33 #if defined(CONFIG_MPC8260)
34 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
35 static int                                                               \
36 indirect_##rw##_config_##size(struct pci_controller *hose,               \
37                               pci_dev_t dev, int offset, type val)       \
38 {                                                                        \
39         u32 b, d,f;                                                      \
40         b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
41         b = b - hose->first_busno;                                       \
42         dev = PCI_BDF(b, d, f);                                          \
43         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
44         sync();                                                          \
45         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
46         return 0;                                                        \
47 }
48 #elif defined(CONFIG_E500)
49 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
50 static int                                                               \
51 indirect_##rw##_config_##size(struct pci_controller *hose,               \
52                               pci_dev_t dev, int offset, type val)       \
53 {                                                                        \
54         u32 b, d,f;                                                      \
55         b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
56         b = b - hose->first_busno;                                       \
57         dev = PCI_BDF(b, d, f);                                          \
58         *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000;          \
59         sync();                                                          \
60         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
61         return 0;                                                        \
62 }
63 #elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
64 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
65 static int                                                               \
66 indirect_##rw##_config_##size(struct pci_controller *hose,               \
67                               pci_dev_t dev, int offset, type val)       \
68 {                                                                        \
69         u32 b, d,f;                                                      \
70         b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
71         b = b - hose->first_busno;                                       \
72         dev = PCI_BDF(b, d, f);                                          \
73         if (PCI_BUS(dev) > 0)                                            \
74                 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
75         else                                                             \
76                 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
77         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
78         return 0;                                                        \
79 }
80 #else
81 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
82 static int                                                               \
83 indirect_##rw##_config_##size(struct pci_controller *hose,               \
84                               pci_dev_t dev, int offset, type val)       \
85 {                                                                        \
86         u32 b, d,f;                                                      \
87         b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
88         b = b - hose->first_busno;                                       \
89         dev = PCI_BDF(b, d, f);                                          \
90         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
91         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
92         return 0;                                                        \
93 }
94 #endif
95
96 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask)                \
97 static int                                                               \
98 indirect_##rw##_config_##size(struct pci_controller *hose,               \
99                               pci_dev_t dev, int offset, type val)       \
100 {                                                                        \
101         unsigned int msr = mfmsr();                                      \
102         mtmsr(msr & ~(MSR_EE | MSR_CE));                                 \
103         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
104         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
105         out_le32(hose->cfg_addr, 0x00000000);                            \
106         mtmsr(msr);                                                      \
107         return 0;                                                        \
108 }
109
110 INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
111 INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
112 INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
113 #ifdef CONFIG_405GP
114 INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
115 INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
116 INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
117 #else
118 INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
119 INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
120 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
121 #endif
122
123 void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
124 {
125         pci_set_ops(hose,
126                     indirect_read_config_byte,
127                     indirect_read_config_word,
128                     indirect_read_config_dword,
129                     indirect_write_config_byte,
130                     indirect_write_config_word,
131                     indirect_write_config_dword);
132
133         hose->cfg_addr = (unsigned int *) cfg_addr;
134         hose->cfg_data = (unsigned char *) cfg_data;
135 }
136
137 #endif  /* !__I386__ && !CONFIG_IXDP425 */
138 #endif  /* CONFIG_PCI */