2 * Support for indirect PCI bridges.
4 * Copyright (C) 1998 Gabriel Paubert.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
17 #include <asm/processor.h>
21 #define cfg_read(val, addr, type, op) *val = op((type)(addr))
22 #define cfg_write(val, addr, type, op) op((type *)(addr), (val))
25 extern unsigned char in_8 (volatile unsigned *addr);
26 extern unsigned short in_le16 (volatile unsigned *addr);
27 extern unsigned in_le32 (volatile unsigned *addr);
28 extern void out_8 (volatile unsigned *addr, char val);
29 extern void out_le16 (volatile unsigned *addr, unsigned short val);
30 extern void out_le32 (volatile unsigned *addr, unsigned int val);
31 #endif /* CONFIG_IXP425 */
33 #if defined(CONFIG_MPC8260)
34 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
36 indirect_##rw##_config_##size(struct pci_controller *hose, \
37 pci_dev_t dev, int offset, type val) \
39 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
41 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
44 #elif defined(CONFIG_E500)
45 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
47 indirect_##rw##_config_##size(struct pci_controller *hose, \
48 pci_dev_t dev, int offset, type val) \
50 *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
52 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
55 #elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
56 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
58 indirect_##rw##_config_##size(struct pci_controller *hose, \
59 pci_dev_t dev, int offset, type val) \
61 if (PCI_BUS(dev) > 0) \
62 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
64 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
65 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
69 #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
71 indirect_##rw##_config_##size(struct pci_controller *hose, \
72 pci_dev_t dev, int offset, type val) \
74 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
75 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
80 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \
82 indirect_##rw##_config_##size(struct pci_controller *hose, \
83 pci_dev_t dev, int offset, type val) \
85 unsigned int msr = mfmsr(); \
86 mtmsr(msr & ~(MSR_EE | MSR_CE)); \
87 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
88 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
89 out_le32(hose->cfg_addr, 0x00000000); \
94 INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
95 INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
96 INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
98 INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
99 INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
100 INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
102 INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
103 INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
104 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
107 void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
110 indirect_read_config_byte,
111 indirect_read_config_word,
112 indirect_read_config_dword,
113 indirect_write_config_byte,
114 indirect_write_config_word,
115 indirect_write_config_dword);
117 hose->cfg_addr = (unsigned int *) cfg_addr;
118 hose->cfg_data = (unsigned char *) cfg_data;