drivers/pci.c

   1 /*
   2  * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   3  * Andreas Heppel <aheppel@sysgo.de>
   4  *
   5  * (C) Copyright 2002, 2003
   6  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 /*
  28  * PCI routines
  29  */
  30
  31 #include <common.h>
  32
  33 #ifdef CONFIG_PCI
  34
  35 #include <command.h>
  36 #include <cmd_boot.h>
  37 #include <asm/processor.h>
  38 #include <asm/io.h>
  39 #include <pci.h>
  40
  41 #ifdef DEBUG
  42 #define DEBUGF(x...) printf(x)
  43 #else
  44 #define DEBUGF(x...)
  45 #endif /* DEBUG */
  46
  47 /*
  48  *
  49  */
  50
  51 #define PCI_HOSE_OP(rw, size, type)                                     \
  52 int pci_hose_##rw##_config_##size(struct pci_controller *hose,          \
  53                                   pci_dev_t dev,                        \
  54                                   int offset, type value)               \
  55 {                                                                       \
  56         return hose->rw##_##size(hose, dev, offset, value);             \
  57 }
  58
  59 PCI_HOSE_OP(read, byte, u8 *)
  60 PCI_HOSE_OP(read, word, u16 *)
  61 PCI_HOSE_OP(read, dword, u32 *)
  62 PCI_HOSE_OP(write, byte, u8)
  63 PCI_HOSE_OP(write, word, u16)
  64 PCI_HOSE_OP(write, dword, u32)
  65
  66 #define PCI_OP(rw, size, type, error_code)                              \
  67 int pci_##rw##_config_##size(pci_dev_t dev, int offset, type value)     \
  68 {                                                                       \
  69         struct pci_controller *hose = pci_bus_to_hose(PCI_BUS(dev));    \
  70                                                                         \
  71         if (!hose)                                                      \
  72         {                                                               \
  73                 error_code;                                             \
  74                 return -1;                                              \
  75         }                                                               \
  76                                                                         \
  77         return pci_hose_##rw##_config_##size(hose, dev, offset, value); \
  78 }
  79
  80 PCI_OP(read, byte, u8 *, *value = 0xff)
  81 PCI_OP(read, word, u16 *, *value = 0xffff)
  82 PCI_OP(read, dword, u32 *, *value = 0xffffffff)
  83 PCI_OP(write, byte, u8, )
  84 PCI_OP(write, word, u16, )
  85 PCI_OP(write, dword, u32, )
  86
  87 #define PCI_READ_VIA_DWORD_OP(size, type, off_mask)                     \
  88 int pci_hose_read_config_##size##_via_dword(struct pci_controller *hose,\
  89                                         pci_dev_t dev,                  \
  90                                         int offset, type val)           \
  91 {                                                                       \
  92         u32 val32;                                                      \
  93                                                                         \
  94         if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
  95                 return -1;                                              \
  96                                                                         \
  97         *val = (val32 >> ((offset & (int)off_mask) * 8));               \
  98                                                                         \
  99         return 0;                                                       \
 100 }
 101
 102 #define PCI_WRITE_VIA_DWORD_OP(size, type, off_mask, val_mask)          \
 103 int pci_hose_write_config_##size##_via_dword(struct pci_controller *hose,\
 104                                              pci_dev_t dev,             \
 105                                              int offset, type val)      \
 106 {                                                                       \
 107         u32 val32, mask, ldata;                                         \
 108                                                                         \
 109         if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
 110                 return -1;                                              \
 111                                                                         \
 112         mask = val_mask;                                                \
 113         ldata = (((unsigned long)val) & mask) << ((offset & (int)off_mask) * 8);\
 114         mask <<= ((mask & (int)off_mask) * 8);                          \
 115         val32 = (val32 & ~mask) | ldata;                                \
 116                                                                         \
 117         if (pci_hose_write_config_dword(hose, dev, offset & 0xfc, val32) < 0)\
 118                 return -1;                                              \
 119                                                                         \
 120         return 0;                                                       \
 121 }
 122
 123 PCI_READ_VIA_DWORD_OP(byte, u8 *, 0x03)
 124 PCI_READ_VIA_DWORD_OP(word, u16 *, 0x02)
 125 PCI_WRITE_VIA_DWORD_OP(byte, u8, 0x03, 0x000000ff)
 126 PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)
 127
 128 /*
 129  *
 130  */
 131
 132 static struct pci_controller* hose_head = NULL;
 133
 134 void pci_register_hose(struct pci_controller* hose)
 135 {
 136         struct pci_controller **phose = &hose_head;
 137
 138         while(*phose)
 139                 phose = &(*phose)->next;
 140
 141         hose->next = NULL;
 142
 143         *phose = hose;
 144 }
 145
 146 struct pci_controller *pci_bus_to_hose (int bus)
 147 {
 148         struct pci_controller *hose;
 149
 150         for (hose = hose_head; hose; hose = hose->next)
 151                 if (bus >= hose->first_busno && bus <= hose->last_busno)
 152                         return hose;
 153
 154         return NULL;
 155 }
 156
 157 pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
 158 {
 159         struct pci_controller * hose;
 160         u16 vendor, device;
 161         u8 header_type;
 162         pci_dev_t bdf;
 163         int i, bus, found_multi = 0;
 164
 165         for (hose = hose_head; hose; hose = hose->next)
 166         {
 167 #if CFG_SCSI_SCAN_BUS_REVERSE
 168                 for (bus = hose->last_busno; bus >= hose->first_busno; bus--)
 169 #else
 170                 for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
 171 #endif
 172                         for (bdf = PCI_BDF(bus,0,0);
 173 #ifdef CONFIG_ELPPC
 174                              bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
 175 #else
 176                              bdf < PCI_BDF(bus+1,0,0);
 177 #endif
 178                              bdf += PCI_BDF(0,0,1))
 179                         {
 180                                 if (!PCI_FUNC(bdf)) {
 181                                         pci_read_config_byte(bdf,
 182                                                              PCI_HEADER_TYPE,
 183                                                              &header_type);
 184
 185                                         found_multi = header_type & 0x80;
 186                                 } else {
 187                                         if (!found_multi)
 188                                                 continue;
 189                                 }
 190
 191                                 pci_read_config_word(bdf,
 192                                                      PCI_VENDOR_ID,
 193                                                      &vendor);
 194                                 pci_read_config_word(bdf,
 195                                                      PCI_DEVICE_ID,
 196                                                      &device);
 197
 198                                 for (i=0; ids[i].vendor != 0; i++)
 199                                         if (vendor == ids[i].vendor &&
 200                                             device == ids[i].device)
 201                                         {
 202                                                 if (index <= 0)
 203                                                         return bdf;
 204
 205                                                 index--;
 206                                         }
 207                         }
 208         }
 209
 210         return (-1);
 211 }
 212
 213 pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
 214 {
 215         static struct pci_device_id ids[2] = {{}, {0, 0}};
 216
 217         ids[0].vendor = vendor;
 218         ids[0].device = device;
 219
 220         return pci_find_devices(ids, index);
 221 }
 222
 223 /*
 224  *
 225  */
 226
 227 unsigned long pci_hose_phys_to_bus (struct pci_controller *hose,
 228                                     unsigned long phys_addr,
 229                                     unsigned long flags)
 230 {
 231         struct pci_region *res;
 232         unsigned long bus_addr;
 233         int i;
 234
 235         if (!hose) {
 236                 printf ("pci_hose_phys_to_bus: %s\n", "invalid hose");
 237                 goto Done;
 238         }
 239
 240         for (i = 0; i < hose->region_count; i++) {
 241                 res = &hose->regions[i];
 242
 243                 if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
 244                         continue;
 245
 246                 bus_addr = phys_addr - res->phys_start + res->bus_start;
 247
 248                 if (bus_addr >= res->bus_start &&
 249                         bus_addr < res->bus_start + res->size) {
 250                         return bus_addr;
 251                 }
 252         }
 253
 254         printf ("pci_hose_phys_to_bus: %s\n", "invalid physical address");
 255
 256 Done:
 257         return 0;
 258 }
 259
 260 unsigned long pci_hose_bus_to_phys(struct pci_controller* hose,
 261                                    unsigned long bus_addr,
 262                                    unsigned long flags)
 263 {
 264         struct pci_region *res;
 265         int i;
 266
 267         if (!hose) {
 268                 printf ("pci_hose_bus_to_phys: %s\n", "invalid hose");
 269                 goto Done;
 270         }
 271
 272         for (i = 0; i < hose->region_count; i++) {
 273                 res = &hose->regions[i];
 274
 275                 if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
 276                         continue;
 277
 278                 if (bus_addr >= res->bus_start &&
 279                         bus_addr < res->bus_start + res->size) {
 280                         return bus_addr - res->bus_start + res->phys_start;
 281                 }
 282         }
 283
 284         printf ("pci_hose_bus_to_phys: %s\n", "invalid physical address");
 285
 286 Done:
 287         return 0;
 288 }
 289
 290 /*
 291  *
 292  */
 293
 294 int pci_hose_config_device(struct pci_controller *hose,
 295                            pci_dev_t dev,
 296                            unsigned long io,
 297                            unsigned long mem,
 298                            unsigned long command)
 299 {
 300         unsigned int bar_response, bar_size, bar_value, old_command;
 301         unsigned char pin;
 302         int bar, found_mem64;
 303
 304         DEBUGF ("PCI Config: I/O=0x%lx, Memory=0x%lx, Command=0x%lx\n",
 305                 io, mem, command);
 306
 307         pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
 308
 309         for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
 310                 pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
 311                 pci_hose_read_config_dword (hose, dev, bar, &bar_response);
 312
 313                 if (!bar_response)
 314                         continue;
 315
 316                 found_mem64 = 0;
 317
 318                 /* Check the BAR type and set our address mask */
 319                 if (bar_response & PCI_BASE_ADDRESS_SPACE) {
 320                         bar_size = ~(bar_response & PCI_BASE_ADDRESS_IO_MASK) + 1;
 321                         /* round up region base address to a multiple of size */
 322                         io = ((io - 1) | (bar_size - 1)) + 1;
 323                         bar_value = io;
 324                         /* compute new region base address */
 325                         io = io + bar_size;
 326                 } else {
 327                         if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
 328                                 PCI_BASE_ADDRESS_MEM_TYPE_64)
 329                                 found_mem64 = 1;
 330
 331                         bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1;
 332
 333                         /* round up region base address to multiple of size */
 334                         mem = ((mem - 1) | (bar_size - 1)) + 1;
 335                         bar_value = mem;
 336                         /* compute new region base address */
 337                         mem = mem + bar_size;
 338                 }
 339
 340                 /* Write it out and update our limit */
 341                 pci_hose_write_config_dword (hose, dev, bar, bar_value);
 342
 343                 if (found_mem64) {
 344                         bar += 4;
 345                         pci_hose_write_config_dword (hose, dev, bar, 0x00000000);
 346                 }
 347         }
 348
 349         /* Configure Cache Line Size Register */
 350         pci_hose_write_config_byte (hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
 351
 352         /* Configure Latency Timer */
 353         pci_hose_write_config_byte (hose, dev, PCI_LATENCY_TIMER, 0x80);
 354
 355         /* Disable interrupt line, if device says it wants to use interrupts */
 356         pci_hose_read_config_byte (hose, dev, PCI_INTERRUPT_PIN, &pin);
 357         if (pin != 0) {
 358                 pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, 0xff);
 359         }
 360
 361         pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &old_command);
 362         pci_hose_write_config_dword (hose, dev, PCI_COMMAND,
 363                                      (old_command & 0xffff0000) | command);
 364
 365         return 0;
 366 }
 367
 368 /*
 369  *
 370  */
 371
 372 struct pci_config_table *pci_find_config(struct pci_controller *hose,
 373                                          unsigned short class,
 374                                          unsigned int vendor,
 375                                          unsigned int device,
 376                                          unsigned int bus,
 377                                          unsigned int dev,
 378                                          unsigned int func)
 379 {
 380         struct pci_config_table *table;
 381
 382         for (table = hose->config_table; table && table->vendor; table++) {
 383                 if ((table->vendor == PCI_ANY_ID || table->vendor == vendor) &&
 384                     (table->device == PCI_ANY_ID || table->device == device) &&
 385                     (table->class  == PCI_ANY_ID || table->class  == class)  &&
 386                     (table->bus    == PCI_ANY_ID || table->bus    == bus)    &&
 387                     (table->dev    == PCI_ANY_ID || table->dev    == dev)    &&
 388                     (table->func   == PCI_ANY_ID || table->func   == func)) {
 389                         return table;
 390                 }
 391         }
 392
 393         return NULL;
 394 }
 395
 396 void pci_cfgfunc_config_device(struct pci_controller *hose,
 397                                pci_dev_t dev,
 398                                struct pci_config_table *entry)
 399 {
 400         pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], entry->priv[2]);
 401 }
 402
 403 void pci_cfgfunc_do_nothing(struct pci_controller *hose,
 404                             pci_dev_t dev, struct pci_config_table *entry)
 405 {
 406 }
 407
 408 /*
 409  *
 410  */
 411
 412 /* HJF: Changed this to return int. I think this is required
 413  * to get the correct result when scanning bridges
 414  */
 415 extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
 416 extern void pciauto_config_init(struct pci_controller *hose);
 417
 418 int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 419 {
 420         unsigned int sub_bus, found_multi=0;
 421         unsigned short vendor, device, class;
 422         unsigned char header_type;
 423         struct pci_config_table *cfg;
 424         pci_dev_t dev;
 425
 426         sub_bus = bus;
 427
 428         for (dev =  PCI_BDF(bus,0,0);
 429              dev <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
 430              dev += PCI_BDF(0,0,1))
 431         {
 432 #ifndef CONFIG_405GP /* don't skip host bridge on ppc405gp */
 433                 /* Skip our host bridge */
 434                 if ( dev == PCI_BDF(hose->first_busno,0,0) )
 435                         continue;
 436 #endif
 437
 438                 if (PCI_FUNC(dev) && !found_multi)
 439                         continue;
 440
 441                 pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
 442
 443                 pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
 444
 445                 if (vendor != 0xffff && vendor != 0x0000) {
 446
 447                         if (!PCI_FUNC(dev))
 448                                 found_multi = header_type & 0x80;
 449
 450                         DEBUGF("PCI Scan: Found Bus %d, Device %d, Function %d\n",
 451                             PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
 452
 453                         pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
 454                         pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
 455
 456                         cfg = pci_find_config(hose, class, vendor, device,
 457                                               PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
 458                         if (cfg) {
 459                                 cfg->config_device(hose, dev, cfg);
 460 #ifdef CONFIG_PCI_PNP
 461                         } else {
 462                                 int n = pciauto_config_device(hose, dev);
 463
 464                                 sub_bus = max(sub_bus, n);
 465 #endif
 466                         }
 467                         if (hose->fixup_irq)
 468                                 hose->fixup_irq(hose, dev);
 469
 470 #ifdef CONFIG_PCI_SCAN_SHOW
 471                         /* Skip our host bridge */
 472                         if ( dev != PCI_BDF(hose->first_busno,0,0) ) {
 473                             unsigned char int_line;
 474
 475                             pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,
 476                                                       &int_line);
 477                             printf("        %02x  %02x  %04x  %04x  %04x  %02x\n",
 478                                    PCI_BUS(dev), PCI_DEV(dev), vendor, device, class,
 479                                    int_line);
 480                         }
 481 #endif
 482                 }
 483         }
 484
 485         return sub_bus;
 486 }
 487
 488 int pci_hose_scan(struct pci_controller *hose)
 489 {
 490 #ifdef CONFIG_PCI_PNP
 491         pciauto_config_init(hose);
 492 #endif
 493         return pci_hose_scan_bus(hose, hose->first_busno);
 494 }
 495
 496 void pci_init(void)
 497 {
 498 #if defined(CONFIG_PCI_BOOTDELAY)
 499         char *s;
 500         int i;
 501
 502         /* wait "pcidelay" ms (if defined)... */
 503         s = getenv ("pcidelay");
 504         if (s) {
 505                 int val = simple_strtoul (s, NULL, 10);
 506                 for (i=0; i<val; i++)
 507                         udelay (1000);
 508         }
 509 #endif /* CONFIG_PCI_BOOTDELAY */
 510
 511         /* now call board specific pci_init()... */
 512         pci_init_board();
 513 }
 514
 515 #endif /* CONFIG_PCI */