1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010 Broadcom Corporation.
9 #include <linux/delay.h>
10 #include <linux/export.h>
11 #include <linux/sched/signal.h>
12 #include <asm/unaligned.h>
15 #define PCI_VPD_LRDT_TAG_SIZE 3
16 #define PCI_VPD_SRDT_LEN_MASK 0x07
17 #define PCI_VPD_SRDT_TAG_SIZE 1
18 #define PCI_VPD_STIN_END 0x0f
19 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
21 static u16 pci_vpd_lrdt_size(const u8 *lrdt)
23 return get_unaligned_le16(lrdt + 1);
26 static u8 pci_vpd_srdt_tag(const u8 *srdt)
31 static u8 pci_vpd_srdt_size(const u8 *srdt)
33 return *srdt & PCI_VPD_SRDT_LEN_MASK;
36 static u8 pci_vpd_info_field_size(const u8 *info_field)
41 /* VPD access through PCI 2.2+ VPD capability */
43 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev)
45 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
48 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
49 #define PCI_VPD_SZ_INVALID UINT_MAX
52 * pci_vpd_size - determine actual size of Vital Product Data
53 * @dev: pci device struct
55 static size_t pci_vpd_size(struct pci_dev *dev)
58 unsigned char tag, header[1+2]; /* 1 byte tag, 2 bytes length */
60 while (pci_read_vpd_any(dev, off, 1, header) == 1) {
63 if (off == 0 && (header[0] == 0x00 || header[0] == 0xff))
66 if (header[0] & PCI_VPD_LRDT) {
67 /* Large Resource Data Type Tag */
68 if (pci_read_vpd_any(dev, off + 1, 2, &header[1]) != 2) {
69 pci_warn(dev, "failed VPD read at offset %zu\n",
71 return off ?: PCI_VPD_SZ_INVALID;
73 size = pci_vpd_lrdt_size(header);
74 if (off + size > PCI_VPD_MAX_SIZE)
77 off += PCI_VPD_LRDT_TAG_SIZE + size;
79 /* Short Resource Data Type Tag */
80 tag = pci_vpd_srdt_tag(header);
81 size = pci_vpd_srdt_size(header);
82 if (off + size > PCI_VPD_MAX_SIZE)
85 off += PCI_VPD_SRDT_TAG_SIZE + size;
86 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
93 pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n",
94 header[0], size, off, off == 0 ?
95 "; assume missing optional EEPROM" : "");
96 return off ?: PCI_VPD_SZ_INVALID;
99 static bool pci_vpd_available(struct pci_dev *dev, bool check_size)
101 struct pci_vpd *vpd = &dev->vpd;
106 if (vpd->len == 0 && check_size) {
107 vpd->len = pci_vpd_size(dev);
108 if (vpd->len == PCI_VPD_SZ_INVALID) {
118 * Wait for last operation to complete.
119 * This code has to spin since there is no other notification from the PCI
120 * hardware. Since the VPD is often implemented by serial attachment to an
121 * EEPROM, it may take many milliseconds to complete.
122 * @set: if true wait for flag to be set, else wait for it to be cleared
124 * Returns 0 on success, negative values indicate error.
126 static int pci_vpd_wait(struct pci_dev *dev, bool set)
128 struct pci_vpd *vpd = &dev->vpd;
129 unsigned long timeout = jiffies + msecs_to_jiffies(125);
130 unsigned long max_sleep = 16;
135 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
140 if (!!(status & PCI_VPD_ADDR_F) == set)
143 if (time_after(jiffies, timeout))
146 usleep_range(10, max_sleep);
147 if (max_sleep < 1024)
151 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
155 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
156 void *arg, bool check_size)
158 struct pci_vpd *vpd = &dev->vpd;
159 unsigned int max_len;
161 loff_t end = pos + count;
164 if (!pci_vpd_available(dev, check_size))
170 max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE;
180 if (mutex_lock_killable(&vpd->lock))
185 unsigned int i, skip;
187 if (fatal_signal_pending(current)) {
192 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
196 ret = pci_vpd_wait(dev, true);
200 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
205 for (i = 0; i < sizeof(u32); i++) {
215 mutex_unlock(&vpd->lock);
216 return ret ? ret : count;
219 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
220 const void *arg, bool check_size)
222 struct pci_vpd *vpd = &dev->vpd;
223 unsigned int max_len;
225 loff_t end = pos + count;
228 if (!pci_vpd_available(dev, check_size))
231 if (pos < 0 || (pos & 3) || (count & 3))
234 max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE;
239 if (mutex_lock_killable(&vpd->lock))
243 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,
244 get_unaligned_le32(buf));
247 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
248 pos | PCI_VPD_ADDR_F);
252 ret = pci_vpd_wait(dev, false);
260 mutex_unlock(&vpd->lock);
261 return ret ? ret : count;
264 void pci_vpd_init(struct pci_dev *dev)
266 if (dev->vpd.len == PCI_VPD_SZ_INVALID)
269 dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
270 mutex_init(&dev->vpd.lock);
273 static ssize_t vpd_read(struct file *filp, struct kobject *kobj,
274 struct bin_attribute *bin_attr, char *buf, loff_t off,
277 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
278 struct pci_dev *vpd_dev = dev;
281 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
282 vpd_dev = pci_get_func0_dev(dev);
287 pci_config_pm_runtime_get(vpd_dev);
288 ret = pci_read_vpd(vpd_dev, off, count, buf);
289 pci_config_pm_runtime_put(vpd_dev);
291 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
292 pci_dev_put(vpd_dev);
297 static ssize_t vpd_write(struct file *filp, struct kobject *kobj,
298 struct bin_attribute *bin_attr, char *buf, loff_t off,
301 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
302 struct pci_dev *vpd_dev = dev;
305 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
306 vpd_dev = pci_get_func0_dev(dev);
311 pci_config_pm_runtime_get(vpd_dev);
312 ret = pci_write_vpd(vpd_dev, off, count, buf);
313 pci_config_pm_runtime_put(vpd_dev);
315 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
316 pci_dev_put(vpd_dev);
320 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
322 static struct bin_attribute *vpd_attrs[] = {
327 static umode_t vpd_attr_is_visible(struct kobject *kobj,
328 struct bin_attribute *a, int n)
330 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
338 const struct attribute_group pci_dev_vpd_attr_group = {
339 .bin_attrs = vpd_attrs,
340 .is_bin_visible = vpd_attr_is_visible,
343 void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size)
349 if (!pci_vpd_available(dev, true))
350 return ERR_PTR(-ENODEV);
353 buf = kmalloc(len, GFP_KERNEL);
355 return ERR_PTR(-ENOMEM);
357 cnt = pci_read_vpd(dev, 0, len, buf);
360 return ERR_PTR(-EIO);
368 EXPORT_SYMBOL_GPL(pci_vpd_alloc);
370 static int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt, unsigned int *size)
374 /* look for LRDT tags only, end tag is the only SRDT tag */
375 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) {
376 unsigned int lrdt_len = pci_vpd_lrdt_size(buf + i);
379 i += PCI_VPD_LRDT_TAG_SIZE;
381 if (i + lrdt_len > len)
394 int pci_vpd_find_id_string(const u8 *buf, unsigned int len, unsigned int *size)
396 return pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_ID_STRING, size);
398 EXPORT_SYMBOL_GPL(pci_vpd_find_id_string);
400 static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
401 unsigned int len, const char *kw)
405 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
406 if (buf[i + 0] == kw[0] &&
410 i += PCI_VPD_INFO_FLD_HDR_SIZE +
411 pci_vpd_info_field_size(&buf[i]);
417 static ssize_t __pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf,
422 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
423 dev = pci_get_func0_dev(dev);
427 ret = pci_vpd_read(dev, pos, count, buf, check_size);
432 return pci_vpd_read(dev, pos, count, buf, check_size);
436 * pci_read_vpd - Read one entry from Vital Product Data
437 * @dev: PCI device struct
438 * @pos: offset in VPD space
439 * @count: number of bytes to read
440 * @buf: pointer to where to store result
442 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
444 return __pci_read_vpd(dev, pos, count, buf, true);
446 EXPORT_SYMBOL(pci_read_vpd);
448 /* Same, but allow to access any address */
449 ssize_t pci_read_vpd_any(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
451 return __pci_read_vpd(dev, pos, count, buf, false);
453 EXPORT_SYMBOL(pci_read_vpd_any);
455 static ssize_t __pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count,
456 const void *buf, bool check_size)
460 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
461 dev = pci_get_func0_dev(dev);
465 ret = pci_vpd_write(dev, pos, count, buf, check_size);
470 return pci_vpd_write(dev, pos, count, buf, check_size);
474 * pci_write_vpd - Write entry to Vital Product Data
475 * @dev: PCI device struct
476 * @pos: offset in VPD space
477 * @count: number of bytes to write
478 * @buf: buffer containing write data
480 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
482 return __pci_write_vpd(dev, pos, count, buf, true);
484 EXPORT_SYMBOL(pci_write_vpd);
486 /* Same, but allow to access any address */
487 ssize_t pci_write_vpd_any(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
489 return __pci_write_vpd(dev, pos, count, buf, false);
491 EXPORT_SYMBOL(pci_write_vpd_any);
493 int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len,
494 const char *kw, unsigned int *size)
496 int ro_start, infokw_start;
497 unsigned int ro_len, infokw_size;
499 ro_start = pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_RO_DATA, &ro_len);
503 infokw_start = pci_vpd_find_info_keyword(buf, ro_start, ro_len, kw);
504 if (infokw_start < 0)
507 infokw_size = pci_vpd_info_field_size(buf + infokw_start);
508 infokw_start += PCI_VPD_INFO_FLD_HDR_SIZE;
510 if (infokw_start + infokw_size > len)
518 EXPORT_SYMBOL_GPL(pci_vpd_find_ro_info_keyword);
520 int pci_vpd_check_csum(const void *buf, unsigned int len)
527 rv_start = pci_vpd_find_ro_info_keyword(buf, len, PCI_VPD_RO_KEYWORD_CHKSUM, &size);
528 if (rv_start == -ENOENT) /* no checksum in VPD */
530 else if (rv_start < 0)
536 while (rv_start >= 0)
537 csum += vpd[rv_start--];
539 return csum ? -EILSEQ : 0;
541 EXPORT_SYMBOL_GPL(pci_vpd_check_csum);
543 #ifdef CONFIG_PCI_QUIRKS
545 * Quirk non-zero PCI functions to route VPD access through function 0 for
546 * devices that share VPD resources between functions. The functions are
547 * expected to be identical devices.
549 static void quirk_f0_vpd_link(struct pci_dev *dev)
553 if (!PCI_FUNC(dev->devfn))
556 f0 = pci_get_func0_dev(dev);
560 if (f0->vpd.cap && dev->class == f0->class &&
561 dev->vendor == f0->vendor && dev->device == f0->device)
562 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
566 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
567 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
570 * If a device follows the VPD format spec, the PCI core will not read or
571 * write past the VPD End Tag. But some vendors do not follow the VPD
572 * format spec, so we can't tell how much data is safe to access. Devices
573 * may behave unpredictably if we access too much. Blacklist these devices
574 * so we don't touch VPD at all.
576 static void quirk_blacklist_vpd(struct pci_dev *dev)
578 dev->vpd.len = PCI_VPD_SZ_INVALID;
579 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
581 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
582 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
583 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
584 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
585 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
586 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
587 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
588 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
589 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
590 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
591 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
592 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, quirk_blacklist_vpd);
594 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
595 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
597 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
598 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
600 static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
602 int chip = (dev->device & 0xf000) >> 12;
603 int func = (dev->device & 0x0f00) >> 8;
604 int prod = (dev->device & 0x00ff) >> 0;
607 * If this is a T3-based adapter, there's a 1KB VPD area at offset
608 * 0xc00 which contains the preferred VPD values. If this is a T4 or
609 * later based adapter, the special VPD is at offset 0x400 for the
610 * Physical Functions (the SR-IOV Virtual Functions have no VPD
611 * Capabilities). The PCI VPD Access core routines will normally
612 * compute the size of the VPD by parsing the VPD Data Structure at
613 * offset 0x000. This will result in silent failures when attempting
614 * to accesses these other VPD areas which are beyond those computed
617 if (chip == 0x0 && prod >= 0x20)
619 else if (chip >= 0x4 && func < 0x8)
623 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
624 quirk_chelsio_extend_vpd);