1 // SPDX-License-Identifier: GPL-2.0
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 #include <asm/bitops.h>
11 #include <asm/fsl_law.h>
13 struct mpc85xx_pci_priv {
14 void __iomem *cfg_addr;
15 void __iomem *cfg_data;
18 static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
19 uint offset, ulong *value,
22 struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
26 *value = pci_get_ff(size);
30 /* Skip mpc85xx PCI controller's ATMU inbound registers */
31 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 &&
32 (offset & ~3) >= PCI_BASE_ADDRESS_0 && (offset & ~3) <= PCI_BASE_ADDRESS_5) {
37 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset);
38 out_be32(priv->cfg_addr, addr);
43 *value = in_8(priv->cfg_data + (offset & 3));
46 *value = in_le16(priv->cfg_data + (offset & 2));
49 *value = in_le32(priv->cfg_data);
56 static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf,
57 uint offset, ulong value,
60 struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
66 /* Skip mpc85xx PCI controller's ATMU inbound registers */
67 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 &&
68 (offset & ~3) >= PCI_BASE_ADDRESS_0 && (offset & ~3) <= PCI_BASE_ADDRESS_5)
71 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset);
72 out_be32(priv->cfg_addr, addr);
77 out_8(priv->cfg_data + (offset & 3), value);
80 out_le16(priv->cfg_data + (offset & 2), value);
83 out_le32(priv->cfg_data, value);
93 mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
94 struct pci_region *pre)
97 * Unfortunately we have defines for this addresse,
98 * as we have to setup the TLB, and at this stage
99 * we have no access to DT ... may we check here
100 * if the value in the define is the same ?
103 set_next_law(mem->phys_start, law_size_bits(mem->size),
106 set_next_law(io->phys_start, law_size_bits(io->size),
109 set_next_law(pre->phys_start, law_size_bits(pre->size),
116 static int mpc85xx_pci_dm_probe(struct udevice *dev)
118 struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
119 struct pci_region *io;
120 struct pci_region *mem;
121 struct pci_region *pre;
125 count = pci_get_regions(dev, &io, &mem, &pre);
127 printf("%s: wrong count of regions %d only 2 allowed\n",
132 #ifdef CONFIG_FSL_LAW
133 mpc85xx_pci_dm_setup_laws(io, mem, pre);
136 pcix = priv->cfg_addr;
138 out_be32(&pcix->potar1, mem->bus_start >> 12);
139 out_be32(&pcix->potear1, (u64)mem->bus_start >> 44);
140 out_be32(&pcix->powbar1, mem->phys_start >> 12);
141 out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44);
142 out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ |
143 POWAR_MEM_WRITE | (__ilog2(mem->size) - 1)));
146 out_be32(&pcix->potar2, io->bus_start >> 12);
147 out_be32(&pcix->potear2, (u64)io->bus_start >> 44);
148 out_be32(&pcix->powbar2, io->phys_start >> 12);
149 out_be32(&pcix->powbear2, (u64)io->phys_start >> 44);
150 out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ |
151 POWAR_IO_WRITE | (__ilog2(io->size) - 1)));
153 out_be32(&pcix->pitar1, 0);
154 out_be32(&pcix->piwbar1, 0);
155 out_be32(&pcix->piwar1, (PIWAR_EN | PIWAR_PF | PIWAR_LOCAL |
156 PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP | PIWAR_MEM_2G));
158 out_be32(&pcix->powar3, 0);
159 out_be32(&pcix->powar4, 0);
160 out_be32(&pcix->piwar2, 0);
161 out_be32(&pcix->piwar3, 0);
166 static int mpc85xx_pci_dm_remove(struct udevice *dev)
171 static int mpc85xx_pci_of_to_plat(struct udevice *dev)
173 struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
176 addr = devfdt_get_addr_index(dev, 0);
177 if (addr == FDT_ADDR_T_NONE)
179 priv->cfg_addr = (void __iomem *)map_physmem(addr, 0, MAP_NOCACHE);
180 priv->cfg_data = (void __iomem *)((ulong)priv->cfg_addr + 4);
185 static const struct dm_pci_ops mpc85xx_pci_ops = {
186 .read_config = mpc85xx_pci_dm_read_config,
187 .write_config = mpc85xx_pci_dm_write_config,
190 static const struct udevice_id mpc85xx_pci_ids[] = {
191 { .compatible = "fsl,mpc8540-pci" },
195 U_BOOT_DRIVER(mpc85xx_pci) = {
196 .name = "mpc85xx_pci",
198 .of_match = mpc85xx_pci_ids,
199 .ops = &mpc85xx_pci_ops,
200 .probe = mpc85xx_pci_dm_probe,
201 .remove = mpc85xx_pci_dm_remove,
202 .of_to_plat = mpc85xx_pci_of_to_plat,
203 .priv_auto = sizeof(struct mpc85xx_pci_priv),