1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI <-> OF mapping helpers
5 * Copyright 2011 IBM Corp.
7 #define pr_fmt(fmt) "PCI: OF: " fmt
9 #include <linux/irqdomain.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
13 #include <linux/of_irq.h>
14 #include <linux/of_address.h>
15 #include <linux/of_pci.h>
20 * pci_set_of_node - Find and set device's DT device_node
21 * @dev: the PCI device structure to fill
23 * Returns 0 on success with of_node set or when no device is described in the
24 * DT. Returns -ENODEV if the device is present, but disabled in the DT.
26 int pci_set_of_node(struct pci_dev *dev)
28 struct device_node *node;
30 if (!dev->bus->dev.of_node)
33 node = of_pci_find_child_device(dev->bus->dev.of_node, dev->devfn);
37 if (!of_device_is_available(node)) {
42 device_set_node(&dev->dev, of_fwnode_handle(node));
46 void pci_release_of_node(struct pci_dev *dev)
48 of_node_put(dev->dev.of_node);
49 device_set_node(&dev->dev, NULL);
52 void pci_set_bus_of_node(struct pci_bus *bus)
54 struct device_node *node;
56 if (bus->self == NULL) {
57 node = pcibios_get_phb_of_node(bus);
59 node = of_node_get(bus->self->dev.of_node);
60 if (node && of_property_read_bool(node, "external-facing"))
61 bus->self->external_facing = true;
64 device_set_node(&bus->dev, of_fwnode_handle(node));
67 void pci_release_bus_of_node(struct pci_bus *bus)
69 of_node_put(bus->dev.of_node);
70 device_set_node(&bus->dev, NULL);
73 struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
75 /* This should only be called for PHBs */
76 if (WARN_ON(bus->self || bus->parent))
80 * Look for a node pointer in either the intermediary device we
81 * create above the root bus or its own parent. Normally only
82 * the later is populated.
84 if (bus->bridge->of_node)
85 return of_node_get(bus->bridge->of_node);
86 if (bus->bridge->parent && bus->bridge->parent->of_node)
87 return of_node_get(bus->bridge->parent->of_node);
91 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
93 #ifdef CONFIG_IRQ_DOMAIN
96 if (!bus->dev.of_node)
99 /* Start looking for a phandle to an MSI controller. */
100 d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
105 * If we don't have an msi-parent property, look for a domain
106 * directly attached to the host bridge.
108 d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
112 return irq_find_host(bus->dev.of_node);
118 bool pci_host_of_has_msi_map(struct device *dev)
120 if (dev && dev->of_node)
121 return of_get_property(dev->of_node, "msi-map", NULL);
125 static inline int __of_pci_pci_compare(struct device_node *node,
130 devfn = of_pci_get_devfn(node);
134 return devfn == data;
137 struct device_node *of_pci_find_child_device(struct device_node *parent,
140 struct device_node *node, *node2;
142 for_each_child_of_node(parent, node) {
143 if (__of_pci_pci_compare(node, devfn))
146 * Some OFs create a parent node "multifunc-device" as
147 * a fake root for all functions of a multi-function
148 * device we go down them as well.
150 if (of_node_name_eq(node, "multifunc-device")) {
151 for_each_child_of_node(node, node2) {
152 if (__of_pci_pci_compare(node2, devfn)) {
161 EXPORT_SYMBOL_GPL(of_pci_find_child_device);
164 * of_pci_get_devfn() - Get device and function numbers for a device node
167 * Parses a standard 5-cell PCI resource and returns an 8-bit value that can
168 * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
169 * and function numbers respectively. On error a negative error code is
172 int of_pci_get_devfn(struct device_node *np)
177 error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
181 return (reg[0] >> 8) & 0xff;
183 EXPORT_SYMBOL_GPL(of_pci_get_devfn);
186 * of_pci_parse_bus_range() - parse the bus-range property of a PCI device
188 * @res: address to a struct resource to return the bus-range
190 * Returns 0 on success or a negative error-code on failure.
192 int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
197 error = of_property_read_u32_array(node, "bus-range", bus_range,
198 ARRAY_SIZE(bus_range));
202 res->name = node->name;
203 res->start = bus_range[0];
204 res->end = bus_range[1];
205 res->flags = IORESOURCE_BUS;
209 EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
212 * of_get_pci_domain_nr - Find the host bridge domain number
213 * of the given device node.
214 * @node: Device tree node with the domain information.
216 * This function will try to obtain the host bridge domain number by finding
217 * a property called "linux,pci-domain" of the given device node.
220 * * > 0 - On success, an associated domain number.
221 * * -EINVAL - The property "linux,pci-domain" does not exist.
222 * * -ENODATA - The linux,pci-domain" property does not have value.
223 * * -EOVERFLOW - Invalid "linux,pci-domain" property value.
225 * Returns the associated domain number from DT in the range [0-0xffff], or
226 * a negative value if the required property is not found.
228 int of_get_pci_domain_nr(struct device_node *node)
233 error = of_property_read_u32(node, "linux,pci-domain", &domain);
239 EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
242 * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
243 * is present and valid
245 void of_pci_check_probe_only(void)
250 ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
252 if (ret == -ENODATA || ret == -EOVERFLOW)
253 pr_warn("linux,pci-probe-only without valid value, ignoring\n");
258 pci_add_flags(PCI_PROBE_ONLY);
260 pci_clear_flags(PCI_PROBE_ONLY);
262 pr_info("PROBE_ONLY %s\n", val ? "enabled" : "disabled");
264 EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
267 * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
268 * host bridge resources from DT
269 * @dev: host bridge device
270 * @busno: bus number associated with the bridge root bus
271 * @bus_max: maximum number of buses for this bridge
272 * @resources: list where the range of resources will be added after DT parsing
273 * @ib_resources: list where the range of inbound resources (with addresses
274 * from 'dma-ranges') will be added after DT parsing
275 * @io_base: pointer to a variable that will contain on return the physical
276 * address for the start of the I/O range. Can be NULL if the caller doesn't
277 * expect I/O ranges to be present in the device tree.
279 * This function will parse the "ranges" property of a PCI host bridge device
280 * node and setup the resource mapping based on its content. It is expected
281 * that the property conforms with the Power ePAPR document.
283 * It returns zero if the range parsing has been successful or a standard error
284 * value if it failed.
286 static int devm_of_pci_get_host_bridge_resources(struct device *dev,
287 unsigned char busno, unsigned char bus_max,
288 struct list_head *resources,
289 struct list_head *ib_resources,
290 resource_size_t *io_base)
292 struct device_node *dev_node = dev->of_node;
293 struct resource *res, tmp_res;
294 struct resource *bus_range;
295 struct of_pci_range range;
296 struct of_pci_range_parser parser;
297 const char *range_type;
301 *io_base = (resource_size_t)OF_BAD_ADDR;
303 bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
307 dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
309 err = of_pci_parse_bus_range(dev_node, bus_range);
311 bus_range->start = busno;
312 bus_range->end = bus_max;
313 bus_range->flags = IORESOURCE_BUS;
314 dev_info(dev, " No bus range found for %pOF, using %pR\n",
315 dev_node, bus_range);
317 if (bus_range->end > bus_range->start + bus_max)
318 bus_range->end = bus_range->start + bus_max;
320 pci_add_resource(resources, bus_range);
322 /* Check for ranges property */
323 err = of_pci_range_parser_init(&parser, dev_node);
327 dev_dbg(dev, "Parsing ranges property...\n");
328 for_each_of_pci_range(&parser, &range) {
329 /* Read next ranges element */
330 if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
332 else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
336 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
337 range_type, range.cpu_addr,
338 range.cpu_addr + range.size - 1, range.pci_addr);
341 * If we failed translation or got a zero-sized region
342 * then skip this range
344 if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
347 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
351 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
357 if (resource_type(res) == IORESOURCE_IO) {
359 dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
364 if (*io_base != (resource_size_t)OF_BAD_ADDR)
365 dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
367 *io_base = range.cpu_addr;
368 } else if (resource_type(res) == IORESOURCE_MEM) {
369 res->flags &= ~IORESOURCE_MEM_64;
372 pci_add_resource_offset(resources, res, res->start - range.pci_addr);
375 /* Check for dma-ranges property */
378 err = of_pci_dma_range_parser_init(&parser, dev_node);
382 dev_dbg(dev, "Parsing dma-ranges property...\n");
383 for_each_of_pci_range(&parser, &range) {
385 * If we failed translation or got a zero-sized region
386 * then skip this range
388 if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) ||
389 range.cpu_addr == OF_BAD_ADDR || range.size == 0)
392 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
393 "IB MEM", range.cpu_addr,
394 range.cpu_addr + range.size - 1, range.pci_addr);
397 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
401 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
407 pci_add_resource_offset(ib_resources, res,
408 res->start - range.pci_addr);
414 pci_free_resource_list(resources);
418 #if IS_ENABLED(CONFIG_OF_IRQ)
420 * of_irq_parse_pci - Resolve the interrupt for a PCI device
421 * @pdev: the device whose interrupt is to be resolved
422 * @out_irq: structure of_phandle_args filled by this function
424 * This function resolves the PCI interrupt for a given PCI device. If a
425 * device-node exists for a given pci_dev, it will use normal OF tree
426 * walking. If not, it will implement standard swizzling and walk up the
427 * PCI tree until an device-node is found, at which point it will finish
428 * resolving using the OF tree walking.
430 static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
432 struct device_node *dn, *ppnode = NULL;
433 struct pci_dev *ppdev;
439 * Check if we have a device node, if yes, fallback to standard
440 * device tree parsing
442 dn = pci_device_to_OF_node(pdev);
444 rc = of_irq_parse_one(dn, 0, out_irq);
450 * Ok, we don't, time to have fun. Let's start by building up an
451 * interrupt spec. we assume #interrupt-cells is 1, which is standard
452 * for PCI. If you do different, then don't use that routine.
454 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
457 /* No pin, exit with no error message. */
461 /* Local interrupt-map in the device node? Use it! */
462 if (of_property_present(dn, "interrupt-map")) {
463 pin = pci_swizzle_interrupt_pin(pdev, pin);
467 /* Now we walk up the PCI tree */
469 /* Get the pci_dev of our parent */
470 ppdev = pdev->bus->self;
472 /* Ouch, it's a host bridge... */
474 ppnode = pci_bus_to_OF_node(pdev->bus);
476 /* No node for host bridge ? give up */
477 if (ppnode == NULL) {
482 /* We found a P2P bridge, check if it has a node */
483 ppnode = pci_device_to_OF_node(ppdev);
487 * Ok, we have found a parent with a device-node, hand over to
488 * the OF parsing code.
489 * We build a unit address from the linux device to be used for
490 * resolution. Note that we use the linux bus number which may
491 * not match your firmware bus numbering.
492 * Fortunately, in most cases, interrupt-map-mask doesn't
493 * include the bus number as part of the matching.
494 * You should still be careful about that though if you intend
495 * to rely on this function (you ship a firmware that doesn't
496 * create device nodes for all PCI devices).
502 * We can only get here if we hit a P2P bridge with no node;
503 * let's do standard swizzling and try again
505 pin = pci_swizzle_interrupt_pin(pdev, pin);
509 out_irq->np = ppnode;
510 out_irq->args_count = 1;
511 out_irq->args[0] = pin;
512 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
513 laddr[1] = laddr[2] = cpu_to_be32(0);
514 rc = of_irq_parse_raw(laddr, out_irq);
521 "%s: no interrupt-map found, INTx interrupts not available\n",
523 pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
526 dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
532 * of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
533 * @dev: The PCI device needing an IRQ
534 * @slot: PCI slot number; passed when used as map_irq callback. Unused
535 * @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
537 * @slot and @pin are unused, but included in the function so that this
538 * function can be used directly as the map_irq callback to
539 * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
541 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
543 struct of_phandle_args oirq;
546 ret = of_irq_parse_pci(dev, &oirq);
548 return 0; /* Proper return code 0 == NO_IRQ */
550 return irq_create_of_mapping(&oirq);
552 EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
553 #endif /* CONFIG_OF_IRQ */
555 static int pci_parse_request_of_pci_ranges(struct device *dev,
556 struct pci_host_bridge *bridge)
558 int err, res_valid = 0;
559 resource_size_t iobase;
560 struct resource_entry *win, *tmp;
562 INIT_LIST_HEAD(&bridge->windows);
563 INIT_LIST_HEAD(&bridge->dma_ranges);
565 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows,
566 &bridge->dma_ranges, &iobase);
570 err = devm_request_pci_bus_resources(dev, &bridge->windows);
574 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
575 struct resource *res = win->res;
577 switch (resource_type(res)) {
579 err = devm_pci_remap_iospace(dev, res, iobase);
581 dev_warn(dev, "error %d: failed to map resource %pR\n",
583 resource_list_destroy_entry(win);
587 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
589 if (!(res->flags & IORESOURCE_PREFETCH))
590 if (upper_32_bits(resource_size(res)))
591 dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
598 dev_warn(dev, "non-prefetchable memory resource required\n");
603 int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
608 bridge->swizzle_irq = pci_common_swizzle;
609 bridge->map_irq = of_irq_parse_and_map_pci;
611 return pci_parse_request_of_pci_ranges(dev, bridge);
614 #endif /* CONFIG_PCI */
617 * of_pci_get_max_link_speed - Find the maximum link speed of the given device node.
618 * @node: Device tree node with the maximum link speed information.
620 * This function will try to find the limitation of link speed by finding
621 * a property called "max-link-speed" of the given device node.
624 * * > 0 - On success, a maximum link speed.
625 * * -EINVAL - Invalid "max-link-speed" property value, or failure to access
626 * the property of the device tree node.
628 * Returns the associated max link speed from DT, or a negative value if the
629 * required property is not found or is invalid.
631 int of_pci_get_max_link_speed(struct device_node *node)
635 if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
636 max_link_speed == 0 || max_link_speed > 4)
639 return max_link_speed;
641 EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
644 * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt"
647 * @node: device tree node with the slot power limit information
648 * @slot_power_limit_value: pointer where the value should be stored in PCIe
649 * Slot Capabilities Register format
650 * @slot_power_limit_scale: pointer where the scale should be stored in PCIe
651 * Slot Capabilities Register format
653 * Returns the slot power limit in milliwatts and if @slot_power_limit_value
654 * and @slot_power_limit_scale pointers are non-NULL, fills in the value and
655 * scale in format used by PCIe Slot Capabilities Register.
657 * If the property is not found or is invalid, returns 0.
659 u32 of_pci_get_slot_power_limit(struct device_node *node,
660 u8 *slot_power_limit_value,
661 u8 *slot_power_limit_scale)
663 u32 slot_power_limit_mw;
666 if (of_property_read_u32(node, "slot-power-limit-milliwatt",
667 &slot_power_limit_mw))
668 slot_power_limit_mw = 0;
670 /* Calculate Slot Power Limit Value and Slot Power Limit Scale */
671 if (slot_power_limit_mw == 0) {
674 } else if (slot_power_limit_mw <= 255) {
675 value = slot_power_limit_mw;
677 } else if (slot_power_limit_mw <= 255*10) {
678 value = slot_power_limit_mw / 10;
680 slot_power_limit_mw = slot_power_limit_mw / 10 * 10;
681 } else if (slot_power_limit_mw <= 255*100) {
682 value = slot_power_limit_mw / 100;
684 slot_power_limit_mw = slot_power_limit_mw / 100 * 100;
685 } else if (slot_power_limit_mw <= 239*1000) {
686 value = slot_power_limit_mw / 1000;
688 slot_power_limit_mw = slot_power_limit_mw / 1000 * 1000;
689 } else if (slot_power_limit_mw < 250*1000) {
692 slot_power_limit_mw = 239*1000;
693 } else if (slot_power_limit_mw <= 600*1000) {
694 value = 0xF0 + (slot_power_limit_mw / 1000 - 250) / 25;
696 slot_power_limit_mw = slot_power_limit_mw / (1000*25) * (1000*25);
700 slot_power_limit_mw = 600*1000;
703 if (slot_power_limit_value)
704 *slot_power_limit_value = value;
706 if (slot_power_limit_scale)
707 *slot_power_limit_scale = scale;
709 return slot_power_limit_mw;
711 EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit);