1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
8 * based on parport_pc.c by
9 * Grant Guenther <grant@torque.net>
10 * Phil Blundell <philb@gnu.org>
11 * Tim Waugh <tim@cyberelk.demon.co.uk>
12 * Jose Renau <renau@acm.org>
17 #undef DEBUG /* undef for production */
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/pci.h>
28 #include <linux/sysctl.h>
32 #include <linux/uaccess.h>
33 #include <asm/superio.h>
35 #include <linux/parport.h>
37 #include <asm/parisc-device.h>
38 #include <asm/hardware.h>
39 #include "parport_gsc.h"
42 MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
43 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
44 MODULE_LICENSE("GPL");
48 * Clear TIMEOUT BIT in EPP MODE
50 * This is also used in SPP detection.
52 static int clear_epp_timeout(struct parport *pb)
56 if (!(parport_gsc_read_status(pb) & 0x01))
59 /* To clear timeout some chips require double read */
60 parport_gsc_read_status(pb);
61 r = parport_gsc_read_status(pb);
62 parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
63 parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
64 r = parport_gsc_read_status(pb);
72 * Most of these aren't static because they may be used by the
73 * parport_xxx_yyy macros. extern __inline__ versions of several
74 * of these are in parport_gsc.h.
77 void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
79 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
82 void parport_gsc_save_state(struct parport *p, struct parport_state *s)
84 s->u.pc.ctr = parport_readb (CONTROL (p));
87 void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
89 parport_writeb (s->u.pc.ctr, CONTROL (p));
92 struct parport_operations parport_gsc_ops =
94 .write_data = parport_gsc_write_data,
95 .read_data = parport_gsc_read_data,
97 .write_control = parport_gsc_write_control,
98 .read_control = parport_gsc_read_control,
99 .frob_control = parport_gsc_frob_control,
101 .read_status = parport_gsc_read_status,
103 .enable_irq = parport_gsc_enable_irq,
104 .disable_irq = parport_gsc_disable_irq,
106 .data_forward = parport_gsc_data_forward,
107 .data_reverse = parport_gsc_data_reverse,
109 .init_state = parport_gsc_init_state,
110 .save_state = parport_gsc_save_state,
111 .restore_state = parport_gsc_restore_state,
113 .epp_write_data = parport_ieee1284_epp_write_data,
114 .epp_read_data = parport_ieee1284_epp_read_data,
115 .epp_write_addr = parport_ieee1284_epp_write_addr,
116 .epp_read_addr = parport_ieee1284_epp_read_addr,
118 .ecp_write_data = parport_ieee1284_ecp_write_data,
119 .ecp_read_data = parport_ieee1284_ecp_read_data,
120 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
122 .compat_write_data = parport_ieee1284_write_compat,
123 .nibble_read_data = parport_ieee1284_read_nibble,
124 .byte_read_data = parport_ieee1284_read_byte,
126 .owner = THIS_MODULE,
129 /* --- Mode detection ------------------------------------- */
132 * Checks for port existence, all ports support SPP MODE
134 static int parport_SPP_supported(struct parport *pb)
139 * first clear an eventually pending EPP timeout
140 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
141 * that does not even respond to SPP cycles if an EPP
144 clear_epp_timeout(pb);
146 /* Do a simple read-write test to make sure the port exists. */
148 parport_writeb (w, CONTROL (pb));
150 /* Is there a control register that we can read from? Some
151 * ports don't allow reads, so read_control just returns a
152 * software copy. Some ports _do_ allow reads, so bypass the
153 * software copy here. In addition, some bits aren't
155 r = parport_readb (CONTROL (pb));
156 if ((r & 0xf) == w) {
158 parport_writeb (w, CONTROL (pb));
159 r = parport_readb (CONTROL (pb));
160 parport_writeb (0xc, CONTROL (pb));
162 return PARPORT_MODE_PCSPP;
165 /* Try the data register. The data lines aren't tri-stated at
166 * this stage, so we expect back what we wrote. */
168 parport_gsc_write_data (pb, w);
169 r = parport_gsc_read_data (pb);
172 parport_gsc_write_data (pb, w);
173 r = parport_gsc_read_data (pb);
175 return PARPORT_MODE_PCSPP;
181 /* Detect PS/2 support.
183 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
184 * allows us to read data from the data lines. In theory we would get back
185 * 0xff but any peripheral attached to the port may drag some or all of the
186 * lines down to zero. So if we get back anything that isn't the contents
187 * of the data register we deem PS/2 support to be present.
189 * Some SPP ports have "half PS/2" ability - you can't turn off the line
190 * drivers, but an external peripheral with sufficiently beefy drivers of
191 * its own can overpower them and assert its own levels onto the bus, from
192 * where they can then be read back as normal. Ports with this property
193 * and the right type of device attached are likely to fail the SPP test,
194 * (as they will appear to have stuck bits) and so the fact that they might
195 * be misdetected here is rather academic.
198 static int parport_PS2_supported(struct parport *pb)
202 clear_epp_timeout(pb);
204 /* try to tri-state the buffer */
205 parport_gsc_data_reverse (pb);
207 parport_gsc_write_data(pb, 0x55);
208 if (parport_gsc_read_data(pb) != 0x55) ok++;
210 parport_gsc_write_data(pb, 0xaa);
211 if (parport_gsc_read_data(pb) != 0xaa) ok++;
213 /* cancel input mode */
214 parport_gsc_data_forward (pb);
217 pb->modes |= PARPORT_MODE_TRISTATE;
219 struct parport_gsc_private *priv = pb->private_data;
220 priv->ctr_writable &= ~0x20;
227 /* --- Initialisation code -------------------------------- */
229 struct parport *parport_gsc_probe_port(unsigned long base,
230 unsigned long base_hi, int irq,
231 int dma, struct parisc_device *padev)
233 struct parport_gsc_private *priv;
234 struct parport_operations *ops;
236 struct parport *p = &tmp;
238 priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
240 printk(KERN_DEBUG "parport (0x%lx): no memory!\n", base);
243 ops = kmemdup(&parport_gsc_ops, sizeof(struct parport_operations),
246 printk(KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
252 priv->ctr_writable = 0xff;
253 priv->dma_buf = NULL;
254 priv->dma_handle = 0;
256 p->base_hi = base_hi;
259 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
261 p->private_data = priv;
263 if (!parport_SPP_supported (p)) {
269 parport_PS2_supported (p);
271 if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
272 PARPORT_DMA_NONE, ops))) {
278 p->dev = &padev->dev;
279 p->base_hi = base_hi;
280 p->modes = tmp.modes;
281 p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
282 p->private_data = priv;
284 pr_info("%s: PC-style at 0x%lx", p->name, p->base);
286 if (p->irq == PARPORT_IRQ_AUTO) {
287 p->irq = PARPORT_IRQ_NONE;
289 if (p->irq != PARPORT_IRQ_NONE) {
290 pr_cont(", irq %d", p->irq);
292 if (p->dma == PARPORT_DMA_AUTO) {
293 p->dma = PARPORT_DMA_NONE;
296 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
297 is mandatory (see above) */
298 p->dma = PARPORT_DMA_NONE;
301 #define printmode(x) \
303 if (p->modes & PARPORT_MODE_##x) \
304 pr_cont("%s%s", f++ ? "," : "", #x); \
318 if (p->irq != PARPORT_IRQ_NONE) {
319 if (request_irq (p->irq, parport_irq_handler,
321 pr_warn("%s: irq %d in use, resorting to polled operation\n",
323 p->irq = PARPORT_IRQ_NONE;
324 p->dma = PARPORT_DMA_NONE;
328 /* Done probing. Now put the port into a sensible start-up state. */
330 parport_gsc_write_data(p, 0);
331 parport_gsc_data_forward (p);
333 /* Now that we've told the sharing engine about the port, and
334 found out its characteristics, let the high-level drivers
336 parport_announce_port (p);
342 #define PARPORT_GSC_OFFSET 0x800
344 static int parport_count;
346 static int __init parport_init_chip(struct parisc_device *dev)
352 pr_warn("IRQ not found for parallel device at 0x%llx\n",
353 (unsigned long long)dev->hpa.start);
357 port = dev->hpa.start + PARPORT_GSC_OFFSET;
359 /* some older machines with ASP-chip don't support
360 * the enhanced parport modes.
362 if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
364 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
365 pr_info("%s: initialize bidirectional-mode\n", __func__);
366 parport_writeb ( (0x10 + 0x20), port + 4);
369 pr_info("%s: enhanced parport-modes not supported\n", __func__);
372 p = parport_gsc_probe_port(port, 0, dev->irq,
373 /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, dev);
376 dev_set_drvdata(&dev->dev, p);
381 static void __exit parport_remove_chip(struct parisc_device *dev)
383 struct parport *p = dev_get_drvdata(&dev->dev);
385 struct parport_gsc_private *priv = p->private_data;
386 struct parport_operations *ops = p->ops;
387 parport_remove_port(p);
388 if (p->dma != PARPORT_DMA_NONE)
390 if (p->irq != PARPORT_IRQ_NONE)
393 dma_free_coherent(&priv->dev->dev, PAGE_SIZE,
394 priv->dma_buf, priv->dma_handle);
395 kfree (p->private_data);
397 kfree (ops); /* hope no-one cached it */
401 static const struct parisc_device_id parport_tbl[] __initconst = {
402 { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
406 MODULE_DEVICE_TABLE(parisc, parport_tbl);
408 static struct parisc_driver parport_driver __refdata = {
410 .id_table = parport_tbl,
411 .probe = parport_init_chip,
412 .remove = __exit_p(parport_remove_chip),
415 int parport_gsc_init(void)
417 return register_parisc_driver(&parport_driver);
420 static void parport_gsc_exit(void)
422 unregister_parisc_driver(&parport_driver);
425 module_init(parport_gsc_init);
426 module_exit(parport_gsc_exit);