4 * Copyright (c) 2004 Texas Instruments
6 * This package is free software; you can redistribute it and/or
7 * modify it under the terms of the license found in the file
8 * named COPYING that should have accompanied this file.
10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments
16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17 * Rewritten to fit into the current U-Boot framework
19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
25 #ifdef CONFIG_DRIVER_OMAP24XX_I2C
27 #include <asm/arch/i2c.h>
30 #define inw(a) __raw_readw(a)
31 #define outw(a,v) __raw_writew(a,v)
33 static void wait_for_bb (void);
34 static u16 wait_for_pin (void);
35 void flush_fifo(void);
37 void i2c_init (int speed, int slaveadd)
41 if (inw (I2C_CON) & I2C_CON_EN) {
46 /* 12Mhz I2C module clock */
48 speed = speed/1000; /* 100 or 400 */
49 scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */
53 outw (slaveadd, I2C_OA);
54 outw (I2C_CON_EN, I2C_CON);
56 /* have to enable intrrupts or OMAP i2c module doesn't work */
57 outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
58 I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
62 static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
67 /* wait until bus not busy */
72 /* set slave address */
73 outw (devaddr, I2C_SA);
74 /* no stop bit needed here */
75 outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
77 status = wait_for_pin ();
79 if (status & I2C_STAT_XRDY) {
80 /* Important: have to use byte access */
81 *(volatile u8 *) (I2C_DATA) = regoffset;
83 if (inw (I2C_STAT) & I2C_STAT_NACK) {
91 /* free bus, otherwise we can't use a combined transction */
93 while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) {
95 /* Have to clear pending interrupt to clear I2C_STAT */
96 outw (0xFFFF, I2C_STAT);
100 /* set slave address */
101 outw (devaddr, I2C_SA);
102 /* read one byte from slave */
104 /* need stop bit here */
105 outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP,
108 status = wait_for_pin ();
109 if (status & I2C_STAT_RRDY) {
110 *value = inw (I2C_DATA);
117 outw (I2C_CON_EN, I2C_CON);
118 while (inw (I2C_STAT)
119 || (inw (I2C_CON) & I2C_CON_MST)) {
121 outw (0xFFFF, I2C_STAT);
126 outw (0xFFFF, I2C_STAT);
131 static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
136 /* wait until bus not busy */
141 /* set slave address */
142 outw (devaddr, I2C_SA);
143 /* stop bit needed here */
144 outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
145 I2C_CON_STP, I2C_CON);
147 /* wait until state change */
148 status = wait_for_pin ();
150 if (status & I2C_STAT_XRDY) {
151 /* send out two bytes */
152 outw ((value << 8) + regoffset, I2C_DATA);
153 /* must have enough delay to allow BB bit to go low */
155 if (inw (I2C_STAT) & I2C_STAT_NACK) {
163 outw (I2C_CON_EN, I2C_CON);
164 while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) {
166 /* have to read to clear intrrupt */
167 outw (0xFFFF, I2C_STAT);
171 outw (0xFFFF, I2C_STAT);
176 void flush_fifo(void)
179 /* note: if you try and read data when its not there or ready
180 * you get a bus error
183 stat = inw(I2C_STAT);
184 if(stat == I2C_STAT_RRDY){
186 outw(I2C_STAT_RRDY,I2C_STAT);
193 int i2c_probe (uchar chip)
195 int res = 1; /* default = fail */
197 if (chip == inw (I2C_OA)) {
201 /* wait until bus not busy */
204 /* try to read one byte */
206 /* set slave address */
208 /* stop bit needed here */
209 outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
210 /* enough delay for the NACK bit set */
213 if (!(inw (I2C_STAT) & I2C_STAT_NACK)) {
214 res = 0; /* success case */
216 outw(0xFFFF, I2C_STAT);
218 outw(0xFFFF, I2C_STAT); /* failue, clear sources*/
219 outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
224 outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/
225 outw(0xFFFF, I2C_STAT);
229 int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
234 printf ("I2C read: addr len %d not supported\n", alen);
238 if (addr + len > 256) {
239 printf ("I2C read: address out of range\n");
243 for (i = 0; i < len; i++) {
244 if (i2c_read_byte (chip, addr + i, &buffer[i])) {
245 printf ("I2C read: I/O error\n");
246 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
254 int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
259 printf ("I2C read: addr len %d not supported\n", alen);
263 if (addr + len > 256) {
264 printf ("I2C read: address out of range\n");
268 for (i = 0; i < len; i++) {
269 if (i2c_write_byte (chip, addr + i, buffer[i])) {
270 printf ("I2C read: I/O error\n");
271 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
279 static void wait_for_bb (void)
284 outw(0xFFFF, I2C_STAT); /* clear current interruts...*/
285 while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) {
286 outw (stat, I2C_STAT);
291 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
294 outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/
297 static u16 wait_for_pin (void)
304 status = inw (I2C_STAT);
306 (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
307 I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
308 I2C_STAT_AL)) && timeout--);
311 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
313 outw(0xFFFF, I2C_STAT);
318 #endif /* CONFIG_DRIVER_OMAP24XX_I2C */