drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/sed-opal.h>
  15 #include <linux/fault-inject.h>
  16 #include <linux/rcupdate.h>
  17 #include <linux/wait.h>
  18 #include <linux/t10-pi.h>
  19
  20 #include <trace/events/block.h>
  21
  22 extern unsigned int nvme_io_timeout;
  23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  24
  25 extern unsigned int admin_timeout;
  26 #define NVME_ADMIN_TIMEOUT      (admin_timeout * HZ)
  27
  28 #define NVME_DEFAULT_KATO       5
  29
  30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
  31 #define  NVME_INLINE_SG_CNT  0
  32 #define  NVME_INLINE_METADATA_SG_CNT  0
  33 #else
  34 #define  NVME_INLINE_SG_CNT  2
  35 #define  NVME_INLINE_METADATA_SG_CNT  1
  36 #endif
  37
  38 /*
  39  * Default to a 4K page size, with the intention to update this
  40  * path in the future to accommodate architectures with differing
  41  * kernel and IO page sizes.
  42  */
  43 #define NVME_CTRL_PAGE_SHIFT    12
  44 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
  45
  46 extern struct workqueue_struct *nvme_wq;
  47 extern struct workqueue_struct *nvme_reset_wq;
  48 extern struct workqueue_struct *nvme_delete_wq;
  49
  50 /*
  51  * List of workarounds for devices that required behavior not specified in
  52  * the standard.
  53  */
  54 enum nvme_quirks {
  55         /*
  56          * Prefers I/O aligned to a stripe size specified in a vendor
  57          * specific Identify field.
  58          */
  59         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  60
  61         /*
  62          * The controller doesn't handle Identify value others than 0 or 1
  63          * correctly.
  64          */
  65         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  66
  67         /*
  68          * The controller deterministically returns O's on reads to
  69          * logical blocks that deallocate was called on.
  70          */
  71         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  72
  73         /*
  74          * The controller needs a delay before starts checking the device
  75          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  76          */
  77         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  78
  79         /*
  80          * APST should not be used.
  81          */
  82         NVME_QUIRK_NO_APST                      = (1 << 4),
  83
  84         /*
  85          * The deepest sleep state should not be used.
  86          */
  87         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  88
  89         /*
  90          * Set MEDIUM priority on SQ creation
  91          */
  92         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  93
  94         /*
  95          * Ignore device provided subnqn.
  96          */
  97         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
  98
  99         /*
 100          * Broken Write Zeroes.
 101          */
 102         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
 103
 104         /*
 105          * Force simple suspend/resume path.
 106          */
 107         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
 108
 109         /*
 110          * Use only one interrupt vector for all queues
 111          */
 112         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
 113
 114         /*
 115          * Use non-standard 128 bytes SQEs.
 116          */
 117         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
 118
 119         /*
 120          * Prevent tag overlap between queues
 121          */
 122         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
 123
 124         /*
 125          * Don't change the value of the temperature threshold feature
 126          */
 127         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
 128
 129         /*
 130          * The controller doesn't handle the Identify Namespace
 131          * Identification Descriptor list subcommand despite claiming
 132          * NVMe 1.3 compliance.
 133          */
 134         NVME_QUIRK_NO_NS_DESC_LIST              = (1 << 15),
 135
 136         /*
 137          * The controller does not properly handle DMA addresses over
 138          * 48 bits.
 139          */
 140         NVME_QUIRK_DMA_ADDRESS_BITS_48          = (1 << 16),
 141
 142         /*
 143          * The controller requires the command_id value be limited, so skip
 144          * encoding the generation sequence number.
 145          */
 146         NVME_QUIRK_SKIP_CID_GEN                 = (1 << 17),
 147
 148         /*
 149          * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
 150          */
 151         NVME_QUIRK_BOGUS_NID                    = (1 << 18),
 152
 153         /*
 154          * No temperature thresholds for channels other than 0 (Composite).
 155          */
 156         NVME_QUIRK_NO_SECONDARY_TEMP_THRESH     = (1 << 19),
 157 };
 158
 159 /*
 160  * Common request structure for NVMe passthrough.  All drivers must have
 161  * this structure as the first member of their request-private data.
 162  */
 163 struct nvme_request {
 164         struct nvme_command     *cmd;
 165         union nvme_result       result;
 166         u8                      genctr;
 167         u8                      retries;
 168         u8                      flags;
 169         u16                     status;
 170 #ifdef CONFIG_NVME_MULTIPATH
 171         unsigned long           start_time;
 172 #endif
 173         struct nvme_ctrl        *ctrl;
 174 };
 175
 176 /*
 177  * Mark a bio as coming in through the mpath node.
 178  */
 179 #define REQ_NVME_MPATH          REQ_DRV
 180
 181 enum {
 182         NVME_REQ_CANCELLED              = (1 << 0),
 183         NVME_REQ_USERCMD                = (1 << 1),
 184         NVME_MPATH_IO_STATS             = (1 << 2),
 185 };
 186
 187 static inline struct nvme_request *nvme_req(struct request *req)
 188 {
 189         return blk_mq_rq_to_pdu(req);
 190 }
 191
 192 static inline u16 nvme_req_qid(struct request *req)
 193 {
 194         if (!req->q->queuedata)
 195                 return 0;
 196
 197         return req->mq_hctx->queue_num + 1;
 198 }
 199
 200 /* The below value is the specific amount of delay needed before checking
 201  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 202  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 203  * found empirically.
 204  */
 205 #define NVME_QUIRK_DELAY_AMOUNT         2300
 206
 207 /*
 208  * enum nvme_ctrl_state: Controller state
 209  *
 210  * @NVME_CTRL_NEW:              New controller just allocated, initial state
 211  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
 212  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
 213  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
 214  *                              transport
 215  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
 216  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
 217  *                              disabled/failed immediately. This state comes
 218  *                              after all async event processing took place and
 219  *                              before ns removal and the controller deletion
 220  *                              progress
 221  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
 222  *                              shutdown or removal. In this case we forcibly
 223  *                              kill all inflight I/O as they have no chance to
 224  *                              complete
 225  */
 226 enum nvme_ctrl_state {
 227         NVME_CTRL_NEW,
 228         NVME_CTRL_LIVE,
 229         NVME_CTRL_RESETTING,
 230         NVME_CTRL_CONNECTING,
 231         NVME_CTRL_DELETING,
 232         NVME_CTRL_DELETING_NOIO,
 233         NVME_CTRL_DEAD,
 234 };
 235
 236 struct nvme_fault_inject {
 237 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 238         struct fault_attr attr;
 239         struct dentry *parent;
 240         bool dont_retry;        /* DNR, do not retry */
 241         u16 status;             /* status code */
 242 #endif
 243 };
 244
 245 enum nvme_ctrl_flags {
 246         NVME_CTRL_FAILFAST_EXPIRED      = 0,
 247         NVME_CTRL_ADMIN_Q_STOPPED       = 1,
 248         NVME_CTRL_STARTED_ONCE          = 2,
 249         NVME_CTRL_STOPPED               = 3,
 250 };
 251
 252 struct nvme_ctrl {
 253         bool comp_seen;
 254         enum nvme_ctrl_state state;
 255         bool identified;
 256         spinlock_t lock;
 257         struct mutex scan_lock;
 258         const struct nvme_ctrl_ops *ops;
 259         struct request_queue *admin_q;
 260         struct request_queue *connect_q;
 261         struct request_queue *fabrics_q;
 262         struct device *dev;
 263         int instance;
 264         int numa_node;
 265         struct blk_mq_tag_set *tagset;
 266         struct blk_mq_tag_set *admin_tagset;
 267         struct list_head namespaces;
 268         struct rw_semaphore namespaces_rwsem;
 269         struct device ctrl_device;
 270         struct device *device;  /* char device */
 271 #ifdef CONFIG_NVME_HWMON
 272         struct device *hwmon_device;
 273 #endif
 274         struct cdev cdev;
 275         struct work_struct reset_work;
 276         struct work_struct delete_work;
 277         wait_queue_head_t state_wq;
 278
 279         struct nvme_subsystem *subsys;
 280         struct list_head subsys_entry;
 281
 282         struct opal_dev *opal_dev;
 283
 284         char name[12];
 285         u16 cntlid;
 286
 287         u32 ctrl_config;
 288         u16 mtfa;
 289         u32 queue_count;
 290
 291         u64 cap;
 292         u32 max_hw_sectors;
 293         u32 max_segments;
 294         u32 max_integrity_segments;
 295         u32 max_discard_sectors;
 296         u32 max_discard_segments;
 297         u32 max_zeroes_sectors;
 298 #ifdef CONFIG_BLK_DEV_ZONED
 299         u32 max_zone_append;
 300 #endif
 301         u16 crdt[3];
 302         u16 oncs;
 303         u32 dmrsl;
 304         u16 oacs;
 305         u16 sqsize;
 306         u32 max_namespaces;
 307         atomic_t abort_limit;
 308         u8 vwc;
 309         u32 vs;
 310         u32 sgls;
 311         u16 kas;
 312         u8 npss;
 313         u8 apsta;
 314         u16 wctemp;
 315         u16 cctemp;
 316         u32 oaes;
 317         u32 aen_result;
 318         u32 ctratt;
 319         unsigned int shutdown_timeout;
 320         unsigned int kato;
 321         bool subsystem;
 322         unsigned long quirks;
 323         struct nvme_id_power_state psd[32];
 324         struct nvme_effects_log *effects;
 325         struct xarray cels;
 326         struct work_struct scan_work;
 327         struct work_struct async_event_work;
 328         struct delayed_work ka_work;
 329         struct delayed_work failfast_work;
 330         struct nvme_command ka_cmd;
 331         struct work_struct fw_act_work;
 332         unsigned long events;
 333
 334 #ifdef CONFIG_NVME_MULTIPATH
 335         /* asymmetric namespace access: */
 336         u8 anacap;
 337         u8 anatt;
 338         u32 anagrpmax;
 339         u32 nanagrpid;
 340         struct mutex ana_lock;
 341         struct nvme_ana_rsp_hdr *ana_log_buf;
 342         size_t ana_log_size;
 343         struct timer_list anatt_timer;
 344         struct work_struct ana_work;
 345 #endif
 346
 347 #ifdef CONFIG_NVME_AUTH
 348         struct work_struct dhchap_auth_work;
 349         struct mutex dhchap_auth_mutex;
 350         struct nvme_dhchap_queue_context *dhchap_ctxs;
 351         struct nvme_dhchap_key *host_key;
 352         struct nvme_dhchap_key *ctrl_key;
 353         u16 transaction;
 354 #endif
 355
 356         /* Power saving configuration */
 357         u64 ps_max_latency_us;
 358         bool apst_enabled;
 359
 360         /* PCIe only: */
 361         u32 hmpre;
 362         u32 hmmin;
 363         u32 hmminds;
 364         u16 hmmaxd;
 365
 366         /* Fabrics only */
 367         u32 ioccsz;
 368         u32 iorcsz;
 369         u16 icdoff;
 370         u16 maxcmd;
 371         int nr_reconnects;
 372         unsigned long flags;
 373         struct nvmf_ctrl_options *opts;
 374
 375         struct page *discard_page;
 376         unsigned long discard_page_busy;
 377
 378         struct nvme_fault_inject fault_inject;
 379
 380         enum nvme_ctrl_type cntrltype;
 381         enum nvme_dctype dctype;
 382 };
 383
 384 enum nvme_iopolicy {
 385         NVME_IOPOLICY_NUMA,
 386         NVME_IOPOLICY_RR,
 387 };
 388
 389 struct nvme_subsystem {
 390         int                     instance;
 391         struct device           dev;
 392         /*
 393          * Because we unregister the device on the last put we need
 394          * a separate refcount.
 395          */
 396         struct kref             ref;
 397         struct list_head        entry;
 398         struct mutex            lock;
 399         struct list_head        ctrls;
 400         struct list_head        nsheads;
 401         char                    subnqn[NVMF_NQN_SIZE];
 402         char                    serial[20];
 403         char                    model[40];
 404         char                    firmware_rev[8];
 405         u8                      cmic;
 406         enum nvme_subsys_type   subtype;
 407         u16                     vendor_id;
 408         u16                     awupf;  /* 0's based awupf value. */
 409         struct ida              ns_ida;
 410 #ifdef CONFIG_NVME_MULTIPATH
 411         enum nvme_iopolicy      iopolicy;
 412 #endif
 413 };
 414
 415 /*
 416  * Container structure for uniqueue namespace identifiers.
 417  */
 418 struct nvme_ns_ids {
 419         u8      eui64[8];
 420         u8      nguid[16];
 421         uuid_t  uuid;
 422         u8      csi;
 423 };
 424
 425 /*
 426  * Anchor structure for namespaces.  There is one for each namespace in a
 427  * NVMe subsystem that any of our controllers can see, and the namespace
 428  * structure for each controller is chained of it.  For private namespaces
 429  * there is a 1:1 relation to our namespace structures, that is ->list
 430  * only ever has a single entry for private namespaces.
 431  */
 432 struct nvme_ns_head {
 433         struct list_head        list;
 434         struct srcu_struct      srcu;
 435         struct nvme_subsystem   *subsys;
 436         unsigned                ns_id;
 437         struct nvme_ns_ids      ids;
 438         struct list_head        entry;
 439         struct kref             ref;
 440         bool                    shared;
 441         int                     instance;
 442         struct nvme_effects_log *effects;
 443
 444         struct cdev             cdev;
 445         struct device           cdev_device;
 446
 447         struct gendisk          *disk;
 448 #ifdef CONFIG_NVME_MULTIPATH
 449         struct bio_list         requeue_list;
 450         spinlock_t              requeue_lock;
 451         struct work_struct      requeue_work;
 452         struct mutex            lock;
 453         unsigned long           flags;
 454 #define NVME_NSHEAD_DISK_LIVE   0
 455         struct nvme_ns __rcu    *current_path[];
 456 #endif
 457 };
 458
 459 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
 460 {
 461         return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
 462 }
 463
 464 enum nvme_ns_features {
 465         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
 466         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
 467         NVME_NS_DEAC,           /* DEAC bit in Write Zeores supported */
 468 };
 469
 470 struct nvme_ns {
 471         struct list_head list;
 472
 473         struct nvme_ctrl *ctrl;
 474         struct request_queue *queue;
 475         struct gendisk *disk;
 476 #ifdef CONFIG_NVME_MULTIPATH
 477         enum nvme_ana_state ana_state;
 478         u32 ana_grpid;
 479 #endif
 480         struct list_head siblings;
 481         struct kref kref;
 482         struct nvme_ns_head *head;
 483
 484         int lba_shift;
 485         u16 ms;
 486         u16 pi_size;
 487         u16 sgs;
 488         u32 sws;
 489         u8 pi_type;
 490         u8 guard_type;
 491 #ifdef CONFIG_BLK_DEV_ZONED
 492         u64 zsze;
 493 #endif
 494         unsigned long features;
 495         unsigned long flags;
 496 #define NVME_NS_REMOVING        0
 497 #define NVME_NS_ANA_PENDING     2
 498 #define NVME_NS_FORCE_RO        3
 499 #define NVME_NS_READY           4
 500
 501         struct cdev             cdev;
 502         struct device           cdev_device;
 503
 504         struct nvme_fault_inject fault_inject;
 505
 506 };
 507
 508 /* NVMe ns supports metadata actions by the controller (generate/strip) */
 509 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
 510 {
 511         return ns->pi_type && ns->ms == ns->pi_size;
 512 }
 513
 514 struct nvme_ctrl_ops {
 515         const char *name;
 516         struct module *module;
 517         unsigned int flags;
 518 #define NVME_F_FABRICS                  (1 << 0)
 519 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 520 #define NVME_F_BLOCKING                 (1 << 2)
 521
 522         const struct attribute_group **dev_attr_groups;
 523         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 524         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 525         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 526         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 527         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 528         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 529         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
 530         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 531         void (*print_device_info)(struct nvme_ctrl *ctrl);
 532         bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
 533 };
 534
 535 /*
 536  * nvme command_id is constructed as such:
 537  * | xxxx | xxxxxxxxxxxx |
 538  *   gen    request tag
 539  */
 540 #define nvme_genctr_mask(gen)                   (gen & 0xf)
 541 #define nvme_cid_install_genctr(gen)            (nvme_genctr_mask(gen) << 12)
 542 #define nvme_genctr_from_cid(cid)               ((cid & 0xf000) >> 12)
 543 #define nvme_tag_from_cid(cid)                  (cid & 0xfff)
 544
 545 static inline u16 nvme_cid(struct request *rq)
 546 {
 547         return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
 548 }
 549
 550 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
 551                 u16 command_id)
 552 {
 553         u8 genctr = nvme_genctr_from_cid(command_id);
 554         u16 tag = nvme_tag_from_cid(command_id);
 555         struct request *rq;
 556
 557         rq = blk_mq_tag_to_rq(tags, tag);
 558         if (unlikely(!rq)) {
 559                 pr_err("could not locate request for tag %#x\n",
 560                         tag);
 561                 return NULL;
 562         }
 563         if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
 564                 dev_err(nvme_req(rq)->ctrl->device,
 565                         "request %#x genctr mismatch (got %#x expected %#x)\n",
 566                         tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
 567                 return NULL;
 568         }
 569         return rq;
 570 }
 571
 572 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
 573                 u16 command_id)
 574 {
 575         return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
 576 }
 577
 578 /*
 579  * Return the length of the string without the space padding
 580  */
 581 static inline int nvme_strlen(char *s, int len)
 582 {
 583         while (s[len - 1] == ' ')
 584                 len--;
 585         return len;
 586 }
 587
 588 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
 589 {
 590         struct nvme_subsystem *subsys = ctrl->subsys;
 591
 592         if (ctrl->ops->print_device_info) {
 593                 ctrl->ops->print_device_info(ctrl);
 594                 return;
 595         }
 596
 597         dev_err(ctrl->device,
 598                 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
 599                 nvme_strlen(subsys->model, sizeof(subsys->model)),
 600                 subsys->model, nvme_strlen(subsys->firmware_rev,
 601                                            sizeof(subsys->firmware_rev)),
 602                 subsys->firmware_rev);
 603 }
 604
 605 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 606 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 607                             const char *dev_name);
 608 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 609 void nvme_should_fail(struct request *req);
 610 #else
 611 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 612                                           const char *dev_name)
 613 {
 614 }
 615 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 616 {
 617 }
 618 static inline void nvme_should_fail(struct request *req) {}
 619 #endif
 620
 621 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
 622 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
 623
 624 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 625 {
 626         int ret;
 627
 628         if (!ctrl->subsystem)
 629                 return -ENOTTY;
 630         if (!nvme_wait_reset(ctrl))
 631                 return -EBUSY;
 632
 633         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 634         if (ret)
 635                 return ret;
 636
 637         return nvme_try_sched_reset(ctrl);
 638 }
 639
 640 /*
 641  * Convert a 512B sector number to a device logical block number.
 642  */
 643 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
 644 {
 645         return sector >> (ns->lba_shift - SECTOR_SHIFT);
 646 }
 647
 648 /*
 649  * Convert a device logical block number to a 512B sector number.
 650  */
 651 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
 652 {
 653         return lba << (ns->lba_shift - SECTOR_SHIFT);
 654 }
 655
 656 /*
 657  * Convert byte length to nvme's 0-based num dwords
 658  */
 659 static inline u32 nvme_bytes_to_numd(size_t len)
 660 {
 661         return (len >> 2) - 1;
 662 }
 663
 664 static inline bool nvme_is_ana_error(u16 status)
 665 {
 666         switch (status & 0x7ff) {
 667         case NVME_SC_ANA_TRANSITION:
 668         case NVME_SC_ANA_INACCESSIBLE:
 669         case NVME_SC_ANA_PERSISTENT_LOSS:
 670                 return true;
 671         default:
 672                 return false;
 673         }
 674 }
 675
 676 static inline bool nvme_is_path_error(u16 status)
 677 {
 678         /* check for a status code type of 'path related status' */
 679         return (status & 0x700) == 0x300;
 680 }
 681
 682 /*
 683  * Fill in the status and result information from the CQE, and then figure out
 684  * if blk-mq will need to use IPI magic to complete the request, and if yes do
 685  * so.  If not let the caller complete the request without an indirect function
 686  * call.
 687  */
 688 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
 689                 union nvme_result result)
 690 {
 691         struct nvme_request *rq = nvme_req(req);
 692         struct nvme_ctrl *ctrl = rq->ctrl;
 693
 694         if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
 695                 rq->genctr++;
 696
 697         rq->status = le16_to_cpu(status) >> 1;
 698         rq->result = result;
 699         /* inject error when permitted by fault injection framework */
 700         nvme_should_fail(req);
 701         if (unlikely(blk_should_fake_timeout(req->q)))
 702                 return true;
 703         return blk_mq_complete_request_remote(req);
 704 }
 705
 706 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 707 {
 708         get_device(ctrl->device);
 709 }
 710
 711 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 712 {
 713         put_device(ctrl->device);
 714 }
 715
 716 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
 717 {
 718         return !qid &&
 719                 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
 720 }
 721
 722 void nvme_complete_rq(struct request *req);
 723 void nvme_complete_batch_req(struct request *req);
 724
 725 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
 726                                                 void (*fn)(struct request *rq))
 727 {
 728         struct request *req;
 729
 730         rq_list_for_each(&iob->req_list, req) {
 731                 fn(req);
 732                 nvme_complete_batch_req(req);
 733         }
 734         blk_mq_end_request_batch(iob);
 735 }
 736
 737 blk_status_t nvme_host_path_error(struct request *req);
 738 bool nvme_cancel_request(struct request *req, void *data);
 739 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
 740 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
 741 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 742                 enum nvme_ctrl_state new_state);
 743 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
 744 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 745 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 746                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 747 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 748 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 749 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 750 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
 751 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
 752                 const struct blk_mq_ops *ops, unsigned int cmd_size);
 753 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
 754 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
 755                 const struct blk_mq_ops *ops, unsigned int nr_maps,
 756                 unsigned int cmd_size);
 757 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
 758
 759 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 760
 761 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 762                 volatile union nvme_result *res);
 763
 764 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
 765 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
 766 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
 767 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
 768 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
 769 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 770 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
 771 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 772 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 773 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 774 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 775
 776 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
 777 {
 778         return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
 779 }
 780
 781 #define NVME_QID_ANY -1
 782 void nvme_init_request(struct request *req, struct nvme_command *cmd);
 783 void nvme_cleanup_cmd(struct request *req);
 784 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
 785 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
 786                 struct request *req);
 787 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 788                 bool queue_live);
 789
 790 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 791                 bool queue_live)
 792 {
 793         if (likely(ctrl->state == NVME_CTRL_LIVE))
 794                 return true;
 795         if (ctrl->ops->flags & NVME_F_FABRICS &&
 796             ctrl->state == NVME_CTRL_DELETING)
 797                 return queue_live;
 798         return __nvme_check_ready(ctrl, rq, queue_live);
 799 }
 800
 801 /*
 802  * NSID shall be unique for all shared namespaces, or if at least one of the
 803  * following conditions is met:
 804  *   1. Namespace Management is supported by the controller
 805  *   2. ANA is supported by the controller
 806  *   3. NVM Set are supported by the controller
 807  *
 808  * In other case, private namespace are not required to report a unique NSID.
 809  */
 810 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
 811                 struct nvme_ns_head *head)
 812 {
 813         return head->shared ||
 814                 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
 815                 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
 816                 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
 817 }
 818
 819 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 820                 void *buf, unsigned bufflen);
 821 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 822                 union nvme_result *result, void *buffer, unsigned bufflen,
 823                 int qid, int at_head,
 824                 blk_mq_req_flags_t flags);
 825 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 826                       unsigned int dword11, void *buffer, size_t buflen,
 827                       u32 *result);
 828 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 829                       unsigned int dword11, void *buffer, size_t buflen,
 830                       u32 *result);
 831 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 832 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 833 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 834 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 835 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 836 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 837 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
 838                 void *log, size_t size, u64 offset);
 839 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
 840 void nvme_put_ns_head(struct nvme_ns_head *head);
 841 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
 842                 const struct file_operations *fops, struct module *owner);
 843 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
 844 int nvme_ioctl(struct block_device *bdev, fmode_t mode,
 845                 unsigned int cmd, unsigned long arg);
 846 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 847 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
 848                 unsigned int cmd, unsigned long arg);
 849 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
 850                 unsigned long arg);
 851 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
 852                 unsigned long arg);
 853 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
 854                 struct io_comp_batch *iob, unsigned int poll_flags);
 855 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
 856                 struct io_comp_batch *iob, unsigned int poll_flags);
 857 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 858                 unsigned int issue_flags);
 859 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 860                 unsigned int issue_flags);
 861 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 862 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
 863
 864 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 865 extern const struct pr_ops nvme_pr_ops;
 866 extern const struct block_device_operations nvme_ns_head_ops;
 867 extern const struct attribute_group nvme_dev_attrs_group;
 868
 869 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 870 #ifdef CONFIG_NVME_MULTIPATH
 871 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 872 {
 873         return ctrl->ana_log_buf != NULL;
 874 }
 875
 876 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
 877 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
 878 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
 879 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
 880 void nvme_failover_req(struct request *req);
 881 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 882 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 883 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
 884 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 885 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 886 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
 887 void nvme_mpath_update(struct nvme_ctrl *ctrl);
 888 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 889 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 890 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
 891 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
 892 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
 893 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
 894 void nvme_mpath_start_request(struct request *rq);
 895 void nvme_mpath_end_request(struct request *rq);
 896
 897 static inline void nvme_trace_bio_complete(struct request *req)
 898 {
 899         struct nvme_ns *ns = req->q->queuedata;
 900
 901         if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
 902                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
 903 }
 904
 905 extern bool multipath;
 906 extern struct device_attribute dev_attr_ana_grpid;
 907 extern struct device_attribute dev_attr_ana_state;
 908 extern struct device_attribute subsys_attr_iopolicy;
 909
 910 #else
 911 #define multipath false
 912 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 913 {
 914         return false;
 915 }
 916 static inline void nvme_failover_req(struct request *req)
 917 {
 918 }
 919 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 920 {
 921 }
 922 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 923                 struct nvme_ns_head *head)
 924 {
 925         return 0;
 926 }
 927 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
 928 {
 929 }
 930 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 931 {
 932 }
 933 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
 934 {
 935         return false;
 936 }
 937 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
 938 {
 939 }
 940 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
 941 {
 942 }
 943 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
 944 {
 945 }
 946 static inline void nvme_trace_bio_complete(struct request *req)
 947 {
 948 }
 949 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
 950 {
 951 }
 952 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
 953                 struct nvme_id_ctrl *id)
 954 {
 955         if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
 956                 dev_warn(ctrl->device,
 957 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 958         return 0;
 959 }
 960 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
 961 {
 962 }
 963 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 964 {
 965 }
 966 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 967 {
 968 }
 969 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
 970 {
 971 }
 972 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
 973 {
 974 }
 975 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
 976 {
 977 }
 978 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
 979 {
 980 }
 981 static inline void nvme_mpath_start_request(struct request *rq)
 982 {
 983 }
 984 static inline void nvme_mpath_end_request(struct request *rq)
 985 {
 986 }
 987 #endif /* CONFIG_NVME_MULTIPATH */
 988
 989 int nvme_revalidate_zones(struct nvme_ns *ns);
 990 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
 991                 unsigned int nr_zones, report_zones_cb cb, void *data);
 992 #ifdef CONFIG_BLK_DEV_ZONED
 993 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
 994 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
 995                                        struct nvme_command *cmnd,
 996                                        enum nvme_zone_mgmt_action action);
 997 #else
 998 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
 999                 struct request *req, struct nvme_command *cmnd,
1000                 enum nvme_zone_mgmt_action action)
1001 {
1002         return BLK_STS_NOTSUPP;
1003 }
1004
1005 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1006 {
1007         dev_warn(ns->ctrl->device,
1008                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1009         return -EPROTONOSUPPORT;
1010 }
1011 #endif
1012
1013 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1014 {
1015         return dev_to_disk(dev)->private_data;
1016 }
1017
1018 #ifdef CONFIG_NVME_HWMON
1019 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1020 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1021 #else
1022 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1023 {
1024         return 0;
1025 }
1026
1027 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1028 {
1029 }
1030 #endif
1031
1032 static inline void nvme_start_request(struct request *rq)
1033 {
1034         if (rq->cmd_flags & REQ_NVME_MPATH)
1035                 nvme_mpath_start_request(rq);
1036         blk_mq_start_request(rq);
1037 }
1038
1039 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1040 {
1041         return ctrl->sgls & ((1 << 0) | (1 << 1));
1042 }
1043
1044 #ifdef CONFIG_NVME_AUTH
1045 int __init nvme_init_auth(void);
1046 void __exit nvme_exit_auth(void);
1047 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1048 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1049 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1050 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1051 void nvme_auth_free(struct nvme_ctrl *ctrl);
1052 #else
1053 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1054 {
1055         return 0;
1056 }
1057 static inline int __init nvme_init_auth(void)
1058 {
1059         return 0;
1060 }
1061 static inline void __exit nvme_exit_auth(void)
1062 {
1063 }
1064 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1065 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1066 {
1067         return -EPROTONOSUPPORT;
1068 }
1069 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1070 {
1071         return NVME_SC_AUTH_REQUIRED;
1072 }
1073 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1074 #endif
1075
1076 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1077                          u8 opcode);
1078 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1079 int nvme_execute_rq(struct request *rq, bool at_head);
1080 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects,
1081                        struct nvme_command *cmd, int status);
1082 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1083 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1084 void nvme_put_ns(struct nvme_ns *ns);
1085
1086 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1087 {
1088         return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1089 }
1090
1091 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1092 const unsigned char *nvme_get_error_status_str(u16 status);
1093 const unsigned char *nvme_get_opcode_str(u8 opcode);
1094 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1095 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1096 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1097 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1098 {
1099         return "I/O Error";
1100 }
1101 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1102 {
1103         return "I/O Cmd";
1104 }
1105 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1106 {
1107         return "Admin Cmd";
1108 }
1109
1110 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1111 {
1112         return "Fabrics Cmd";
1113 }
1114 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1115
1116 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1117 {
1118         if (opcode == nvme_fabrics_command)
1119                 return nvme_get_fabrics_opcode_str(fctype);
1120         return qid ? nvme_get_opcode_str(opcode) :
1121                 nvme_get_admin_opcode_str(opcode);
1122 }
1123 #endif /* _NVME_H */