2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
7 * Copyright(c) 2012 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
15 * Copyright(c) 2012 Intel Corporation. All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
21 * * Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * * Redistributions in binary form must reproduce the above copy
24 * notice, this list of conditions and the following disclaimer in
25 * the documentation and/or other materials provided with the
27 * * Neither the name of Intel Corporation nor the names of its
28 * contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
36 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
37 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
39 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 * Intel PCIe NTB Linux driver
45 * Contact Information:
46 * Jon Mason <jon.mason@intel.com>
48 #include <linux/debugfs.h>
49 #include <linux/init.h>
50 #include <linux/interrupt.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/slab.h>
57 #define NTB_NAME "Intel(R) PCI-E Non-Transparent Bridge Driver"
58 #define NTB_VER "0.24"
60 MODULE_DESCRIPTION(NTB_NAME);
61 MODULE_VERSION(NTB_VER);
62 MODULE_LICENSE("Dual BSD/GPL");
63 MODULE_AUTHOR("Intel Corporation");
81 /* Translate memory window 0,1 to BAR 2,4 */
82 #define MW_TO_BAR(mw) (mw * 2 + 2)
84 static DEFINE_PCI_DEVICE_TABLE(ntb_pci_tbl) = {
85 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_BWD)},
86 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_JSF)},
87 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF)},
88 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_JSF)},
89 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_SNB)},
90 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_SNB)},
91 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB)},
94 MODULE_DEVICE_TABLE(pci, ntb_pci_tbl);
97 * ntb_register_event_callback() - register event callback
98 * @ndev: pointer to ntb_device instance
99 * @func: callback function to register
101 * This function registers a callback for any HW driver events such as link
102 * up/down, power management notices and etc.
104 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
106 int ntb_register_event_callback(struct ntb_device *ndev,
107 void (*func)(void *handle, unsigned int event))
112 ndev->event_cb = func;
118 * ntb_unregister_event_callback() - unregisters the event callback
119 * @ndev: pointer to ntb_device instance
121 * This function unregisters the existing callback from transport
123 void ntb_unregister_event_callback(struct ntb_device *ndev)
125 ndev->event_cb = NULL;
129 * ntb_register_db_callback() - register a callback for doorbell interrupt
130 * @ndev: pointer to ntb_device instance
131 * @idx: doorbell index to register callback, zero based
132 * @func: callback function to register
134 * This function registers a callback function for the doorbell interrupt
135 * on the primary side. The function will unmask the doorbell as well to
138 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
140 int ntb_register_db_callback(struct ntb_device *ndev, unsigned int idx,
141 void *data, void (*func)(void *data, int db_num))
145 if (idx >= ndev->max_cbs || ndev->db_cb[idx].callback) {
146 dev_warn(&ndev->pdev->dev, "Invalid Index.\n");
150 ndev->db_cb[idx].callback = func;
151 ndev->db_cb[idx].data = data;
153 /* unmask interrupt */
154 mask = readw(ndev->reg_ofs.pdb_mask);
155 clear_bit(idx * ndev->bits_per_vector, &mask);
156 writew(mask, ndev->reg_ofs.pdb_mask);
162 * ntb_unregister_db_callback() - unregister a callback for doorbell interrupt
163 * @ndev: pointer to ntb_device instance
164 * @idx: doorbell index to register callback, zero based
166 * This function unregisters a callback function for the doorbell interrupt
167 * on the primary side. The function will also mask the said doorbell.
169 void ntb_unregister_db_callback(struct ntb_device *ndev, unsigned int idx)
173 if (idx >= ndev->max_cbs || !ndev->db_cb[idx].callback)
176 mask = readw(ndev->reg_ofs.pdb_mask);
177 set_bit(idx * ndev->bits_per_vector, &mask);
178 writew(mask, ndev->reg_ofs.pdb_mask);
180 ndev->db_cb[idx].callback = NULL;
184 * ntb_find_transport() - find the transport pointer
185 * @transport: pointer to pci device
187 * Given the pci device pointer, return the transport pointer passed in when
188 * the transport attached when it was inited.
190 * RETURNS: pointer to transport.
192 void *ntb_find_transport(struct pci_dev *pdev)
194 struct ntb_device *ndev = pci_get_drvdata(pdev);
195 return ndev->ntb_transport;
199 * ntb_register_transport() - Register NTB transport with NTB HW driver
200 * @transport: transport identifier
202 * This function allows a transport to reserve the hardware driver for
205 * RETURNS: pointer to ntb_device, NULL on error.
207 struct ntb_device *ntb_register_transport(struct pci_dev *pdev, void *transport)
209 struct ntb_device *ndev = pci_get_drvdata(pdev);
211 if (ndev->ntb_transport)
214 ndev->ntb_transport = transport;
219 * ntb_unregister_transport() - Unregister the transport with the NTB HW driver
220 * @ndev - ntb_device of the transport to be freed
222 * This function unregisters the transport from the HW driver and performs any
223 * necessary cleanups.
225 void ntb_unregister_transport(struct ntb_device *ndev)
229 if (!ndev->ntb_transport)
232 for (i = 0; i < ndev->max_cbs; i++)
233 ntb_unregister_db_callback(ndev, i);
235 ntb_unregister_event_callback(ndev);
236 ndev->ntb_transport = NULL;
240 * ntb_get_max_spads() - get the total scratch regs usable
241 * @ndev: pointer to ntb_device instance
243 * This function returns the max 32bit scratchpad registers usable by the
246 * RETURNS: total number of scratch pad registers available
248 int ntb_get_max_spads(struct ntb_device *ndev)
250 return ndev->limits.max_spads;
254 * ntb_write_local_spad() - write to the secondary scratchpad register
255 * @ndev: pointer to ntb_device instance
256 * @idx: index to the scratchpad register, 0 based
257 * @val: the data value to put into the register
259 * This function allows writing of a 32bit value to the indexed scratchpad
260 * register. This writes over the data mirrored to the local scratchpad register
261 * by the remote system.
263 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
265 int ntb_write_local_spad(struct ntb_device *ndev, unsigned int idx, u32 val)
267 if (idx >= ndev->limits.max_spads)
270 dev_dbg(&ndev->pdev->dev, "Writing %x to local scratch pad index %d\n",
272 writel(val, ndev->reg_ofs.spad_read + idx * 4);
278 * ntb_read_local_spad() - read from the primary scratchpad register
279 * @ndev: pointer to ntb_device instance
280 * @idx: index to scratchpad register, 0 based
281 * @val: pointer to 32bit integer for storing the register value
283 * This function allows reading of the 32bit scratchpad register on
284 * the primary (internal) side. This allows the local system to read data
285 * written and mirrored to the scratchpad register by the remote system.
287 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
289 int ntb_read_local_spad(struct ntb_device *ndev, unsigned int idx, u32 *val)
291 if (idx >= ndev->limits.max_spads)
294 *val = readl(ndev->reg_ofs.spad_write + idx * 4);
295 dev_dbg(&ndev->pdev->dev,
296 "Reading %x from local scratch pad index %d\n", *val, idx);
302 * ntb_write_remote_spad() - write to the secondary scratchpad register
303 * @ndev: pointer to ntb_device instance
304 * @idx: index to the scratchpad register, 0 based
305 * @val: the data value to put into the register
307 * This function allows writing of a 32bit value to the indexed scratchpad
308 * register. The register resides on the secondary (external) side. This allows
309 * the local system to write data to be mirrored to the remote systems
310 * scratchpad register.
312 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
314 int ntb_write_remote_spad(struct ntb_device *ndev, unsigned int idx, u32 val)
316 if (idx >= ndev->limits.max_spads)
319 dev_dbg(&ndev->pdev->dev, "Writing %x to remote scratch pad index %d\n",
321 writel(val, ndev->reg_ofs.spad_write + idx * 4);
327 * ntb_read_remote_spad() - read from the primary scratchpad register
328 * @ndev: pointer to ntb_device instance
329 * @idx: index to scratchpad register, 0 based
330 * @val: pointer to 32bit integer for storing the register value
332 * This function allows reading of the 32bit scratchpad register on
333 * the primary (internal) side. This alloows the local system to read the data
334 * it wrote to be mirrored on the remote system.
336 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
338 int ntb_read_remote_spad(struct ntb_device *ndev, unsigned int idx, u32 *val)
340 if (idx >= ndev->limits.max_spads)
343 *val = readl(ndev->reg_ofs.spad_read + idx * 4);
344 dev_dbg(&ndev->pdev->dev,
345 "Reading %x from remote scratch pad index %d\n", *val, idx);
351 * ntb_get_mw_vbase() - get virtual addr for the NTB memory window
352 * @ndev: pointer to ntb_device instance
353 * @mw: memory window number
355 * This function provides the base virtual address of the memory window
358 * RETURNS: pointer to virtual address, or NULL on error.
360 void *ntb_get_mw_vbase(struct ntb_device *ndev, unsigned int mw)
365 return ndev->mw[mw].vbase;
369 * ntb_get_mw_size() - return size of NTB memory window
370 * @ndev: pointer to ntb_device instance
371 * @mw: memory window number
373 * This function provides the physical size of the memory window specified
375 * RETURNS: the size of the memory window or zero on error
377 resource_size_t ntb_get_mw_size(struct ntb_device *ndev, unsigned int mw)
382 return ndev->mw[mw].bar_sz;
386 * ntb_set_mw_addr - set the memory window address
387 * @ndev: pointer to ntb_device instance
388 * @mw: memory window number
389 * @addr: base address for data
391 * This function sets the base physical address of the memory window. This
392 * memory address is where data from the remote system will be transfered into
393 * or out of depending on how the transport is configured.
395 void ntb_set_mw_addr(struct ntb_device *ndev, unsigned int mw, u64 addr)
400 dev_dbg(&ndev->pdev->dev, "Writing addr %Lx to BAR %d\n", addr,
403 ndev->mw[mw].phys_addr = addr;
405 switch (MW_TO_BAR(mw)) {
407 writeq(addr, ndev->reg_ofs.sbar2_xlat);
410 writeq(addr, ndev->reg_ofs.sbar4_xlat);
416 * ntb_ring_sdb() - Set the doorbell on the secondary/external side
417 * @ndev: pointer to ntb_device instance
418 * @db: doorbell to ring
420 * This function allows triggering of a doorbell on the secondary/external
421 * side that will initiate an interrupt on the remote host
423 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
425 void ntb_ring_sdb(struct ntb_device *ndev, unsigned int db)
427 dev_dbg(&ndev->pdev->dev, "%s: ringing doorbell %d\n", __func__, db);
429 if (ndev->hw_type == BWD_HW)
430 writeq((u64) 1 << db, ndev->reg_ofs.sdb);
432 writew(((1 << ndev->bits_per_vector) - 1) <<
433 (db * ndev->bits_per_vector), ndev->reg_ofs.sdb);
436 static void ntb_link_event(struct ntb_device *ndev, int link_state)
440 if (ndev->link_status == link_state)
443 if (link_state == NTB_LINK_UP) {
446 dev_info(&ndev->pdev->dev, "Link Up\n");
447 ndev->link_status = NTB_LINK_UP;
448 event = NTB_EVENT_HW_LINK_UP;
450 if (ndev->hw_type == BWD_HW)
451 status = readw(ndev->reg_ofs.lnk_stat);
453 int rc = pci_read_config_word(ndev->pdev,
454 SNB_LINK_STATUS_OFFSET,
459 dev_info(&ndev->pdev->dev, "Link Width %d, Link Speed %d\n",
460 (status & NTB_LINK_WIDTH_MASK) >> 4,
461 (status & NTB_LINK_SPEED_MASK));
463 dev_info(&ndev->pdev->dev, "Link Down\n");
464 ndev->link_status = NTB_LINK_DOWN;
465 event = NTB_EVENT_HW_LINK_DOWN;
468 /* notify the upper layer if we have an event change */
470 ndev->event_cb(ndev->ntb_transport, event);
473 static int ntb_link_status(struct ntb_device *ndev)
477 if (ndev->hw_type == BWD_HW) {
480 ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);
481 if (ntb_cntl & BWD_CNTL_LINK_DOWN)
482 link_state = NTB_LINK_DOWN;
484 link_state = NTB_LINK_UP;
489 rc = pci_read_config_word(ndev->pdev, SNB_LINK_STATUS_OFFSET,
494 if (status & NTB_LINK_STATUS_ACTIVE)
495 link_state = NTB_LINK_UP;
497 link_state = NTB_LINK_DOWN;
500 ntb_link_event(ndev, link_state);
505 /* BWD doesn't have link status interrupt, poll on that platform */
506 static void bwd_link_poll(struct work_struct *work)
508 struct ntb_device *ndev = container_of(work, struct ntb_device,
510 unsigned long ts = jiffies;
512 /* If we haven't gotten an interrupt in a while, check the BWD link
515 if (ts > ndev->last_ts + NTB_HB_TIMEOUT) {
516 int rc = ntb_link_status(ndev);
518 dev_err(&ndev->pdev->dev,
519 "Error determining link status\n");
522 schedule_delayed_work(&ndev->hb_timer, NTB_HB_TIMEOUT);
525 static int ntb_xeon_setup(struct ntb_device *ndev)
530 ndev->hw_type = SNB_HW;
532 rc = pci_read_config_byte(ndev->pdev, NTB_PPD_OFFSET, &val);
536 switch (val & SNB_PPD_CONN_TYPE) {
538 ndev->conn_type = NTB_CONN_B2B;
540 case NTB_CONN_CLASSIC:
543 dev_err(&ndev->pdev->dev, "Only B2B supported at this time\n");
547 if (val & SNB_PPD_DEV_TYPE)
548 ndev->dev_type = NTB_DEV_DSD;
550 ndev->dev_type = NTB_DEV_USD;
552 ndev->reg_ofs.pdb = ndev->reg_base + SNB_PDOORBELL_OFFSET;
553 ndev->reg_ofs.pdb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;
554 ndev->reg_ofs.sbar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;
555 ndev->reg_ofs.sbar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;
556 ndev->reg_ofs.lnk_cntl = ndev->reg_base + SNB_NTBCNTL_OFFSET;
557 ndev->reg_ofs.lnk_stat = ndev->reg_base + SNB_LINK_STATUS_OFFSET;
558 ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;
559 ndev->reg_ofs.spci_cmd = ndev->reg_base + SNB_PCICMD_OFFSET;
561 if (ndev->conn_type == NTB_CONN_B2B) {
562 ndev->reg_ofs.sdb = ndev->reg_base + SNB_B2B_DOORBELL_OFFSET;
563 ndev->reg_ofs.spad_write = ndev->reg_base + SNB_B2B_SPAD_OFFSET;
564 ndev->limits.max_spads = SNB_MAX_SPADS;
566 ndev->reg_ofs.sdb = ndev->reg_base + SNB_SDOORBELL_OFFSET;
567 ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET;
568 ndev->limits.max_spads = SNB_MAX_COMPAT_SPADS;
571 ndev->limits.max_db_bits = SNB_MAX_DB_BITS;
572 ndev->limits.msix_cnt = SNB_MSIX_CNT;
573 ndev->bits_per_vector = SNB_DB_BITS_PER_VEC;
578 static int ntb_bwd_setup(struct ntb_device *ndev)
583 ndev->hw_type = BWD_HW;
585 rc = pci_read_config_dword(ndev->pdev, NTB_PPD_OFFSET, &val);
589 switch ((val & BWD_PPD_CONN_TYPE) >> 8) {
591 ndev->conn_type = NTB_CONN_B2B;
595 dev_err(&ndev->pdev->dev, "Only B2B supported at this time\n");
599 if (val & BWD_PPD_DEV_TYPE)
600 ndev->dev_type = NTB_DEV_DSD;
602 ndev->dev_type = NTB_DEV_USD;
604 /* Initiate PCI-E link training */
605 rc = pci_write_config_dword(ndev->pdev, NTB_PPD_OFFSET,
606 val | BWD_PPD_INIT_LINK);
610 ndev->reg_ofs.pdb = ndev->reg_base + BWD_PDOORBELL_OFFSET;
611 ndev->reg_ofs.pdb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET;
612 ndev->reg_ofs.sbar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET;
613 ndev->reg_ofs.sbar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET;
614 ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET;
615 ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET;
616 ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET;
617 ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET;
619 if (ndev->conn_type == NTB_CONN_B2B) {
620 ndev->reg_ofs.sdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET;
621 ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET;
622 ndev->limits.max_spads = BWD_MAX_SPADS;
624 ndev->reg_ofs.sdb = ndev->reg_base + BWD_PDOORBELL_OFFSET;
625 ndev->reg_ofs.spad_write = ndev->reg_base + BWD_SPAD_OFFSET;
626 ndev->limits.max_spads = BWD_MAX_COMPAT_SPADS;
629 ndev->limits.max_db_bits = BWD_MAX_DB_BITS;
630 ndev->limits.msix_cnt = BWD_MSIX_CNT;
631 ndev->bits_per_vector = BWD_DB_BITS_PER_VEC;
633 /* Since bwd doesn't have a link interrupt, setup a poll timer */
634 INIT_DELAYED_WORK(&ndev->hb_timer, bwd_link_poll);
635 schedule_delayed_work(&ndev->hb_timer, NTB_HB_TIMEOUT);
640 static int ntb_device_setup(struct ntb_device *ndev)
644 switch (ndev->pdev->device) {
645 case PCI_DEVICE_ID_INTEL_NTB_2ND_SNB:
646 case PCI_DEVICE_ID_INTEL_NTB_RP_JSF:
647 case PCI_DEVICE_ID_INTEL_NTB_RP_SNB:
648 case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF:
649 case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB:
650 case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
651 case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
652 rc = ntb_xeon_setup(ndev);
654 case PCI_DEVICE_ID_INTEL_NTB_B2B_BWD:
655 rc = ntb_bwd_setup(ndev);
661 /* Enable Bus Master and Memory Space on the secondary side */
662 writew(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, ndev->reg_ofs.spci_cmd);
667 static void ntb_device_free(struct ntb_device *ndev)
669 if (ndev->hw_type == BWD_HW)
670 cancel_delayed_work_sync(&ndev->hb_timer);
673 static irqreturn_t bwd_callback_msix_irq(int irq, void *data)
675 struct ntb_db_cb *db_cb = data;
676 struct ntb_device *ndev = db_cb->ndev;
678 dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for DB %d\n", irq,
682 db_cb->callback(db_cb->data, db_cb->db_num);
684 /* No need to check for the specific HB irq, any interrupt means
687 ndev->last_ts = jiffies;
689 writeq((u64) 1 << db_cb->db_num, ndev->reg_ofs.pdb);
694 static irqreturn_t xeon_callback_msix_irq(int irq, void *data)
696 struct ntb_db_cb *db_cb = data;
697 struct ntb_device *ndev = db_cb->ndev;
699 dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for DB %d\n", irq,
703 db_cb->callback(db_cb->data, db_cb->db_num);
705 /* On Sandybridge, there are 16 bits in the interrupt register
706 * but only 4 vectors. So, 5 bits are assigned to the first 3
707 * vectors, with the 4th having a single bit for link
710 writew(((1 << ndev->bits_per_vector) - 1) <<
711 (db_cb->db_num * ndev->bits_per_vector), ndev->reg_ofs.pdb);
716 /* Since we do not have a HW doorbell in BWD, this is only used in JF/JT */
717 static irqreturn_t xeon_event_msix_irq(int irq, void *dev)
719 struct ntb_device *ndev = dev;
722 dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for Events\n", irq);
724 rc = ntb_link_status(ndev);
726 dev_err(&ndev->pdev->dev, "Error determining link status\n");
728 /* bit 15 is always the link bit */
729 writew(1 << ndev->limits.max_db_bits, ndev->reg_ofs.pdb);
734 static irqreturn_t ntb_interrupt(int irq, void *dev)
736 struct ntb_device *ndev = dev;
739 if (ndev->hw_type == BWD_HW) {
740 u64 pdb = readq(ndev->reg_ofs.pdb);
742 dev_dbg(&ndev->pdev->dev, "irq %d - pdb = %Lx\n", irq, pdb);
747 bwd_callback_msix_irq(irq, &ndev->db_cb[i]);
750 u16 pdb = readw(ndev->reg_ofs.pdb);
752 dev_dbg(&ndev->pdev->dev, "irq %d - pdb = %x sdb %x\n", irq,
753 pdb, readw(ndev->reg_ofs.sdb));
755 if (pdb & SNB_DB_HW_LINK) {
756 xeon_event_msix_irq(irq, dev);
757 pdb &= ~SNB_DB_HW_LINK;
763 xeon_callback_msix_irq(irq, &ndev->db_cb[i]);
770 static int ntb_setup_msix(struct ntb_device *ndev)
772 struct pci_dev *pdev = ndev->pdev;
773 struct msix_entry *msix;
778 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
784 rc = pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS, &val);
788 msix_entries = msix_table_size(val);
789 if (msix_entries > ndev->limits.msix_cnt) {
794 ndev->msix_entries = kmalloc(sizeof(struct msix_entry) * msix_entries,
796 if (!ndev->msix_entries) {
801 for (i = 0; i < msix_entries; i++)
802 ndev->msix_entries[i].entry = i;
804 rc = pci_enable_msix(pdev, ndev->msix_entries, msix_entries);
808 /* On SNB, the link interrupt is always tied to 4th vector. If
809 * we can't get all 4, then we can't use MSI-X.
811 if (ndev->hw_type != BWD_HW) {
817 "Only %d MSI-X vectors. Limiting the number of queues to that number.\n",
822 for (i = 0; i < msix_entries; i++) {
823 msix = &ndev->msix_entries[i];
824 WARN_ON(!msix->vector);
826 /* Use the last MSI-X vector for Link status */
827 if (ndev->hw_type == BWD_HW) {
828 rc = request_irq(msix->vector, bwd_callback_msix_irq, 0,
829 "ntb-callback-msix", &ndev->db_cb[i]);
833 if (i == msix_entries - 1) {
834 rc = request_irq(msix->vector,
835 xeon_event_msix_irq, 0,
836 "ntb-event-msix", ndev);
840 rc = request_irq(msix->vector,
841 xeon_callback_msix_irq, 0,
850 ndev->num_msix = msix_entries;
851 if (ndev->hw_type == BWD_HW)
852 ndev->max_cbs = msix_entries;
854 ndev->max_cbs = msix_entries - 1;
860 msix = &ndev->msix_entries[i];
861 if (ndev->hw_type != BWD_HW && i == ndev->num_msix - 1)
862 free_irq(msix->vector, ndev);
864 free_irq(msix->vector, &ndev->db_cb[i]);
866 pci_disable_msix(pdev);
868 kfree(ndev->msix_entries);
869 dev_err(&pdev->dev, "Error allocating MSI-X interrupt\n");
875 static int ntb_setup_msi(struct ntb_device *ndev)
877 struct pci_dev *pdev = ndev->pdev;
880 rc = pci_enable_msi(pdev);
884 rc = request_irq(pdev->irq, ntb_interrupt, 0, "ntb-msi", ndev);
886 pci_disable_msi(pdev);
887 dev_err(&pdev->dev, "Error allocating MSI interrupt\n");
894 static int ntb_setup_intx(struct ntb_device *ndev)
896 struct pci_dev *pdev = ndev->pdev;
901 /* Verify intx is enabled */
904 rc = request_irq(pdev->irq, ntb_interrupt, IRQF_SHARED, "ntb-intx",
912 static int ntb_setup_interrupts(struct ntb_device *ndev)
916 /* On BWD, disable all interrupts. On SNB, disable all but Link
917 * Interrupt. The rest will be unmasked as callbacks are registered.
919 if (ndev->hw_type == BWD_HW)
920 writeq(~0, ndev->reg_ofs.pdb_mask);
922 writew(~(1 << ndev->limits.max_db_bits),
923 ndev->reg_ofs.pdb_mask);
925 rc = ntb_setup_msix(ndev);
929 ndev->bits_per_vector = 1;
930 ndev->max_cbs = ndev->limits.max_db_bits;
932 rc = ntb_setup_msi(ndev);
936 rc = ntb_setup_intx(ndev);
938 dev_err(&ndev->pdev->dev, "no usable interrupts\n");
946 static void ntb_free_interrupts(struct ntb_device *ndev)
948 struct pci_dev *pdev = ndev->pdev;
950 /* mask interrupts */
951 if (ndev->hw_type == BWD_HW)
952 writeq(~0, ndev->reg_ofs.pdb_mask);
954 writew(~0, ndev->reg_ofs.pdb_mask);
956 if (ndev->num_msix) {
957 struct msix_entry *msix;
960 for (i = 0; i < ndev->num_msix; i++) {
961 msix = &ndev->msix_entries[i];
962 if (ndev->hw_type != BWD_HW && i == ndev->num_msix - 1)
963 free_irq(msix->vector, ndev);
965 free_irq(msix->vector, &ndev->db_cb[i]);
967 pci_disable_msix(pdev);
969 free_irq(pdev->irq, ndev);
971 if (pci_dev_msi_enabled(pdev))
972 pci_disable_msi(pdev);
976 static int ntb_create_callbacks(struct ntb_device *ndev)
980 /* Checken-egg issue. We won't know how many callbacks are necessary
981 * until we see how many MSI-X vectors we get, but these pointers need
982 * to be passed into the MSI-X register fucntion. So, we allocate the
983 * max, knowing that they might not all be used, to work around this.
985 ndev->db_cb = kcalloc(ndev->limits.max_db_bits,
986 sizeof(struct ntb_db_cb),
991 for (i = 0; i < ndev->limits.max_db_bits; i++) {
992 ndev->db_cb[i].db_num = i;
993 ndev->db_cb[i].ndev = ndev;
999 static void ntb_free_callbacks(struct ntb_device *ndev)
1003 for (i = 0; i < ndev->limits.max_db_bits; i++)
1004 ntb_unregister_db_callback(ndev, i);
1009 static int ntb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1011 struct ntb_device *ndev;
1014 ndev = kzalloc(sizeof(struct ntb_device), GFP_KERNEL);
1019 ndev->link_status = NTB_LINK_DOWN;
1020 pci_set_drvdata(pdev, ndev);
1022 rc = pci_enable_device(pdev);
1026 pci_set_master(ndev->pdev);
1028 rc = pci_request_selected_regions(pdev, NTB_BAR_MASK, KBUILD_MODNAME);
1032 ndev->reg_base = pci_ioremap_bar(pdev, NTB_BAR_MMIO);
1033 if (!ndev->reg_base) {
1034 dev_warn(&pdev->dev, "Cannot remap BAR 0\n");
1039 for (i = 0; i < NTB_NUM_MW; i++) {
1040 ndev->mw[i].bar_sz = pci_resource_len(pdev, MW_TO_BAR(i));
1042 ioremap_wc(pci_resource_start(pdev, MW_TO_BAR(i)),
1043 ndev->mw[i].bar_sz);
1044 dev_info(&pdev->dev, "MW %d size %d\n", i,
1045 (u32) pci_resource_len(pdev, MW_TO_BAR(i)));
1046 if (!ndev->mw[i].vbase) {
1047 dev_warn(&pdev->dev, "Cannot remap BAR %d\n",
1054 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1056 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1060 dev_warn(&pdev->dev, "Cannot DMA highmem\n");
1063 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1065 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1069 dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n");
1072 rc = ntb_device_setup(ndev);
1076 rc = ntb_create_callbacks(ndev);
1080 rc = ntb_setup_interrupts(ndev);
1084 /* The scratchpad registers keep the values between rmmod/insmod,
1087 for (i = 0; i < ndev->limits.max_spads; i++) {
1088 ntb_write_local_spad(ndev, i, 0);
1089 ntb_write_remote_spad(ndev, i, 0);
1092 rc = ntb_transport_init(pdev);
1096 /* Let's bring the NTB link up */
1097 writel(NTB_CNTL_BAR23_SNOOP | NTB_CNTL_BAR45_SNOOP,
1098 ndev->reg_ofs.lnk_cntl);
1103 ntb_free_interrupts(ndev);
1105 ntb_free_callbacks(ndev);
1107 ntb_device_free(ndev);
1109 for (i--; i >= 0; i--)
1110 iounmap(ndev->mw[i].vbase);
1111 iounmap(ndev->reg_base);
1113 pci_release_selected_regions(pdev, NTB_BAR_MASK);
1115 pci_disable_device(pdev);
1119 dev_err(&pdev->dev, "Error loading %s module\n", KBUILD_MODNAME);
1123 static void ntb_pci_remove(struct pci_dev *pdev)
1125 struct ntb_device *ndev = pci_get_drvdata(pdev);
1129 /* Bring NTB link down */
1130 ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);
1131 ntb_cntl |= NTB_LINK_DISABLE;
1132 writel(ntb_cntl, ndev->reg_ofs.lnk_cntl);
1134 ntb_transport_free(ndev->ntb_transport);
1136 ntb_free_interrupts(ndev);
1137 ntb_free_callbacks(ndev);
1138 ntb_device_free(ndev);
1140 for (i = 0; i < NTB_NUM_MW; i++)
1141 iounmap(ndev->mw[i].vbase);
1143 iounmap(ndev->reg_base);
1144 pci_release_selected_regions(pdev, NTB_BAR_MASK);
1145 pci_disable_device(pdev);
1149 static struct pci_driver ntb_pci_driver = {
1150 .name = KBUILD_MODNAME,
1151 .id_table = ntb_pci_tbl,
1152 .probe = ntb_pci_probe,
1153 .remove = ntb_pci_remove,
1155 module_pci_driver(ntb_pci_driver);