1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/spinlock.h>
6 #include <linux/ieee80211.h>
8 /* define for WLA 2.0 */
9 #define WL3501_BLKSZ 256
11 * ID for input Signals of DRIVER block
12 * bit[7-5] is block ID: 000
13 * bit[4-0] is signal ID
17 WL3501_SIG_MD_CONFIRM,
19 WL3501_SIG_ASSOC_CONFIRM,
21 WL3501_SIG_AUTH_CONFIRM,
23 WL3501_SIG_DEAUTH_CONFIRM,
24 WL3501_SIG_DEAUTH_IND,
25 WL3501_SIG_DISASSOC_CONFIRM,
26 WL3501_SIG_DISASSOC_IND,
27 WL3501_SIG_GET_CONFIRM,
28 WL3501_SIG_JOIN_CONFIRM,
29 WL3501_SIG_PWR_MGMT_CONFIRM,
30 WL3501_SIG_REASSOC_CONFIRM,
31 WL3501_SIG_REASSOC_IND,
32 WL3501_SIG_SCAN_CONFIRM,
33 WL3501_SIG_SET_CONFIRM,
34 WL3501_SIG_START_CONFIRM,
35 WL3501_SIG_RESYNC_CONFIRM,
36 WL3501_SIG_SITE_CONFIRM,
37 WL3501_SIG_SAVE_CONFIRM,
38 WL3501_SIG_RFTEST_CONFIRM,
40 * ID for input Signals of MLME block
41 * bit[7-5] is block ID: 010
42 * bit[4-0] is signal ID
44 WL3501_SIG_ASSOC_REQ = 0x20,
46 WL3501_SIG_DEAUTH_REQ,
47 WL3501_SIG_DISASSOC_REQ,
50 WL3501_SIG_PWR_MGMT_REQ,
51 WL3501_SIG_REASSOC_REQ,
56 WL3501_SIG_RESYNC_REQ,
59 WL3501_SIG_RF_TEST_REQ,
60 WL3501_SIG_MM_CONFIRM = 0x60,
64 enum wl3501_mib_attribs {
65 WL3501_MIB_ATTR_STATION_ID,
66 WL3501_MIB_ATTR_AUTH_ALGORITHMS,
67 WL3501_MIB_ATTR_AUTH_TYPE,
68 WL3501_MIB_ATTR_MEDIUM_OCCUPANCY_LIMIT,
69 WL3501_MIB_ATTR_CF_POLLABLE,
70 WL3501_MIB_ATTR_CFP_PERIOD,
71 WL3501_MIB_ATTR_CFPMAX_DURATION,
72 WL3501_MIB_ATTR_AUTH_RESP_TMOUT,
73 WL3501_MIB_ATTR_RX_DTIMS,
74 WL3501_MIB_ATTR_PRIV_OPT_IMPLEMENTED,
75 WL3501_MIB_ATTR_PRIV_INVOKED,
76 WL3501_MIB_ATTR_WEP_DEFAULT_KEYS,
77 WL3501_MIB_ATTR_WEP_DEFAULT_KEY_ID,
78 WL3501_MIB_ATTR_WEP_KEY_MAPPINGS,
79 WL3501_MIB_ATTR_WEP_KEY_MAPPINGS_LEN,
80 WL3501_MIB_ATTR_EXCLUDE_UNENCRYPTED,
81 WL3501_MIB_ATTR_WEP_ICV_ERROR_COUNT,
82 WL3501_MIB_ATTR_WEP_UNDECRYPTABLE_COUNT,
83 WL3501_MIB_ATTR_WEP_EXCLUDED_COUNT,
84 WL3501_MIB_ATTR_MAC_ADDR,
85 WL3501_MIB_ATTR_GROUP_ADDRS,
86 WL3501_MIB_ATTR_RTS_THRESHOLD,
87 WL3501_MIB_ATTR_SHORT_RETRY_LIMIT,
88 WL3501_MIB_ATTR_LONG_RETRY_LIMIT,
89 WL3501_MIB_ATTR_FRAG_THRESHOLD,
90 WL3501_MIB_ATTR_MAX_TX_MSDU_LIFETIME,
91 WL3501_MIB_ATTR_MAX_RX_LIFETIME,
92 WL3501_MIB_ATTR_MANUFACTURER_ID,
93 WL3501_MIB_ATTR_PRODUCT_ID,
94 WL3501_MIB_ATTR_TX_FRAG_COUNT,
95 WL3501_MIB_ATTR_MULTICAST_TX_FRAME_COUNT,
96 WL3501_MIB_ATTR_FAILED_COUNT,
97 WL3501_MIB_ATTR_RX_FRAG_COUNT,
98 WL3501_MIB_ATTR_MULTICAST_RX_COUNT,
99 WL3501_MIB_ATTR_FCS_ERROR_COUNT,
100 WL3501_MIB_ATTR_RETRY_COUNT,
101 WL3501_MIB_ATTR_MULTIPLE_RETRY_COUNT,
102 WL3501_MIB_ATTR_RTS_SUCCESS_COUNT,
103 WL3501_MIB_ATTR_RTS_FAILURE_COUNT,
104 WL3501_MIB_ATTR_ACK_FAILURE_COUNT,
105 WL3501_MIB_ATTR_FRAME_DUPLICATE_COUNT,
106 WL3501_MIB_ATTR_PHY_TYPE,
107 WL3501_MIB_ATTR_REG_DOMAINS_SUPPORT,
108 WL3501_MIB_ATTR_CURRENT_REG_DOMAIN,
109 WL3501_MIB_ATTR_SLOT_TIME,
110 WL3501_MIB_ATTR_CCA_TIME,
111 WL3501_MIB_ATTR_RX_TX_TURNAROUND_TIME,
112 WL3501_MIB_ATTR_TX_PLCP_DELAY,
113 WL3501_MIB_ATTR_RX_TX_SWITCH_TIME,
114 WL3501_MIB_ATTR_TX_RAMP_ON_TIME,
115 WL3501_MIB_ATTR_TX_RF_DELAY,
116 WL3501_MIB_ATTR_SIFS_TIME,
117 WL3501_MIB_ATTR_RX_RF_DELAY,
118 WL3501_MIB_ATTR_RX_PLCP_DELAY,
119 WL3501_MIB_ATTR_MAC_PROCESSING_DELAY,
120 WL3501_MIB_ATTR_TX_RAMP_OFF_TIME,
121 WL3501_MIB_ATTR_PREAMBLE_LEN,
122 WL3501_MIB_ATTR_PLCP_HEADER_LEN,
123 WL3501_MIB_ATTR_MPDU_DURATION_FACTOR,
124 WL3501_MIB_ATTR_AIR_PROPAGATION_TIME,
125 WL3501_MIB_ATTR_TEMP_TYPE,
126 WL3501_MIB_ATTR_CW_MIN,
127 WL3501_MIB_ATTR_CW_MAX,
128 WL3501_MIB_ATTR_SUPPORT_DATA_RATES_TX,
129 WL3501_MIB_ATTR_SUPPORT_DATA_RATES_RX,
130 WL3501_MIB_ATTR_MPDU_MAX_LEN,
131 WL3501_MIB_ATTR_SUPPORT_TX_ANTENNAS,
132 WL3501_MIB_ATTR_CURRENT_TX_ANTENNA,
133 WL3501_MIB_ATTR_SUPPORT_RX_ANTENNAS,
134 WL3501_MIB_ATTR_DIVERSITY_SUPPORT,
135 WL3501_MIB_ATTR_DIVERSITY_SELECTION_RS,
136 WL3501_MIB_ATTR_NR_SUPPORTED_PWR_LEVELS,
137 WL3501_MIB_ATTR_TX_PWR_LEVEL1,
138 WL3501_MIB_ATTR_TX_PWR_LEVEL2,
139 WL3501_MIB_ATTR_TX_PWR_LEVEL3,
140 WL3501_MIB_ATTR_TX_PWR_LEVEL4,
141 WL3501_MIB_ATTR_TX_PWR_LEVEL5,
142 WL3501_MIB_ATTR_TX_PWR_LEVEL6,
143 WL3501_MIB_ATTR_TX_PWR_LEVEL7,
144 WL3501_MIB_ATTR_TX_PWR_LEVEL8,
145 WL3501_MIB_ATTR_CURRENT_TX_PWR_LEVEL,
146 WL3501_MIB_ATTR_CURRENT_CHAN,
147 WL3501_MIB_ATTR_CCA_MODE_SUPPORTED,
148 WL3501_MIB_ATTR_CURRENT_CCA_MODE,
149 WL3501_MIB_ATTR_ED_THRESHOLD,
150 WL3501_MIB_ATTR_SINTHESIZER_LOCKED,
151 WL3501_MIB_ATTR_CURRENT_PWR_STATE,
152 WL3501_MIB_ATTR_DOZE_TURNON_TIME,
153 WL3501_MIB_ATTR_RCR33,
154 WL3501_MIB_ATTR_DEFAULT_CHAN,
155 WL3501_MIB_ATTR_SSID,
156 WL3501_MIB_ATTR_PWR_MGMT_ENABLE,
157 WL3501_MIB_ATTR_NET_CAPABILITY,
158 WL3501_MIB_ATTR_ROUTING,
161 enum wl3501_net_type {
162 WL3501_NET_TYPE_INFRA,
163 WL3501_NET_TYPE_ADHOC,
164 WL3501_NET_TYPE_ANY_BSS,
167 enum wl3501_scan_type {
168 WL3501_SCAN_TYPE_ACTIVE,
169 WL3501_SCAN_TYPE_PASSIVE,
172 enum wl3501_tx_result {
173 WL3501_TX_RESULT_SUCCESS,
174 WL3501_TX_RESULT_NO_BSS,
175 WL3501_TX_RESULT_RETRY_LIMIT,
178 enum wl3501_sys_type {
179 WL3501_SYS_TYPE_OPEN,
180 WL3501_SYS_TYPE_SHARE_KEY,
184 WL3501_STATUS_SUCCESS,
185 WL3501_STATUS_INVALID,
186 WL3501_STATUS_TIMEOUT,
187 WL3501_STATUS_REFUSED,
188 WL3501_STATUS_MANY_REQ,
189 WL3501_STATUS_ALREADY_BSS,
192 #define WL3501_MGMT_CAPABILITY_ESS 0x0001 /* see 802.11 p.58 */
193 #define WL3501_MGMT_CAPABILITY_IBSS 0x0002 /* - " - */
194 #define WL3501_MGMT_CAPABILITY_CF_POLLABLE 0x0004 /* - " - */
195 #define WL3501_MGMT_CAPABILITY_CF_POLL_REQUEST 0x0008 /* - " - */
196 #define WL3501_MGMT_CAPABILITY_PRIVACY 0x0010 /* - " - */
198 #define IW_REG_DOMAIN_FCC 0x10 /* Channel 1 to 11 USA */
199 #define IW_REG_DOMAIN_DOC 0x20 /* Channel 1 to 11 Canada */
200 #define IW_REG_DOMAIN_ETSI 0x30 /* Channel 1 to 13 Europe */
201 #define IW_REG_DOMAIN_SPAIN 0x31 /* Channel 10 to 11 Spain */
202 #define IW_REG_DOMAIN_FRANCE 0x32 /* Channel 10 to 13 France */
203 #define IW_REG_DOMAIN_MKK 0x40 /* Channel 14 Japan */
204 #define IW_REG_DOMAIN_MKK1 0x41 /* Channel 1-14 Japan */
205 #define IW_REG_DOMAIN_ISRAEL 0x50 /* Channel 3 - 9 Israel */
207 #define IW_MGMT_RATE_LABEL_MANDATORY 128 /* MSB */
209 enum iw_mgmt_rate_labels {
210 IW_MGMT_RATE_LABEL_1MBIT = 2,
211 IW_MGMT_RATE_LABEL_2MBIT = 4,
212 IW_MGMT_RATE_LABEL_5_5MBIT = 11,
213 IW_MGMT_RATE_LABEL_11MBIT = 22,
216 enum iw_mgmt_info_element_ids {
217 IW_MGMT_INFO_ELEMENT_SSID, /* Service Set Identity */
218 IW_MGMT_INFO_ELEMENT_SUPPORTED_RATES,
219 IW_MGMT_INFO_ELEMENT_FH_PARAMETER_SET,
220 IW_MGMT_INFO_ELEMENT_DS_PARAMETER_SET,
221 IW_MGMT_INFO_ELEMENT_CS_PARAMETER_SET,
222 IW_MGMT_INFO_ELEMENT_CS_TIM, /* Traffic Information Map */
223 IW_MGMT_INFO_ELEMENT_IBSS_PARAMETER_SET,
224 /* 7-15: Reserved, unused */
225 IW_MGMT_INFO_ELEMENT_CHALLENGE_TEXT = 16,
226 /* 17-31 Reserved for challenge text extension */
227 /* 32-255 Reserved, unused */
230 struct iw_mgmt_info_element {
231 u8 id; /* one of enum iw_mgmt_info_element_ids,
232 but sizeof(enum) > sizeof(u8) :-( */
237 struct iw_mgmt_essid_pset {
238 struct iw_mgmt_info_element el;
239 u8 essid[IW_ESSID_MAX_SIZE];
243 * According to 802.11 Wireless Networks, the definitive guide - O'Reilly
246 #define IW_DATA_RATE_MAX_LABELS 8
248 struct iw_mgmt_data_rset {
249 struct iw_mgmt_info_element el;
250 u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS];
253 struct iw_mgmt_ds_pset {
254 struct iw_mgmt_info_element el;
258 struct iw_mgmt_cf_pset {
259 struct iw_mgmt_info_element el;
262 u16 cfp_max_duration;
263 u16 cfp_dur_remaining;
266 struct iw_mgmt_ibss_pset {
267 struct iw_mgmt_info_element el;
271 struct wl3501_tx_hdr {
288 struct wl3501_rx_hdr {
290 u16 rc_next_frame_blk;
309 struct wl3501_start_req {
317 struct iw_mgmt_essid_pset ssid;
318 struct iw_mgmt_data_rset bss_basic_rset;
319 struct iw_mgmt_data_rset operational_rset;
320 struct iw_mgmt_cf_pset cf_pset;
321 struct iw_mgmt_ds_pset ds_pset;
322 struct iw_mgmt_ibss_pset ibss_pset;
325 struct wl3501_assoc_req {
332 u8 mac_addr[ETH_ALEN];
335 struct wl3501_assoc_confirm {
342 struct wl3501_assoc_ind {
345 u8 mac_addr[ETH_ALEN];
348 struct wl3501_auth_req {
354 u8 mac_addr[ETH_ALEN];
357 struct wl3501_auth_confirm {
363 u8 mac_addr[ETH_ALEN];
366 struct wl3501_get_req {
373 struct wl3501_get_confirm {
388 struct iw_mgmt_essid_pset ssid;
389 struct iw_mgmt_ds_pset ds_pset;
390 struct iw_mgmt_cf_pset cf_pset;
391 struct iw_mgmt_ibss_pset ibss_pset;
392 struct iw_mgmt_data_rset bss_basic_rset;
395 struct wl3501_join_req {
399 struct iw_mgmt_data_rset operational_rset;
405 struct wl3501_req req;
408 struct wl3501_join_confirm {
415 struct wl3501_pwr_mgmt_req {
423 struct wl3501_pwr_mgmt_confirm {
430 struct wl3501_scan_req {
439 struct iw_mgmt_essid_pset ssid;
440 enum wl3501_scan_type scan_type;
443 struct wl3501_scan_confirm {
450 struct wl3501_req req;
454 struct wl3501_start_confirm {
461 struct wl3501_md_req {
475 struct wl3501_md_ind {
490 struct wl3501_md_confirm {
500 struct wl3501_resync_req {
505 /* Definitions for supporting clone adapters. */
506 /* System Interface Registers (SIR space) */
507 #define WL3501_NIC_GCR ((u8)0x00) /* SIR0 - General Conf Register */
508 #define WL3501_NIC_BSS ((u8)0x01) /* SIR1 - Bank Switching Select Reg */
509 #define WL3501_NIC_LMAL ((u8)0x02) /* SIR2 - Local Mem addr Reg [7:0] */
510 #define WL3501_NIC_LMAH ((u8)0x03) /* SIR3 - Local Mem addr Reg [14:8] */
511 #define WL3501_NIC_IODPA ((u8)0x04) /* SIR4 - I/O Data Port A */
512 #define WL3501_NIC_IODPB ((u8)0x05) /* SIR5 - I/O Data Port B */
513 #define WL3501_NIC_IODPC ((u8)0x06) /* SIR6 - I/O Data Port C */
514 #define WL3501_NIC_IODPD ((u8)0x07) /* SIR7 - I/O Data Port D */
517 #define WL3501_GCR_SWRESET ((u8)0x80)
518 #define WL3501_GCR_CORESET ((u8)0x40)
519 #define WL3501_GCR_DISPWDN ((u8)0x20)
520 #define WL3501_GCR_ECWAIT ((u8)0x10)
521 #define WL3501_GCR_ECINT ((u8)0x08)
522 #define WL3501_GCR_INT2EC ((u8)0x04)
523 #define WL3501_GCR_ENECINT ((u8)0x02)
524 #define WL3501_GCR_DAM ((u8)0x01)
526 /* Bits in BSS (Bank Switching Select Register) */
527 #define WL3501_BSS_FPAGE0 ((u8)0x20) /* Flash memory page0 */
528 #define WL3501_BSS_FPAGE1 ((u8)0x28)
529 #define WL3501_BSS_FPAGE2 ((u8)0x30)
530 #define WL3501_BSS_FPAGE3 ((u8)0x38)
531 #define WL3501_BSS_SPAGE0 ((u8)0x00) /* SRAM page0 */
532 #define WL3501_BSS_SPAGE1 ((u8)0x08)
533 #define WL3501_BSS_SPAGE2 ((u8)0x10)
534 #define WL3501_BSS_SPAGE3 ((u8)0x18)
536 /* Define Driver Interface */
537 /* Refer IEEE 802.11 */
538 /* Tx packet header, include PLCP and MPDU */
540 struct wl3501_80211_tx_plcp_hdr {
549 struct wl3501_80211_tx_hdr {
550 struct wl3501_80211_tx_plcp_hdr pclp_hdr;
551 struct ieee80211_hdr mac_hdr;
552 } __packed __aligned(2);
555 Reserve the beginning Tx space for descriptor use.
557 TxBlockOffset --> *----*----*----*----* \
558 (TxFreeDesc) | 0 | 1 | 2 | 3 | \
560 | 8 | 9 | 10 | 11 | TX_DESC * 20
561 | 12 | 13 | 14 | 15 | |
562 | 16 | 17 | 18 | 19 | /
563 TxBufferBegin --> *----*----*----*----* /
569 *-------------------*
570 TxBufferEnd -------------------------/
576 u8 mac_addr[ETH_ALEN];
578 wait_queue_head_t wait;
579 struct wl3501_get_confirm sig_get_confirm;
580 struct wl3501_pwr_mgmt_confirm sig_pwr_mgmt_confirm;
589 u16 esbq_confirm_start;
590 u16 esbq_confirm_end;
592 struct iw_mgmt_essid_pset essid;
593 struct iw_mgmt_essid_pset keep_essid;
598 char firmware_date[32];
608 struct wl3501_scan_confirm bss_set[20];
610 struct iw_statistics wstats;
611 struct iw_spy_data spy_data;
612 struct iw_public_data wireless_data;
613 struct pcmcia_device *p_dev;