2 * This file is part of wl1271
4 * Copyright (C) 2008-2010 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/slab.h>
25 #include <linux/wl12xx.h>
26 #include <linux/export.h>
36 static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
40 /* 10.5.0 run the firmware (I) */
41 cpu_ctrl = wlcore_read_reg(wl, REG_ECPU_CONTROL);
43 /* 10.5.1 run the firmware (II) */
45 wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
48 static int wlcore_parse_fw_ver(struct wl1271 *wl)
52 ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
53 &wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
54 &wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
58 wl1271_warning("fw version incorrect value");
59 memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
63 ret = wlcore_identify_fw(wl);
70 static int wlcore_boot_fw_version(struct wl1271 *wl)
72 struct wl1271_static_data *static_data;
75 static_data = kmalloc(sizeof(*static_data), GFP_KERNEL | GFP_DMA);
77 wl1271_error("Couldn't allocate memory for static data!");
81 wl1271_read(wl, wl->cmd_box_addr, static_data, sizeof(*static_data),
84 strncpy(wl->chip.fw_ver_str, static_data->fw_version,
85 sizeof(wl->chip.fw_ver_str));
89 /* make sure the string is NULL-terminated */
90 wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
92 ret = wlcore_parse_fw_ver(wl);
99 static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
100 size_t fw_data_len, u32 dest)
102 struct wlcore_partition_set partition;
103 int addr, chunk_num, partition_limit;
106 /* whal_FwCtrl_LoadFwImageSm() */
108 wl1271_debug(DEBUG_BOOT, "starting firmware upload");
110 wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
111 fw_data_len, CHUNK_SIZE);
113 if ((fw_data_len % 4) != 0) {
114 wl1271_error("firmware length not multiple of four");
118 chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
120 wl1271_error("allocation for firmware upload chunk failed");
124 memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
125 partition.mem.start = dest;
126 wlcore_set_partition(wl, &partition);
128 /* 10.1 set partition limit and chunk num */
130 partition_limit = wl->ptable[PART_DOWN].mem.size;
132 while (chunk_num < fw_data_len / CHUNK_SIZE) {
133 /* 10.2 update partition, if needed */
134 addr = dest + (chunk_num + 2) * CHUNK_SIZE;
135 if (addr > partition_limit) {
136 addr = dest + chunk_num * CHUNK_SIZE;
137 partition_limit = chunk_num * CHUNK_SIZE +
138 wl->ptable[PART_DOWN].mem.size;
139 partition.mem.start = addr;
140 wlcore_set_partition(wl, &partition);
143 /* 10.3 upload the chunk */
144 addr = dest + chunk_num * CHUNK_SIZE;
145 p = buf + chunk_num * CHUNK_SIZE;
146 memcpy(chunk, p, CHUNK_SIZE);
147 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
149 wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);
154 /* 10.4 upload the last chunk */
155 addr = dest + chunk_num * CHUNK_SIZE;
156 p = buf + chunk_num * CHUNK_SIZE;
157 memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
158 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
159 fw_data_len % CHUNK_SIZE, p, addr);
160 wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
166 int wlcore_boot_upload_firmware(struct wl1271 *wl)
168 u32 chunks, addr, len;
173 chunks = be32_to_cpup((__be32 *) fw);
176 wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
179 addr = be32_to_cpup((__be32 *) fw);
181 len = be32_to_cpup((__be32 *) fw);
185 wl1271_info("firmware chunk too long: %u", len);
188 wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
190 ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
198 EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
200 int wlcore_boot_upload_nvs(struct wl1271 *wl)
202 size_t nvs_len, burst_len;
205 u8 *nvs_ptr, *nvs_aligned;
210 if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
211 struct wl1271_nvs_file *nvs =
212 (struct wl1271_nvs_file *)wl->nvs;
214 * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
215 * band configurations) can be removed when those NVS files stop
218 if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
219 wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
220 if (nvs->general_params.dual_mode_select)
221 wl->enable_11a = true;
224 if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
225 (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
227 wl1271_error("nvs size is not as expected: %zu != %zu",
228 wl->nvs_len, sizeof(struct wl1271_nvs_file));
235 /* only the first part of the NVS needs to be uploaded */
236 nvs_len = sizeof(nvs->nvs);
237 nvs_ptr = (u8 *) nvs->nvs;
239 struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
241 if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
242 if (nvs->general_params.dual_mode_select)
243 wl->enable_11a = true;
245 wl1271_error("nvs size is not as expected: %zu != %zu",
247 sizeof(struct wl128x_nvs_file));
254 /* only the first part of the NVS needs to be uploaded */
255 nvs_len = sizeof(nvs->nvs);
256 nvs_ptr = (u8 *)nvs->nvs;
259 /* update current MAC address to NVS */
260 nvs_ptr[11] = wl->addresses[0].addr[0];
261 nvs_ptr[10] = wl->addresses[0].addr[1];
262 nvs_ptr[6] = wl->addresses[0].addr[2];
263 nvs_ptr[5] = wl->addresses[0].addr[3];
264 nvs_ptr[4] = wl->addresses[0].addr[4];
265 nvs_ptr[3] = wl->addresses[0].addr[5];
268 * Layout before the actual NVS tables:
269 * 1 byte : burst length.
270 * 2 bytes: destination address.
271 * n bytes: data to burst copy.
273 * This is ended by a 0 length, then the NVS tables.
276 /* FIXME: Do we need to check here whether the LSB is 1? */
278 burst_len = nvs_ptr[0];
279 dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
282 * Due to our new wl1271_translate_reg_addr function,
283 * we need to add the register partition start address
286 dest_addr += wl->curr_part.reg.start;
288 /* We move our pointer to the data */
291 for (i = 0; i < burst_len; i++) {
292 if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
295 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
296 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
298 wl1271_debug(DEBUG_BOOT,
299 "nvs burst write 0x%x: 0x%x",
301 wl1271_write32(wl, dest_addr, val);
307 if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
312 * We've reached the first zero length, the first NVS table
313 * is located at an aligned offset which is at least 7 bytes further.
314 * NOTE: The wl->nvs->nvs element must be first, in order to
315 * simplify the casting, we assume it is at the beginning of
316 * the wl->nvs structure.
318 nvs_ptr = (u8 *)wl->nvs +
319 ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
321 if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
324 nvs_len -= nvs_ptr - (u8 *)wl->nvs;
326 /* Now we must set the partition correctly */
327 wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
329 /* Copy the NVS tables to a new block to ensure alignment */
330 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
334 /* And finally we upload the NVS tables */
335 wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS,
336 nvs_aligned, nvs_len, false);
342 wl1271_error("nvs data is malformed");
345 EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
347 int wlcore_boot_run_firmware(struct wl1271 *wl)
352 /* Make sure we have the boot partition */
353 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
355 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
357 chip_id = wlcore_read_reg(wl, REG_CHIP_ID_B);
359 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
361 if (chip_id != wl->chip.id) {
362 wl1271_error("chip id doesn't match after firmware boot");
366 /* wait for init to complete */
368 while (loop++ < INIT_LOOP) {
369 udelay(INIT_LOOP_DELAY);
370 intr = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR);
372 if (intr == 0xffffffff) {
373 wl1271_error("error reading hardware complete "
377 /* check that ACX_INTR_INIT_COMPLETE is enabled */
378 else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
379 wlcore_write_reg(wl, REG_INTERRUPT_ACK,
380 WL1271_ACX_INTR_INIT_COMPLETE);
385 if (loop > INIT_LOOP) {
386 wl1271_error("timeout waiting for the hardware to "
387 "complete initialization");
391 /* get hardware config command mail box */
392 wl->cmd_box_addr = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR);
394 wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
396 /* get hardware config event mail box */
397 wl->mbox_ptr[0] = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR);
398 wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
400 wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
401 wl->mbox_ptr[0], wl->mbox_ptr[1]);
403 ret = wlcore_boot_fw_version(wl);
405 wl1271_error("couldn't boot firmware");
410 * in case of full asynchronous mode the firmware event must be
411 * ready to receive event from the command mailbox
414 /* unmask required mbox events */
415 wl->event_mask = BSS_LOSE_EVENT_ID |
416 REGAINED_BSS_EVENT_ID |
417 SCAN_COMPLETE_EVENT_ID |
418 ROLE_STOP_COMPLETE_EVENT_ID |
419 RSSI_SNR_TRIGGER_0_EVENT_ID |
420 PSPOLL_DELIVERY_FAILURE_EVENT_ID |
421 SOFT_GEMINI_SENSE_EVENT_ID |
422 PERIODIC_SCAN_REPORT_EVENT_ID |
423 PERIODIC_SCAN_COMPLETE_EVENT_ID |
424 DUMMY_PACKET_EVENT_ID |
425 PEER_REMOVE_COMPLETE_EVENT_ID |
426 BA_SESSION_RX_CONSTRAINT_EVENT_ID |
427 REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |
428 INACTIVE_STA_EVENT_ID |
429 MAX_TX_RETRY_EVENT_ID |
430 CHANNEL_SWITCH_COMPLETE_EVENT_ID;
432 ret = wl1271_event_unmask(wl);
434 wl1271_error("EVENT mask setting failed");
438 /* set the working partition to its "running" mode offset */
439 wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
441 /* firmware startup completed */
444 EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);