2 * This file is part of wl1271
4 * Copyright (C) 2008-2010 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/slab.h>
25 #include <linux/wl12xx.h>
26 #include <linux/export.h>
36 static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
40 /* 10.5.0 run the firmware (I) */
41 cpu_ctrl = wlcore_read_reg(wl, REG_ECPU_CONTROL);
43 /* 10.5.1 run the firmware (II) */
45 wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
48 static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
49 struct wl1271_static_data *static_data)
53 strncpy(wl->chip.fw_ver_str, static_data->fw_version,
54 sizeof(wl->chip.fw_ver_str));
56 /* make sure the string is NULL-terminated */
57 wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
59 ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
60 &wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
61 &wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
65 wl1271_warning("fw version incorrect value");
66 memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
71 ret = wlcore_identify_fw(wl);
78 static int wlcore_boot_static_data(struct wl1271 *wl)
80 struct wl1271_static_data *static_data;
81 size_t len = sizeof(*static_data) + wl->static_data_priv_len;
84 static_data = kmalloc(len, GFP_KERNEL);
90 wl1271_read(wl, wl->cmd_box_addr, static_data, len, false);
92 ret = wlcore_boot_parse_fw_ver(wl, static_data);
96 ret = wlcore_handle_static_data(wl, static_data);
106 static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
107 size_t fw_data_len, u32 dest)
109 struct wlcore_partition_set partition;
110 int addr, chunk_num, partition_limit;
113 /* whal_FwCtrl_LoadFwImageSm() */
115 wl1271_debug(DEBUG_BOOT, "starting firmware upload");
117 wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
118 fw_data_len, CHUNK_SIZE);
120 if ((fw_data_len % 4) != 0) {
121 wl1271_error("firmware length not multiple of four");
125 chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
127 wl1271_error("allocation for firmware upload chunk failed");
131 memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
132 partition.mem.start = dest;
133 wlcore_set_partition(wl, &partition);
135 /* 10.1 set partition limit and chunk num */
137 partition_limit = wl->ptable[PART_DOWN].mem.size;
139 while (chunk_num < fw_data_len / CHUNK_SIZE) {
140 /* 10.2 update partition, if needed */
141 addr = dest + (chunk_num + 2) * CHUNK_SIZE;
142 if (addr > partition_limit) {
143 addr = dest + chunk_num * CHUNK_SIZE;
144 partition_limit = chunk_num * CHUNK_SIZE +
145 wl->ptable[PART_DOWN].mem.size;
146 partition.mem.start = addr;
147 wlcore_set_partition(wl, &partition);
150 /* 10.3 upload the chunk */
151 addr = dest + chunk_num * CHUNK_SIZE;
152 p = buf + chunk_num * CHUNK_SIZE;
153 memcpy(chunk, p, CHUNK_SIZE);
154 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
156 wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);
161 /* 10.4 upload the last chunk */
162 addr = dest + chunk_num * CHUNK_SIZE;
163 p = buf + chunk_num * CHUNK_SIZE;
164 memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
165 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
166 fw_data_len % CHUNK_SIZE, p, addr);
167 wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
173 int wlcore_boot_upload_firmware(struct wl1271 *wl)
175 u32 chunks, addr, len;
180 chunks = be32_to_cpup((__be32 *) fw);
183 wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
186 addr = be32_to_cpup((__be32 *) fw);
188 len = be32_to_cpup((__be32 *) fw);
192 wl1271_info("firmware chunk too long: %u", len);
195 wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
197 ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
205 EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
207 int wlcore_boot_upload_nvs(struct wl1271 *wl)
209 size_t nvs_len, burst_len;
212 u8 *nvs_ptr, *nvs_aligned;
214 if (wl->nvs == NULL) {
215 wl1271_error("NVS file is needed during boot");
219 if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
220 struct wl1271_nvs_file *nvs =
221 (struct wl1271_nvs_file *)wl->nvs;
223 * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
224 * band configurations) can be removed when those NVS files stop
227 if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
228 wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
229 if (nvs->general_params.dual_mode_select)
230 wl->enable_11a = true;
233 if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
234 (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
236 wl1271_error("nvs size is not as expected: %zu != %zu",
237 wl->nvs_len, sizeof(struct wl1271_nvs_file));
244 /* only the first part of the NVS needs to be uploaded */
245 nvs_len = sizeof(nvs->nvs);
246 nvs_ptr = (u8 *) nvs->nvs;
248 struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
250 if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
251 if (nvs->general_params.dual_mode_select)
252 wl->enable_11a = true;
254 wl1271_error("nvs size is not as expected: %zu != %zu",
256 sizeof(struct wl128x_nvs_file));
263 /* only the first part of the NVS needs to be uploaded */
264 nvs_len = sizeof(nvs->nvs);
265 nvs_ptr = (u8 *)nvs->nvs;
268 /* update current MAC address to NVS */
269 nvs_ptr[11] = wl->addresses[0].addr[0];
270 nvs_ptr[10] = wl->addresses[0].addr[1];
271 nvs_ptr[6] = wl->addresses[0].addr[2];
272 nvs_ptr[5] = wl->addresses[0].addr[3];
273 nvs_ptr[4] = wl->addresses[0].addr[4];
274 nvs_ptr[3] = wl->addresses[0].addr[5];
277 * Layout before the actual NVS tables:
278 * 1 byte : burst length.
279 * 2 bytes: destination address.
280 * n bytes: data to burst copy.
282 * This is ended by a 0 length, then the NVS tables.
285 /* FIXME: Do we need to check here whether the LSB is 1? */
287 burst_len = nvs_ptr[0];
288 dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
291 * Due to our new wl1271_translate_reg_addr function,
292 * we need to add the register partition start address
295 dest_addr += wl->curr_part.reg.start;
297 /* We move our pointer to the data */
300 for (i = 0; i < burst_len; i++) {
301 if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
304 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
305 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
307 wl1271_debug(DEBUG_BOOT,
308 "nvs burst write 0x%x: 0x%x",
310 wl1271_write32(wl, dest_addr, val);
316 if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
321 * We've reached the first zero length, the first NVS table
322 * is located at an aligned offset which is at least 7 bytes further.
323 * NOTE: The wl->nvs->nvs element must be first, in order to
324 * simplify the casting, we assume it is at the beginning of
325 * the wl->nvs structure.
327 nvs_ptr = (u8 *)wl->nvs +
328 ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
330 if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
333 nvs_len -= nvs_ptr - (u8 *)wl->nvs;
335 /* Now we must set the partition correctly */
336 wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
338 /* Copy the NVS tables to a new block to ensure alignment */
339 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
343 /* And finally we upload the NVS tables */
344 wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS,
345 nvs_aligned, nvs_len, false);
351 wl1271_error("nvs data is malformed");
354 EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
356 int wlcore_boot_run_firmware(struct wl1271 *wl)
361 /* Make sure we have the boot partition */
362 wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
364 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
366 chip_id = wlcore_read_reg(wl, REG_CHIP_ID_B);
368 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
370 if (chip_id != wl->chip.id) {
371 wl1271_error("chip id doesn't match after firmware boot");
375 /* wait for init to complete */
377 while (loop++ < INIT_LOOP) {
378 udelay(INIT_LOOP_DELAY);
379 intr = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR);
381 if (intr == 0xffffffff) {
382 wl1271_error("error reading hardware complete "
386 /* check that ACX_INTR_INIT_COMPLETE is enabled */
387 else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
388 wlcore_write_reg(wl, REG_INTERRUPT_ACK,
389 WL1271_ACX_INTR_INIT_COMPLETE);
394 if (loop > INIT_LOOP) {
395 wl1271_error("timeout waiting for the hardware to "
396 "complete initialization");
400 /* get hardware config command mail box */
401 wl->cmd_box_addr = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR);
403 wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
405 /* get hardware config event mail box */
406 wl->mbox_ptr[0] = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR);
407 wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
409 wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
410 wl->mbox_ptr[0], wl->mbox_ptr[1]);
412 ret = wlcore_boot_static_data(wl);
414 wl1271_error("error getting static data");
419 * in case of full asynchronous mode the firmware event must be
420 * ready to receive event from the command mailbox
423 /* unmask required mbox events */
424 wl->event_mask = BSS_LOSE_EVENT_ID |
425 REGAINED_BSS_EVENT_ID |
426 SCAN_COMPLETE_EVENT_ID |
427 ROLE_STOP_COMPLETE_EVENT_ID |
428 RSSI_SNR_TRIGGER_0_EVENT_ID |
429 PSPOLL_DELIVERY_FAILURE_EVENT_ID |
430 SOFT_GEMINI_SENSE_EVENT_ID |
431 PERIODIC_SCAN_REPORT_EVENT_ID |
432 PERIODIC_SCAN_COMPLETE_EVENT_ID |
433 DUMMY_PACKET_EVENT_ID |
434 PEER_REMOVE_COMPLETE_EVENT_ID |
435 BA_SESSION_RX_CONSTRAINT_EVENT_ID |
436 REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |
437 INACTIVE_STA_EVENT_ID |
438 MAX_TX_RETRY_EVENT_ID |
439 CHANNEL_SWITCH_COMPLETE_EVENT_ID;
441 ret = wl1271_event_unmask(wl);
443 wl1271_error("EVENT mask setting failed");
447 /* set the working partition to its "running" mode offset */
448 wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
450 /* firmware startup completed */
453 EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);