drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #include "wifi.h"
  27 #include "core.h"
  28 #include "pci.h"
  29 #include "base.h"
  30 #include "ps.h"
  31 #include "efuse.h"
  32 #include <linux/interrupt.h>
  33 #include <linux/export.h>
  34 #include <linux/kmemleak.h>
  35 #include <linux/module.h>
  36
  37 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  38 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  39 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  40 MODULE_LICENSE("GPL");
  41 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  42
  43 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  44         INTEL_VENDOR_ID,
  45         ATI_VENDOR_ID,
  46         AMD_VENDOR_ID,
  47         SIS_VENDOR_ID
  48 };
  49
  50 static const u8 ac_to_hwq[] = {
  51         VO_QUEUE,
  52         VI_QUEUE,
  53         BE_QUEUE,
  54         BK_QUEUE
  55 };
  56
  57 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw, struct sk_buff *skb)
  58 {
  59         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  60         __le16 fc = rtl_get_fc(skb);
  61         u8 queue_index = skb_get_queue_mapping(skb);
  62
  63         if (unlikely(ieee80211_is_beacon(fc)))
  64                 return BEACON_QUEUE;
  65         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  66                 return MGNT_QUEUE;
  67         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  68                 if (ieee80211_is_nullfunc(fc))
  69                         return HIGH_QUEUE;
  70
  71         return ac_to_hwq[queue_index];
  72 }
  73
  74 /* Update PCI dependent default settings*/
  75 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  76 {
  77         struct rtl_priv *rtlpriv = rtl_priv(hw);
  78         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  79         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  80         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  81         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  82         u8 init_aspm;
  83
  84         ppsc->reg_rfps_level = 0;
  85         ppsc->support_aspm = false;
  86
  87         /*Update PCI ASPM setting */
  88         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  89         switch (rtlpci->const_pci_aspm) {
  90         case 0:
  91                 /*No ASPM */
  92                 break;
  93
  94         case 1:
  95                 /*ASPM dynamically enabled/disable. */
  96                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  97                 break;
  98
  99         case 2:
 100                 /*ASPM with Clock Req dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 102                                          RT_RF_OFF_LEVL_CLK_REQ);
 103                 break;
 104
 105         case 3:
 106                 /* Always enable ASPM and Clock Req
 107                  * from initialization to halt.
 108                  */
 109                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 110                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 111                                          RT_RF_OFF_LEVL_CLK_REQ);
 112                 break;
 113
 114         case 4:
 115                 /* Always enable ASPM without Clock Req
 116                  * from initialization to halt.
 117                  */
 118                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 119                                           RT_RF_OFF_LEVL_CLK_REQ);
 120                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 121                 break;
 122         }
 123
 124         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 125
 126         /*Update Radio OFF setting */
 127         switch (rtlpci->const_hwsw_rfoff_d3) {
 128         case 1:
 129                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 130                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 131                 break;
 132
 133         case 2:
 134                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 135                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 136                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 137                 break;
 138
 139         case 3:
 140                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 141                 break;
 142         }
 143
 144         /*Set HW definition to determine if it supports ASPM. */
 145         switch (rtlpci->const_support_pciaspm) {
 146         case 0:
 147                 /*Not support ASPM. */
 148                 ppsc->support_aspm = false;
 149                 break;
 150         case 1:
 151                 /*Support ASPM. */
 152                 ppsc->support_aspm = true;
 153                 ppsc->support_backdoor = true;
 154                 break;
 155         case 2:
 156                 /*ASPM value set by chipset. */
 157                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 158                         ppsc->support_aspm = true;
 159                 break;
 160         default:
 161                 pr_err("switch case %#x not processed\n",
 162                        rtlpci->const_support_pciaspm);
 163                 break;
 164         }
 165
 166         /* toshiba aspm issue, toshiba will set aspm selfly
 167          * so we should not set aspm in driver
 168          */
 169         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 170         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 171             init_aspm == 0x43)
 172                 ppsc->support_aspm = false;
 173 }
 174
 175 static bool _rtl_pci_platform_switch_device_pci_aspm(
 176                         struct ieee80211_hw *hw,
 177                         u8 value)
 178 {
 179         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 180         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 181
 182         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 183                 value |= 0x40;
 184
 185         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 186
 187         return false;
 188 }
 189
 190 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 191 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 192 {
 193         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 194         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 195
 196         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 197
 198         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 199                 udelay(100);
 200 }
 201
 202 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 203 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 204 {
 205         struct rtl_priv *rtlpriv = rtl_priv(hw);
 206         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 207         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 208         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 209         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 210         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 211         /*Retrieve original configuration settings. */
 212         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 213         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 214                                 pcibridge_linkctrlreg;
 215         u16 aspmlevel = 0;
 216         u8 tmp_u1b = 0;
 217
 218         if (!ppsc->support_aspm)
 219                 return;
 220
 221         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 222                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 223                          "PCI(Bridge) UNKNOWN\n");
 224
 225                 return;
 226         }
 227
 228         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 229                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 230                 _rtl_pci_switch_clk_req(hw, 0x0);
 231         }
 232
 233         /*for promising device will in L0 state after an I/O. */
 234         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 235
 236         /*Set corresponding value. */
 237         aspmlevel |= BIT(0) | BIT(1);
 238         linkctrl_reg &= ~aspmlevel;
 239         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 240
 241         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 242         udelay(50);
 243
 244         /*4 Disable Pci Bridge ASPM */
 245         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 246                               pcibridge_linkctrlreg);
 247
 248         udelay(50);
 249 }
 250
 251 /*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 252  *power saving We should follow the sequence to enable
 253  *RTL8192SE first then enable Pci Bridge ASPM
 254  *or the system will show bluescreen.
 255  */
 256 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 257 {
 258         struct rtl_priv *rtlpriv = rtl_priv(hw);
 259         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 260         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 261         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 262         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 263         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 264         u16 aspmlevel;
 265         u8 u_pcibridge_aspmsetting;
 266         u8 u_device_aspmsetting;
 267
 268         if (!ppsc->support_aspm)
 269                 return;
 270
 271         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 272                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 273                          "PCI(Bridge) UNKNOWN\n");
 274                 return;
 275         }
 276
 277         /*4 Enable Pci Bridge ASPM */
 278
 279         u_pcibridge_aspmsetting =
 280             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 281             rtlpci->const_hostpci_aspm_setting;
 282
 283         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 284                 u_pcibridge_aspmsetting &= ~BIT(0);
 285
 286         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 287                               u_pcibridge_aspmsetting);
 288
 289         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 290                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 291                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 292                  u_pcibridge_aspmsetting);
 293
 294         udelay(50);
 295
 296         /*Get ASPM level (with/without Clock Req) */
 297         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 298         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 299
 300         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 301         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 302
 303         u_device_aspmsetting |= aspmlevel;
 304
 305         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 306
 307         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 308                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 309                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 310                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 311         }
 312         udelay(100);
 313 }
 314
 315 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 316 {
 317         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 318
 319         bool status = false;
 320         u8 offset_e0;
 321         unsigned int offset_e4;
 322
 323         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 324
 325         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 326
 327         if (offset_e0 == 0xA0) {
 328                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 329                 if (offset_e4 & BIT(23))
 330                         status = true;
 331         }
 332
 333         return status;
 334 }
 335
 336 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 337                                      struct rtl_priv **buddy_priv)
 338 {
 339         struct rtl_priv *rtlpriv = rtl_priv(hw);
 340         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 341         bool find_buddy_priv = false;
 342         struct rtl_priv *tpriv;
 343         struct rtl_pci_priv *tpcipriv = NULL;
 344
 345         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 346                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 347                                     list) {
 348                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 349                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 350                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 351                                 pcipriv->ndis_adapter.funcnumber);
 352                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 353                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 354                                 tpcipriv->ndis_adapter.funcnumber);
 355
 356                         if (pcipriv->ndis_adapter.busnumber ==
 357                             tpcipriv->ndis_adapter.busnumber &&
 358                             pcipriv->ndis_adapter.devnumber ==
 359                             tpcipriv->ndis_adapter.devnumber &&
 360                             pcipriv->ndis_adapter.funcnumber !=
 361                             tpcipriv->ndis_adapter.funcnumber) {
 362                                 find_buddy_priv = true;
 363                                 break;
 364                         }
 365                 }
 366         }
 367
 368         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 369                  "find_buddy_priv %d\n", find_buddy_priv);
 370
 371         if (find_buddy_priv)
 372                 *buddy_priv = tpriv;
 373
 374         return find_buddy_priv;
 375 }
 376
 377 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 378 {
 379         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 380         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 381         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 382         u8 linkctrl_reg;
 383         u8 num4bbytes;
 384
 385         num4bbytes = (capabilityoffset + 0x10) / 4;
 386
 387         /*Read  Link Control Register */
 388         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 389
 390         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 391 }
 392
 393 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 394                                         struct ieee80211_hw *hw)
 395 {
 396         struct rtl_priv *rtlpriv = rtl_priv(hw);
 397         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 398
 399         u8 tmp;
 400         u16 linkctrl_reg;
 401
 402         /*Link Control Register */
 403         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 404         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 405
 406         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 407                  pcipriv->ndis_adapter.linkctrl_reg);
 408
 409         pci_read_config_byte(pdev, 0x98, &tmp);
 410         tmp |= BIT(4);
 411         pci_write_config_byte(pdev, 0x98, tmp);
 412
 413         tmp = 0x17;
 414         pci_write_config_byte(pdev, 0x70f, tmp);
 415 }
 416
 417 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 418 {
 419         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 420
 421         _rtl_pci_update_default_setting(hw);
 422
 423         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 424                 /*Always enable ASPM & Clock Req. */
 425                 rtl_pci_enable_aspm(hw);
 426                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 427         }
 428 }
 429
 430 static void _rtl_pci_io_handler_init(struct device *dev,
 431                                      struct ieee80211_hw *hw)
 432 {
 433         struct rtl_priv *rtlpriv = rtl_priv(hw);
 434
 435         rtlpriv->io.dev = dev;
 436
 437         rtlpriv->io.write8_async = pci_write8_async;
 438         rtlpriv->io.write16_async = pci_write16_async;
 439         rtlpriv->io.write32_async = pci_write32_async;
 440
 441         rtlpriv->io.read8_sync = pci_read8_sync;
 442         rtlpriv->io.read16_sync = pci_read16_sync;
 443         rtlpriv->io.read32_sync = pci_read32_sync;
 444 }
 445
 446 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 447                                        struct sk_buff *skb,
 448                                        struct rtl_tcb_desc *tcb_desc, u8 tid)
 449 {
 450         struct rtl_priv *rtlpriv = rtl_priv(hw);
 451         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 452         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 453         struct sk_buff *next_skb;
 454         u8 additionlen = FCS_LEN;
 455
 456         /* here open is 4, wep/tkip is 8, aes is 12*/
 457         if (info->control.hw_key)
 458                 additionlen += info->control.hw_key->icv_len;
 459
 460         /* The most skb num is 6 */
 461         tcb_desc->empkt_num = 0;
 462         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 463         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 464                 struct ieee80211_tx_info *next_info;
 465
 466                 next_info = IEEE80211_SKB_CB(next_skb);
 467                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 468                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 469                                 next_skb->len + additionlen;
 470                         tcb_desc->empkt_num++;
 471                 } else {
 472                         break;
 473                 }
 474
 475                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 476                                       next_skb))
 477                         break;
 478
 479                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 480                         break;
 481         }
 482         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 483
 484         return true;
 485 }
 486
 487 /* just for early mode now */
 488 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 489 {
 490         struct rtl_priv *rtlpriv = rtl_priv(hw);
 491         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 492         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 493         struct sk_buff *skb = NULL;
 494         struct ieee80211_tx_info *info = NULL;
 495         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 496         int tid;
 497
 498         if (!rtlpriv->rtlhal.earlymode_enable)
 499                 return;
 500
 501         if (rtlpriv->dm.supp_phymode_switch &&
 502             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 503             (rtlpriv->buddy_priv &&
 504             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 505                 return;
 506         /* we just use em for BE/BK/VI/VO */
 507         for (tid = 7; tid >= 0; tid--) {
 508                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 509                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 510
 511                 while (!mac->act_scanning &&
 512                        rtlpriv->psc.rfpwr_state == ERFON) {
 513                         struct rtl_tcb_desc tcb_desc;
 514
 515                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 516
 517                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 518                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 519                             (ring->entries - skb_queue_len(&ring->queue) >
 520                              rtlhal->max_earlymode_num)) {
 521                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 522                         } else {
 523                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 524                                 break;
 525                         }
 526                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 527
 528                         /* Some macaddr can't do early mode. like
 529                          * multicast/broadcast/no_qos data
 530                          */
 531                         info = IEEE80211_SKB_CB(skb);
 532                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 533                                 _rtl_update_earlymode_info(hw, skb,
 534                                                            &tcb_desc, tid);
 535
 536                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 537                 }
 538         }
 539 }
 540
 541 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 542 {
 543         struct rtl_priv *rtlpriv = rtl_priv(hw);
 544         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 545
 546         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 547
 548         while (skb_queue_len(&ring->queue)) {
 549                 struct sk_buff *skb;
 550                 struct ieee80211_tx_info *info;
 551                 __le16 fc;
 552                 u8 tid;
 553                 u8 *entry;
 554
 555                 if (rtlpriv->use_new_trx_flow)
 556                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 557                 else
 558                         entry = (u8 *)(&ring->desc[ring->idx]);
 559
 560                 if (rtlpriv->cfg->ops->get_available_desc &&
 561                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 562                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 563                                  "no available desc!\n");
 564                         return;
 565                 }
 566
 567                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 568                         return;
 569                 ring->idx = (ring->idx + 1) % ring->entries;
 570
 571                 skb = __skb_dequeue(&ring->queue);
 572                 pci_unmap_single(rtlpci->pdev,
 573                                  rtlpriv->cfg->ops->
 574                                              get_desc(hw, (u8 *)entry, true,
 575                                                       HW_DESC_TXBUFF_ADDR),
 576                                  skb->len, PCI_DMA_TODEVICE);
 577
 578                 /* remove early mode header */
 579                 if (rtlpriv->rtlhal.earlymode_enable)
 580                         skb_pull(skb, EM_HDR_LEN);
 581
 582                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 583                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 584                          ring->idx,
 585                          skb_queue_len(&ring->queue),
 586                          *(u16 *)(skb->data + 22));
 587
 588                 if (prio == TXCMD_QUEUE) {
 589                         dev_kfree_skb(skb);
 590                         goto tx_status_ok;
 591                 }
 592
 593                 /* for sw LPS, just after NULL skb send out, we can
 594                  * sure AP knows we are sleeping, we should not let
 595                  * rf sleep
 596                  */
 597                 fc = rtl_get_fc(skb);
 598                 if (ieee80211_is_nullfunc(fc)) {
 599                         if (ieee80211_has_pm(fc)) {
 600                                 rtlpriv->mac80211.offchan_delay = true;
 601                                 rtlpriv->psc.state_inap = true;
 602                         } else {
 603                                 rtlpriv->psc.state_inap = false;
 604                         }
 605                 }
 606                 if (ieee80211_is_action(fc)) {
 607                         struct ieee80211_mgmt *action_frame =
 608                                 (struct ieee80211_mgmt *)skb->data;
 609                         if (action_frame->u.action.u.ht_smps.action ==
 610                             WLAN_HT_ACTION_SMPS) {
 611                                 dev_kfree_skb(skb);
 612                                 goto tx_status_ok;
 613                         }
 614                 }
 615
 616                 /* update tid tx pkt num */
 617                 tid = rtl_get_tid(skb);
 618                 if (tid <= 7)
 619                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 620
 621                 info = IEEE80211_SKB_CB(skb);
 622                 ieee80211_tx_info_clear_status(info);
 623
 624                 info->flags |= IEEE80211_TX_STAT_ACK;
 625                 /*info->status.rates[0].count = 1; */
 626
 627                 ieee80211_tx_status_irqsafe(hw, skb);
 628
 629                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 630                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 631                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 632                                  prio, ring->idx,
 633                                  skb_queue_len(&ring->queue));
 634
 635                         ieee80211_wake_queue(hw, skb_get_queue_mapping(skb));
 636                 }
 637 tx_status_ok:
 638                 skb = NULL;
 639         }
 640
 641         if (((rtlpriv->link_info.num_rx_inperiod +
 642               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 643               rtlpriv->link_info.num_rx_inperiod > 2)
 644                 rtl_lps_leave(hw);
 645 }
 646
 647 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 648                                     struct sk_buff *new_skb, u8 *entry,
 649                                     int rxring_idx, int desc_idx)
 650 {
 651         struct rtl_priv *rtlpriv = rtl_priv(hw);
 652         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 653         u32 bufferaddress;
 654         u8 tmp_one = 1;
 655         struct sk_buff *skb;
 656
 657         if (likely(new_skb)) {
 658                 skb = new_skb;
 659                 goto remap;
 660         }
 661         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 662         if (!skb)
 663                 return 0;
 664
 665 remap:
 666         /* just set skb->cb to mapping addr for pci_unmap_single use */
 667         *((dma_addr_t *)skb->cb) =
 668                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 669                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 670         bufferaddress = *((dma_addr_t *)skb->cb);
 671         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 672                 return 0;
 673         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 674         if (rtlpriv->use_new_trx_flow) {
 675                 /* skb->cb may be 64 bit address */
 676                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 677                                             HW_DESC_RX_PREPARE,
 678                                             (u8 *)(dma_addr_t *)skb->cb);
 679         } else {
 680                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 681                                             HW_DESC_RXBUFF_ADDR,
 682                                             (u8 *)&bufferaddress);
 683                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 684                                             HW_DESC_RXPKT_LEN,
 685                                             (u8 *)&rtlpci->rxbuffersize);
 686                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 687                                             HW_DESC_RXOWN,
 688                                             (u8 *)&tmp_one);
 689         }
 690         return 1;
 691 }
 692
 693 /* inorder to receive 8K AMSDU we have set skb to
 694  * 9100bytes in init rx ring, but if this packet is
 695  * not a AMSDU, this large packet will be sent to
 696  * TCP/IP directly, this cause big packet ping fail
 697  * like: "ping -s 65507", so here we will realloc skb
 698  * based on the true size of packet, Mac80211
 699  * Probably will do it better, but does not yet.
 700  *
 701  * Some platform will fail when alloc skb sometimes.
 702  * in this condition, we will send the old skb to
 703  * mac80211 directly, this will not cause any other
 704  * issues, but only this packet will be lost by TCP/IP
 705  */
 706 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 707                                     struct sk_buff *skb,
 708                                     struct ieee80211_rx_status rx_status)
 709 {
 710         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 711                 dev_kfree_skb_any(skb);
 712         } else {
 713                 struct sk_buff *uskb = NULL;
 714
 715                 uskb = dev_alloc_skb(skb->len + 128);
 716                 if (likely(uskb)) {
 717                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 718                                sizeof(rx_status));
 719                         skb_put_data(uskb, skb->data, skb->len);
 720                         dev_kfree_skb_any(skb);
 721                         ieee80211_rx_irqsafe(hw, uskb);
 722                 } else {
 723                         ieee80211_rx_irqsafe(hw, skb);
 724                 }
 725         }
 726 }
 727
 728 /*hsisr interrupt handler*/
 729 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 730 {
 731         struct rtl_priv *rtlpriv = rtl_priv(hw);
 732         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 733
 734         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 735                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 736                        rtlpci->sys_irq_mask);
 737 }
 738
 739 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 740 {
 741         struct rtl_priv *rtlpriv = rtl_priv(hw);
 742         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 743         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 744         struct ieee80211_rx_status rx_status = { 0 };
 745         unsigned int count = rtlpci->rxringcount;
 746         u8 own;
 747         u8 tmp_one;
 748         bool unicast = false;
 749         u8 hw_queue = 0;
 750         unsigned int rx_remained_cnt;
 751         struct rtl_stats stats = {
 752                 .signal = 0,
 753                 .rate = 0,
 754         };
 755
 756         /*RX NORMAL PKT */
 757         while (count--) {
 758                 struct ieee80211_hdr *hdr;
 759                 __le16 fc;
 760                 u16 len;
 761                 /*rx buffer descriptor */
 762                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 763                 /*if use new trx flow, it means wifi info */
 764                 struct rtl_rx_desc *pdesc = NULL;
 765                 /*rx pkt */
 766                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 767                                       rtlpci->rx_ring[rxring_idx].idx];
 768                 struct sk_buff *new_skb;
 769
 770                 if (rtlpriv->use_new_trx_flow) {
 771                         rx_remained_cnt =
 772                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 773                                                                       hw_queue);
 774                         if (rx_remained_cnt == 0)
 775                                 return;
 776                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 777                                 rtlpci->rx_ring[rxring_idx].idx];
 778                         pdesc = (struct rtl_rx_desc *)skb->data;
 779                 } else {        /* rx descriptor */
 780                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 781                                 rtlpci->rx_ring[rxring_idx].idx];
 782
 783                         own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
 784                                                               false,
 785                                                               HW_DESC_OWN);
 786                         if (own) /* wait data to be filled by hardware */
 787                                 return;
 788                 }
 789
 790                 /* Reaching this point means: data is filled already
 791                  * AAAAAAttention !!!
 792                  * We can NOT access 'skb' before 'pci_unmap_single'
 793                  */
 794                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 795                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 796
 797                 /* get a new skb - if fail, old one will be reused */
 798                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 799                 if (unlikely(!new_skb))
 800                         goto no_new;
 801                 memset(&rx_status, 0, sizeof(rx_status));
 802                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 803                                                  &rx_status, (u8 *)pdesc, skb);
 804
 805                 if (rtlpriv->use_new_trx_flow)
 806                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 807                                                            (u8 *)buffer_desc,
 808                                                            hw_queue);
 809
 810                 len = rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc, false,
 811                                                   HW_DESC_RXPKT_LEN);
 812
 813                 if (skb->end - skb->tail > len) {
 814                         skb_put(skb, len);
 815                         if (rtlpriv->use_new_trx_flow)
 816                                 skb_reserve(skb, stats.rx_drvinfo_size +
 817                                             stats.rx_bufshift + 24);
 818                         else
 819                                 skb_reserve(skb, stats.rx_drvinfo_size +
 820                                             stats.rx_bufshift);
 821                 } else {
 822                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 823                                  "skb->end - skb->tail = %d, len is %d\n",
 824                                  skb->end - skb->tail, len);
 825                         dev_kfree_skb_any(skb);
 826                         goto new_trx_end;
 827                 }
 828                 /* handle command packet here */
 829                 if (rtlpriv->cfg->ops->rx_command_packet &&
 830                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 831                         dev_kfree_skb_any(skb);
 832                         goto new_trx_end;
 833                 }
 834
 835                 /* NOTICE This can not be use for mac80211,
 836                  * this is done in mac80211 code,
 837                  * if done here sec DHCP will fail
 838                  * skb_trim(skb, skb->len - 4);
 839                  */
 840
 841                 hdr = rtl_get_hdr(skb);
 842                 fc = rtl_get_fc(skb);
 843
 844                 if (!stats.crc && !stats.hwerror) {
 845                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 846                                sizeof(rx_status));
 847
 848                         if (is_broadcast_ether_addr(hdr->addr1)) {
 849                                 ;/*TODO*/
 850                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 851                                 ;/*TODO*/
 852                         } else {
 853                                 unicast = true;
 854                                 rtlpriv->stats.rxbytesunicast += skb->len;
 855                         }
 856                         rtl_is_special_data(hw, skb, false, true);
 857
 858                         if (ieee80211_is_data(fc)) {
 859                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 860                                 if (unicast)
 861                                         rtlpriv->link_info.num_rx_inperiod++;
 862                         }
 863
 864                         rtl_collect_scan_list(hw, skb);
 865
 866                         /* static bcn for roaming */
 867                         rtl_beacon_statistic(hw, skb);
 868                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 869                         /* for sw lps */
 870                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 871                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 872                         if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP &&
 873                             rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G &&
 874                             (ieee80211_is_beacon(fc) ||
 875                              ieee80211_is_probe_resp(fc))) {
 876                                 dev_kfree_skb_any(skb);
 877                         } else {
 878                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 879                         }
 880                 } else {
 881                         dev_kfree_skb_any(skb);
 882                 }
 883 new_trx_end:
 884                 if (rtlpriv->use_new_trx_flow) {
 885                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 886                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 887                                         RTL_PCI_MAX_RX_COUNT;
 888
 889                         rx_remained_cnt--;
 890                         rtl_write_word(rtlpriv, 0x3B4,
 891                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 892                 }
 893                 if (((rtlpriv->link_info.num_rx_inperiod +
 894                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 895                       rtlpriv->link_info.num_rx_inperiod > 2)
 896                         rtl_lps_leave(hw);
 897                 skb = new_skb;
 898 no_new:
 899                 if (rtlpriv->use_new_trx_flow) {
 900                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 901                                                  rxring_idx,
 902                                                  rtlpci->rx_ring[rxring_idx].idx);
 903                 } else {
 904                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 905                                                  rxring_idx,
 906                                                  rtlpci->rx_ring[rxring_idx].idx);
 907                         if (rtlpci->rx_ring[rxring_idx].idx ==
 908                             rtlpci->rxringcount - 1)
 909                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 910                                                             false,
 911                                                             HW_DESC_RXERO,
 912                                                             (u8 *)&tmp_one);
 913                 }
 914                 rtlpci->rx_ring[rxring_idx].idx =
 915                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 916                                 rtlpci->rxringcount;
 917         }
 918 }
 919
 920 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 921 {
 922         struct ieee80211_hw *hw = dev_id;
 923         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 924         struct rtl_priv *rtlpriv = rtl_priv(hw);
 925         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 926         unsigned long flags;
 927         u32 inta = 0;
 928         u32 intb = 0;
 929         u32 intd = 0;
 930         irqreturn_t ret = IRQ_HANDLED;
 931
 932         if (rtlpci->irq_enabled == 0)
 933                 return ret;
 934
 935         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 936         rtlpriv->cfg->ops->disable_interrupt(hw);
 937
 938         /*read ISR: 4/8bytes */
 939         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 940
 941         /*Shared IRQ or HW disappeared */
 942         if (!inta || inta == 0xffff)
 943                 goto done;
 944
 945         /*<1> beacon related */
 946         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK])
 947                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 948                          "beacon ok interrupt!\n");
 949
 950         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER]))
 951                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 952                          "beacon err interrupt!\n");
 953
 954         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK])
 955                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 956
 957         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 958                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 959                          "prepare beacon for interrupt!\n");
 960                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 961         }
 962
 963         /*<2> Tx related */
 964         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 965                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 966
 967         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 968                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 969                          "Manage ok interrupt!\n");
 970                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 971         }
 972
 973         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 974                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 975                          "HIGH_QUEUE ok interrupt!\n");
 976                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 977         }
 978
 979         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 980                 rtlpriv->link_info.num_tx_inperiod++;
 981
 982                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 983                          "BK Tx OK interrupt!\n");
 984                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 985         }
 986
 987         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 988                 rtlpriv->link_info.num_tx_inperiod++;
 989
 990                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 991                          "BE TX OK interrupt!\n");
 992                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 993         }
 994
 995         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 996                 rtlpriv->link_info.num_tx_inperiod++;
 997
 998                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 999                          "VI TX OK interrupt!\n");
1000                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1001         }
1002
1003         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1004                 rtlpriv->link_info.num_tx_inperiod++;
1005
1006                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1007                          "Vo TX OK interrupt!\n");
1008                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1009         }
1010
1011         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
1012                 if (intd & rtlpriv->cfg->maps[RTL_IMR_H2CDOK]) {
1013                         rtlpriv->link_info.num_tx_inperiod++;
1014
1015                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1016                                  "H2C TX OK interrupt!\n");
1017                         _rtl_pci_tx_isr(hw, H2C_QUEUE);
1018                 }
1019         }
1020
1021         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1022                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1023                         rtlpriv->link_info.num_tx_inperiod++;
1024
1025                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1026                                  "CMD TX OK interrupt!\n");
1027                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1028                 }
1029         }
1030
1031         /*<3> Rx related */
1032         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1033                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1034                 _rtl_pci_rx_interrupt(hw);
1035         }
1036
1037         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1038                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1039                          "rx descriptor unavailable!\n");
1040                 _rtl_pci_rx_interrupt(hw);
1041         }
1042
1043         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1044                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1045                 _rtl_pci_rx_interrupt(hw);
1046         }
1047
1048         /*<4> fw related*/
1049         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1050                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1051                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1052                                  "firmware interrupt!\n");
1053                         queue_delayed_work(rtlpriv->works.rtl_wq,
1054                                            &rtlpriv->works.fwevt_wq, 0);
1055                 }
1056         }
1057
1058         /*<5> hsisr related*/
1059         /* Only 8188EE & 8723BE Supported.
1060          * If Other ICs Come in, System will corrupt,
1061          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1062          * are not initialized
1063          */
1064         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1065             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1066                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1067                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1068                                  "hsisr interrupt!\n");
1069                         _rtl_pci_hs_interrupt(hw);
1070                 }
1071         }
1072
1073         if (rtlpriv->rtlhal.earlymode_enable)
1074                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1075
1076 done:
1077         rtlpriv->cfg->ops->enable_interrupt(hw);
1078         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1079         return ret;
1080 }
1081
1082 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1083 {
1084         _rtl_pci_tx_chk_waitq(hw);
1085 }
1086
1087 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1088 {
1089         struct rtl_priv *rtlpriv = rtl_priv(hw);
1090         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1091         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1092         struct rtl8192_tx_ring *ring = NULL;
1093         struct ieee80211_hdr *hdr = NULL;
1094         struct ieee80211_tx_info *info = NULL;
1095         struct sk_buff *pskb = NULL;
1096         struct rtl_tx_desc *pdesc = NULL;
1097         struct rtl_tcb_desc tcb_desc;
1098         /*This is for new trx flow*/
1099         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1100         u8 temp_one = 1;
1101         u8 *entry;
1102
1103         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1104         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1105         pskb = __skb_dequeue(&ring->queue);
1106         if (rtlpriv->use_new_trx_flow)
1107                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1108         else
1109                 entry = (u8 *)(&ring->desc[ring->idx]);
1110         if (pskb) {
1111                 pci_unmap_single(rtlpci->pdev,
1112                                  rtlpriv->cfg->ops->get_desc(
1113                                  hw, (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1114                                  pskb->len, PCI_DMA_TODEVICE);
1115                 kfree_skb(pskb);
1116         }
1117
1118         /*NB: the beacon data buffer must be 32-bit aligned. */
1119         pskb = ieee80211_beacon_get(hw, mac->vif);
1120         if (!pskb)
1121                 return;
1122         hdr = rtl_get_hdr(pskb);
1123         info = IEEE80211_SKB_CB(pskb);
1124         pdesc = &ring->desc[0];
1125         if (rtlpriv->use_new_trx_flow)
1126                 pbuffer_desc = &ring->buffer_desc[0];
1127
1128         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1129                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1130                                         BEACON_QUEUE, &tcb_desc);
1131
1132         __skb_queue_tail(&ring->queue, pskb);
1133
1134         if (rtlpriv->use_new_trx_flow) {
1135                 temp_one = 4;
1136                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1137                                             HW_DESC_OWN, (u8 *)&temp_one);
1138         } else {
1139                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1140                                             &temp_one);
1141         }
1142 }
1143
1144 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1145 {
1146         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1147         struct rtl_priv *rtlpriv = rtl_priv(hw);
1148         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1149         u8 i;
1150         u16 desc_num;
1151
1152         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1153                 desc_num = TX_DESC_NUM_92E;
1154         else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE)
1155                 desc_num = TX_DESC_NUM_8822B;
1156         else
1157                 desc_num = RT_TXDESC_NUM;
1158
1159         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1160                 rtlpci->txringcount[i] = desc_num;
1161
1162         /*we just alloc 2 desc for beacon queue,
1163          *because we just need first desc in hw beacon.
1164          */
1165         rtlpci->txringcount[BEACON_QUEUE] = 2;
1166
1167         /*BE queue need more descriptor for performance
1168          *consideration or, No more tx desc will happen,
1169          *and may cause mac80211 mem leakage.
1170          */
1171         if (!rtl_priv(hw)->use_new_trx_flow)
1172                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1173
1174         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1175         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1176 }
1177
1178 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1179                                  struct pci_dev *pdev)
1180 {
1181         struct rtl_priv *rtlpriv = rtl_priv(hw);
1182         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1183         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1184         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1185
1186         rtlpci->up_first_time = true;
1187         rtlpci->being_init_adapter = false;
1188
1189         rtlhal->hw = hw;
1190         rtlpci->pdev = pdev;
1191
1192         /*Tx/Rx related var */
1193         _rtl_pci_init_trx_var(hw);
1194
1195         /*IBSS*/
1196         mac->beacon_interval = 100;
1197
1198         /*AMPDU*/
1199         mac->min_space_cfg = 0;
1200         mac->max_mss_density = 0;
1201         /*set sane AMPDU defaults */
1202         mac->current_ampdu_density = 7;
1203         mac->current_ampdu_factor = 3;
1204
1205         /*Retry Limit*/
1206         mac->retry_short = 7;
1207         mac->retry_long = 7;
1208
1209         /*QOS*/
1210         rtlpci->acm_method = EACMWAY2_SW;
1211
1212         /*task */
1213         tasklet_init(&rtlpriv->works.irq_tasklet,
1214                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1215                      (unsigned long)hw);
1216         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1217                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1218                      (unsigned long)hw);
1219         INIT_WORK(&rtlpriv->works.lps_change_work,
1220                   rtl_lps_change_work_callback);
1221 }
1222
1223 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1224                                  unsigned int prio, unsigned int entries)
1225 {
1226         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1227         struct rtl_priv *rtlpriv = rtl_priv(hw);
1228         struct rtl_tx_buffer_desc *buffer_desc;
1229         struct rtl_tx_desc *desc;
1230         dma_addr_t buffer_desc_dma, desc_dma;
1231         u32 nextdescaddress;
1232         int i;
1233
1234         /* alloc tx buffer desc for new trx flow*/
1235         if (rtlpriv->use_new_trx_flow) {
1236                 buffer_desc =
1237                    pci_zalloc_consistent(rtlpci->pdev,
1238                                          sizeof(*buffer_desc) * entries,
1239                                          &buffer_desc_dma);
1240
1241                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1242                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1243                                prio);
1244                         return -ENOMEM;
1245                 }
1246
1247                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1248                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1249
1250                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1251                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1252                 rtlpci->tx_ring[prio].avl_desc = entries;
1253         }
1254
1255         /* alloc dma for this ring */
1256         desc = pci_zalloc_consistent(rtlpci->pdev,
1257                                      sizeof(*desc) * entries, &desc_dma);
1258
1259         if (!desc || (unsigned long)desc & 0xFF) {
1260                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1261                 return -ENOMEM;
1262         }
1263
1264         rtlpci->tx_ring[prio].desc = desc;
1265         rtlpci->tx_ring[prio].dma = desc_dma;
1266
1267         rtlpci->tx_ring[prio].idx = 0;
1268         rtlpci->tx_ring[prio].entries = entries;
1269         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1270
1271         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1272                  prio, desc);
1273
1274         /* init every desc in this ring */
1275         if (!rtlpriv->use_new_trx_flow) {
1276                 for (i = 0; i < entries; i++) {
1277                         nextdescaddress = (u32)desc_dma +
1278                                           ((i + 1) % entries) *
1279                                           sizeof(*desc);
1280
1281                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1282                                                     true,
1283                                                     HW_DESC_TX_NEXTDESC_ADDR,
1284                                                     (u8 *)&nextdescaddress);
1285                 }
1286         }
1287         return 0;
1288 }
1289
1290 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1291 {
1292         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1293         struct rtl_priv *rtlpriv = rtl_priv(hw);
1294         int i;
1295
1296         if (rtlpriv->use_new_trx_flow) {
1297                 struct rtl_rx_buffer_desc *entry = NULL;
1298                 /* alloc dma for this ring */
1299                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1300                     pci_zalloc_consistent(rtlpci->pdev,
1301                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1302                                                  buffer_desc) *
1303                                                  rtlpci->rxringcount,
1304                                           &rtlpci->rx_ring[rxring_idx].dma);
1305                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1306                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1307                         pr_err("Cannot allocate RX ring\n");
1308                         return -ENOMEM;
1309                 }
1310
1311                 /* init every desc in this ring */
1312                 rtlpci->rx_ring[rxring_idx].idx = 0;
1313                 for (i = 0; i < rtlpci->rxringcount; i++) {
1314                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1315                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1316                                                       rxring_idx, i))
1317                                 return -ENOMEM;
1318                 }
1319         } else {
1320                 struct rtl_rx_desc *entry = NULL;
1321                 u8 tmp_one = 1;
1322                 /* alloc dma for this ring */
1323                 rtlpci->rx_ring[rxring_idx].desc =
1324                     pci_zalloc_consistent(rtlpci->pdev,
1325                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1326                                           desc) * rtlpci->rxringcount,
1327                                           &rtlpci->rx_ring[rxring_idx].dma);
1328                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1329                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1330                         pr_err("Cannot allocate RX ring\n");
1331                         return -ENOMEM;
1332                 }
1333
1334                 /* init every desc in this ring */
1335                 rtlpci->rx_ring[rxring_idx].idx = 0;
1336
1337                 for (i = 0; i < rtlpci->rxringcount; i++) {
1338                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1339                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1340                                                       rxring_idx, i))
1341                                 return -ENOMEM;
1342                 }
1343
1344                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1345                                             HW_DESC_RXERO, &tmp_one);
1346         }
1347         return 0;
1348 }
1349
1350 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1351                                   unsigned int prio)
1352 {
1353         struct rtl_priv *rtlpriv = rtl_priv(hw);
1354         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1355         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1356
1357         /* free every desc in this ring */
1358         while (skb_queue_len(&ring->queue)) {
1359                 u8 *entry;
1360                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1361
1362                 if (rtlpriv->use_new_trx_flow)
1363                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1364                 else
1365                         entry = (u8 *)(&ring->desc[ring->idx]);
1366
1367                 pci_unmap_single(rtlpci->pdev,
1368                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1369                                                    true,
1370                                                    HW_DESC_TXBUFF_ADDR),
1371                                  skb->len, PCI_DMA_TODEVICE);
1372                 kfree_skb(skb);
1373                 ring->idx = (ring->idx + 1) % ring->entries;
1374         }
1375
1376         /* free dma of this ring */
1377         pci_free_consistent(rtlpci->pdev,
1378                             sizeof(*ring->desc) * ring->entries,
1379                             ring->desc, ring->dma);
1380         ring->desc = NULL;
1381         if (rtlpriv->use_new_trx_flow) {
1382                 pci_free_consistent(rtlpci->pdev,
1383                                     sizeof(*ring->buffer_desc) * ring->entries,
1384                                     ring->buffer_desc, ring->buffer_desc_dma);
1385                 ring->buffer_desc = NULL;
1386         }
1387 }
1388
1389 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1390 {
1391         struct rtl_priv *rtlpriv = rtl_priv(hw);
1392         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1393         int i;
1394
1395         /* free every desc in this ring */
1396         for (i = 0; i < rtlpci->rxringcount; i++) {
1397                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1398
1399                 if (!skb)
1400                         continue;
1401                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1402                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1403                 kfree_skb(skb);
1404         }
1405
1406         /* free dma of this ring */
1407         if (rtlpriv->use_new_trx_flow) {
1408                 pci_free_consistent(rtlpci->pdev,
1409                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1410                                     buffer_desc) * rtlpci->rxringcount,
1411                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1412                                     rtlpci->rx_ring[rxring_idx].dma);
1413                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1414         } else {
1415                 pci_free_consistent(rtlpci->pdev,
1416                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1417                                     rtlpci->rxringcount,
1418                                     rtlpci->rx_ring[rxring_idx].desc,
1419                                     rtlpci->rx_ring[rxring_idx].dma);
1420                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1421         }
1422 }
1423
1424 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1425 {
1426         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1427         int ret;
1428         int i, rxring_idx;
1429
1430         /* rxring_idx 0:RX_MPDU_QUEUE
1431          * rxring_idx 1:RX_CMD_QUEUE
1432          */
1433         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1434                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1435                 if (ret)
1436                         return ret;
1437         }
1438
1439         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1440                 ret = _rtl_pci_init_tx_ring(hw, i, rtlpci->txringcount[i]);
1441                 if (ret)
1442                         goto err_free_rings;
1443         }
1444
1445         return 0;
1446
1447 err_free_rings:
1448         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1449                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1450
1451         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1452                 if (rtlpci->tx_ring[i].desc ||
1453                     rtlpci->tx_ring[i].buffer_desc)
1454                         _rtl_pci_free_tx_ring(hw, i);
1455
1456         return 1;
1457 }
1458
1459 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1460 {
1461         u32 i, rxring_idx;
1462
1463         /*free rx rings */
1464         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1465                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1466
1467         /*free tx rings */
1468         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1469                 _rtl_pci_free_tx_ring(hw, i);
1470
1471         return 0;
1472 }
1473
1474 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1475 {
1476         struct rtl_priv *rtlpriv = rtl_priv(hw);
1477         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1478         int i, rxring_idx;
1479         unsigned long flags;
1480         u8 tmp_one = 1;
1481         u32 bufferaddress;
1482         /* rxring_idx 0:RX_MPDU_QUEUE */
1483         /* rxring_idx 1:RX_CMD_QUEUE */
1484         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1485                 /* force the rx_ring[RX_MPDU_QUEUE/
1486                  * RX_CMD_QUEUE].idx to the first one
1487                  *new trx flow, do nothing
1488                  */
1489                 if (!rtlpriv->use_new_trx_flow &&
1490                     rtlpci->rx_ring[rxring_idx].desc) {
1491                         struct rtl_rx_desc *entry = NULL;
1492
1493                         rtlpci->rx_ring[rxring_idx].idx = 0;
1494                         for (i = 0; i < rtlpci->rxringcount; i++) {
1495                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1496                                 bufferaddress =
1497                                   rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1498                                   false, HW_DESC_RXBUFF_ADDR);
1499                                 memset((u8 *)entry, 0,
1500                                        sizeof(*rtlpci->rx_ring
1501                                        [rxring_idx].desc));/*clear one entry*/
1502                                 if (rtlpriv->use_new_trx_flow) {
1503                                         rtlpriv->cfg->ops->set_desc(hw,
1504                                             (u8 *)entry, false,
1505                                             HW_DESC_RX_PREPARE,
1506                                             (u8 *)&bufferaddress);
1507                                 } else {
1508                                         rtlpriv->cfg->ops->set_desc(hw,
1509                                             (u8 *)entry, false,
1510                                             HW_DESC_RXBUFF_ADDR,
1511                                             (u8 *)&bufferaddress);
1512                                         rtlpriv->cfg->ops->set_desc(hw,
1513                                             (u8 *)entry, false,
1514                                             HW_DESC_RXPKT_LEN,
1515                                             (u8 *)&rtlpci->rxbuffersize);
1516                                         rtlpriv->cfg->ops->set_desc(hw,
1517                                             (u8 *)entry, false,
1518                                             HW_DESC_RXOWN,
1519                                             (u8 *)&tmp_one);
1520                                 }
1521                         }
1522                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1523                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1524                 }
1525                 rtlpci->rx_ring[rxring_idx].idx = 0;
1526         }
1527
1528         /*after reset, release previous pending packet,
1529          *and force the  tx idx to the first one
1530          */
1531         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1532         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1533                 if (rtlpci->tx_ring[i].desc ||
1534                     rtlpci->tx_ring[i].buffer_desc) {
1535                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1536
1537                         while (skb_queue_len(&ring->queue)) {
1538                                 u8 *entry;
1539                                 struct sk_buff *skb =
1540                                         __skb_dequeue(&ring->queue);
1541                                 if (rtlpriv->use_new_trx_flow)
1542                                         entry = (u8 *)(&ring->buffer_desc
1543                                                                 [ring->idx]);
1544                                 else
1545                                         entry = (u8 *)(&ring->desc[ring->idx]);
1546
1547                                 pci_unmap_single(rtlpci->pdev,
1548                                                  rtlpriv->cfg->ops->
1549                                                          get_desc(hw, (u8 *)
1550                                                          entry,
1551                                                          true,
1552                                                          HW_DESC_TXBUFF_ADDR),
1553                                                  skb->len, PCI_DMA_TODEVICE);
1554                                 dev_kfree_skb_irq(skb);
1555                                 ring->idx = (ring->idx + 1) % ring->entries;
1556                         }
1557                         ring->idx = 0;
1558                 }
1559         }
1560         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1561
1562         return 0;
1563 }
1564
1565 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1566                                         struct ieee80211_sta *sta,
1567                                         struct sk_buff *skb)
1568 {
1569         struct rtl_priv *rtlpriv = rtl_priv(hw);
1570         struct rtl_sta_info *sta_entry = NULL;
1571         u8 tid = rtl_get_tid(skb);
1572         __le16 fc = rtl_get_fc(skb);
1573
1574         if (!sta)
1575                 return false;
1576         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1577
1578         if (!rtlpriv->rtlhal.earlymode_enable)
1579                 return false;
1580         if (ieee80211_is_nullfunc(fc))
1581                 return false;
1582         if (ieee80211_is_qos_nullfunc(fc))
1583                 return false;
1584         if (ieee80211_is_pspoll(fc))
1585                 return false;
1586         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1587                 return false;
1588         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1589                 return false;
1590         if (tid > 7)
1591                 return false;
1592
1593         /* maybe every tid should be checked */
1594         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1595                 return false;
1596
1597         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1598         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1599         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1600
1601         return true;
1602 }
1603
1604 static int rtl_pci_tx(struct ieee80211_hw *hw,
1605                       struct ieee80211_sta *sta,
1606                       struct sk_buff *skb,
1607                       struct rtl_tcb_desc *ptcb_desc)
1608 {
1609         struct rtl_priv *rtlpriv = rtl_priv(hw);
1610         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1611         struct rtl8192_tx_ring *ring;
1612         struct rtl_tx_desc *pdesc;
1613         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1614         u16 idx;
1615         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1616         unsigned long flags;
1617         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1618         __le16 fc = rtl_get_fc(skb);
1619         u8 *pda_addr = hdr->addr1;
1620         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1621         u8 own;
1622         u8 temp_one = 1;
1623
1624         if (ieee80211_is_mgmt(fc))
1625                 rtl_tx_mgmt_proc(hw, skb);
1626
1627         if (rtlpriv->psc.sw_ps_enabled) {
1628                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1629                     !ieee80211_has_pm(fc))
1630                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1631         }
1632
1633         rtl_action_proc(hw, skb, true);
1634
1635         if (is_multicast_ether_addr(pda_addr))
1636                 rtlpriv->stats.txbytesmulticast += skb->len;
1637         else if (is_broadcast_ether_addr(pda_addr))
1638                 rtlpriv->stats.txbytesbroadcast += skb->len;
1639         else
1640                 rtlpriv->stats.txbytesunicast += skb->len;
1641
1642         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1643         ring = &rtlpci->tx_ring[hw_queue];
1644         if (hw_queue != BEACON_QUEUE) {
1645                 if (rtlpriv->use_new_trx_flow)
1646                         idx = ring->cur_tx_wp;
1647                 else
1648                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1649                               ring->entries;
1650         } else {
1651                 idx = 0;
1652         }
1653
1654         pdesc = &ring->desc[idx];
1655         if (rtlpriv->use_new_trx_flow) {
1656                 ptx_bd_desc = &ring->buffer_desc[idx];
1657         } else {
1658                 own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
1659                                 true, HW_DESC_OWN);
1660
1661                 if (own == 1 && hw_queue != BEACON_QUEUE) {
1662                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1663                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1664                                  hw_queue, ring->idx, idx,
1665                                  skb_queue_len(&ring->queue));
1666
1667                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1668                                                flags);
1669                         return skb->len;
1670                 }
1671         }
1672
1673         if (rtlpriv->cfg->ops->get_available_desc &&
1674             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1675                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1676                          "get_available_desc fail\n");
1677                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1678                 return skb->len;
1679         }
1680
1681         if (ieee80211_is_data(fc))
1682                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1683
1684         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1685                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1686
1687         __skb_queue_tail(&ring->queue, skb);
1688
1689         if (rtlpriv->use_new_trx_flow) {
1690                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1691                                             HW_DESC_OWN, &hw_queue);
1692         } else {
1693                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1694                                             HW_DESC_OWN, &temp_one);
1695         }
1696
1697         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1698             hw_queue != BEACON_QUEUE) {
1699                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1700                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1701                          hw_queue, ring->idx, idx,
1702                          skb_queue_len(&ring->queue));
1703
1704                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1705         }
1706
1707         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1708
1709         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1710
1711         return 0;
1712 }
1713
1714 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1715 {
1716         struct rtl_priv *rtlpriv = rtl_priv(hw);
1717         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1718         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1719         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1720         u16 i = 0;
1721         int queue_id;
1722         struct rtl8192_tx_ring *ring;
1723
1724         if (mac->skip_scan)
1725                 return;
1726
1727         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1728                 u32 queue_len;
1729
1730                 if (((queues >> queue_id) & 0x1) == 0) {
1731                         queue_id--;
1732                         continue;
1733                 }
1734                 ring = &pcipriv->dev.tx_ring[queue_id];
1735                 queue_len = skb_queue_len(&ring->queue);
1736                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1737                     queue_id == TXCMD_QUEUE) {
1738                         queue_id--;
1739                         continue;
1740                 } else {
1741                         msleep(20);
1742                         i++;
1743                 }
1744
1745                 /* we just wait 1s for all queues */
1746                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1747                     is_hal_stop(rtlhal) || i >= 200)
1748                         return;
1749         }
1750 }
1751
1752 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1753 {
1754         struct rtl_priv *rtlpriv = rtl_priv(hw);
1755         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1756
1757         _rtl_pci_deinit_trx_ring(hw);
1758
1759         synchronize_irq(rtlpci->pdev->irq);
1760         tasklet_kill(&rtlpriv->works.irq_tasklet);
1761         cancel_work_sync(&rtlpriv->works.lps_change_work);
1762
1763         flush_workqueue(rtlpriv->works.rtl_wq);
1764         destroy_workqueue(rtlpriv->works.rtl_wq);
1765 }
1766
1767 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1768 {
1769         int err;
1770
1771         _rtl_pci_init_struct(hw, pdev);
1772
1773         err = _rtl_pci_init_trx_ring(hw);
1774         if (err) {
1775                 pr_err("tx ring initialization failed\n");
1776                 return err;
1777         }
1778
1779         return 0;
1780 }
1781
1782 static int rtl_pci_start(struct ieee80211_hw *hw)
1783 {
1784         struct rtl_priv *rtlpriv = rtl_priv(hw);
1785         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1786         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1787         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1788         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1789
1790         int err;
1791
1792         rtl_pci_reset_trx_ring(hw);
1793
1794         rtlpci->driver_is_goingto_unload = false;
1795         if (rtlpriv->cfg->ops->get_btc_status &&
1796             rtlpriv->cfg->ops->get_btc_status()) {
1797                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1798                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1799                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1800         }
1801         err = rtlpriv->cfg->ops->hw_init(hw);
1802         if (err) {
1803                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1804                          "Failed to config hardware!\n");
1805                 return err;
1806         }
1807         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1808                         &rtlmac->retry_long);
1809
1810         rtlpriv->cfg->ops->enable_interrupt(hw);
1811         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1812
1813         rtl_init_rx_config(hw);
1814
1815         /*should be after adapter start and interrupt enable. */
1816         set_hal_start(rtlhal);
1817
1818         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1819
1820         rtlpci->up_first_time = false;
1821
1822         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%s OK\n", __func__);
1823         return 0;
1824 }
1825
1826 static void rtl_pci_stop(struct ieee80211_hw *hw)
1827 {
1828         struct rtl_priv *rtlpriv = rtl_priv(hw);
1829         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1830         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1831         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1832         unsigned long flags;
1833         u8 rf_timeout = 0;
1834
1835         if (rtlpriv->cfg->ops->get_btc_status())
1836                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1837
1838         /*should be before disable interrupt&adapter
1839          *and will do it immediately.
1840          */
1841         set_hal_stop(rtlhal);
1842
1843         rtlpci->driver_is_goingto_unload = true;
1844         rtlpriv->cfg->ops->disable_interrupt(hw);
1845         cancel_work_sync(&rtlpriv->works.lps_change_work);
1846
1847         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1848         while (ppsc->rfchange_inprogress) {
1849                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1850                 if (rf_timeout > 100) {
1851                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1852                         break;
1853                 }
1854                 mdelay(1);
1855                 rf_timeout++;
1856                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1857         }
1858         ppsc->rfchange_inprogress = true;
1859         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1860
1861         rtlpriv->cfg->ops->hw_disable(hw);
1862         /* some things are not needed if firmware not available */
1863         if (!rtlpriv->max_fw_size)
1864                 return;
1865         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1866
1867         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1868         ppsc->rfchange_inprogress = false;
1869         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1870
1871         rtl_pci_enable_aspm(hw);
1872 }
1873
1874 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1875                                   struct ieee80211_hw *hw)
1876 {
1877         struct rtl_priv *rtlpriv = rtl_priv(hw);
1878         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1879         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1880         struct pci_dev *bridge_pdev = pdev->bus->self;
1881         u16 venderid;
1882         u16 deviceid;
1883         u8 revisionid;
1884         u16 irqline;
1885         u8 tmp;
1886
1887         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1888         venderid = pdev->vendor;
1889         deviceid = pdev->device;
1890         pci_read_config_byte(pdev, 0x8, &revisionid);
1891         pci_read_config_word(pdev, 0x3C, &irqline);
1892
1893         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1894          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1895          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1896          * the correct driver is r8192e_pci, thus this routine should
1897          * return false.
1898          */
1899         if (deviceid == RTL_PCI_8192SE_DID &&
1900             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1901                 return false;
1902
1903         if (deviceid == RTL_PCI_8192_DID ||
1904             deviceid == RTL_PCI_0044_DID ||
1905             deviceid == RTL_PCI_0047_DID ||
1906             deviceid == RTL_PCI_8192SE_DID ||
1907             deviceid == RTL_PCI_8174_DID ||
1908             deviceid == RTL_PCI_8173_DID ||
1909             deviceid == RTL_PCI_8172_DID ||
1910             deviceid == RTL_PCI_8171_DID) {
1911                 switch (revisionid) {
1912                 case RTL_PCI_REVISION_ID_8192PCIE:
1913                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1914                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1915                                  venderid, deviceid);
1916                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1917                         return false;
1918                 case RTL_PCI_REVISION_ID_8192SE:
1919                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1920                                  "8192SE is found - vid/did=%x/%x\n",
1921                                  venderid, deviceid);
1922                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1923                         break;
1924                 default:
1925                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1926                                  "Err: Unknown device - vid/did=%x/%x\n",
1927                                  venderid, deviceid);
1928                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1929                         break;
1930                 }
1931         } else if (deviceid == RTL_PCI_8723AE_DID) {
1932                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1933                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1934                          "8723AE PCI-E is found - vid/did=%x/%x\n",
1935                          venderid, deviceid);
1936         } else if (deviceid == RTL_PCI_8192CET_DID ||
1937                    deviceid == RTL_PCI_8192CE_DID ||
1938                    deviceid == RTL_PCI_8191CE_DID ||
1939                    deviceid == RTL_PCI_8188CE_DID) {
1940                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1941                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1942                          "8192C PCI-E is found - vid/did=%x/%x\n",
1943                          venderid, deviceid);
1944         } else if (deviceid == RTL_PCI_8192DE_DID ||
1945                    deviceid == RTL_PCI_8192DE_DID2) {
1946                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1947                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1948                          "8192D PCI-E is found - vid/did=%x/%x\n",
1949                          venderid, deviceid);
1950         } else if (deviceid == RTL_PCI_8188EE_DID) {
1951                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1952                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1953                          "Find adapter, Hardware type is 8188EE\n");
1954         } else if (deviceid == RTL_PCI_8723BE_DID) {
1955                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1956                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1957                          "Find adapter, Hardware type is 8723BE\n");
1958         } else if (deviceid == RTL_PCI_8192EE_DID) {
1959                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1960                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1961                          "Find adapter, Hardware type is 8192EE\n");
1962         } else if (deviceid == RTL_PCI_8821AE_DID) {
1963                 rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1964                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1965                          "Find adapter, Hardware type is 8821AE\n");
1966         } else if (deviceid == RTL_PCI_8812AE_DID) {
1967                 rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1968                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1969                          "Find adapter, Hardware type is 8812AE\n");
1970         } else {
1971                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1972                          "Err: Unknown device - vid/did=%x/%x\n",
1973                          venderid, deviceid);
1974
1975                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1976         }
1977
1978         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1979                 if (revisionid == 0 || revisionid == 1) {
1980                         if (revisionid == 0) {
1981                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1982                                          "Find 92DE MAC0\n");
1983                                 rtlhal->interfaceindex = 0;
1984                         } else if (revisionid == 1) {
1985                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1986                                          "Find 92DE MAC1\n");
1987                                 rtlhal->interfaceindex = 1;
1988                         }
1989                 } else {
1990                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1991                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1992                                  venderid, deviceid, revisionid);
1993                         rtlhal->interfaceindex = 0;
1994                 }
1995         }
1996
1997         switch (rtlhal->hw_type) {
1998         case HARDWARE_TYPE_RTL8192EE:
1999         case HARDWARE_TYPE_RTL8822BE:
2000                 /* use new trx flow */
2001                 rtlpriv->use_new_trx_flow = true;
2002                 break;
2003
2004         default:
2005                 rtlpriv->use_new_trx_flow = false;
2006                 break;
2007         }
2008
2009         /*find bus info */
2010         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2011         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2012         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2013
2014         /*find bridge info */
2015         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2016         /* some ARM have no bridge_pdev and will crash here
2017          * so we should check if bridge_pdev is NULL
2018          */
2019         if (bridge_pdev) {
2020                 /*find bridge info if available */
2021                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2022                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2023                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2024                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2025                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2026                                          "Pci Bridge Vendor is found index: %d\n",
2027                                          tmp);
2028                                 break;
2029                         }
2030                 }
2031         }
2032
2033         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2034                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2035                 pcipriv->ndis_adapter.pcibridge_busnum =
2036                     bridge_pdev->bus->number;
2037                 pcipriv->ndis_adapter.pcibridge_devnum =
2038                     PCI_SLOT(bridge_pdev->devfn);
2039                 pcipriv->ndis_adapter.pcibridge_funcnum =
2040                     PCI_FUNC(bridge_pdev->devfn);
2041                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2042                     pci_pcie_cap(bridge_pdev);
2043                 pcipriv->ndis_adapter.num4bytes =
2044                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2045
2046                 rtl_pci_get_linkcontrol_field(hw);
2047
2048                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2049                     PCI_BRIDGE_VENDOR_AMD) {
2050                         pcipriv->ndis_adapter.amd_l1_patch =
2051                             rtl_pci_get_amd_l1_patch(hw);
2052                 }
2053         }
2054
2055         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2056                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2057                  pcipriv->ndis_adapter.busnumber,
2058                  pcipriv->ndis_adapter.devnumber,
2059                  pcipriv->ndis_adapter.funcnumber,
2060                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2061
2062         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2063                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2064                  pcipriv->ndis_adapter.pcibridge_busnum,
2065                  pcipriv->ndis_adapter.pcibridge_devnum,
2066                  pcipriv->ndis_adapter.pcibridge_funcnum,
2067                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2068                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2069                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2070                  pcipriv->ndis_adapter.amd_l1_patch);
2071
2072         rtl_pci_parse_configuration(pdev, hw);
2073         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2074
2075         return true;
2076 }
2077
2078 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2079 {
2080         struct rtl_priv *rtlpriv = rtl_priv(hw);
2081         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2082         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2083         int ret;
2084
2085         ret = pci_enable_msi(rtlpci->pdev);
2086         if (ret < 0)
2087                 return ret;
2088
2089         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2090                           IRQF_SHARED, KBUILD_MODNAME, hw);
2091         if (ret < 0) {
2092                 pci_disable_msi(rtlpci->pdev);
2093                 return ret;
2094         }
2095
2096         rtlpci->using_msi = true;
2097
2098         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2099                  "MSI Interrupt Mode!\n");
2100         return 0;
2101 }
2102
2103 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2104 {
2105         struct rtl_priv *rtlpriv = rtl_priv(hw);
2106         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2107         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2108         int ret;
2109
2110         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2111                           IRQF_SHARED, KBUILD_MODNAME, hw);
2112         if (ret < 0)
2113                 return ret;
2114
2115         rtlpci->using_msi = false;
2116         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2117                  "Pin-based Interrupt Mode!\n");
2118         return 0;
2119 }
2120
2121 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2122 {
2123         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2124         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2125         int ret;
2126
2127         if (rtlpci->msi_support) {
2128                 ret = rtl_pci_intr_mode_msi(hw);
2129                 if (ret < 0)
2130                         ret = rtl_pci_intr_mode_legacy(hw);
2131         } else {
2132                 ret = rtl_pci_intr_mode_legacy(hw);
2133         }
2134         return ret;
2135 }
2136
2137 static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
2138 {
2139         u8      value;
2140
2141         pci_read_config_byte(pdev, 0x719, &value);
2142
2143         /* 0x719 Bit5 is DMA64 bit fetch. */
2144         if (dma64)
2145                 value |= BIT(5);
2146         else
2147                 value &= ~BIT(5);
2148
2149         pci_write_config_byte(pdev, 0x719, value);
2150 }
2151
2152 int rtl_pci_probe(struct pci_dev *pdev,
2153                   const struct pci_device_id *id)
2154 {
2155         struct ieee80211_hw *hw = NULL;
2156
2157         struct rtl_priv *rtlpriv = NULL;
2158         struct rtl_pci_priv *pcipriv = NULL;
2159         struct rtl_pci *rtlpci;
2160         unsigned long pmem_start, pmem_len, pmem_flags;
2161         int err;
2162
2163         err = pci_enable_device(pdev);
2164         if (err) {
2165                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2166                           pci_name(pdev));
2167                 return err;
2168         }
2169
2170         if (((struct rtl_hal_cfg *)id->driver_data)->mod_params->dma64 &&
2171             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
2172                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
2173                         WARN_ONCE(true,
2174                                   "Unable to obtain 64bit DMA for consistent allocations\n");
2175                         err = -ENOMEM;
2176                         goto fail1;
2177                 }
2178
2179                 platform_enable_dma64(pdev, true);
2180         } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2181                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2182                         WARN_ONCE(true,
2183                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2184                         err = -ENOMEM;
2185                         goto fail1;
2186                 }
2187
2188                 platform_enable_dma64(pdev, false);
2189         }
2190
2191         pci_set_master(pdev);
2192
2193         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2194                                 sizeof(struct rtl_priv), &rtl_ops);
2195         if (!hw) {
2196                 WARN_ONCE(true,
2197                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2198                 err = -ENOMEM;
2199                 goto fail1;
2200         }
2201
2202         SET_IEEE80211_DEV(hw, &pdev->dev);
2203         pci_set_drvdata(pdev, hw);
2204
2205         rtlpriv = hw->priv;
2206         rtlpriv->hw = hw;
2207         pcipriv = (void *)rtlpriv->priv;
2208         pcipriv->dev.pdev = pdev;
2209         init_completion(&rtlpriv->firmware_loading_complete);
2210         /*proximity init here*/
2211         rtlpriv->proximity.proxim_on = false;
2212
2213         pcipriv = (void *)rtlpriv->priv;
2214         pcipriv->dev.pdev = pdev;
2215
2216         /* init cfg & intf_ops */
2217         rtlpriv->rtlhal.interface = INTF_PCI;
2218         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2219         rtlpriv->intf_ops = &rtl_pci_ops;
2220         rtlpriv->glb_var = &rtl_global_var;
2221
2222         /* MEM map */
2223         err = pci_request_regions(pdev, KBUILD_MODNAME);
2224         if (err) {
2225                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2226                 goto fail1;
2227         }
2228
2229         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2230         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2231         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2232
2233         /*shared mem start */
2234         rtlpriv->io.pci_mem_start =
2235                         (unsigned long)pci_iomap(pdev,
2236                         rtlpriv->cfg->bar_id, pmem_len);
2237         if (rtlpriv->io.pci_mem_start == 0) {
2238                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2239                 err = -ENOMEM;
2240                 goto fail2;
2241         }
2242
2243         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2244                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2245                  pmem_start, pmem_len, pmem_flags,
2246                  rtlpriv->io.pci_mem_start);
2247
2248         /* Disable Clk Request */
2249         pci_write_config_byte(pdev, 0x81, 0);
2250         /* leave D3 mode */
2251         pci_write_config_byte(pdev, 0x44, 0);
2252         pci_write_config_byte(pdev, 0x04, 0x06);
2253         pci_write_config_byte(pdev, 0x04, 0x07);
2254
2255         /* find adapter */
2256         if (!_rtl_pci_find_adapter(pdev, hw)) {
2257                 err = -ENODEV;
2258                 goto fail2;
2259         }
2260
2261         /* Init IO handler */
2262         _rtl_pci_io_handler_init(&pdev->dev, hw);
2263
2264         /*like read eeprom and so on */
2265         rtlpriv->cfg->ops->read_eeprom_info(hw);
2266
2267         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2268                 pr_err("Can't init_sw_vars\n");
2269                 err = -ENODEV;
2270                 goto fail3;
2271         }
2272         rtlpriv->cfg->ops->init_sw_leds(hw);
2273
2274         /*aspm */
2275         rtl_pci_init_aspm(hw);
2276
2277         /* Init mac80211 sw */
2278         err = rtl_init_core(hw);
2279         if (err) {
2280                 pr_err("Can't allocate sw for mac80211\n");
2281                 goto fail3;
2282         }
2283
2284         /* Init PCI sw */
2285         err = rtl_pci_init(hw, pdev);
2286         if (err) {
2287                 pr_err("Failed to init PCI\n");
2288                 goto fail3;
2289         }
2290
2291         err = ieee80211_register_hw(hw);
2292         if (err) {
2293                 pr_err("Can't register mac80211 hw.\n");
2294                 err = -ENODEV;
2295                 goto fail3;
2296         }
2297         rtlpriv->mac80211.mac80211_registered = 1;
2298
2299         /*init rfkill */
2300         rtl_init_rfkill(hw);    /* Init PCI sw */
2301
2302         rtlpci = rtl_pcidev(pcipriv);
2303         err = rtl_pci_intr_mode_decide(hw);
2304         if (err) {
2305                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2306                          "%s: failed to register IRQ handler\n",
2307                          wiphy_name(hw->wiphy));
2308                 goto fail3;
2309         }
2310         rtlpci->irq_alloc = 1;
2311
2312         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2313         return 0;
2314
2315 fail3:
2316         pci_set_drvdata(pdev, NULL);
2317         rtl_deinit_core(hw);
2318
2319 fail2:
2320         if (rtlpriv->io.pci_mem_start != 0)
2321                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2322
2323         pci_release_regions(pdev);
2324         complete(&rtlpriv->firmware_loading_complete);
2325
2326 fail1:
2327         if (hw)
2328                 ieee80211_free_hw(hw);
2329         pci_disable_device(pdev);
2330
2331         return err;
2332 }
2333 EXPORT_SYMBOL(rtl_pci_probe);
2334
2335 void rtl_pci_disconnect(struct pci_dev *pdev)
2336 {
2337         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2338         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2339         struct rtl_priv *rtlpriv = rtl_priv(hw);
2340         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2341         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2342
2343         /* just in case driver is removed before firmware callback */
2344         wait_for_completion(&rtlpriv->firmware_loading_complete);
2345         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2346
2347         /*ieee80211_unregister_hw will call ops_stop */
2348         if (rtlmac->mac80211_registered == 1) {
2349                 ieee80211_unregister_hw(hw);
2350                 rtlmac->mac80211_registered = 0;
2351         } else {
2352                 rtl_deinit_deferred_work(hw);
2353                 rtlpriv->intf_ops->adapter_stop(hw);
2354         }
2355         rtlpriv->cfg->ops->disable_interrupt(hw);
2356
2357         /*deinit rfkill */
2358         rtl_deinit_rfkill(hw);
2359
2360         rtl_pci_deinit(hw);
2361         rtl_deinit_core(hw);
2362         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2363
2364         if (rtlpci->irq_alloc) {
2365                 free_irq(rtlpci->pdev->irq, hw);
2366                 rtlpci->irq_alloc = 0;
2367         }
2368
2369         if (rtlpci->using_msi)
2370                 pci_disable_msi(rtlpci->pdev);
2371
2372         list_del(&rtlpriv->list);
2373         if (rtlpriv->io.pci_mem_start != 0) {
2374                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2375                 pci_release_regions(pdev);
2376         }
2377
2378         pci_disable_device(pdev);
2379
2380         rtl_pci_disable_aspm(hw);
2381
2382         pci_set_drvdata(pdev, NULL);
2383
2384         ieee80211_free_hw(hw);
2385 }
2386 EXPORT_SYMBOL(rtl_pci_disconnect);
2387
2388 #ifdef CONFIG_PM_SLEEP
2389 /***************************************
2390  * kernel pci power state define:
2391  * PCI_D0         ((pci_power_t __force) 0)
2392  * PCI_D1         ((pci_power_t __force) 1)
2393  * PCI_D2         ((pci_power_t __force) 2)
2394  * PCI_D3hot      ((pci_power_t __force) 3)
2395  * PCI_D3cold     ((pci_power_t __force) 4)
2396  * PCI_UNKNOWN    ((pci_power_t __force) 5)
2397
2398  * This function is called when system
2399  * goes into suspend state mac80211 will
2400  * call rtl_mac_stop() from the mac80211
2401  * suspend function first, So there is
2402  * no need to call hw_disable here.
2403  ****************************************/
2404 int rtl_pci_suspend(struct device *dev)
2405 {
2406         struct pci_dev *pdev = to_pci_dev(dev);
2407         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2408         struct rtl_priv *rtlpriv = rtl_priv(hw);
2409
2410         rtlpriv->cfg->ops->hw_suspend(hw);
2411         rtl_deinit_rfkill(hw);
2412
2413         return 0;
2414 }
2415 EXPORT_SYMBOL(rtl_pci_suspend);
2416
2417 int rtl_pci_resume(struct device *dev)
2418 {
2419         struct pci_dev *pdev = to_pci_dev(dev);
2420         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2421         struct rtl_priv *rtlpriv = rtl_priv(hw);
2422
2423         rtlpriv->cfg->ops->hw_resume(hw);
2424         rtl_init_rfkill(hw);
2425         return 0;
2426 }
2427 EXPORT_SYMBOL(rtl_pci_resume);
2428 #endif /* CONFIG_PM_SLEEP */
2429
2430 const struct rtl_intf_ops rtl_pci_ops = {
2431         .read_efuse_byte = read_efuse_byte,
2432         .adapter_start = rtl_pci_start,
2433         .adapter_stop = rtl_pci_stop,
2434         .check_buddy_priv = rtl_pci_check_buddy_priv,
2435         .adapter_tx = rtl_pci_tx,
2436         .flush = rtl_pci_flush,
2437         .reset_trx_ring = rtl_pci_reset_trx_ring,
2438         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2439
2440         .disable_aspm = rtl_pci_disable_aspm,
2441         .enable_aspm = rtl_pci_enable_aspm,
2442 };