2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
5 <http://rt2x00.serialmonkey.com>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, see <http://www.gnu.org/licenses/>.
23 Abstract: rt2x00 queue specific routines.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/dma-mapping.h>
32 #include "rt2x00lib.h"
34 struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
36 struct data_queue *queue = entry->queue;
37 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
39 struct skb_frame_desc *skbdesc;
40 unsigned int frame_size;
41 unsigned int head_size = 0;
42 unsigned int tail_size = 0;
45 * The frame size includes descriptor size, because the
46 * hardware directly receive the frame into the skbuffer.
48 frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
51 * The payload should be aligned to a 4-byte boundary,
52 * this means we need at least 3 bytes for moving the frame
53 * into the correct offset.
58 * For IV/EIV/ICV assembly we must make sure there is
59 * at least 8 bytes bytes available in headroom for IV/EIV
60 * and 8 bytes for ICV data as tailroon.
62 if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
70 skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
78 skb_reserve(skb, head_size);
79 skb_put(skb, frame_size);
84 skbdesc = get_skb_frame_desc(skb);
85 memset(skbdesc, 0, sizeof(*skbdesc));
87 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
90 skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
92 if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
93 dev_kfree_skb_any(skb);
97 skbdesc->skb_dma = skb_dma;
98 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
104 int rt2x00queue_map_txskb(struct queue_entry *entry)
106 struct device *dev = entry->queue->rt2x00dev->dev;
107 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
110 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
112 if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
115 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
118 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
120 void rt2x00queue_unmap_skb(struct queue_entry *entry)
122 struct device *dev = entry->queue->rt2x00dev->dev;
123 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
125 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
126 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
128 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
129 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
130 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
132 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
135 EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
137 void rt2x00queue_free_skb(struct queue_entry *entry)
142 rt2x00queue_unmap_skb(entry);
143 dev_kfree_skb_any(entry->skb);
147 void rt2x00queue_align_frame(struct sk_buff *skb)
149 unsigned int frame_length = skb->len;
150 unsigned int align = ALIGN_SIZE(skb, 0);
155 skb_push(skb, align);
156 memmove(skb->data, skb->data + align, frame_length);
157 skb_trim(skb, frame_length);
161 * H/W needs L2 padding between the header and the paylod if header size
162 * is not 4 bytes aligned.
164 void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
166 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
171 skb_push(skb, l2pad);
172 memmove(skb->data, skb->data + l2pad, hdr_len);
175 void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
177 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
182 memmove(skb->data + l2pad, skb->data, hdr_len);
183 skb_pull(skb, l2pad);
186 static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
188 struct txentry_desc *txdesc)
190 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
191 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
192 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
195 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
198 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
200 if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
202 * rt2800 has a H/W (or F/W) bug, device incorrectly increase
203 * seqno on retransmited data (non-QOS) frames. To workaround
204 * the problem let's generate seqno in software if QOS is
207 if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
208 __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
210 /* H/W will generate sequence number */
215 * The hardware is not able to insert a sequence number. Assign a
216 * software generated one here.
218 * This is wrong because beacons are not getting sequence
219 * numbers assigned properly.
221 * A secondary problem exists for drivers that cannot toggle
222 * sequence counting per-frame, since those will override the
223 * sequence counter given by mac80211.
225 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
226 seqno = atomic_add_return(0x10, &intf->seqno);
228 seqno = atomic_read(&intf->seqno);
230 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
231 hdr->seq_ctrl |= cpu_to_le16(seqno);
234 static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
236 struct txentry_desc *txdesc,
237 const struct rt2x00_rate *hwrate)
239 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
240 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
241 unsigned int data_length;
242 unsigned int duration;
243 unsigned int residual;
246 * Determine with what IFS priority this frame should be send.
247 * Set ifs to IFS_SIFS when the this is not the first fragment,
248 * or this fragment came after RTS/CTS.
250 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
251 txdesc->u.plcp.ifs = IFS_BACKOFF;
253 txdesc->u.plcp.ifs = IFS_SIFS;
255 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
256 data_length = skb->len + 4;
257 data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
261 * Length calculation depends on OFDM/CCK rate.
263 txdesc->u.plcp.signal = hwrate->plcp;
264 txdesc->u.plcp.service = 0x04;
266 if (hwrate->flags & DEV_RATE_OFDM) {
267 txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
268 txdesc->u.plcp.length_low = data_length & 0x3f;
271 * Convert length to microseconds.
273 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
274 duration = GET_DURATION(data_length, hwrate->bitrate);
280 * Check if we need to set the Length Extension
282 if (hwrate->bitrate == 110 && residual <= 30)
283 txdesc->u.plcp.service |= 0x80;
286 txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
287 txdesc->u.plcp.length_low = duration & 0xff;
290 * When preamble is enabled we should set the
291 * preamble bit for the signal.
293 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
294 txdesc->u.plcp.signal |= 0x08;
298 static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
300 struct txentry_desc *txdesc,
301 struct ieee80211_sta *sta,
302 const struct rt2x00_rate *hwrate)
304 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
305 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
306 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
307 struct rt2x00_sta *sta_priv = NULL;
311 sta_priv = sta_to_rt2x00_sta(sta);
312 txdesc->u.ht.wcid = sta_priv->wcid;
313 density = sta->ht_cap.ampdu_density;
317 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
318 * mcs rate to be used
320 if (txrate->flags & IEEE80211_TX_RC_MCS) {
321 txdesc->u.ht.mcs = txrate->idx;
324 * MIMO PS should be set to 1 for STA's using dynamic SM PS
325 * when using more then one tx stream (>MCS7).
327 if (sta && txdesc->u.ht.mcs > 7 &&
328 sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
329 __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
331 txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
332 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
333 txdesc->u.ht.mcs |= 0x08;
336 if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
337 if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
338 txdesc->u.ht.txop = TXOP_SIFS;
340 txdesc->u.ht.txop = TXOP_BACKOFF;
342 /* Left zero on all other settings. */
347 * Only one STBC stream is supported for now.
349 if (tx_info->flags & IEEE80211_TX_CTL_STBC)
350 txdesc->u.ht.stbc = 1;
353 * This frame is eligible for an AMPDU, however, don't aggregate
354 * frames that are intended to probe a specific tx rate.
356 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
357 !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
358 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
359 txdesc->u.ht.mpdu_density = density;
360 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
364 * Set 40Mhz mode if necessary (for legacy rates this will
365 * duplicate the frame to both channels).
367 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
368 txrate->flags & IEEE80211_TX_RC_DUP_DATA)
369 __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
370 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
371 __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
374 * Determine IFS values
375 * - Use TXOP_BACKOFF for probe and management frames except beacons
376 * - Use TXOP_SIFS for fragment bursts
377 * - Use TXOP_HTTXOP for everything else
379 * Note: rt2800 devices won't use CTS protection (if used)
380 * for frames not transmitted with TXOP_HTTXOP
382 if ((ieee80211_is_mgmt(hdr->frame_control) &&
383 !ieee80211_is_beacon(hdr->frame_control)) ||
384 (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
385 txdesc->u.ht.txop = TXOP_BACKOFF;
386 else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
387 txdesc->u.ht.txop = TXOP_SIFS;
389 txdesc->u.ht.txop = TXOP_HTTXOP;
392 static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
394 struct txentry_desc *txdesc,
395 struct ieee80211_sta *sta)
397 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
398 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
399 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
400 struct ieee80211_rate *rate;
401 const struct rt2x00_rate *hwrate = NULL;
403 memset(txdesc, 0, sizeof(*txdesc));
406 * Header and frame information.
408 txdesc->length = skb->len;
409 txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
412 * Check whether this frame is to be acked.
414 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
415 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
418 * Check if this is a RTS/CTS frame
420 if (ieee80211_is_rts(hdr->frame_control) ||
421 ieee80211_is_cts(hdr->frame_control)) {
422 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
423 if (ieee80211_is_rts(hdr->frame_control))
424 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
426 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
427 if (tx_info->control.rts_cts_rate_idx >= 0)
429 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
433 * Determine retry information.
435 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
436 if (txdesc->retry_limit >= rt2x00dev->long_retry)
437 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
440 * Check if more fragments are pending
442 if (ieee80211_has_morefrags(hdr->frame_control)) {
443 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
444 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
448 * Check if more frames (!= fragments) are pending
450 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
451 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
454 * Beacons and probe responses require the tsf timestamp
455 * to be inserted into the frame.
457 if (ieee80211_is_beacon(hdr->frame_control) ||
458 ieee80211_is_probe_resp(hdr->frame_control))
459 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
461 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
462 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
463 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
466 * Determine rate modulation.
468 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
469 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
470 else if (txrate->flags & IEEE80211_TX_RC_MCS)
471 txdesc->rate_mode = RATE_MODE_HT_MIX;
473 rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
474 hwrate = rt2x00_get_rate(rate->hw_value);
475 if (hwrate->flags & DEV_RATE_OFDM)
476 txdesc->rate_mode = RATE_MODE_OFDM;
478 txdesc->rate_mode = RATE_MODE_CCK;
482 * Apply TX descriptor handling by components
484 rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
485 rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
487 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
488 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
491 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
495 static int rt2x00queue_write_tx_data(struct queue_entry *entry,
496 struct txentry_desc *txdesc)
498 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
501 * This should not happen, we already checked the entry
502 * was ours. When the hardware disagrees there has been
503 * a queue corruption!
505 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
506 rt2x00dev->ops->lib->get_entry_state(entry))) {
507 rt2x00_err(rt2x00dev,
508 "Corrupt queue %d, accessing entry which is not ours\n"
509 "Please file bug report to %s\n",
510 entry->queue->qid, DRV_PROJECT);
515 * Add the requested extra tx headroom in front of the skb.
517 skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
518 memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
521 * Call the driver's write_tx_data function, if it exists.
523 if (rt2x00dev->ops->lib->write_tx_data)
524 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
527 * Map the skb to DMA.
529 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
530 rt2x00queue_map_txskb(entry))
536 static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
537 struct txentry_desc *txdesc)
539 struct data_queue *queue = entry->queue;
541 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
544 * All processing on the frame has been completed, this means
545 * it is now ready to be dumped to userspace through debugfs.
547 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
550 static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
551 struct txentry_desc *txdesc)
554 * Check if we need to kick the queue, there are however a few rules
555 * 1) Don't kick unless this is the last in frame in a burst.
556 * When the burst flag is set, this frame is always followed
557 * by another frame which in some way are related to eachother.
558 * This is true for fragments, RTS or CTS-to-self frames.
559 * 2) Rule 1 can be broken when the available entries
560 * in the queue are less then a certain threshold.
562 if (rt2x00queue_threshold(queue) ||
563 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
564 queue->rt2x00dev->ops->lib->kick_queue(queue);
567 static void rt2x00queue_bar_check(struct queue_entry *entry)
569 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
570 struct ieee80211_bar *bar = (void *) (entry->skb->data +
571 rt2x00dev->extra_tx_headroom);
572 struct rt2x00_bar_list_entry *bar_entry;
574 if (likely(!ieee80211_is_back_req(bar->frame_control)))
577 bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
580 * If the alloc fails we still send the BAR out but just don't track
581 * it in our bar list. And as a result we will report it to mac80211
587 bar_entry->entry = entry;
588 bar_entry->block_acked = 0;
591 * Copy the relevant parts of the 802.11 BAR into out check list
592 * such that we can use RCU for less-overhead in the RX path since
593 * sending BARs and processing the according BlockAck should be
596 memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
597 memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
598 bar_entry->control = bar->control;
599 bar_entry->start_seq_num = bar->start_seq_num;
602 * Insert BAR into our BAR check list.
604 spin_lock_bh(&rt2x00dev->bar_list_lock);
605 list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
606 spin_unlock_bh(&rt2x00dev->bar_list_lock);
609 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
610 struct ieee80211_sta *sta, bool local)
612 struct ieee80211_tx_info *tx_info;
613 struct queue_entry *entry;
614 struct txentry_desc txdesc;
615 struct skb_frame_desc *skbdesc;
616 u8 rate_idx, rate_flags;
620 * Copy all TX descriptor information into txdesc,
621 * after that we are free to use the skb->cb array
622 * for our information.
624 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
627 * All information is retrieved from the skb->cb array,
628 * now we should claim ownership of the driver part of that
629 * array, preserving the bitrate index and flags.
631 tx_info = IEEE80211_SKB_CB(skb);
632 rate_idx = tx_info->control.rates[0].idx;
633 rate_flags = tx_info->control.rates[0].flags;
634 skbdesc = get_skb_frame_desc(skb);
635 memset(skbdesc, 0, sizeof(*skbdesc));
636 skbdesc->tx_rate_idx = rate_idx;
637 skbdesc->tx_rate_flags = rate_flags;
640 skbdesc->flags |= SKBDESC_NOT_MAC80211;
643 * When hardware encryption is supported, and this frame
644 * is to be encrypted, we should strip the IV/EIV data from
645 * the frame so we can provide it to the driver separately.
647 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
648 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
649 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
650 rt2x00crypto_tx_copy_iv(skb, &txdesc);
652 rt2x00crypto_tx_remove_iv(skb, &txdesc);
656 * When DMA allocation is required we should guarantee to the
657 * driver that the DMA is aligned to a 4-byte boundary.
658 * However some drivers require L2 padding to pad the payload
659 * rather then the header. This could be a requirement for
660 * PCI and USB devices, while header alignment only is valid
663 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
664 rt2x00queue_insert_l2pad(skb, txdesc.header_length);
665 else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
666 rt2x00queue_align_frame(skb);
669 * That function must be called with bh disabled.
671 spin_lock(&queue->tx_lock);
673 if (unlikely(rt2x00queue_full(queue))) {
674 rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
680 entry = rt2x00queue_get_entry(queue, Q_INDEX);
682 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
684 rt2x00_err(queue->rt2x00dev,
685 "Arrived at non-free entry in the non-full queue %d\n"
686 "Please file bug report to %s\n",
687 queue->qid, DRV_PROJECT);
695 * It could be possible that the queue was corrupted and this
696 * call failed. Since we always return NETDEV_TX_OK to mac80211,
697 * this frame will simply be dropped.
699 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
700 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
707 * Put BlockAckReqs into our check list for driver BA processing.
709 rt2x00queue_bar_check(entry);
711 set_bit(ENTRY_DATA_PENDING, &entry->flags);
713 rt2x00queue_index_inc(entry, Q_INDEX);
714 rt2x00queue_write_tx_descriptor(entry, &txdesc);
715 rt2x00queue_kick_tx_queue(queue, &txdesc);
718 spin_unlock(&queue->tx_lock);
722 int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
723 struct ieee80211_vif *vif)
725 struct rt2x00_intf *intf = vif_to_intf(vif);
727 if (unlikely(!intf->beacon))
731 * Clean up the beacon skb.
733 rt2x00queue_free_skb(intf->beacon);
736 * Clear beacon (single bssid devices don't need to clear the beacon
737 * since the beacon queue will get stopped anyway).
739 if (rt2x00dev->ops->lib->clear_beacon)
740 rt2x00dev->ops->lib->clear_beacon(intf->beacon);
745 int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
746 struct ieee80211_vif *vif)
748 struct rt2x00_intf *intf = vif_to_intf(vif);
749 struct skb_frame_desc *skbdesc;
750 struct txentry_desc txdesc;
752 if (unlikely(!intf->beacon))
756 * Clean up the beacon skb.
758 rt2x00queue_free_skb(intf->beacon);
760 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
761 if (!intf->beacon->skb)
765 * Copy all TX descriptor information into txdesc,
766 * after that we are free to use the skb->cb array
767 * for our information.
769 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
772 * Fill in skb descriptor
774 skbdesc = get_skb_frame_desc(intf->beacon->skb);
775 memset(skbdesc, 0, sizeof(*skbdesc));
778 * Send beacon to hardware.
780 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
786 bool rt2x00queue_for_each_entry(struct data_queue *queue,
787 enum queue_index start,
788 enum queue_index end,
790 bool (*fn)(struct queue_entry *entry,
793 unsigned long irqflags;
794 unsigned int index_start;
795 unsigned int index_end;
798 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
799 rt2x00_err(queue->rt2x00dev,
800 "Entry requested from invalid index range (%d - %d)\n",
806 * Only protect the range we are going to loop over,
807 * if during our loop a extra entry is set to pending
808 * it should not be kicked during this run, since it
809 * is part of another TX operation.
811 spin_lock_irqsave(&queue->index_lock, irqflags);
812 index_start = queue->index[start];
813 index_end = queue->index[end];
814 spin_unlock_irqrestore(&queue->index_lock, irqflags);
817 * Start from the TX done pointer, this guarantees that we will
818 * send out all frames in the correct order.
820 if (index_start < index_end) {
821 for (i = index_start; i < index_end; i++) {
822 if (fn(&queue->entries[i], data))
826 for (i = index_start; i < queue->limit; i++) {
827 if (fn(&queue->entries[i], data))
831 for (i = 0; i < index_end; i++) {
832 if (fn(&queue->entries[i], data))
839 EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
841 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
842 enum queue_index index)
844 struct queue_entry *entry;
845 unsigned long irqflags;
847 if (unlikely(index >= Q_INDEX_MAX)) {
848 rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
853 spin_lock_irqsave(&queue->index_lock, irqflags);
855 entry = &queue->entries[queue->index[index]];
857 spin_unlock_irqrestore(&queue->index_lock, irqflags);
861 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
863 void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
865 struct data_queue *queue = entry->queue;
866 unsigned long irqflags;
868 if (unlikely(index >= Q_INDEX_MAX)) {
869 rt2x00_err(queue->rt2x00dev,
870 "Index change on invalid index type (%d)\n", index);
874 spin_lock_irqsave(&queue->index_lock, irqflags);
876 queue->index[index]++;
877 if (queue->index[index] >= queue->limit)
878 queue->index[index] = 0;
880 entry->last_action = jiffies;
882 if (index == Q_INDEX) {
884 } else if (index == Q_INDEX_DONE) {
889 spin_unlock_irqrestore(&queue->index_lock, irqflags);
892 static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
894 switch (queue->qid) {
900 * For TX queues, we have to disable the queue
903 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
909 void rt2x00queue_pause_queue(struct data_queue *queue)
911 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
912 !test_bit(QUEUE_STARTED, &queue->flags) ||
913 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
916 rt2x00queue_pause_queue_nocheck(queue);
918 EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
920 void rt2x00queue_unpause_queue(struct data_queue *queue)
922 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
923 !test_bit(QUEUE_STARTED, &queue->flags) ||
924 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
927 switch (queue->qid) {
933 * For TX queues, we have to enable the queue
936 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
940 * For RX we need to kick the queue now in order to
943 queue->rt2x00dev->ops->lib->kick_queue(queue);
948 EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
950 void rt2x00queue_start_queue(struct data_queue *queue)
952 mutex_lock(&queue->status_lock);
954 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
955 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
956 mutex_unlock(&queue->status_lock);
960 set_bit(QUEUE_PAUSED, &queue->flags);
962 queue->rt2x00dev->ops->lib->start_queue(queue);
964 rt2x00queue_unpause_queue(queue);
966 mutex_unlock(&queue->status_lock);
968 EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
970 void rt2x00queue_stop_queue(struct data_queue *queue)
972 mutex_lock(&queue->status_lock);
974 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
975 mutex_unlock(&queue->status_lock);
979 rt2x00queue_pause_queue_nocheck(queue);
981 queue->rt2x00dev->ops->lib->stop_queue(queue);
983 mutex_unlock(&queue->status_lock);
985 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
987 void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
990 (queue->qid == QID_AC_VO) ||
991 (queue->qid == QID_AC_VI) ||
992 (queue->qid == QID_AC_BE) ||
993 (queue->qid == QID_AC_BK);
997 * If we are not supposed to drop any pending
998 * frames, this means we must force a start (=kick)
999 * to the queue to make sure the hardware will
1000 * start transmitting.
1002 if (!drop && tx_queue)
1003 queue->rt2x00dev->ops->lib->kick_queue(queue);
1006 * Check if driver supports flushing, if that is the case we can
1007 * defer the flushing to the driver. Otherwise we must use the
1008 * alternative which just waits for the queue to become empty.
1010 if (likely(queue->rt2x00dev->ops->lib->flush_queue))
1011 queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
1014 * The queue flush has failed...
1016 if (unlikely(!rt2x00queue_empty(queue)))
1017 rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
1020 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
1022 void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
1024 struct data_queue *queue;
1027 * rt2x00queue_start_queue will call ieee80211_wake_queue
1028 * for each queue after is has been properly initialized.
1030 tx_queue_for_each(rt2x00dev, queue)
1031 rt2x00queue_start_queue(queue);
1033 rt2x00queue_start_queue(rt2x00dev->rx);
1035 EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
1037 void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
1039 struct data_queue *queue;
1042 * rt2x00queue_stop_queue will call ieee80211_stop_queue
1043 * as well, but we are completely shutting doing everything
1044 * now, so it is much safer to stop all TX queues at once,
1045 * and use rt2x00queue_stop_queue for cleaning up.
1047 ieee80211_stop_queues(rt2x00dev->hw);
1049 tx_queue_for_each(rt2x00dev, queue)
1050 rt2x00queue_stop_queue(queue);
1052 rt2x00queue_stop_queue(rt2x00dev->rx);
1054 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
1056 void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
1058 struct data_queue *queue;
1060 tx_queue_for_each(rt2x00dev, queue)
1061 rt2x00queue_flush_queue(queue, drop);
1063 rt2x00queue_flush_queue(rt2x00dev->rx, drop);
1065 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
1067 static void rt2x00queue_reset(struct data_queue *queue)
1069 unsigned long irqflags;
1072 spin_lock_irqsave(&queue->index_lock, irqflags);
1077 for (i = 0; i < Q_INDEX_MAX; i++)
1078 queue->index[i] = 0;
1080 spin_unlock_irqrestore(&queue->index_lock, irqflags);
1083 void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
1085 struct data_queue *queue;
1088 queue_for_each(rt2x00dev, queue) {
1089 rt2x00queue_reset(queue);
1091 for (i = 0; i < queue->limit; i++)
1092 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
1096 static int rt2x00queue_alloc_entries(struct data_queue *queue)
1098 struct queue_entry *entries;
1099 unsigned int entry_size;
1102 rt2x00queue_reset(queue);
1105 * Allocate all queue entries.
1107 entry_size = sizeof(*entries) + queue->priv_size;
1108 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
1112 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
1113 (((char *)(__base)) + ((__limit) * (__esize)) + \
1114 ((__index) * (__psize)))
1116 for (i = 0; i < queue->limit; i++) {
1117 entries[i].flags = 0;
1118 entries[i].queue = queue;
1119 entries[i].skb = NULL;
1120 entries[i].entry_idx = i;
1121 entries[i].priv_data =
1122 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1123 sizeof(*entries), queue->priv_size);
1126 #undef QUEUE_ENTRY_PRIV_OFFSET
1128 queue->entries = entries;
1133 static void rt2x00queue_free_skbs(struct data_queue *queue)
1137 if (!queue->entries)
1140 for (i = 0; i < queue->limit; i++) {
1141 rt2x00queue_free_skb(&queue->entries[i]);
1145 static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
1148 struct sk_buff *skb;
1150 for (i = 0; i < queue->limit; i++) {
1151 skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
1154 queue->entries[i].skb = skb;
1160 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1162 struct data_queue *queue;
1165 status = rt2x00queue_alloc_entries(rt2x00dev->rx);
1169 tx_queue_for_each(rt2x00dev, queue) {
1170 status = rt2x00queue_alloc_entries(queue);
1175 status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
1179 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
1180 status = rt2x00queue_alloc_entries(rt2x00dev->atim);
1185 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
1192 rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
1194 rt2x00queue_uninitialize(rt2x00dev);
1199 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1201 struct data_queue *queue;
1203 rt2x00queue_free_skbs(rt2x00dev->rx);
1205 queue_for_each(rt2x00dev, queue) {
1206 kfree(queue->entries);
1207 queue->entries = NULL;
1211 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1212 struct data_queue *queue, enum data_queue_qid qid)
1214 mutex_init(&queue->status_lock);
1215 spin_lock_init(&queue->tx_lock);
1216 spin_lock_init(&queue->index_lock);
1218 queue->rt2x00dev = rt2x00dev;
1225 rt2x00dev->ops->queue_init(queue);
1227 queue->threshold = DIV_ROUND_UP(queue->limit, 10);
1230 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1232 struct data_queue *queue;
1233 enum data_queue_qid qid;
1234 unsigned int req_atim =
1235 rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
1238 * We need the following queues:
1240 * TX: ops->tx_queues
1242 * Atim: 1 (if required)
1244 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
1246 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
1248 rt2x00_err(rt2x00dev, "Queue allocation failed\n");
1253 * Initialize pointers
1255 rt2x00dev->rx = queue;
1256 rt2x00dev->tx = &queue[1];
1257 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
1258 rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
1261 * Initialize queue parameters.
1263 * TX: qid = QID_AC_VO + index
1264 * TX: cw_min: 2^5 = 32.
1265 * TX: cw_max: 2^10 = 1024.
1266 * BCN: qid = QID_BEACON
1267 * ATIM: qid = QID_ATIM
1269 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
1272 tx_queue_for_each(rt2x00dev, queue)
1273 rt2x00queue_init(rt2x00dev, queue, qid++);
1275 rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
1277 rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
1282 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1284 kfree(rt2x00dev->rx);
1285 rt2x00dev->rx = NULL;
1286 rt2x00dev->tx = NULL;
1287 rt2x00dev->bcn = NULL;