2 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
5 * This driver is a port from stlc45xx:
6 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
34 #include "p54spi_eeprom.h"
37 #include "p54common.h"
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
43 * gpios should be handled in board files and provided via platform data,
44 * but because it's currently impossible for p54spi to have a header file
45 * in include/linux, let's use module paramaters for now
48 static int p54spi_gpio_power = 97;
49 module_param(p54spi_gpio_power, int, 0444);
50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
52 static int p54spi_gpio_irq = 87;
53 module_param(p54spi_gpio_irq, int, 0444);
54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
57 void *buf, size_t len)
59 struct spi_transfer t[2];
63 /* We first push the address */
64 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
67 memset(t, 0, sizeof(t));
70 t[0].len = sizeof(addr);
71 spi_message_add_tail(&t[0], &m);
75 spi_message_add_tail(&t[1], &m);
77 spi_sync(priv->spi, &m);
81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
82 const void *buf, size_t len)
84 struct spi_transfer t[3];
88 /* We first push the address */
89 addr = cpu_to_le16(address << 8);
92 memset(t, 0, sizeof(t));
95 t[0].len = sizeof(addr);
96 spi_message_add_tail(&t[0], &m);
100 spi_message_add_tail(&t[1], &m);
104 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
106 t[2].tx_buf = &last_word;
107 t[2].len = sizeof(last_word);
108 spi_message_add_tail(&t[2], &m);
111 spi_sync(priv->spi, &m);
114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
118 p54spi_spi_read(priv, addr, &val, sizeof(val));
120 return le16_to_cpu(val);
123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
127 p54spi_spi_read(priv, addr, &val, sizeof(val));
129 return le32_to_cpu(val);
132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
134 p54spi_spi_write(priv, addr, &val, sizeof(val));
137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
139 p54spi_spi_write(priv, addr, &val, sizeof(val));
142 struct p54spi_spi_reg {
143 u16 address; /* __le16 ? */
148 static const struct p54spi_spi_reg p54spi_registers_array[] =
150 { SPI_ADRS_ARM_INTERRUPTS, 32, "ARM_INT " },
151 { SPI_ADRS_ARM_INT_EN, 32, "ARM_INT_ENA " },
152 { SPI_ADRS_HOST_INTERRUPTS, 32, "HOST_INT " },
153 { SPI_ADRS_HOST_INT_EN, 32, "HOST_INT_ENA" },
154 { SPI_ADRS_HOST_INT_ACK, 32, "HOST_INT_ACK" },
155 { SPI_ADRS_GEN_PURP_1, 32, "GP1_COMM " },
156 { SPI_ADRS_GEN_PURP_2, 32, "GP2_COMM " },
157 { SPI_ADRS_DEV_CTRL_STAT, 32, "DEV_CTRL_STA" },
158 { SPI_ADRS_DMA_DATA, 16, "DMA_DATA " },
159 { SPI_ADRS_DMA_WRITE_CTRL, 16, "DMA_WR_CTRL " },
160 { SPI_ADRS_DMA_WRITE_LEN, 16, "DMA_WR_LEN " },
161 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_WR_BASE " },
162 { SPI_ADRS_DMA_READ_CTRL, 16, "DMA_RD_CTRL " },
163 { SPI_ADRS_DMA_READ_LEN, 16, "DMA_RD_LEN " },
164 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_RD_BASE " }
167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
172 for (i = 0; i < 2000; i++) {
173 p54spi_spi_read(priv, reg, &buffer, sizeof(buffer));
174 if ((buffer & bits) == bits)
182 static int p54spi_request_firmware(struct ieee80211_hw *dev)
184 struct p54s_priv *priv = dev->priv;
187 /* FIXME: should driver use it's own struct device? */
188 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
191 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
195 ret = p54_parse_firmware(dev, priv->firmware);
197 release_firmware(priv->firmware);
204 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
206 struct p54s_priv *priv = dev->priv;
207 const struct firmware *eeprom;
211 * allow users to customize their eeprom.
214 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
216 dev_info(&priv->spi->dev, "loading default eeprom...\n");
217 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
218 sizeof(p54spi_eeprom));
220 dev_info(&priv->spi->dev, "loading user eeprom...\n");
221 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
223 release_firmware(eeprom);
228 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
230 struct p54s_priv *priv = dev->priv;
231 unsigned long fw_len, _fw_len;
232 unsigned int offset = 0;
236 fw_len = priv->firmware->size;
237 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
241 /* stop the device */
242 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
243 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
244 SPI_CTRL_STAT_START_HALTED));
246 msleep(TARGET_BOOT_SLEEP);
248 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
249 SPI_CTRL_STAT_HOST_OVERRIDE |
250 SPI_CTRL_STAT_START_HALTED));
252 msleep(TARGET_BOOT_SLEEP);
255 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
257 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
258 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
260 if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
261 cpu_to_le32(HOST_ALLOWED)) == 0) {
262 dev_err(&priv->spi->dev, "fw_upload not allowed "
268 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN,
269 cpu_to_le16(_fw_len));
270 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, cpu_to_le32(
271 ISL38XX_DEV_FIRMWARE_ADDR + offset));
273 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA,
274 (fw + offset), _fw_len);
282 /* enable host interrupts */
283 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
284 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
286 /* boot the device */
287 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
288 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
289 SPI_CTRL_STAT_RAM_BOOT));
291 msleep(TARGET_BOOT_SLEEP);
293 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
294 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
295 msleep(TARGET_BOOT_SLEEP);
302 static void p54spi_power_off(struct p54s_priv *priv)
304 disable_irq(gpio_to_irq(p54spi_gpio_irq));
305 gpio_set_value(p54spi_gpio_power, 0);
308 static void p54spi_power_on(struct p54s_priv *priv)
310 gpio_set_value(p54spi_gpio_power, 1);
311 enable_irq(gpio_to_irq(p54spi_gpio_irq));
314 * need to wait a while before device can be accessed, the lenght
320 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
322 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
325 static void p54spi_wakeup(struct p54s_priv *priv)
327 unsigned long timeout;
331 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
332 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
334 /* And wait for the READY interrupt */
335 timeout = jiffies + HZ;
337 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
338 while (!(ints & SPI_HOST_INT_READY)) {
339 if (time_after(jiffies, timeout))
341 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
344 p54spi_int_ack(priv, SPI_HOST_INT_READY);
350 static inline void p54spi_sleep(struct p54s_priv *priv)
352 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
353 cpu_to_le32(SPI_TARGET_INT_SLEEP));
356 static void p54spi_int_ready(struct p54s_priv *priv)
358 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
359 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
361 switch (priv->fw_state) {
362 case FW_STATE_BOOTING:
363 priv->fw_state = FW_STATE_READY;
364 complete(&priv->fw_comp);
366 case FW_STATE_RESETTING:
367 priv->fw_state = FW_STATE_READY;
368 /* TODO: reinitialize state */
375 static int p54spi_rx(struct p54s_priv *priv)
382 /* dummy read to flush SPI DMA controller bug */
383 p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
385 len = p54spi_read16(priv, SPI_ADRS_DMA_DATA);
388 dev_err(&priv->spi->dev, "rx request of zero bytes");
392 skb = dev_alloc_skb(len);
394 dev_err(&priv->spi->dev, "could not alloc skb");
398 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
401 if (p54_rx(priv->hw, skb) == 0)
408 static irqreturn_t p54spi_interrupt(int irq, void *config)
410 struct spi_device *spi = config;
411 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
413 queue_work(priv->hw->workqueue, &priv->work);
418 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
420 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
421 struct p54s_dma_regs dma_regs;
422 unsigned long timeout;
428 dma_regs.cmd = cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE);
429 dma_regs.len = cpu_to_le16(skb->len);
430 dma_regs.addr = hdr->req_id;
432 p54spi_spi_write(priv, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs,
435 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, skb->data, skb->len);
437 timeout = jiffies + 2 * HZ;
438 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
439 while (!(ints & SPI_HOST_INT_WR_READY)) {
440 if (time_after(jiffies, timeout)) {
441 dev_err(&priv->spi->dev, "WR_READY timeout");
445 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
448 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
452 if (FREE_AFTER_TX(skb))
453 p54_free_skb(priv->hw, skb);
457 static int p54spi_wq_tx(struct p54s_priv *priv)
459 struct p54s_tx_info *entry;
461 struct ieee80211_tx_info *info;
462 struct p54_tx_info *minfo;
463 struct p54s_tx_info *dinfo;
467 spin_lock_irqsave(&priv->tx_lock, flags);
469 while (!list_empty(&priv->tx_pending)) {
470 entry = list_entry(priv->tx_pending.next,
471 struct p54s_tx_info, tx_list);
473 list_del_init(&entry->tx_list);
475 spin_unlock_irqrestore(&priv->tx_lock, flags);
477 dinfo = container_of((void *) entry, struct p54s_tx_info,
479 minfo = container_of((void *) dinfo, struct p54_tx_info,
481 info = container_of((void *) minfo, struct ieee80211_tx_info,
483 skb = container_of((void *) info, struct sk_buff, cb);
485 ret = p54spi_tx_frame(priv, skb);
488 p54_free_skb(priv->hw, skb);
492 spin_lock_irqsave(&priv->tx_lock, flags);
494 spin_unlock_irqrestore(&priv->tx_lock, flags);
498 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
500 struct p54s_priv *priv = dev->priv;
501 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
502 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
503 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
506 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
508 spin_lock_irqsave(&priv->tx_lock, flags);
509 list_add_tail(&di->tx_list, &priv->tx_pending);
510 spin_unlock_irqrestore(&priv->tx_lock, flags);
512 queue_work(priv->hw->workqueue, &priv->work);
515 static void p54spi_work(struct work_struct *work)
517 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
521 mutex_lock(&priv->mutex);
523 if (priv->fw_state == FW_STATE_OFF &&
524 priv->fw_state == FW_STATE_RESET)
527 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
529 if (ints & SPI_HOST_INT_READY) {
530 p54spi_int_ready(priv);
531 p54spi_int_ack(priv, SPI_HOST_INT_READY);
534 if (priv->fw_state != FW_STATE_READY)
537 if (ints & SPI_HOST_INT_UPDATE) {
538 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
539 ret = p54spi_rx(priv);
543 if (ints & SPI_HOST_INT_SW_UPDATE) {
544 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
545 ret = p54spi_rx(priv);
550 ret = p54spi_wq_tx(priv);
554 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
557 mutex_unlock(&priv->mutex);
560 static int p54spi_op_start(struct ieee80211_hw *dev)
562 struct p54s_priv *priv = dev->priv;
563 unsigned long timeout;
566 if (mutex_lock_interruptible(&priv->mutex)) {
571 priv->fw_state = FW_STATE_BOOTING;
573 p54spi_power_on(priv);
575 ret = p54spi_upload_firmware(dev);
577 p54spi_power_off(priv);
581 mutex_unlock(&priv->mutex);
583 timeout = msecs_to_jiffies(2000);
584 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
587 dev_err(&priv->spi->dev, "firmware boot failed");
588 p54spi_power_off(priv);
593 if (mutex_lock_interruptible(&priv->mutex)) {
595 p54spi_power_off(priv);
599 WARN_ON(priv->fw_state != FW_STATE_READY);
602 mutex_unlock(&priv->mutex);
608 static void p54spi_op_stop(struct ieee80211_hw *dev)
610 struct p54s_priv *priv = dev->priv;
613 if (mutex_lock_interruptible(&priv->mutex)) {
614 /* FIXME: how to handle this error? */
618 WARN_ON(priv->fw_state != FW_STATE_READY);
620 cancel_work_sync(&priv->work);
622 p54spi_power_off(priv);
623 spin_lock_irqsave(&priv->tx_lock, flags);
624 INIT_LIST_HEAD(&priv->tx_pending);
625 spin_unlock_irqrestore(&priv->tx_lock, flags);
627 priv->fw_state = FW_STATE_OFF;
628 mutex_unlock(&priv->mutex);
631 static int __devinit p54spi_probe(struct spi_device *spi)
633 struct p54s_priv *priv = NULL;
634 struct ieee80211_hw *hw;
637 hw = p54_init_common(sizeof(*priv));
639 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
645 dev_set_drvdata(&spi->dev, priv);
648 spi->bits_per_word = 16;
649 spi->max_speed_hz = 24000000;
651 ret = spi_setup(spi);
653 dev_err(&priv->spi->dev, "spi_setup failed");
654 goto err_free_common;
657 ret = gpio_request(p54spi_gpio_power, "p54spi power");
659 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
660 goto err_free_common;
663 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
665 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
666 goto err_free_common;
669 gpio_direction_output(p54spi_gpio_power, 0);
670 gpio_direction_input(p54spi_gpio_irq);
672 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
673 p54spi_interrupt, IRQF_DISABLED, "p54spi",
676 dev_err(&priv->spi->dev, "request_irq() failed");
677 goto err_free_common;
680 set_irq_type(gpio_to_irq(p54spi_gpio_irq),
681 IRQ_TYPE_EDGE_RISING);
683 disable_irq(gpio_to_irq(p54spi_gpio_irq));
685 INIT_WORK(&priv->work, p54spi_work);
686 init_completion(&priv->fw_comp);
687 INIT_LIST_HEAD(&priv->tx_pending);
688 mutex_init(&priv->mutex);
689 SET_IEEE80211_DEV(hw, &spi->dev);
690 priv->common.open = p54spi_op_start;
691 priv->common.stop = p54spi_op_stop;
692 priv->common.tx = p54spi_op_tx;
694 ret = p54spi_request_firmware(hw);
696 goto err_free_common;
698 ret = p54spi_request_eeprom(hw);
700 goto err_free_common;
702 ret = p54_register_common(hw, &priv->spi->dev);
704 goto err_free_common;
709 p54_free_common(priv->hw);
713 static int __devexit p54spi_remove(struct spi_device *spi)
715 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
717 ieee80211_unregister_hw(priv->hw);
719 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
721 gpio_free(p54spi_gpio_power);
722 gpio_free(p54spi_gpio_irq);
723 release_firmware(priv->firmware);
725 mutex_destroy(&priv->mutex);
727 p54_free_common(priv->hw);
728 ieee80211_free_hw(priv->hw);
734 static struct spi_driver p54spi_driver = {
736 /* use cx3110x name because board-n800.c uses that for the
739 .bus = &spi_bus_type,
740 .owner = THIS_MODULE,
743 .probe = p54spi_probe,
744 .remove = __devexit_p(p54spi_remove),
747 static int __init p54spi_init(void)
751 ret = spi_register_driver(&p54spi_driver);
753 printk(KERN_ERR "failed to register SPI driver: %d", ret);
761 static void __exit p54spi_exit(void)
763 spi_unregister_driver(&p54spi_driver);
766 module_init(p54spi_init);
767 module_exit(p54spi_exit);
769 MODULE_LICENSE("GPL");
770 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");