p54spi: fix p54spi_upload_firmware
[platform/kernel/linux-starfive.git] / drivers / net / wireless / p54 / p54spi.c
1 /*
2  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
4  *
5  * This driver is a port from stlc45xx:
6  *      Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  */
22
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
32
33 #include "p54spi.h"
34 #include "p54spi_eeprom.h"
35 #include "p54.h"
36
37 #include "p54common.h"
38
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
41
42 /*
43  * gpios should be handled in board files and provided via platform data,
44  * but because it's currently impossible for p54spi to have a header file
45  * in include/linux, let's use module paramaters for now
46  */
47
48 static int p54spi_gpio_power = 97;
49 module_param(p54spi_gpio_power, int, 0444);
50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
51
52 static int p54spi_gpio_irq = 87;
53 module_param(p54spi_gpio_irq, int, 0444);
54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
55
56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
57                               void *buf, size_t len)
58 {
59         struct spi_transfer t[2];
60         struct spi_message m;
61         __le16 addr;
62
63         /* We first push the address */
64         addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
65
66         spi_message_init(&m);
67         memset(t, 0, sizeof(t));
68
69         t[0].tx_buf = &addr;
70         t[0].len = sizeof(addr);
71         spi_message_add_tail(&t[0], &m);
72
73         t[1].rx_buf = buf;
74         t[1].len = len;
75         spi_message_add_tail(&t[1], &m);
76
77         spi_sync(priv->spi, &m);
78 }
79
80
81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
82                              const void *buf, size_t len)
83 {
84         struct spi_transfer t[3];
85         struct spi_message m;
86         __le16 addr;
87
88         /* We first push the address */
89         addr = cpu_to_le16(address << 8);
90
91         spi_message_init(&m);
92         memset(t, 0, sizeof(t));
93
94         t[0].tx_buf = &addr;
95         t[0].len = sizeof(addr);
96         spi_message_add_tail(&t[0], &m);
97
98         t[1].tx_buf = buf;
99         t[1].len = len;
100         spi_message_add_tail(&t[1], &m);
101
102         if (len % 2) {
103                 __le16 last_word;
104                 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
105
106                 t[2].tx_buf = &last_word;
107                 t[2].len = sizeof(last_word);
108                 spi_message_add_tail(&t[2], &m);
109         }
110
111         spi_sync(priv->spi, &m);
112 }
113
114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
115 {
116         __le16 val;
117
118         p54spi_spi_read(priv, addr, &val, sizeof(val));
119
120         return le16_to_cpu(val);
121 }
122
123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
124 {
125         __le32 val;
126
127         p54spi_spi_read(priv, addr, &val, sizeof(val));
128
129         return le32_to_cpu(val);
130 }
131
132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
133 {
134         p54spi_spi_write(priv, addr, &val, sizeof(val));
135 }
136
137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
138 {
139         p54spi_spi_write(priv, addr, &val, sizeof(val));
140 }
141
142 struct p54spi_spi_reg {
143         u16 address;            /* __le16 ? */
144         u16 length;
145         char *name;
146 };
147
148 static const struct p54spi_spi_reg p54spi_registers_array[] =
149 {
150         { SPI_ADRS_ARM_INTERRUPTS,      32, "ARM_INT     " },
151         { SPI_ADRS_ARM_INT_EN,          32, "ARM_INT_ENA " },
152         { SPI_ADRS_HOST_INTERRUPTS,     32, "HOST_INT    " },
153         { SPI_ADRS_HOST_INT_EN,         32, "HOST_INT_ENA" },
154         { SPI_ADRS_HOST_INT_ACK,        32, "HOST_INT_ACK" },
155         { SPI_ADRS_GEN_PURP_1,          32, "GP1_COMM    " },
156         { SPI_ADRS_GEN_PURP_2,          32, "GP2_COMM    " },
157         { SPI_ADRS_DEV_CTRL_STAT,       32, "DEV_CTRL_STA" },
158         { SPI_ADRS_DMA_DATA,            16, "DMA_DATA    " },
159         { SPI_ADRS_DMA_WRITE_CTRL,      16, "DMA_WR_CTRL " },
160         { SPI_ADRS_DMA_WRITE_LEN,       16, "DMA_WR_LEN  " },
161         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_WR_BASE " },
162         { SPI_ADRS_DMA_READ_CTRL,       16, "DMA_RD_CTRL " },
163         { SPI_ADRS_DMA_READ_LEN,        16, "DMA_RD_LEN  " },
164         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_RD_BASE " }
165 };
166
167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
168 {
169         int i;
170         __le32 buffer;
171
172         for (i = 0; i < 2000; i++) {
173                 p54spi_spi_read(priv, reg, &buffer, sizeof(buffer));
174                 if ((buffer & bits) == bits)
175                         return 1;
176
177                 msleep(1);
178         }
179         return 0;
180 }
181
182 static int p54spi_request_firmware(struct ieee80211_hw *dev)
183 {
184         struct p54s_priv *priv = dev->priv;
185         int ret;
186
187         /* FIXME: should driver use it's own struct device? */
188         ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
189
190         if (ret < 0) {
191                 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
192                 return ret;
193         }
194
195         ret = p54_parse_firmware(dev, priv->firmware);
196         if (ret) {
197                 release_firmware(priv->firmware);
198                 return ret;
199         }
200
201         return 0;
202 }
203
204 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
205 {
206         struct p54s_priv *priv = dev->priv;
207         const struct firmware *eeprom;
208         int ret;
209
210         /*
211          * allow users to customize their eeprom.
212          */
213
214         ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
215         if (ret < 0) {
216                 dev_info(&priv->spi->dev, "loading default eeprom...\n");
217                 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
218                                        sizeof(p54spi_eeprom));
219         } else {
220                 dev_info(&priv->spi->dev, "loading user eeprom...\n");
221                 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
222                                        (int)eeprom->size);
223                 release_firmware(eeprom);
224         }
225         return ret;
226 }
227
228 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
229 {
230         struct p54s_priv *priv = dev->priv;
231         unsigned long fw_len, _fw_len;
232         unsigned int offset = 0;
233         int err = 0;
234         u8 *fw;
235
236         fw_len = priv->firmware->size;
237         fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
238         if (!fw)
239                 return -ENOMEM;
240
241         /* stop the device */
242         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
243                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
244                        SPI_CTRL_STAT_START_HALTED));
245
246         msleep(TARGET_BOOT_SLEEP);
247
248         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
249                        SPI_CTRL_STAT_HOST_OVERRIDE |
250                        SPI_CTRL_STAT_START_HALTED));
251
252         msleep(TARGET_BOOT_SLEEP);
253
254         while (fw_len > 0) {
255                 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
256
257                 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
258                                cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
259
260                 if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
261                                     cpu_to_le32(HOST_ALLOWED)) == 0) {
262                         dev_err(&priv->spi->dev, "fw_upload not allowed "
263                                 "to DMA write.");
264                         err = -EAGAIN;
265                         goto out;
266                 }
267
268                 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN,
269                                cpu_to_le16(_fw_len));
270                 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, cpu_to_le32(
271                                 ISL38XX_DEV_FIRMWARE_ADDR + offset));
272
273                 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA,
274                                  (fw + offset), _fw_len);
275
276                 fw_len -= _fw_len;
277                 offset += _fw_len;
278         }
279
280         BUG_ON(fw_len != 0);
281
282         /* enable host interrupts */
283         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
284                        cpu_to_le32(SPI_HOST_INTS_DEFAULT));
285
286         /* boot the device */
287         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
288                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
289                        SPI_CTRL_STAT_RAM_BOOT));
290
291         msleep(TARGET_BOOT_SLEEP);
292
293         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
294                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
295         msleep(TARGET_BOOT_SLEEP);
296
297 out:
298         kfree(fw);
299         return err;
300 }
301
302 static void p54spi_power_off(struct p54s_priv *priv)
303 {
304         disable_irq(gpio_to_irq(p54spi_gpio_irq));
305         gpio_set_value(p54spi_gpio_power, 0);
306 }
307
308 static void p54spi_power_on(struct p54s_priv *priv)
309 {
310         gpio_set_value(p54spi_gpio_power, 1);
311         enable_irq(gpio_to_irq(p54spi_gpio_irq));
312
313         /*
314          * need to wait a while before device can be accessed, the lenght
315          * is just a guess
316          */
317         msleep(10);
318 }
319
320 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
321 {
322         p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
323 }
324
325 static void p54spi_wakeup(struct p54s_priv *priv)
326 {
327         unsigned long timeout;
328         u32 ints;
329
330         /* wake the chip */
331         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
332                        cpu_to_le32(SPI_TARGET_INT_WAKEUP));
333
334         /* And wait for the READY interrupt */
335         timeout = jiffies + HZ;
336
337         ints =  p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
338         while (!(ints & SPI_HOST_INT_READY)) {
339                 if (time_after(jiffies, timeout))
340                                 goto out;
341                 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
342         }
343
344         p54spi_int_ack(priv, SPI_HOST_INT_READY);
345
346 out:
347         return;
348 }
349
350 static inline void p54spi_sleep(struct p54s_priv *priv)
351 {
352         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
353                        cpu_to_le32(SPI_TARGET_INT_SLEEP));
354 }
355
356 static void p54spi_int_ready(struct p54s_priv *priv)
357 {
358         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
359                        SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
360
361         switch (priv->fw_state) {
362         case FW_STATE_BOOTING:
363                 priv->fw_state = FW_STATE_READY;
364                 complete(&priv->fw_comp);
365                 break;
366         case FW_STATE_RESETTING:
367                 priv->fw_state = FW_STATE_READY;
368                 /* TODO: reinitialize state */
369                 break;
370         default:
371                 break;
372         }
373 }
374
375 static int p54spi_rx(struct p54s_priv *priv)
376 {
377         struct sk_buff *skb;
378         u16 len;
379
380         p54spi_wakeup(priv);
381
382         /* dummy read to flush SPI DMA controller bug */
383         p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
384
385         len = p54spi_read16(priv, SPI_ADRS_DMA_DATA);
386
387         if (len == 0) {
388                 dev_err(&priv->spi->dev, "rx request of zero bytes");
389                 return 0;
390         }
391
392         skb = dev_alloc_skb(len);
393         if (!skb) {
394                 dev_err(&priv->spi->dev, "could not alloc skb");
395                 return 0;
396         }
397
398         p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
399         p54spi_sleep(priv);
400
401         if (p54_rx(priv->hw, skb) == 0)
402                 dev_kfree_skb(skb);
403
404         return 0;
405 }
406
407
408 static irqreturn_t p54spi_interrupt(int irq, void *config)
409 {
410         struct spi_device *spi = config;
411         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
412
413         queue_work(priv->hw->workqueue, &priv->work);
414
415         return IRQ_HANDLED;
416 }
417
418 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
419 {
420         struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
421         struct p54s_dma_regs dma_regs;
422         unsigned long timeout;
423         int ret = 0;
424         u32 ints;
425
426         p54spi_wakeup(priv);
427
428         dma_regs.cmd = cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE);
429         dma_regs.len = cpu_to_le16(skb->len);
430         dma_regs.addr = hdr->req_id;
431
432         p54spi_spi_write(priv, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs,
433                            sizeof(dma_regs));
434
435         p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, skb->data, skb->len);
436
437         timeout = jiffies + 2 * HZ;
438         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
439         while (!(ints & SPI_HOST_INT_WR_READY)) {
440                 if (time_after(jiffies, timeout)) {
441                         dev_err(&priv->spi->dev, "WR_READY timeout");
442                         ret = -1;
443                         goto out;
444                 }
445                 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
446         }
447
448         p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
449         p54spi_sleep(priv);
450
451 out:
452         if (FREE_AFTER_TX(skb))
453                 p54_free_skb(priv->hw, skb);
454         return ret;
455 }
456
457 static int p54spi_wq_tx(struct p54s_priv *priv)
458 {
459         struct p54s_tx_info *entry;
460         struct sk_buff *skb;
461         struct ieee80211_tx_info *info;
462         struct p54_tx_info *minfo;
463         struct p54s_tx_info *dinfo;
464         unsigned long flags;
465         int ret = 0;
466
467         spin_lock_irqsave(&priv->tx_lock, flags);
468
469         while (!list_empty(&priv->tx_pending)) {
470                 entry = list_entry(priv->tx_pending.next,
471                                    struct p54s_tx_info, tx_list);
472
473                 list_del_init(&entry->tx_list);
474
475                 spin_unlock_irqrestore(&priv->tx_lock, flags);
476
477                 dinfo = container_of((void *) entry, struct p54s_tx_info,
478                                      tx_list);
479                 minfo = container_of((void *) dinfo, struct p54_tx_info,
480                                      data);
481                 info = container_of((void *) minfo, struct ieee80211_tx_info,
482                                     rate_driver_data);
483                 skb = container_of((void *) info, struct sk_buff, cb);
484
485                 ret = p54spi_tx_frame(priv, skb);
486
487                 if (ret < 0) {
488                         p54_free_skb(priv->hw, skb);
489                         return ret;
490                 }
491
492                 spin_lock_irqsave(&priv->tx_lock, flags);
493         }
494         spin_unlock_irqrestore(&priv->tx_lock, flags);
495         return ret;
496 }
497
498 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
499 {
500         struct p54s_priv *priv = dev->priv;
501         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
502         struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
503         struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
504         unsigned long flags;
505
506         BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
507
508         spin_lock_irqsave(&priv->tx_lock, flags);
509         list_add_tail(&di->tx_list, &priv->tx_pending);
510         spin_unlock_irqrestore(&priv->tx_lock, flags);
511
512         queue_work(priv->hw->workqueue, &priv->work);
513 }
514
515 static void p54spi_work(struct work_struct *work)
516 {
517         struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
518         u32 ints;
519         int ret;
520
521         mutex_lock(&priv->mutex);
522
523         if (priv->fw_state == FW_STATE_OFF &&
524             priv->fw_state == FW_STATE_RESET)
525                 goto out;
526
527         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
528
529         if (ints & SPI_HOST_INT_READY) {
530                 p54spi_int_ready(priv);
531                 p54spi_int_ack(priv, SPI_HOST_INT_READY);
532         }
533
534         if (priv->fw_state != FW_STATE_READY)
535                 goto out;
536
537         if (ints & SPI_HOST_INT_UPDATE) {
538                 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
539                 ret = p54spi_rx(priv);
540                 if (ret < 0)
541                         goto out;
542         }
543         if (ints & SPI_HOST_INT_SW_UPDATE) {
544                 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
545                 ret = p54spi_rx(priv);
546                 if (ret < 0)
547                         goto out;
548         }
549
550         ret = p54spi_wq_tx(priv);
551         if (ret < 0)
552                 goto out;
553
554         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
555
556 out:
557         mutex_unlock(&priv->mutex);
558 }
559
560 static int p54spi_op_start(struct ieee80211_hw *dev)
561 {
562         struct p54s_priv *priv = dev->priv;
563         unsigned long timeout;
564         int ret = 0;
565
566         if (mutex_lock_interruptible(&priv->mutex)) {
567                 ret = -EINTR;
568                 goto out;
569         }
570
571         priv->fw_state = FW_STATE_BOOTING;
572
573         p54spi_power_on(priv);
574
575         ret = p54spi_upload_firmware(dev);
576         if (ret < 0) {
577                 p54spi_power_off(priv);
578                 goto out_unlock;
579         }
580
581         mutex_unlock(&priv->mutex);
582
583         timeout = msecs_to_jiffies(2000);
584         timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
585                                                             timeout);
586         if (!timeout) {
587                 dev_err(&priv->spi->dev, "firmware boot failed");
588                 p54spi_power_off(priv);
589                 ret = -1;
590                 goto out;
591         }
592
593         if (mutex_lock_interruptible(&priv->mutex)) {
594                 ret = -EINTR;
595                 p54spi_power_off(priv);
596                 goto out;
597         }
598
599         WARN_ON(priv->fw_state != FW_STATE_READY);
600
601 out_unlock:
602         mutex_unlock(&priv->mutex);
603
604 out:
605         return ret;
606 }
607
608 static void p54spi_op_stop(struct ieee80211_hw *dev)
609 {
610         struct p54s_priv *priv = dev->priv;
611         unsigned long flags;
612
613         if (mutex_lock_interruptible(&priv->mutex)) {
614                 /* FIXME: how to handle this error? */
615                 return;
616         }
617
618         WARN_ON(priv->fw_state != FW_STATE_READY);
619
620         cancel_work_sync(&priv->work);
621
622         p54spi_power_off(priv);
623         spin_lock_irqsave(&priv->tx_lock, flags);
624         INIT_LIST_HEAD(&priv->tx_pending);
625         spin_unlock_irqrestore(&priv->tx_lock, flags);
626
627         priv->fw_state = FW_STATE_OFF;
628         mutex_unlock(&priv->mutex);
629 }
630
631 static int __devinit p54spi_probe(struct spi_device *spi)
632 {
633         struct p54s_priv *priv = NULL;
634         struct ieee80211_hw *hw;
635         int ret = -EINVAL;
636
637         hw = p54_init_common(sizeof(*priv));
638         if (!hw) {
639                 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
640                 return -ENOMEM;
641         }
642
643         priv = hw->priv;
644         priv->hw = hw;
645         dev_set_drvdata(&spi->dev, priv);
646         priv->spi = spi;
647
648         spi->bits_per_word = 16;
649         spi->max_speed_hz = 24000000;
650
651         ret = spi_setup(spi);
652         if (ret < 0) {
653                 dev_err(&priv->spi->dev, "spi_setup failed");
654                 goto err_free_common;
655         }
656
657         ret = gpio_request(p54spi_gpio_power, "p54spi power");
658         if (ret < 0) {
659                 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
660                 goto err_free_common;
661         }
662
663         ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
664         if (ret < 0) {
665                 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
666                 goto err_free_common;
667         }
668
669         gpio_direction_output(p54spi_gpio_power, 0);
670         gpio_direction_input(p54spi_gpio_irq);
671
672         ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
673                           p54spi_interrupt, IRQF_DISABLED, "p54spi",
674                           priv->spi);
675         if (ret < 0) {
676                 dev_err(&priv->spi->dev, "request_irq() failed");
677                 goto err_free_common;
678         }
679
680         set_irq_type(gpio_to_irq(p54spi_gpio_irq),
681                      IRQ_TYPE_EDGE_RISING);
682
683         disable_irq(gpio_to_irq(p54spi_gpio_irq));
684
685         INIT_WORK(&priv->work, p54spi_work);
686         init_completion(&priv->fw_comp);
687         INIT_LIST_HEAD(&priv->tx_pending);
688         mutex_init(&priv->mutex);
689         SET_IEEE80211_DEV(hw, &spi->dev);
690         priv->common.open = p54spi_op_start;
691         priv->common.stop = p54spi_op_stop;
692         priv->common.tx = p54spi_op_tx;
693
694         ret = p54spi_request_firmware(hw);
695         if (ret < 0)
696                 goto err_free_common;
697
698         ret = p54spi_request_eeprom(hw);
699         if (ret)
700                 goto err_free_common;
701
702         ret = p54_register_common(hw, &priv->spi->dev);
703         if (ret)
704                 goto err_free_common;
705
706         return 0;
707
708 err_free_common:
709         p54_free_common(priv->hw);
710         return ret;
711 }
712
713 static int __devexit p54spi_remove(struct spi_device *spi)
714 {
715         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
716
717         ieee80211_unregister_hw(priv->hw);
718
719         free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
720
721         gpio_free(p54spi_gpio_power);
722         gpio_free(p54spi_gpio_irq);
723         release_firmware(priv->firmware);
724
725         mutex_destroy(&priv->mutex);
726
727         p54_free_common(priv->hw);
728         ieee80211_free_hw(priv->hw);
729
730         return 0;
731 }
732
733
734 static struct spi_driver p54spi_driver = {
735         .driver = {
736                 /* use cx3110x name because board-n800.c uses that for the
737                  * SPI port */
738                 .name           = "cx3110x",
739                 .bus            = &spi_bus_type,
740                 .owner          = THIS_MODULE,
741         },
742
743         .probe          = p54spi_probe,
744         .remove         = __devexit_p(p54spi_remove),
745 };
746
747 static int __init p54spi_init(void)
748 {
749         int ret;
750
751         ret = spi_register_driver(&p54spi_driver);
752         if (ret < 0) {
753                 printk(KERN_ERR "failed to register SPI driver: %d", ret);
754                 goto out;
755         }
756
757 out:
758         return ret;
759 }
760
761 static void __exit p54spi_exit(void)
762 {
763         spi_unregister_driver(&p54spi_driver);
764 }
765
766 module_init(p54spi_init);
767 module_exit(p54spi_exit);
768
769 MODULE_LICENSE("GPL");
770 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");