1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
4 #include <linux/devcoredump.h>
5 #include <linux/etherdevice.h>
6 #include <linux/timekeeping.h>
12 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)
13 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\
14 IEEE80211_RADIOTAP_HE_##f)
16 static struct mt76_wcid *mt7921_rx_get_wcid(struct mt7921_dev *dev,
17 u16 idx, bool unicast)
19 struct mt7921_sta *sta;
20 struct mt76_wcid *wcid;
22 if (idx >= ARRAY_SIZE(dev->mt76.wcid))
25 wcid = rcu_dereference(dev->mt76.wcid[idx]);
32 sta = container_of(wcid, struct mt7921_sta, wcid);
36 return &sta->vif->sta.wcid;
39 void mt7921_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
42 EXPORT_SYMBOL_GPL(mt7921_sta_ps);
44 bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask)
46 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
47 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
49 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,
53 void mt7921_mac_sta_poll(struct mt7921_dev *dev)
55 static const u8 ac_to_tid[] = {
56 [IEEE80211_AC_BE] = 0,
57 [IEEE80211_AC_BK] = 1,
58 [IEEE80211_AC_VI] = 4,
61 struct ieee80211_sta *sta;
62 struct mt7921_sta *msta;
63 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];
64 LIST_HEAD(sta_poll_list);
65 struct rate_info *rate;
68 spin_lock_bh(&dev->sta_poll_lock);
69 list_splice_init(&dev->sta_poll_list, &sta_poll_list);
70 spin_unlock_bh(&dev->sta_poll_lock);
78 spin_lock_bh(&dev->sta_poll_lock);
79 if (list_empty(&sta_poll_list)) {
80 spin_unlock_bh(&dev->sta_poll_lock);
83 msta = list_first_entry(&sta_poll_list,
84 struct mt7921_sta, poll_list);
85 list_del_init(&msta->poll_list);
86 spin_unlock_bh(&dev->sta_poll_lock);
89 addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET);
91 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
92 u32 tx_last = msta->airtime_ac[i];
93 u32 rx_last = msta->airtime_ac[i + 4];
95 msta->airtime_ac[i] = mt76_rr(dev, addr);
96 msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);
98 tx_time[i] = msta->airtime_ac[i] - tx_last;
99 rx_time[i] = msta->airtime_ac[i + 4] - rx_last;
101 if ((tx_last | rx_last) & BIT(30))
108 mt7921_mac_wtbl_update(dev, idx,
109 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
110 memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac));
116 sta = container_of((void *)msta, struct ieee80211_sta,
118 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
119 u8 q = mt76_connac_lmac_mapping(i);
120 u32 tx_cur = tx_time[q];
121 u32 rx_cur = rx_time[q];
122 u8 tid = ac_to_tid[i];
124 if (!tx_cur && !rx_cur)
127 ieee80211_sta_register_airtime(sta, tid, tx_cur,
131 /* We don't support reading GI info from txs packets.
132 * For accurate tx status reporting and AQL improvement,
133 * we need to make sure that flags match so polling GI
134 * from per-sta counters directly.
136 rate = &msta->wcid.rate;
137 addr = mt7921_mac_wtbl_lmac_addr(idx,
138 MT_WTBL_TXRX_CAP_RATE_OFFSET);
139 val = mt76_rr(dev, addr);
142 case RATE_INFO_BW_160:
143 bw = IEEE80211_STA_RX_BW_160;
145 case RATE_INFO_BW_80:
146 bw = IEEE80211_STA_RX_BW_80;
148 case RATE_INFO_BW_40:
149 bw = IEEE80211_STA_RX_BW_40;
152 bw = IEEE80211_STA_RX_BW_20;
156 if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {
157 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;
159 rate->he_gi = (val & (0x3 << offs)) >> offs;
160 } else if (rate->flags &
161 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {
162 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))
163 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
165 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
169 EXPORT_SYMBOL_GPL(mt7921_mac_sta_poll);
172 mt7921_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,
173 struct ieee80211_radiotap_he *he,
179 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L);
180 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H);
181 ru = (u8)(ru_l | ru_h << 4);
183 status->bw = RATE_INFO_BW_HE_RU;
187 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26;
191 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52;
195 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106;
199 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242;
203 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484;
207 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996;
210 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996;
214 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
215 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) |
216 le16_encode_bits(offs,
217 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET);
221 mt7921_mac_decode_he_mu_radiotap(struct sk_buff *skb, __le32 *rxv)
223 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
224 static const struct ieee80211_radiotap_he_mu mu_known = {
225 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) |
226 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) |
227 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) |
228 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN) |
229 HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN),
230 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN) |
231 HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN),
233 struct ieee80211_radiotap_he_mu *he_mu;
235 status->flag |= RX_FLAG_RADIOTAP_HE_MU;
237 he_mu = skb_push(skb, sizeof(mu_known));
238 memcpy(he_mu, &mu_known, sizeof(mu_known));
240 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f)
242 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx);
244 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm);
246 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |
247 MU_PREP(FLAGS2_SIG_B_SYMS_USERS,
248 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER));
250 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0);
252 if (status->bw >= RATE_INFO_BW_40) {
253 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN);
255 le32_get_bits(rxv[3], MT_CRXV_HE_RU1);
258 if (status->bw >= RATE_INFO_BW_80) {
260 le32_get_bits(rxv[3], MT_CRXV_HE_RU2);
262 le32_get_bits(rxv[3], MT_CRXV_HE_RU3);
267 mt7921_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode)
269 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
270 static const struct ieee80211_radiotap_he known = {
271 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) |
272 HE_BITS(DATA1_DATA_DCM_KNOWN) |
273 HE_BITS(DATA1_STBC_KNOWN) |
274 HE_BITS(DATA1_CODING_KNOWN) |
275 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) |
276 HE_BITS(DATA1_DOPPLER_KNOWN) |
277 HE_BITS(DATA1_SPTL_REUSE_KNOWN) |
278 HE_BITS(DATA1_BSS_COLOR_KNOWN),
279 .data2 = HE_BITS(DATA2_GI_KNOWN) |
280 HE_BITS(DATA2_TXBF_KNOWN) |
281 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) |
282 HE_BITS(DATA2_TXOP_KNOWN),
284 struct ieee80211_radiotap_he *he = NULL;
285 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1;
287 status->flag |= RX_FLAG_RADIOTAP_HE;
289 he = skb_push(skb, sizeof(known));
290 memcpy(he, &known, sizeof(known));
292 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) |
293 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]);
294 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]);
295 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) |
296 le16_encode_bits(ltf_size,
297 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE);
298 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)
299 he->data5 |= HE_BITS(DATA5_TXBF);
300 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) |
301 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]);
304 case MT_PHY_TYPE_HE_SU:
305 he->data1 |= HE_BITS(DATA1_FORMAT_SU) |
306 HE_BITS(DATA1_UL_DL_KNOWN) |
307 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) |
308 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
310 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) |
311 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
313 case MT_PHY_TYPE_HE_EXT_SU:
314 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) |
315 HE_BITS(DATA1_UL_DL_KNOWN) |
316 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
318 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
320 case MT_PHY_TYPE_HE_MU:
321 he->data1 |= HE_BITS(DATA1_FORMAT_MU) |
322 HE_BITS(DATA1_UL_DL_KNOWN);
324 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
325 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]);
327 mt7921_mac_decode_he_radiotap_ru(status, he, rxv);
328 mt7921_mac_decode_he_mu_radiotap(skb, rxv);
330 case MT_PHY_TYPE_HE_TB:
331 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) |
332 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) |
333 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) |
334 HE_BITS(DATA1_SPTL_REUSE4_KNOWN);
336 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) |
337 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) |
338 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) |
339 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]);
341 mt7921_mac_decode_he_radiotap_ru(status, he, rxv);
349 mt7921_get_status_freq_info(struct mt7921_dev *dev, struct mt76_phy *mphy,
350 struct mt76_rx_status *status, u8 chfreq)
352 if (!test_bit(MT76_HW_SCANNING, &mphy->state) &&
353 !test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) &&
354 !test_bit(MT76_STATE_ROC, &mphy->state)) {
355 status->freq = mphy->chandef.chan->center_freq;
356 status->band = mphy->chandef.chan->band;
361 status->band = NL80211_BAND_6GHZ;
362 chfreq = (chfreq - 181) * 4 + 1;
363 } else if (chfreq > 14) {
364 status->band = NL80211_BAND_5GHZ;
366 status->band = NL80211_BAND_2GHZ;
368 status->freq = ieee80211_channel_to_frequency(chfreq, status->band);
372 mt7921_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
374 struct sk_buff *skb = priv;
375 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
376 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
377 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
379 if (status->signal > 0)
382 if (!ether_addr_equal(vif->addr, hdr->addr1))
385 ewma_rssi_add(&mvif->rssi, -status->signal);
389 mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb)
391 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
393 if (!ieee80211_is_assoc_resp(hdr->frame_control) &&
394 !ieee80211_is_auth(hdr->frame_control))
397 ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev),
398 IEEE80211_IFACE_ITER_RESUME_ALL,
399 mt7921_mac_rssi_iter, skb);
402 /* The HW does not translate the mac header to 802.3 for mesh point */
403 static int mt7921_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap)
405 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
406 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap);
407 struct mt7921_sta *msta = (struct mt7921_sta *)status->wcid;
408 __le32 *rxd = (__le32 *)skb->data;
409 struct ieee80211_sta *sta;
410 struct ieee80211_vif *vif;
411 struct ieee80211_hdr hdr;
414 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=
418 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))
421 if (!msta || !msta->vif)
424 sta = container_of((void *)msta, struct ieee80211_sta, drv_priv);
425 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv);
427 /* store the info from RXD and ethhdr to avoid being overridden */
428 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL);
429 hdr.frame_control = cpu_to_le16(frame_control);
430 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL));
433 ether_addr_copy(hdr.addr1, vif->addr);
434 ether_addr_copy(hdr.addr2, sta->addr);
435 switch (frame_control & (IEEE80211_FCTL_TODS |
436 IEEE80211_FCTL_FROMDS)) {
438 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
440 case IEEE80211_FCTL_FROMDS:
441 ether_addr_copy(hdr.addr3, eth_hdr->h_source);
443 case IEEE80211_FCTL_TODS:
444 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
446 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
447 ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
448 ether_addr_copy(hdr.addr4, eth_hdr->h_source);
454 skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2);
455 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
456 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
457 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
458 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
459 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
463 if (ieee80211_has_order(hdr.frame_control))
464 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9],
465 IEEE80211_HT_CTL_LEN);
466 if (ieee80211_is_data_qos(hdr.frame_control)) {
469 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL));
470 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
471 IEEE80211_QOS_CTL_LEN);
474 if (ieee80211_has_a4(hdr.frame_control))
475 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
477 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
483 mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
485 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;
486 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
487 bool hdr_trans, unicast, insert_ccmp_hdr = false;
488 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;
490 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data;
491 struct mt76_phy *mphy = &dev->mt76.phy;
492 struct mt7921_phy *phy = &dev->phy;
493 struct ieee80211_supported_band *sband;
494 u32 rxd0 = le32_to_cpu(rxd[0]);
495 u32 rxd1 = le32_to_cpu(rxd[1]);
496 u32 rxd2 = le32_to_cpu(rxd[2]);
497 u32 rxd3 = le32_to_cpu(rxd[3]);
498 u32 rxd4 = le32_to_cpu(rxd[4]);
504 memset(status, 0, sizeof(*status));
506 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX)
509 if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
512 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)
515 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS;
516 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM))
519 /* ICV error or CCMP/BIP/WPI MIC error */
520 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR)
521 status->flag |= RX_FLAG_ONLY_MONITOR;
523 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
524 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
525 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
526 status->wcid = mt7921_rx_get_wcid(dev, idx, unicast);
529 struct mt7921_sta *msta;
531 msta = container_of(status->wcid, struct mt7921_sta, wcid);
532 spin_lock_bh(&dev->sta_poll_lock);
533 if (list_empty(&msta->poll_list))
534 list_add_tail(&msta->poll_list, &dev->sta_poll_list);
535 spin_unlock_bh(&dev->sta_poll_lock);
538 mt7921_get_status_freq_info(dev, mphy, status, chfreq);
540 switch (status->band) {
541 case NL80211_BAND_5GHZ:
542 sband = &mphy->sband_5g.sband;
544 case NL80211_BAND_6GHZ:
545 sband = &mphy->sband_6g.sband;
548 sband = &mphy->sband_2g.sband;
552 if (!sband->channels)
555 if ((rxd0 & csum_mask) == csum_mask)
556 skb->ip_summed = CHECKSUM_UNNECESSARY;
558 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR)
559 status->flag |= RX_FLAG_FAILED_FCS_CRC;
561 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)
562 status->flag |= RX_FLAG_MMIC_ERROR;
564 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 &&
565 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {
566 status->flag |= RX_FLAG_DECRYPTED;
567 status->flag |= RX_FLAG_IV_STRIPPED;
568 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
571 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);
573 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
577 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {
578 u32 v0 = le32_to_cpu(rxd[0]);
579 u32 v2 = le32_to_cpu(rxd[2]);
581 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0));
582 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2);
583 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2);
586 if ((u8 *)rxd - skb->data >= skb->len)
590 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {
591 u8 *data = (u8 *)rxd;
593 if (status->flag & RX_FLAG_DECRYPTED) {
594 switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) {
595 case MT_CIPHER_AES_CCMP:
596 case MT_CIPHER_CCMP_CCX:
597 case MT_CIPHER_CCMP_256:
599 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
602 case MT_CIPHER_TKIP_NO_MIC:
604 case MT_CIPHER_GCMP_256:
605 status->iv[0] = data[5];
606 status->iv[1] = data[4];
607 status->iv[2] = data[3];
608 status->iv[3] = data[2];
609 status->iv[4] = data[1];
610 status->iv[5] = data[0];
617 if ((u8 *)rxd - skb->data >= skb->len)
621 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {
622 status->timestamp = le32_to_cpu(rxd[0]);
623 status->flag |= RX_FLAG_MACTIME_START;
625 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {
626 status->flag |= RX_FLAG_AMPDU_DETAILS;
628 /* all subframes of an A-MPDU have the same timestamp */
629 if (phy->rx_ampdu_ts != status->timestamp) {
630 if (!++phy->ampdu_ref)
633 phy->rx_ampdu_ts = status->timestamp;
635 status->ampdu_ref = phy->ampdu_ref;
639 if ((u8 *)rxd - skb->data >= skb->len)
643 /* RXD Group 3 - P-RXV */
644 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
651 if ((u8 *)rxd - skb->data >= skb->len)
654 v0 = le32_to_cpu(rxv[0]);
655 v1 = le32_to_cpu(rxv[1]);
657 if (v0 & MT_PRXV_HT_AD_CODE)
658 status->enc_flags |= RX_ENC_FLAG_LDPC;
660 status->chains = mphy->antenna_mask;
661 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1);
662 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1);
663 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1);
664 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1);
665 status->signal = -128;
666 for (i = 0; i < hweight8(mphy->antenna_mask); i++) {
667 if (!(status->chains & BIT(i)) ||
668 status->chain_signal[i] >= 0)
671 status->signal = max(status->signal,
672 status->chain_signal[i]);
675 stbc = FIELD_GET(MT_PRXV_STBC, v0);
676 gi = FIELD_GET(MT_PRXV_SGI, v0);
679 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
680 mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
683 case MT_PHY_TYPE_CCK:
686 case MT_PHY_TYPE_OFDM:
687 i = mt76_get_rate(&dev->mt76, sband, i, cck);
689 case MT_PHY_TYPE_HT_GF:
691 status->encoding = RX_ENC_HT;
695 case MT_PHY_TYPE_VHT:
697 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
698 status->encoding = RX_ENC_VHT;
702 case MT_PHY_TYPE_HE_MU:
703 case MT_PHY_TYPE_HE_SU:
704 case MT_PHY_TYPE_HE_EXT_SU:
705 case MT_PHY_TYPE_HE_TB:
707 FIELD_GET(MT_PRXV_NSTS, v0) + 1;
708 status->encoding = RX_ENC_HE;
711 if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
714 status->he_dcm = !!(idx & MT_PRXV_TX_DCM);
720 status->rate_idx = i;
722 switch (FIELD_GET(MT_PRXV_FRAME_MODE, v0)) {
723 case IEEE80211_STA_RX_BW_20:
725 case IEEE80211_STA_RX_BW_40:
726 if (mode & MT_PHY_TYPE_HE_EXT_SU &&
727 (idx & MT_PRXV_TX_ER_SU_106T)) {
728 status->bw = RATE_INFO_BW_HE_RU;
730 NL80211_RATE_INFO_HE_RU_ALLOC_106;
732 status->bw = RATE_INFO_BW_40;
735 case IEEE80211_STA_RX_BW_80:
736 status->bw = RATE_INFO_BW_80;
738 case IEEE80211_STA_RX_BW_160:
739 status->bw = RATE_INFO_BW_160;
745 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
746 if (mode < MT_PHY_TYPE_HE_SU && gi)
747 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
749 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
751 if ((u8 *)rxd - skb->data >= skb->len)
756 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4);
757 status->amsdu = !!amsdu_info;
759 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME;
760 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME;
763 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;
764 if (hdr_trans && ieee80211_has_morefrags(fc)) {
765 if (mt7921_reverse_frag0_hdr_trans(skb, hdr_gap))
769 skb_pull(skb, hdr_gap);
770 if (!hdr_trans && status->amsdu) {
771 memmove(skb->data + 2, skb->data,
772 ieee80211_get_hdrlen_from_skb(skb));
778 struct ieee80211_hdr *hdr;
780 if (insert_ccmp_hdr) {
781 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
783 mt76_insert_ccmp_hdr(skb, key_id);
786 hdr = mt76_skb_get_hdr(skb);
787 fc = hdr->frame_control;
788 if (ieee80211_is_data_qos(fc)) {
789 seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
790 qos_ctl = *ieee80211_get_qos_ctl(hdr);
793 status->flag |= RX_FLAG_8023;
796 mt7921_mac_assoc_rssi(dev, skb);
798 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))
799 mt7921_mac_decode_he_radiotap(skb, rxv, mode);
801 if (!status->wcid || !ieee80211_is_data_qos(fc))
804 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc);
805 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);
806 status->qos_ctl = qos_ctl;
812 mt7921_mac_write_txwi_8023(struct mt7921_dev *dev, __le32 *txwi,
813 struct sk_buff *skb, struct mt76_wcid *wcid)
815 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
816 u8 fc_type, fc_stype;
822 struct ieee80211_sta *sta;
824 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);
828 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |
829 FIELD_PREP(MT_TXD1_TID, tid);
831 ethertype = get_unaligned_be16(&skb->data[12]);
832 if (ethertype >= ETH_P_802_3_MIN)
833 val |= MT_TXD1_ETH_802_3;
835 txwi[1] |= cpu_to_le32(val);
837 fc_type = IEEE80211_FTYPE_DATA >> 2;
838 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0;
840 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
841 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);
843 txwi[2] |= cpu_to_le32(val);
845 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
846 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
847 txwi[7] |= cpu_to_le32(val);
851 mt7921_mac_write_txwi_80211(struct mt7921_dev *dev, __le32 *txwi,
852 struct sk_buff *skb, struct ieee80211_key_conf *key)
854 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
855 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
856 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
857 bool multicast = is_multicast_ether_addr(hdr->addr1);
858 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
859 __le16 fc = hdr->frame_control;
860 u8 fc_type, fc_stype;
863 if (ieee80211_is_action(fc) &&
864 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
865 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) {
866 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
868 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA);
869 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK;
870 } else if (ieee80211_is_back_req(hdr->frame_control)) {
871 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr;
872 u16 control = le16_to_cpu(bar->control);
874 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control);
877 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
878 FIELD_PREP(MT_TXD1_HDR_INFO,
879 ieee80211_get_hdrlen_from_skb(skb) / 2) |
880 FIELD_PREP(MT_TXD1_TID, tid);
881 txwi[1] |= cpu_to_le32(val);
883 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
884 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
886 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
887 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
888 FIELD_PREP(MT_TXD2_MULTICAST, multicast);
890 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) &&
891 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {
893 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME);
896 if (!ieee80211_is_data(fc) || multicast ||
897 info->flags & IEEE80211_TX_CTL_USE_MINRATE)
898 val |= MT_TXD2_FIX_RATE;
900 txwi[2] |= cpu_to_le32(val);
902 if (ieee80211_is_beacon(fc)) {
903 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT);
904 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);
907 if (info->flags & IEEE80211_TX_CTL_INJECTED) {
908 u16 seqno = le16_to_cpu(hdr->seq_ctrl);
910 if (ieee80211_is_back_req(hdr->frame_control)) {
911 struct ieee80211_bar *bar;
913 bar = (struct ieee80211_bar *)skb->data;
914 seqno = le16_to_cpu(bar->start_seq_num);
917 val = MT_TXD3_SN_VALID |
918 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
919 txwi[3] |= cpu_to_le32(val);
920 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);
923 if (mt76_is_mmio(&dev->mt76)) {
924 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
925 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
926 txwi[7] |= cpu_to_le32(val);
928 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |
929 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);
930 txwi[8] |= cpu_to_le32(val);
934 void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi,
935 struct sk_buff *skb, struct mt76_wcid *wcid,
936 struct ieee80211_key_conf *key, int pid,
939 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
940 struct ieee80211_vif *vif = info->control.vif;
941 struct mt76_phy *mphy = &dev->mphy;
942 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0;
943 bool is_mmio = mt76_is_mmio(&dev->mt76);
944 u32 sz_txd = is_mmio ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE;
945 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
950 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
952 omac_idx = mvif->omac_idx;
953 wmm_idx = mvif->wmm_idx;
957 p_fmt = MT_TX_TYPE_FW;
958 q_idx = MT_LMAC_BCN0;
959 } else if (skb_get_queue_mapping(skb) >= MT_TXQ_PSD) {
960 p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
961 q_idx = MT_LMAC_ALTX0;
963 p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
964 q_idx = wmm_idx * MT7921_MAX_WMM_SETS +
965 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb));
968 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
969 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |
970 FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
971 txwi[0] = cpu_to_le32(val);
973 val = MT_TXD1_LONG_FORMAT |
974 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
975 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
977 txwi[1] = cpu_to_le32(val);
980 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);
982 val |= MT_TXD3_PROTECT_FRAME;
983 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
984 val |= MT_TXD3_NO_ACK;
986 txwi[3] = cpu_to_le32(val);
989 val = FIELD_PREP(MT_TXD5_PID, pid);
990 if (pid >= MT_PACKET_ID_FIRST)
991 val |= MT_TXD5_TX_STATUS_HOST;
992 txwi[5] = cpu_to_le32(val);
995 txwi[7] = wcid->amsdu ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0;
998 mt7921_mac_write_txwi_8023(dev, txwi, skb, wcid);
1000 mt7921_mac_write_txwi_80211(dev, txwi, skb, key);
1002 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) {
1003 int rateidx = vif ? ffs(vif->bss_conf.basic_rates) - 1 : 0;
1006 /* hardware won't add HTC for mgmt/ctrl frame */
1007 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD);
1009 rate = mt76_calculate_default_rate(mphy, rateidx);
1011 rate &= GENMASK(7, 0);
1012 rate |= FIELD_PREP(MT_TX_RATE_MODE, mode);
1014 val = MT_TXD6_FIXED_BW |
1015 FIELD_PREP(MT_TXD6_TX_RATE, rate);
1016 txwi[6] |= cpu_to_le32(val);
1017 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);
1020 EXPORT_SYMBOL_GPL(mt7921_mac_write_txwi);
1022 void mt7921_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi)
1024 struct mt7921_sta *msta;
1028 if (!sta || !(sta->ht_cap.ht_supported || sta->he_cap.has_he))
1031 tid = le32_get_bits(txwi[1], MT_TXD1_TID);
1033 val = le32_to_cpu(txwi[2]);
1034 fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 |
1035 FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4;
1036 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA)))
1039 msta = (struct mt7921_sta *)sta->drv_priv;
1040 if (!test_and_set_bit(tid, &msta->ampdu_state))
1041 ieee80211_start_tx_ba_session(sta, tid, 0);
1043 EXPORT_SYMBOL_GPL(mt7921_tx_check_aggr);
1046 mt7921_mac_add_txs_skb(struct mt7921_dev *dev, struct mt76_wcid *wcid, int pid,
1049 struct mt7921_sta *msta = container_of(wcid, struct mt7921_sta, wcid);
1050 struct mt76_sta_stats *stats = &msta->stats;
1051 struct ieee80211_supported_band *sband;
1052 struct mt76_dev *mdev = &dev->mt76;
1053 struct ieee80211_tx_info *info;
1054 struct rate_info rate = {};
1055 struct sk_buff_head list;
1056 u32 txrate, txs, mode;
1057 struct sk_buff *skb;
1060 mt76_tx_status_lock(mdev, &list);
1061 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list);
1065 info = IEEE80211_SKB_CB(skb);
1066 txs = le32_to_cpu(txs_data[0]);
1067 if (!(txs & MT_TXS0_ACK_ERROR_MASK))
1068 info->flags |= IEEE80211_TX_STAT_ACK;
1070 info->status.ampdu_len = 1;
1071 info->status.ampdu_ack_len = !!(info->flags &
1072 IEEE80211_TX_STAT_ACK);
1074 info->status.rates[0].idx = -1;
1079 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);
1081 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);
1082 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;
1084 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))
1085 stats->tx_nss[rate.nss - 1]++;
1086 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))
1087 stats->tx_mcs[rate.mcs]++;
1089 mode = FIELD_GET(MT_TX_RATE_MODE, txrate);
1091 case MT_PHY_TYPE_CCK:
1094 case MT_PHY_TYPE_OFDM:
1095 if (dev->mphy.chandef.chan->band == NL80211_BAND_5GHZ)
1096 sband = &dev->mphy.sband_5g.sband;
1098 sband = &dev->mphy.sband_2g.sband;
1100 rate.mcs = mt76_get_rate(dev->mphy.dev, sband, rate.mcs, cck);
1101 rate.legacy = sband->bitrates[rate.mcs].bitrate;
1103 case MT_PHY_TYPE_HT:
1104 case MT_PHY_TYPE_HT_GF:
1108 rate.flags = RATE_INFO_FLAGS_MCS;
1109 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)
1110 rate.flags |= RATE_INFO_FLAGS_SHORT_GI;
1112 case MT_PHY_TYPE_VHT:
1116 rate.flags = RATE_INFO_FLAGS_VHT_MCS;
1118 case MT_PHY_TYPE_HE_SU:
1119 case MT_PHY_TYPE_HE_EXT_SU:
1120 case MT_PHY_TYPE_HE_TB:
1121 case MT_PHY_TYPE_HE_MU:
1125 rate.he_gi = wcid->rate.he_gi;
1126 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);
1127 rate.flags = RATE_INFO_FLAGS_HE_MCS;
1132 stats->tx_mode[mode]++;
1134 switch (FIELD_GET(MT_TXS0_BW, txs)) {
1135 case IEEE80211_STA_RX_BW_160:
1136 rate.bw = RATE_INFO_BW_160;
1139 case IEEE80211_STA_RX_BW_80:
1140 rate.bw = RATE_INFO_BW_80;
1143 case IEEE80211_STA_RX_BW_40:
1144 rate.bw = RATE_INFO_BW_40;
1148 rate.bw = RATE_INFO_BW_20;
1156 mt76_tx_status_skb_done(mdev, skb, &list);
1157 mt76_tx_status_unlock(mdev, &list);
1162 void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data)
1164 struct mt7921_sta *msta = NULL;
1165 struct mt76_wcid *wcid;
1166 __le32 *txs_data = data;
1170 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1)
1173 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);
1174 pid = le32_get_bits(txs_data[3], MT_TXS3_PID);
1176 if (pid < MT_PACKET_ID_FIRST)
1179 if (wcidx >= MT7921_WTBL_SIZE)
1184 wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
1188 mt7921_mac_add_txs_skb(dev, wcid, pid, txs_data);
1193 msta = container_of(wcid, struct mt7921_sta, wcid);
1194 spin_lock_bh(&dev->sta_poll_lock);
1195 if (list_empty(&msta->poll_list))
1196 list_add_tail(&msta->poll_list, &dev->sta_poll_list);
1197 spin_unlock_bh(&dev->sta_poll_lock);
1202 EXPORT_SYMBOL_GPL(mt7921_mac_add_txs);
1204 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
1205 struct sk_buff *skb)
1207 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1208 __le32 *rxd = (__le32 *)skb->data;
1209 __le32 *end = (__le32 *)&skb->data[skb->len];
1210 enum rx_pkt_type type;
1213 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
1214 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);
1216 if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
1217 type = PKT_TYPE_NORMAL_MCU;
1220 case PKT_TYPE_RX_EVENT:
1221 mt7921_mcu_rx_event(dev, skb);
1224 for (rxd += 2; rxd + 8 <= end; rxd += 8)
1225 mt7921_mac_add_txs(dev, rxd);
1228 case PKT_TYPE_NORMAL_MCU:
1229 case PKT_TYPE_NORMAL:
1230 if (!mt7921_mac_fill_rx(dev, skb)) {
1231 mt76_rx(&dev->mt76, q, skb);
1240 EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb);
1242 void mt7921_mac_reset_counters(struct mt7921_phy *phy)
1244 struct mt7921_dev *dev = phy->dev;
1247 for (i = 0; i < 4; i++) {
1248 mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1249 mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1252 dev->mt76.phy.survey_time = ktime_get_boottime();
1253 memset(&dev->mt76.aggr_stats[0], 0, sizeof(dev->mt76.aggr_stats) / 2);
1255 /* reset airtime counters */
1256 mt76_rr(dev, MT_MIB_SDR9(0));
1257 mt76_rr(dev, MT_MIB_SDR36(0));
1258 mt76_rr(dev, MT_MIB_SDR37(0));
1260 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1261 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1264 void mt7921_mac_set_timing(struct mt7921_phy *phy)
1266 s16 coverage_class = phy->coverage_class;
1267 struct mt7921_dev *dev = phy->dev;
1268 u32 val, reg_offset;
1269 u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |
1270 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
1271 u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
1272 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
1273 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
1274 int sifs = is_2ghz ? 10 : 16, offset;
1276 if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
1279 mt76_set(dev, MT_ARB_SCR(0),
1280 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1283 offset = 3 * coverage_class;
1284 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |
1285 FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);
1287 mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset);
1288 mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset);
1289 mt76_wr(dev, MT_TMAC_ICR0(0),
1290 FIELD_PREP(MT_IFS_EIFS, 360) |
1291 FIELD_PREP(MT_IFS_RIFS, 2) |
1292 FIELD_PREP(MT_IFS_SIFS, sifs) |
1293 FIELD_PREP(MT_IFS_SLOT, phy->slottime));
1295 if (phy->slottime < 20 || !is_2ghz)
1296 val = MT7921_CFEND_RATE_DEFAULT;
1298 val = MT7921_CFEND_RATE_11B;
1300 mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val);
1301 mt76_clear(dev, MT_ARB_SCR(0),
1302 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1306 mt7921_phy_get_nf(struct mt7921_phy *phy, int idx)
1312 mt7921_phy_update_channel(struct mt76_phy *mphy, int idx)
1314 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1315 struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv;
1316 struct mt76_channel_state *state;
1317 u64 busy_time, tx_time, rx_time, obss_time;
1320 busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
1321 MT_MIB_SDR9_BUSY_MASK);
1322 tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx),
1323 MT_MIB_SDR36_TXTIME_MASK);
1324 rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx),
1325 MT_MIB_SDR37_RXTIME_MASK);
1326 obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx),
1327 MT_MIB_OBSSTIME_MASK);
1329 nf = mt7921_phy_get_nf(phy, idx);
1331 phy->noise = nf << 4;
1333 phy->noise += nf - (phy->noise >> 4);
1335 state = mphy->chan_state;
1336 state->cc_busy += busy_time;
1337 state->cc_tx += tx_time;
1338 state->cc_rx += rx_time + obss_time;
1339 state->cc_bss_rx += rx_time;
1340 state->noise = -(phy->noise >> 4);
1343 void mt7921_update_channel(struct mt76_phy *mphy)
1345 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1347 if (mt76_connac_pm_wake(mphy, &dev->pm))
1350 mt7921_phy_update_channel(mphy, 0);
1351 /* reset obss airtime */
1352 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1354 mt76_connac_power_save_sched(mphy, &dev->pm);
1356 EXPORT_SYMBOL_GPL(mt7921_update_channel);
1359 mt7921_vif_connect_iter(void *priv, u8 *mac,
1360 struct ieee80211_vif *vif)
1362 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1363 struct mt7921_dev *dev = mvif->phy->dev;
1364 struct ieee80211_hw *hw = mt76_hw(dev);
1366 if (vif->type == NL80211_IFTYPE_STATION)
1367 ieee80211_disconnect(vif, true);
1369 mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true);
1370 mt7921_mcu_set_tx(dev, vif);
1372 if (vif->type == NL80211_IFTYPE_AP) {
1373 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.wcid,
1375 mt7921_mcu_sta_update(dev, NULL, vif, true,
1376 MT76_STA_INFO_STATE_NONE);
1377 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true);
1381 /* system error recovery */
1382 void mt7921_mac_reset_work(struct work_struct *work)
1384 struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1386 struct ieee80211_hw *hw = mt76_hw(dev);
1387 struct mt76_connac_pm *pm = &dev->pm;
1390 dev_err(dev->mt76.dev, "chip reset\n");
1391 dev->hw_full_reset = true;
1392 ieee80211_stop_queues(hw);
1394 cancel_delayed_work_sync(&dev->mphy.mac_work);
1395 cancel_delayed_work_sync(&pm->ps_work);
1396 cancel_work_sync(&pm->wake_work);
1398 mutex_lock(&dev->mt76.mutex);
1399 for (i = 0; i < 10; i++)
1400 if (!mt7921_dev_reset(dev))
1402 mutex_unlock(&dev->mt76.mutex);
1405 dev_err(dev->mt76.dev, "chip reset failed\n");
1407 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) {
1408 struct cfg80211_scan_info info = {
1412 ieee80211_scan_completed(dev->mphy.hw, &info);
1415 dev->hw_full_reset = false;
1416 pm->suspended = false;
1417 ieee80211_wake_queues(hw);
1418 ieee80211_iterate_active_interfaces(hw,
1419 IEEE80211_IFACE_ITER_RESUME_ALL,
1420 mt7921_vif_connect_iter, NULL);
1421 mt76_connac_power_save_sched(&dev->mt76.phy, pm);
1424 void mt7921_reset(struct mt76_dev *mdev)
1426 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1428 if (!dev->hw_init_done)
1431 if (dev->hw_full_reset)
1434 queue_work(dev->mt76.wq, &dev->reset_work);
1437 void mt7921_mac_update_mib_stats(struct mt7921_phy *phy)
1439 struct mt7921_dev *dev = phy->dev;
1440 struct mib_stats *mib = &phy->mib;
1441 int i, aggr0 = 0, aggr1;
1444 mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0),
1445 MT_MIB_SDR3_FCS_ERR_MASK);
1446 mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0),
1447 MT_MIB_ACK_FAIL_COUNT_MASK);
1448 mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0),
1449 MT_MIB_BA_FAIL_COUNT_MASK);
1450 mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0),
1451 MT_MIB_RTS_COUNT_MASK);
1452 mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0),
1453 MT_MIB_RTS_FAIL_COUNT_MASK);
1455 mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0));
1456 mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0));
1457 mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0));
1459 val = mt76_rr(dev, MT_MIB_SDR32(0));
1460 mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val);
1461 mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val);
1463 val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0));
1464 mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val);
1465 mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val);
1467 val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0));
1468 mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val);
1469 mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val);
1470 mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val);
1471 mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val);
1473 mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0));
1474 mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0));
1475 mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0));
1476 mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0));
1478 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
1479 val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i));
1480 mib->tx_amsdu[i] += val;
1481 mib->tx_amsdu_cnt += val;
1484 for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) {
1487 val = mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1488 val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1490 dev->mt76.aggr_stats[aggr0++] += val & 0xffff;
1491 dev->mt76.aggr_stats[aggr0++] += val >> 16;
1492 dev->mt76.aggr_stats[aggr1++] += val2 & 0xffff;
1493 dev->mt76.aggr_stats[aggr1++] += val2 >> 16;
1497 void mt7921_mac_work(struct work_struct *work)
1499 struct mt7921_phy *phy;
1500 struct mt76_phy *mphy;
1502 mphy = (struct mt76_phy *)container_of(work, struct mt76_phy,
1506 mt7921_mutex_acquire(phy->dev);
1508 mt76_update_survey(mphy);
1509 if (++mphy->mac_work_count == 2) {
1510 mphy->mac_work_count = 0;
1512 mt7921_mac_update_mib_stats(phy);
1515 mt7921_mutex_release(phy->dev);
1517 mt76_tx_status_check(mphy->dev, false);
1518 ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work,
1519 MT7921_WATCHDOG_TIME);
1522 void mt7921_pm_wake_work(struct work_struct *work)
1524 struct mt7921_dev *dev;
1525 struct mt76_phy *mphy;
1527 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1529 mphy = dev->phy.mt76;
1531 if (!mt7921_mcu_drv_pmctrl(dev)) {
1532 struct mt76_dev *mdev = &dev->mt76;
1535 if (mt76_is_sdio(mdev)) {
1536 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1537 mt76_worker_schedule(&mdev->sdio.txrx_worker);
1539 mt76_for_each_q_rx(mdev, i)
1540 napi_schedule(&mdev->napi[i]);
1541 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1542 mt7921_mcu_tx_cleanup(dev);
1544 if (test_bit(MT76_STATE_RUNNING, &mphy->state))
1545 ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
1546 MT7921_WATCHDOG_TIME);
1549 ieee80211_wake_queues(mphy->hw);
1550 wake_up(&dev->pm.wait);
1553 void mt7921_pm_power_save_work(struct work_struct *work)
1555 struct mt7921_dev *dev;
1556 unsigned long delta;
1557 struct mt76_phy *mphy;
1559 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1561 mphy = dev->phy.mt76;
1563 delta = dev->pm.idle_timeout;
1564 if (test_bit(MT76_HW_SCANNING, &mphy->state) ||
1565 test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) ||
1569 if (mutex_is_locked(&dev->mt76.mutex))
1570 /* if mt76 mutex is held we should not put the device
1571 * to sleep since we are currently accessing device
1572 * register map. We need to wait for the next power_save
1577 if (time_is_after_jiffies(dev->pm.last_activity + delta)) {
1578 delta = dev->pm.last_activity + delta - jiffies;
1582 if (!mt7921_mcu_fw_pmctrl(dev)) {
1583 cancel_delayed_work_sync(&mphy->mac_work);
1587 queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta);
1590 void mt7921_coredump_work(struct work_struct *work)
1592 struct mt7921_dev *dev;
1595 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1596 coredump.work.work);
1598 if (time_is_after_jiffies(dev->coredump.last_activity +
1599 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {
1600 queue_delayed_work(dev->mt76.wq, &dev->coredump.work,
1601 MT76_CONNAC_COREDUMP_TIMEOUT);
1605 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);
1609 struct sk_buff *skb;
1611 spin_lock_bh(&dev->mt76.lock);
1612 skb = __skb_dequeue(&dev->coredump.msg_list);
1613 spin_unlock_bh(&dev->mt76.lock);
1618 skb_pull(skb, sizeof(struct mt7921_mcu_rxd));
1619 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {
1624 memcpy(data, skb->data, skb->len);
1631 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
1634 mt7921_reset(&dev->mt76);
1639 mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid,
1640 enum mt76_txq_id qid, struct ieee80211_sta *sta,
1641 struct ieee80211_key_conf *key, int pid,
1642 struct sk_buff *skb)
1644 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE);
1646 memset(txwi, 0, MT_SDIO_TXD_SIZE);
1647 mt7921_mac_write_txwi(dev, txwi, skb, wcid, key, pid, false);
1648 skb_push(skb, MT_SDIO_TXD_SIZE);
1651 int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
1652 enum mt76_txq_id qid, struct mt76_wcid *wcid,
1653 struct ieee80211_sta *sta,
1654 struct mt76_tx_info *tx_info)
1656 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1657 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
1658 struct ieee80211_key_conf *key = info->control.hw_key;
1659 struct sk_buff *skb = tx_info->skb;
1660 int err, pad, pktid, type;
1662 if (unlikely(tx_info->skb->len <= ETH_HLEN))
1666 wcid = &dev->mt76.global_wcid;
1669 struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
1671 if (time_after(jiffies, msta->last_txs + HZ / 4)) {
1672 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
1673 msta->last_txs = jiffies;
1677 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
1678 mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
1680 type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0;
1681 mt7921_skb_add_usb_sdio_hdr(dev, skb, type);
1682 pad = round_up(skb->len, 4) - skb->len;
1683 if (mt76_is_usb(mdev))
1686 err = mt76_skb_adjust_pad(skb, pad);
1688 /* Release pktid in case of error. */
1689 idr_remove(&wcid->pktid, pktid);
1693 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb);
1695 void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
1696 struct mt76_queue_entry *e)
1698 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE);
1699 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;
1700 struct ieee80211_sta *sta;
1701 struct mt76_wcid *wcid;
1704 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
1705 wcid = rcu_dereference(mdev->wcid[idx]);
1706 sta = wcid_to_sta(wcid);
1708 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE)))
1709 mt7921_tx_check_aggr(sta, txwi);
1711 skb_pull(e->skb, headroom);
1712 mt76_tx_complete_skb(mdev, e->wcid, e->skb);
1714 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb);
1716 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
1718 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1720 mt7921_mutex_acquire(dev);
1721 mt7921_mac_sta_poll(dev);
1722 mt7921_mutex_release(dev);
1726 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data);