mediatek: mt76-6e-usb: Copied entire code from v5.18.y
[platform/kernel/linux-rpi.git] / drivers / net / wireless / mediatek / mt76-6e-usb / mt7615 / mcu.c
1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
3  *
4  * Author: Roy Luo <royluo@google.com>
5  *         Ryder Lee <ryder.lee@mediatek.com>
6  */
7
8 #include <linux/firmware.h>
9 #include "mt7615.h"
10 #include "mcu.h"
11 #include "mac.h"
12 #include "eeprom.h"
13
14 static bool prefer_offload_fw = true;
15 module_param(prefer_offload_fw, bool, 0644);
16 MODULE_PARM_DESC(prefer_offload_fw,
17                  "Prefer client mode offload firmware (MT7663)");
18
19 struct mt7615_patch_hdr {
20         char build_date[16];
21         char platform[4];
22         __be32 hw_sw_ver;
23         __be32 patch_ver;
24         __be16 checksum;
25 } __packed;
26
27 struct mt7615_fw_trailer {
28         __le32 addr;
29         u8 chip_id;
30         u8 feature_set;
31         u8 eco_code;
32         char fw_ver[10];
33         char build_date[15];
34         __le32 len;
35 } __packed;
36
37 #define FW_V3_COMMON_TAILER_SIZE        36
38 #define FW_V3_REGION_TAILER_SIZE        40
39 #define FW_START_OVERRIDE               BIT(0)
40 #define FW_START_DLYCAL                 BIT(1)
41 #define FW_START_WORKING_PDA_CR4        BIT(2)
42
43 struct mt7663_fw_trailer {
44         u8 chip_id;
45         u8 eco_code;
46         u8 n_region;
47         u8 format_ver;
48         u8 format_flag;
49         u8 reserv[2];
50         char fw_ver[10];
51         char build_date[15];
52         __le32 crc;
53 } __packed;
54
55 struct mt7663_fw_buf {
56         __le32 crc;
57         __le32 d_img_size;
58         __le32 block_size;
59         u8 rsv[4];
60         __le32 img_dest_addr;
61         __le32 img_size;
62         u8 feature_set;
63 };
64
65 #define MT7615_PATCH_ADDRESS            0x80000
66 #define MT7622_PATCH_ADDRESS            0x9c000
67 #define MT7663_PATCH_ADDRESS            0xdc000
68
69 #define N9_REGION_NUM                   2
70 #define CR4_REGION_NUM                  1
71
72 #define IMG_CRC_LEN                     4
73
74 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
75                          int cmd, int *wait_seq)
76 {
77         int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
78         struct mt7615_uni_txd *uni_txd;
79         struct mt7615_mcu_txd *mcu_txd;
80         u8 seq, q_idx, pkt_fmt;
81         __le32 *txd;
82         u32 val;
83
84         /* TODO: make dynamic based on msg type */
85         dev->mt76.mcu.timeout = 20 * HZ;
86
87         seq = ++dev->mt76.mcu.msg_seq & 0xf;
88         if (!seq)
89                 seq = ++dev->mt76.mcu.msg_seq & 0xf;
90         if (wait_seq)
91                 *wait_seq = seq;
92
93         txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
94         txd = (__le32 *)skb_push(skb, txd_len);
95
96         if (cmd != MCU_CMD(FW_SCATTER)) {
97                 q_idx = MT_TX_MCU_PORT_RX_Q0;
98                 pkt_fmt = MT_TX_TYPE_CMD;
99         } else {
100                 q_idx = MT_TX_MCU_PORT_RX_FWDL;
101                 pkt_fmt = MT_TX_TYPE_FW;
102         }
103
104         val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
105               FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_MCU) |
106               FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
107         txd[0] = cpu_to_le32(val);
108
109         val = MT_TXD1_LONG_FORMAT |
110               FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD) |
111               FIELD_PREP(MT_TXD1_PKT_FMT, pkt_fmt);
112         txd[1] = cpu_to_le32(val);
113
114         if (cmd & __MCU_CMD_FIELD_UNI) {
115                 uni_txd = (struct mt7615_uni_txd *)txd;
116                 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
117                 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
118                 uni_txd->cid = cpu_to_le16(mcu_cmd);
119                 uni_txd->s2d_index = MCU_S2D_H2N;
120                 uni_txd->pkt_type = MCU_PKT_ID;
121                 uni_txd->seq = seq;
122
123                 return;
124         }
125
126         mcu_txd = (struct mt7615_mcu_txd *)txd;
127         mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
128         mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, q_idx));
129         mcu_txd->s2d_index = MCU_S2D_H2N;
130         mcu_txd->pkt_type = MCU_PKT_ID;
131         mcu_txd->seq = seq;
132         mcu_txd->cid = mcu_cmd;
133         mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
134
135         if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
136                 if (cmd & __MCU_CMD_FIELD_QUERY)
137                         mcu_txd->set_query = MCU_Q_QUERY;
138                 else
139                         mcu_txd->set_query = MCU_Q_SET;
140                 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
141         } else {
142                 mcu_txd->set_query = MCU_Q_NA;
143         }
144 }
145 EXPORT_SYMBOL_GPL(mt7615_mcu_fill_msg);
146
147 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
148                               struct sk_buff *skb, int seq)
149 {
150         struct mt7615_mcu_rxd *rxd;
151         int ret = 0;
152
153         if (!skb) {
154                 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
155                         cmd, seq);
156                 return -ETIMEDOUT;
157         }
158
159         rxd = (struct mt7615_mcu_rxd *)skb->data;
160         if (seq != rxd->seq)
161                 return -EAGAIN;
162
163         if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
164                 skb_pull(skb, sizeof(*rxd) - 4);
165                 ret = *skb->data;
166         } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {
167                 skb_pull(skb, sizeof(*rxd));
168                 ret = le32_to_cpu(*(__le32 *)skb->data);
169         } else if (cmd == MCU_EXT_QUERY(RF_REG_ACCESS)) {
170                 skb_pull(skb, sizeof(*rxd));
171                 ret = le32_to_cpu(*(__le32 *)&skb->data[8]);
172         } else if (cmd == MCU_UNI_CMD(DEV_INFO_UPDATE) ||
173                    cmd == MCU_UNI_CMD(BSS_INFO_UPDATE) ||
174                    cmd == MCU_UNI_CMD(STA_REC_UPDATE) ||
175                    cmd == MCU_UNI_CMD(HIF_CTRL) ||
176                    cmd == MCU_UNI_CMD(OFFLOAD) ||
177                    cmd == MCU_UNI_CMD(SUSPEND)) {
178                 struct mt7615_mcu_uni_event *event;
179
180                 skb_pull(skb, sizeof(*rxd));
181                 event = (struct mt7615_mcu_uni_event *)skb->data;
182                 ret = le32_to_cpu(event->status);
183         } else if (cmd == MCU_CE_QUERY(REG_READ)) {
184                 struct mt7615_mcu_reg_event *event;
185
186                 skb_pull(skb, sizeof(*rxd));
187                 event = (struct mt7615_mcu_reg_event *)skb->data;
188                 ret = (int)le32_to_cpu(event->val);
189         }
190
191         return ret;
192 }
193 EXPORT_SYMBOL_GPL(mt7615_mcu_parse_response);
194
195 static int
196 mt7615_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
197                         int cmd, int *seq)
198 {
199         struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
200         enum mt76_mcuq_id qid;
201
202         mt7615_mcu_fill_msg(dev, skb, cmd, seq);
203         if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
204                 qid = MT_MCUQ_WM;
205         else
206                 qid = MT_MCUQ_FWDL;
207
208         return mt76_tx_queue_skb_raw(dev, dev->mt76.q_mcu[qid], skb, 0);
209 }
210
211 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg)
212 {
213         struct {
214                 __le32 wifi_stream;
215                 __le32 address;
216                 __le32 data;
217         } req = {
218                 .wifi_stream = cpu_to_le32(wf),
219                 .address = cpu_to_le32(reg),
220         };
221
222         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
223                                  &req, sizeof(req), true);
224 }
225
226 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val)
227 {
228         struct {
229                 __le32 wifi_stream;
230                 __le32 address;
231                 __le32 data;
232         } req = {
233                 .wifi_stream = cpu_to_le32(wf),
234                 .address = cpu_to_le32(reg),
235                 .data = cpu_to_le32(val),
236         };
237
238         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
239                                  &req, sizeof(req), false);
240 }
241
242 void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en)
243 {
244         if (!is_mt7622(&dev->mt76))
245                 return;
246
247         regmap_update_bits(dev->infracfg, MT_INFRACFG_MISC,
248                            MT_INFRACFG_MISC_AP2CONN_WAKE,
249                            !en * MT_INFRACFG_MISC_AP2CONN_WAKE);
250 }
251 EXPORT_SYMBOL_GPL(mt7622_trigger_hif_int);
252
253 static int mt7615_mcu_drv_pmctrl(struct mt7615_dev *dev)
254 {
255         struct mt76_phy *mphy = &dev->mt76.phy;
256         struct mt76_connac_pm *pm = &dev->pm;
257         struct mt76_dev *mdev = &dev->mt76;
258         u32 addr;
259         int err;
260
261         if (is_mt7663(mdev)) {
262                 /* Clear firmware own via N9 eint */
263                 mt76_wr(dev, MT_PCIE_DOORBELL_PUSH, MT_CFG_LPCR_HOST_DRV_OWN);
264                 mt76_poll(dev, MT_CONN_ON_MISC, MT_CFG_LPCR_HOST_FW_OWN, 0, 3000);
265
266                 addr = MT_CONN_HIF_ON_LPCTL;
267         } else {
268                 addr = MT_CFG_LPCR_HOST;
269         }
270
271         mt76_wr(dev, addr, MT_CFG_LPCR_HOST_DRV_OWN);
272
273         mt7622_trigger_hif_int(dev, true);
274
275         err = !mt76_poll_msec(dev, addr, MT_CFG_LPCR_HOST_FW_OWN, 0, 3000);
276
277         mt7622_trigger_hif_int(dev, false);
278
279         if (err) {
280                 dev_err(mdev->dev, "driver own failed\n");
281                 return -ETIMEDOUT;
282         }
283
284         clear_bit(MT76_STATE_PM, &mphy->state);
285
286         pm->stats.last_wake_event = jiffies;
287         pm->stats.doze_time += pm->stats.last_wake_event -
288                                pm->stats.last_doze_event;
289
290         return 0;
291 }
292
293 static int mt7615_mcu_lp_drv_pmctrl(struct mt7615_dev *dev)
294 {
295         struct mt76_phy *mphy = &dev->mt76.phy;
296         struct mt76_connac_pm *pm = &dev->pm;
297         int i, err = 0;
298
299         mutex_lock(&pm->mutex);
300
301         if (!test_bit(MT76_STATE_PM, &mphy->state))
302                 goto out;
303
304         for (i = 0; i < MT7615_DRV_OWN_RETRY_COUNT; i++) {
305                 mt76_wr(dev, MT_PCIE_DOORBELL_PUSH, MT_CFG_LPCR_HOST_DRV_OWN);
306                 if (mt76_poll_msec(dev, MT_CONN_HIF_ON_LPCTL,
307                                    MT_CFG_LPCR_HOST_FW_OWN, 0, 50))
308                         break;
309         }
310
311         if (i == MT7615_DRV_OWN_RETRY_COUNT) {
312                 dev_err(dev->mt76.dev, "driver own failed\n");
313                 err = -EIO;
314                 goto out;
315         }
316         clear_bit(MT76_STATE_PM, &mphy->state);
317
318         pm->stats.last_wake_event = jiffies;
319         pm->stats.doze_time += pm->stats.last_wake_event -
320                                pm->stats.last_doze_event;
321 out:
322         mutex_unlock(&pm->mutex);
323
324         return err;
325 }
326
327 static int mt7615_mcu_fw_pmctrl(struct mt7615_dev *dev)
328 {
329         struct mt76_phy *mphy = &dev->mt76.phy;
330         struct mt76_connac_pm *pm = &dev->pm;
331         int err = 0;
332         u32 addr;
333
334         mutex_lock(&pm->mutex);
335
336         if (mt76_connac_skip_fw_pmctrl(mphy, pm))
337                 goto out;
338
339         mt7622_trigger_hif_int(dev, true);
340
341         addr = is_mt7663(&dev->mt76) ? MT_CONN_HIF_ON_LPCTL : MT_CFG_LPCR_HOST;
342         mt76_wr(dev, addr, MT_CFG_LPCR_HOST_FW_OWN);
343
344         if (is_mt7622(&dev->mt76) &&
345             !mt76_poll_msec(dev, addr, MT_CFG_LPCR_HOST_FW_OWN,
346                             MT_CFG_LPCR_HOST_FW_OWN, 3000)) {
347                 dev_err(dev->mt76.dev, "Timeout for firmware own\n");
348                 clear_bit(MT76_STATE_PM, &mphy->state);
349                 err = -EIO;
350         }
351
352         mt7622_trigger_hif_int(dev, false);
353         if (!err) {
354                 pm->stats.last_doze_event = jiffies;
355                 pm->stats.awake_time += pm->stats.last_doze_event -
356                                         pm->stats.last_wake_event;
357         }
358 out:
359         mutex_unlock(&pm->mutex);
360
361         return err;
362 }
363
364 static void
365 mt7615_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
366 {
367         if (vif->csa_active)
368                 ieee80211_csa_finish(vif);
369 }
370
371 static void
372 mt7615_mcu_rx_csa_notify(struct mt7615_dev *dev, struct sk_buff *skb)
373 {
374         struct mt7615_phy *ext_phy = mt7615_ext_phy(dev);
375         struct mt76_phy *mphy = &dev->mt76.phy;
376         struct mt7615_mcu_csa_notify *c;
377
378         c = (struct mt7615_mcu_csa_notify *)skb->data;
379
380         if (c->omac_idx > EXT_BSSID_MAX)
381                 return;
382
383         if (ext_phy && ext_phy->omac_mask & BIT_ULL(c->omac_idx))
384                 mphy = dev->mt76.phy2;
385
386         ieee80211_iterate_active_interfaces_atomic(mphy->hw,
387                         IEEE80211_IFACE_ITER_RESUME_ALL,
388                         mt7615_mcu_csa_finish, mphy->hw);
389 }
390
391 static void
392 mt7615_mcu_rx_radar_detected(struct mt7615_dev *dev, struct sk_buff *skb)
393 {
394         struct mt76_phy *mphy = &dev->mt76.phy;
395         struct mt7615_mcu_rdd_report *r;
396
397         r = (struct mt7615_mcu_rdd_report *)skb->data;
398
399         if (!dev->radar_pattern.n_pulses && !r->long_detected &&
400             !r->constant_prf_detected && !r->staggered_prf_detected)
401                 return;
402
403         if (r->band_idx && dev->mt76.phy2)
404                 mphy = dev->mt76.phy2;
405
406         if (mt76_phy_dfs_state(mphy) < MT_DFS_STATE_CAC)
407                 return;
408
409         ieee80211_radar_detected(mphy->hw);
410         dev->hw_pattern++;
411 }
412
413 static void
414 mt7615_mcu_rx_log_message(struct mt7615_dev *dev, struct sk_buff *skb)
415 {
416         struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data;
417         const char *data = (char *)&rxd[1];
418         const char *type;
419
420         switch (rxd->s2d_index) {
421         case 0:
422                 type = "N9";
423                 break;
424         case 2:
425                 type = "CR4";
426                 break;
427         default:
428                 type = "unknown";
429                 break;
430         }
431
432         wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type,
433                    (int)(skb->len - sizeof(*rxd)), data);
434 }
435
436 static void
437 mt7615_mcu_rx_ext_event(struct mt7615_dev *dev, struct sk_buff *skb)
438 {
439         struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data;
440
441         switch (rxd->ext_eid) {
442         case MCU_EXT_EVENT_RDD_REPORT:
443                 mt7615_mcu_rx_radar_detected(dev, skb);
444                 break;
445         case MCU_EXT_EVENT_CSA_NOTIFY:
446                 mt7615_mcu_rx_csa_notify(dev, skb);
447                 break;
448         case MCU_EXT_EVENT_FW_LOG_2_HOST:
449                 mt7615_mcu_rx_log_message(dev, skb);
450                 break;
451         default:
452                 break;
453         }
454 }
455
456 static void
457 mt7615_mcu_scan_event(struct mt7615_dev *dev, struct sk_buff *skb)
458 {
459         u8 *seq_num = skb->data + sizeof(struct mt7615_mcu_rxd);
460         struct mt7615_phy *phy;
461         struct mt76_phy *mphy;
462
463         if (*seq_num & BIT(7) && dev->mt76.phy2)
464                 mphy = dev->mt76.phy2;
465         else
466                 mphy = &dev->mt76.phy;
467
468         phy = (struct mt7615_phy *)mphy->priv;
469
470         spin_lock_bh(&dev->mt76.lock);
471         __skb_queue_tail(&phy->scan_event_list, skb);
472         spin_unlock_bh(&dev->mt76.lock);
473
474         ieee80211_queue_delayed_work(mphy->hw, &phy->scan_work,
475                                      MT7615_HW_SCAN_TIMEOUT);
476 }
477
478 static void
479 mt7615_mcu_roc_event(struct mt7615_dev *dev, struct sk_buff *skb)
480 {
481         struct mt7615_roc_tlv *event;
482         struct mt7615_phy *phy;
483         struct mt76_phy *mphy;
484         int duration;
485
486         skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
487         event = (struct mt7615_roc_tlv *)skb->data;
488
489         if (event->dbdc_band && dev->mt76.phy2)
490                 mphy = dev->mt76.phy2;
491         else
492                 mphy = &dev->mt76.phy;
493
494         ieee80211_ready_on_channel(mphy->hw);
495
496         phy = (struct mt7615_phy *)mphy->priv;
497         phy->roc_grant = true;
498         wake_up(&phy->roc_wait);
499
500         duration = le32_to_cpu(event->max_interval);
501         mod_timer(&phy->roc_timer,
502                   round_jiffies_up(jiffies + msecs_to_jiffies(duration)));
503 }
504
505 static void
506 mt7615_mcu_beacon_loss_event(struct mt7615_dev *dev, struct sk_buff *skb)
507 {
508         struct mt76_connac_beacon_loss_event *event;
509         struct mt76_phy *mphy;
510         u8 band_idx = 0; /* DBDC support */
511
512         skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
513         event = (struct mt76_connac_beacon_loss_event *)skb->data;
514         if (band_idx && dev->mt76.phy2)
515                 mphy = dev->mt76.phy2;
516         else
517                 mphy = &dev->mt76.phy;
518
519         ieee80211_iterate_active_interfaces_atomic(mphy->hw,
520                                         IEEE80211_IFACE_ITER_RESUME_ALL,
521                                         mt76_connac_mcu_beacon_loss_iter,
522                                         event);
523 }
524
525 static void
526 mt7615_mcu_bss_event(struct mt7615_dev *dev, struct sk_buff *skb)
527 {
528         struct mt76_connac_mcu_bss_event *event;
529         struct mt76_phy *mphy;
530         u8 band_idx = 0; /* DBDC support */
531
532         skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
533         event = (struct mt76_connac_mcu_bss_event *)skb->data;
534
535         if (band_idx && dev->mt76.phy2)
536                 mphy = dev->mt76.phy2;
537         else
538                 mphy = &dev->mt76.phy;
539
540         if (event->is_absent)
541                 ieee80211_stop_queues(mphy->hw);
542         else
543                 ieee80211_wake_queues(mphy->hw);
544 }
545
546 static void
547 mt7615_mcu_rx_unsolicited_event(struct mt7615_dev *dev, struct sk_buff *skb)
548 {
549         struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data;
550
551         switch (rxd->eid) {
552         case MCU_EVENT_EXT:
553                 mt7615_mcu_rx_ext_event(dev, skb);
554                 break;
555         case MCU_EVENT_BSS_BEACON_LOSS:
556                 mt7615_mcu_beacon_loss_event(dev, skb);
557                 break;
558         case MCU_EVENT_ROC:
559                 mt7615_mcu_roc_event(dev, skb);
560                 break;
561         case MCU_EVENT_SCHED_SCAN_DONE:
562         case MCU_EVENT_SCAN_DONE:
563                 mt7615_mcu_scan_event(dev, skb);
564                 return;
565         case MCU_EVENT_BSS_ABSENCE:
566                 mt7615_mcu_bss_event(dev, skb);
567                 break;
568         case MCU_EVENT_COREDUMP:
569                 mt76_connac_mcu_coredump_event(&dev->mt76, skb,
570                                                &dev->coredump);
571                 return;
572         default:
573                 break;
574         }
575         dev_kfree_skb(skb);
576 }
577
578 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb)
579 {
580         struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data;
581
582         if (rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||
583             rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
584             rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||
585             rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||
586             rxd->eid == MCU_EVENT_BSS_BEACON_LOSS ||
587             rxd->eid == MCU_EVENT_SCHED_SCAN_DONE ||
588             rxd->eid == MCU_EVENT_BSS_ABSENCE ||
589             rxd->eid == MCU_EVENT_SCAN_DONE ||
590             rxd->eid == MCU_EVENT_COREDUMP ||
591             rxd->eid == MCU_EVENT_ROC ||
592             !rxd->seq)
593                 mt7615_mcu_rx_unsolicited_event(dev, skb);
594         else
595                 mt76_mcu_rx_event(&dev->mt76, skb);
596 }
597
598 static int
599 mt7615_mcu_muar_config(struct mt7615_dev *dev, struct ieee80211_vif *vif,
600                        bool bssid, bool enable)
601 {
602         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
603         u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
604         u32 mask = dev->omac_mask >> 32 & ~BIT(idx);
605         const u8 *addr = vif->addr;
606         struct {
607                 u8 mode;
608                 u8 force_clear;
609                 u8 clear_bitmap[8];
610                 u8 entry_count;
611                 u8 write;
612
613                 u8 index;
614                 u8 bssid;
615                 u8 addr[ETH_ALEN];
616         } __packed req = {
617                 .mode = !!mask || enable,
618                 .entry_count = 1,
619                 .write = 1,
620
621                 .index = idx * 2 + bssid,
622         };
623
624         if (bssid)
625                 addr = vif->bss_conf.bssid;
626
627         if (enable)
628                 ether_addr_copy(req.addr, addr);
629
630         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE),
631                                  &req, sizeof(req), true);
632 }
633
634 static int
635 mt7615_mcu_add_dev(struct mt7615_phy *phy, struct ieee80211_vif *vif,
636                    bool enable)
637 {
638         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
639         struct mt7615_dev *dev = phy->dev;
640         struct {
641                 struct req_hdr {
642                         u8 omac_idx;
643                         u8 band_idx;
644                         __le16 tlv_num;
645                         u8 is_tlv_append;
646                         u8 rsv[3];
647                 } __packed hdr;
648                 struct req_tlv {
649                         __le16 tag;
650                         __le16 len;
651                         u8 active;
652                         u8 band_idx;
653                         u8 omac_addr[ETH_ALEN];
654                 } __packed tlv;
655         } data = {
656                 .hdr = {
657                         .omac_idx = mvif->mt76.omac_idx,
658                         .band_idx = mvif->mt76.band_idx,
659                         .tlv_num = cpu_to_le16(1),
660                         .is_tlv_append = 1,
661                 },
662                 .tlv = {
663                         .tag = cpu_to_le16(DEV_INFO_ACTIVE),
664                         .len = cpu_to_le16(sizeof(struct req_tlv)),
665                         .active = enable,
666                         .band_idx = mvif->mt76.band_idx,
667                 },
668         };
669
670         if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
671                 return mt7615_mcu_muar_config(dev, vif, false, enable);
672
673         memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
674         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),
675                                  &data, sizeof(data), true);
676 }
677
678 static int
679 mt7615_mcu_add_beacon_offload(struct mt7615_dev *dev,
680                               struct ieee80211_hw *hw,
681                               struct ieee80211_vif *vif, bool enable)
682 {
683         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
684         struct mt76_wcid *wcid = &dev->mt76.global_wcid;
685         struct ieee80211_mutable_offsets offs;
686         struct ieee80211_tx_info *info;
687         struct req {
688                 u8 omac_idx;
689                 u8 enable;
690                 u8 wlan_idx;
691                 u8 band_idx;
692                 u8 pkt_type;
693                 u8 need_pre_tbtt_int;
694                 __le16 csa_ie_pos;
695                 __le16 pkt_len;
696                 __le16 tim_ie_pos;
697                 u8 pkt[512];
698                 u8 csa_cnt;
699                 /* bss color change */
700                 u8 bcc_cnt;
701                 __le16 bcc_ie_pos;
702         } __packed req = {
703                 .omac_idx = mvif->mt76.omac_idx,
704                 .enable = enable,
705                 .wlan_idx = wcid->idx,
706                 .band_idx = mvif->mt76.band_idx,
707         };
708         struct sk_buff *skb;
709
710         if (!enable)
711                 goto out;
712
713         skb = ieee80211_beacon_get_template(hw, vif, &offs);
714         if (!skb)
715                 return -EINVAL;
716
717         if (skb->len > 512 - MT_TXD_SIZE) {
718                 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
719                 dev_kfree_skb(skb);
720                 return -EINVAL;
721         }
722
723         if (mvif->mt76.band_idx) {
724                 info = IEEE80211_SKB_CB(skb);
725                 info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY;
726         }
727
728         mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL,
729                               0, NULL, true);
730         memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len);
731         req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
732         req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset);
733         if (offs.cntdwn_counter_offs[0]) {
734                 u16 csa_offs;
735
736                 csa_offs = MT_TXD_SIZE + offs.cntdwn_counter_offs[0] - 4;
737                 req.csa_ie_pos = cpu_to_le16(csa_offs);
738                 req.csa_cnt = skb->data[offs.cntdwn_counter_offs[0]];
739         }
740         dev_kfree_skb(skb);
741
742 out:
743         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(BCN_OFFLOAD), &req,
744                                  sizeof(req), true);
745 }
746
747 static int
748 mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int state)
749 {
750         return mt76_connac_mcu_set_pm(&dev->mt76, band, state);
751 }
752
753 static int
754 mt7615_mcu_add_bss(struct mt7615_phy *phy, struct ieee80211_vif *vif,
755                    struct ieee80211_sta *sta, bool enable)
756 {
757         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
758         struct mt7615_dev *dev = phy->dev;
759         struct sk_buff *skb;
760
761         if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
762                 mt7615_mcu_muar_config(dev, vif, true, enable);
763
764         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL);
765         if (IS_ERR(skb))
766                 return PTR_ERR(skb);
767
768         if (enable)
769                 mt76_connac_mcu_bss_omac_tlv(skb, vif);
770
771         mt76_connac_mcu_bss_basic_tlv(skb, vif, sta, phy->mt76,
772                                       mvif->sta.wcid.idx, enable);
773
774         if (enable && mvif->mt76.omac_idx >= EXT_BSSID_START &&
775             mvif->mt76.omac_idx < REPEATER_BSSID_START)
776                 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);
777
778         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
779                                      MCU_EXT_CMD(BSS_INFO_UPDATE), true);
780 }
781
782 static int
783 mt7615_mcu_wtbl_tx_ba(struct mt7615_dev *dev,
784                       struct ieee80211_ampdu_params *params,
785                       bool enable)
786 {
787         struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv;
788         struct mt7615_vif *mvif = msta->vif;
789         struct wtbl_req_hdr *wtbl_hdr;
790         struct sk_buff *skb = NULL;
791         int err;
792
793         wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
794                                                   WTBL_SET, NULL, &skb);
795         if (IS_ERR(wtbl_hdr))
796                 return PTR_ERR(wtbl_hdr);
797
798         mt76_connac_mcu_wtbl_ba_tlv(&dev->mt76, skb, params, enable, true,
799                                     NULL, wtbl_hdr);
800
801         err = mt76_mcu_skb_send_msg(&dev->mt76, skb,
802                                     MCU_EXT_CMD(WTBL_UPDATE), true);
803         if (err < 0)
804                 return err;
805
806         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
807                                             &msta->wcid);
808         if (IS_ERR(skb))
809                 return PTR_ERR(skb);
810
811         mt76_connac_mcu_sta_ba_tlv(skb, params, enable, true);
812
813         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
814                                      MCU_EXT_CMD(STA_REC_UPDATE), true);
815 }
816
817 static int
818 mt7615_mcu_wtbl_rx_ba(struct mt7615_dev *dev,
819                       struct ieee80211_ampdu_params *params,
820                       bool enable)
821 {
822         struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv;
823         struct mt7615_vif *mvif = msta->vif;
824         struct wtbl_req_hdr *wtbl_hdr;
825         struct sk_buff *skb;
826         int err;
827
828         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
829                                             &msta->wcid);
830         if (IS_ERR(skb))
831                 return PTR_ERR(skb);
832
833         mt76_connac_mcu_sta_ba_tlv(skb, params, enable, false);
834
835         err = mt76_mcu_skb_send_msg(&dev->mt76, skb,
836                                     MCU_EXT_CMD(STA_REC_UPDATE), true);
837         if (err < 0 || !enable)
838                 return err;
839
840         skb = NULL;
841         wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
842                                                   WTBL_SET, NULL, &skb);
843         if (IS_ERR(wtbl_hdr))
844                 return PTR_ERR(wtbl_hdr);
845
846         mt76_connac_mcu_wtbl_ba_tlv(&dev->mt76, skb, params, enable, false,
847                                     NULL, wtbl_hdr);
848
849         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
850                                      MCU_EXT_CMD(WTBL_UPDATE), true);
851 }
852
853 static int
854 mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif,
855                         struct ieee80211_sta *sta, bool enable)
856 {
857         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
858         struct sk_buff *skb, *sskb, *wskb = NULL;
859         struct mt7615_dev *dev = phy->dev;
860         struct wtbl_req_hdr *wtbl_hdr;
861         struct mt7615_sta *msta;
862         int cmd, err;
863
864         msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta;
865
866         sskb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
867                                              &msta->wcid);
868         if (IS_ERR(sskb))
869                 return PTR_ERR(sskb);
870
871         mt76_connac_mcu_sta_basic_tlv(sskb, vif, sta, enable, true);
872         if (enable && sta)
873                 mt76_connac_mcu_sta_tlv(phy->mt76, sskb, sta, vif, 0,
874                                         MT76_STA_INFO_STATE_ASSOC);
875
876         wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
877                                                   WTBL_RESET_AND_SET, NULL,
878                                                   &wskb);
879         if (IS_ERR(wtbl_hdr))
880                 return PTR_ERR(wtbl_hdr);
881
882         if (enable) {
883                 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, wskb, vif, sta,
884                                                  NULL, wtbl_hdr);
885                 if (sta)
886                         mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, wskb, sta,
887                                                     NULL, wtbl_hdr, true, true);
888                 mt76_connac_mcu_wtbl_hdr_trans_tlv(wskb, vif, &msta->wcid,
889                                                    NULL, wtbl_hdr);
890         }
891
892         cmd = enable ? MCU_EXT_CMD(WTBL_UPDATE) : MCU_EXT_CMD(STA_REC_UPDATE);
893         skb = enable ? wskb : sskb;
894
895         err = mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, true);
896         if (err < 0) {
897                 skb = enable ? sskb : wskb;
898                 dev_kfree_skb(skb);
899
900                 return err;
901         }
902
903         cmd = enable ? MCU_EXT_CMD(STA_REC_UPDATE) : MCU_EXT_CMD(WTBL_UPDATE);
904         skb = enable ? sskb : wskb;
905
906         return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, true);
907 }
908
909 static int
910 mt7615_mcu_wtbl_update_hdr_trans(struct mt7615_dev *dev,
911                                  struct ieee80211_vif *vif,
912                                  struct ieee80211_sta *sta)
913 {
914         return mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta);
915 }
916
917 static const struct mt7615_mcu_ops wtbl_update_ops = {
918         .add_beacon_offload = mt7615_mcu_add_beacon_offload,
919         .set_pm_state = mt7615_mcu_ctrl_pm_state,
920         .add_dev_info = mt7615_mcu_add_dev,
921         .add_bss_info = mt7615_mcu_add_bss,
922         .add_tx_ba = mt7615_mcu_wtbl_tx_ba,
923         .add_rx_ba = mt7615_mcu_wtbl_rx_ba,
924         .sta_add = mt7615_mcu_wtbl_sta_add,
925         .set_drv_ctrl = mt7615_mcu_drv_pmctrl,
926         .set_fw_ctrl = mt7615_mcu_fw_pmctrl,
927         .set_sta_decap_offload = mt7615_mcu_wtbl_update_hdr_trans,
928 };
929
930 static int
931 mt7615_mcu_sta_ba(struct mt7615_dev *dev,
932                   struct ieee80211_ampdu_params *params,
933                   bool enable, bool tx)
934 {
935         struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv;
936         struct mt7615_vif *mvif = msta->vif;
937         struct wtbl_req_hdr *wtbl_hdr;
938         struct tlv *sta_wtbl;
939         struct sk_buff *skb;
940
941         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
942                                             &msta->wcid);
943         if (IS_ERR(skb))
944                 return PTR_ERR(skb);
945
946         mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx);
947
948         sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));
949
950         wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
951                                                   WTBL_SET, sta_wtbl, &skb);
952         if (IS_ERR(wtbl_hdr))
953                 return PTR_ERR(wtbl_hdr);
954
955         mt76_connac_mcu_wtbl_ba_tlv(&dev->mt76, skb, params, enable, tx,
956                                     sta_wtbl, wtbl_hdr);
957
958         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
959                                      MCU_EXT_CMD(STA_REC_UPDATE), true);
960 }
961
962 static int
963 mt7615_mcu_sta_tx_ba(struct mt7615_dev *dev,
964                      struct ieee80211_ampdu_params *params,
965                      bool enable)
966 {
967         return mt7615_mcu_sta_ba(dev, params, enable, true);
968 }
969
970 static int
971 mt7615_mcu_sta_rx_ba(struct mt7615_dev *dev,
972                      struct ieee80211_ampdu_params *params,
973                      bool enable)
974 {
975         return mt7615_mcu_sta_ba(dev, params, enable, false);
976 }
977
978 static int
979 __mt7615_mcu_add_sta(struct mt76_phy *phy, struct ieee80211_vif *vif,
980                      struct ieee80211_sta *sta, bool enable, int cmd,
981                      bool offload_fw)
982 {
983         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
984         struct mt76_sta_cmd_info info = {
985                 .sta = sta,
986                 .vif = vif,
987                 .offload_fw = offload_fw,
988                 .enable = enable,
989                 .newly = true,
990                 .cmd = cmd,
991         };
992
993         info.wcid = sta ? (struct mt76_wcid *)sta->drv_priv : &mvif->sta.wcid;
994         return mt76_connac_mcu_sta_cmd(phy, &info);
995 }
996
997 static int
998 mt7615_mcu_add_sta(struct mt7615_phy *phy, struct ieee80211_vif *vif,
999                    struct ieee80211_sta *sta, bool enable)
1000 {
1001         return __mt7615_mcu_add_sta(phy->mt76, vif, sta, enable,
1002                                     MCU_EXT_CMD(STA_REC_UPDATE), false);
1003 }
1004
1005 static int
1006 mt7615_mcu_sta_update_hdr_trans(struct mt7615_dev *dev,
1007                                 struct ieee80211_vif *vif,
1008                                 struct ieee80211_sta *sta)
1009 {
1010         struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
1011
1012         return mt76_connac_mcu_sta_update_hdr_trans(&dev->mt76,
1013                                                     vif, &msta->wcid,
1014                                                     MCU_EXT_CMD(STA_REC_UPDATE));
1015 }
1016
1017 static const struct mt7615_mcu_ops sta_update_ops = {
1018         .add_beacon_offload = mt7615_mcu_add_beacon_offload,
1019         .set_pm_state = mt7615_mcu_ctrl_pm_state,
1020         .add_dev_info = mt7615_mcu_add_dev,
1021         .add_bss_info = mt7615_mcu_add_bss,
1022         .add_tx_ba = mt7615_mcu_sta_tx_ba,
1023         .add_rx_ba = mt7615_mcu_sta_rx_ba,
1024         .sta_add = mt7615_mcu_add_sta,
1025         .set_drv_ctrl = mt7615_mcu_drv_pmctrl,
1026         .set_fw_ctrl = mt7615_mcu_fw_pmctrl,
1027         .set_sta_decap_offload = mt7615_mcu_sta_update_hdr_trans,
1028 };
1029
1030 static int
1031 mt7615_mcu_uni_ctrl_pm_state(struct mt7615_dev *dev, int band, int state)
1032 {
1033         return 0;
1034 }
1035
1036 static int
1037 mt7615_mcu_uni_add_beacon_offload(struct mt7615_dev *dev,
1038                                   struct ieee80211_hw *hw,
1039                                   struct ieee80211_vif *vif,
1040                                   bool enable)
1041 {
1042         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
1043         struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1044         struct ieee80211_mutable_offsets offs;
1045         struct {
1046                 struct req_hdr {
1047                         u8 bss_idx;
1048                         u8 pad[3];
1049                 } __packed hdr;
1050                 struct bcn_content_tlv {
1051                         __le16 tag;
1052                         __le16 len;
1053                         __le16 tim_ie_pos;
1054                         __le16 csa_ie_pos;
1055                         __le16 bcc_ie_pos;
1056                         /* 0: disable beacon offload
1057                          * 1: enable beacon offload
1058                          * 2: update probe respond offload
1059                          */
1060                         u8 enable;
1061                         /* 0: legacy format (TXD + payload)
1062                          * 1: only cap field IE
1063                          */
1064                         u8 type;
1065                         __le16 pkt_len;
1066                         u8 pkt[512];
1067                 } __packed beacon_tlv;
1068         } req = {
1069                 .hdr = {
1070                         .bss_idx = mvif->mt76.idx,
1071                 },
1072                 .beacon_tlv = {
1073                         .tag = cpu_to_le16(UNI_BSS_INFO_BCN_CONTENT),
1074                         .len = cpu_to_le16(sizeof(struct bcn_content_tlv)),
1075                         .enable = enable,
1076                 },
1077         };
1078         struct sk_buff *skb;
1079
1080         if (!enable)
1081                 goto out;
1082
1083         skb = ieee80211_beacon_get_template(mt76_hw(dev), vif, &offs);
1084         if (!skb)
1085                 return -EINVAL;
1086
1087         if (skb->len > 512 - MT_TXD_SIZE) {
1088                 dev_err(dev->mt76.dev, "beacon size limit exceed\n");
1089                 dev_kfree_skb(skb);
1090                 return -EINVAL;
1091         }
1092
1093         mt7615_mac_write_txwi(dev, (__le32 *)(req.beacon_tlv.pkt), skb,
1094                               wcid, NULL, 0, NULL, true);
1095         memcpy(req.beacon_tlv.pkt + MT_TXD_SIZE, skb->data, skb->len);
1096         req.beacon_tlv.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1097         req.beacon_tlv.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset);
1098
1099         if (offs.cntdwn_counter_offs[0]) {
1100                 u16 csa_offs;
1101
1102                 csa_offs = MT_TXD_SIZE + offs.cntdwn_counter_offs[0] - 4;
1103                 req.beacon_tlv.csa_ie_pos = cpu_to_le16(csa_offs);
1104         }
1105         dev_kfree_skb(skb);
1106
1107 out:
1108         return mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD(BSS_INFO_UPDATE),
1109                                  &req, sizeof(req), true);
1110 }
1111
1112 static int
1113 mt7615_mcu_uni_add_dev(struct mt7615_phy *phy, struct ieee80211_vif *vif,
1114                        bool enable)
1115 {
1116         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
1117
1118         return mt76_connac_mcu_uni_add_dev(phy->mt76, vif, &mvif->sta.wcid,
1119                                            enable);
1120 }
1121
1122 static int
1123 mt7615_mcu_uni_add_bss(struct mt7615_phy *phy, struct ieee80211_vif *vif,
1124                        struct ieee80211_sta *sta, bool enable)
1125 {
1126         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
1127
1128         return mt76_connac_mcu_uni_add_bss(phy->mt76, vif, &mvif->sta.wcid,
1129                                            enable);
1130 }
1131
1132 static inline int
1133 mt7615_mcu_uni_add_sta(struct mt7615_phy *phy, struct ieee80211_vif *vif,
1134                        struct ieee80211_sta *sta, bool enable)
1135 {
1136         return __mt7615_mcu_add_sta(phy->mt76, vif, sta, enable,
1137                                     MCU_UNI_CMD(STA_REC_UPDATE), true);
1138 }
1139
1140 static int
1141 mt7615_mcu_uni_tx_ba(struct mt7615_dev *dev,
1142                      struct ieee80211_ampdu_params *params,
1143                      bool enable)
1144 {
1145         struct mt7615_sta *sta = (struct mt7615_sta *)params->sta->drv_priv;
1146
1147         return mt76_connac_mcu_sta_ba(&dev->mt76, &sta->vif->mt76, params,
1148                                       MCU_UNI_CMD(STA_REC_UPDATE), enable,
1149                                       true);
1150 }
1151
1152 static int
1153 mt7615_mcu_uni_rx_ba(struct mt7615_dev *dev,
1154                      struct ieee80211_ampdu_params *params,
1155                      bool enable)
1156 {
1157         struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv;
1158         struct mt7615_vif *mvif = msta->vif;
1159         struct wtbl_req_hdr *wtbl_hdr;
1160         struct tlv *sta_wtbl;
1161         struct sk_buff *skb;
1162         int err;
1163
1164         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1165                                             &msta->wcid);
1166         if (IS_ERR(skb))
1167                 return PTR_ERR(skb);
1168
1169         mt76_connac_mcu_sta_ba_tlv(skb, params, enable, false);
1170
1171         err = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1172                                     MCU_UNI_CMD(STA_REC_UPDATE), true);
1173         if (err < 0 || !enable)
1174                 return err;
1175
1176         skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1177                                             &msta->wcid);
1178         if (IS_ERR(skb))
1179                 return PTR_ERR(skb);
1180
1181         sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1182                                            sizeof(struct tlv));
1183
1184         wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1185                                                   WTBL_SET, sta_wtbl, &skb);
1186         if (IS_ERR(wtbl_hdr))
1187                 return PTR_ERR(wtbl_hdr);
1188
1189         mt76_connac_mcu_wtbl_ba_tlv(&dev->mt76, skb, params, enable, false,
1190                                     sta_wtbl, wtbl_hdr);
1191
1192         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1193                                      MCU_UNI_CMD(STA_REC_UPDATE), true);
1194 }
1195
1196 static int
1197 mt7615_mcu_sta_uni_update_hdr_trans(struct mt7615_dev *dev,
1198                                     struct ieee80211_vif *vif,
1199                                     struct ieee80211_sta *sta)
1200 {
1201         struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
1202
1203         return mt76_connac_mcu_sta_update_hdr_trans(&dev->mt76,
1204                                                     vif, &msta->wcid,
1205                                                     MCU_UNI_CMD(STA_REC_UPDATE));
1206 }
1207
1208 static const struct mt7615_mcu_ops uni_update_ops = {
1209         .add_beacon_offload = mt7615_mcu_uni_add_beacon_offload,
1210         .set_pm_state = mt7615_mcu_uni_ctrl_pm_state,
1211         .add_dev_info = mt7615_mcu_uni_add_dev,
1212         .add_bss_info = mt7615_mcu_uni_add_bss,
1213         .add_tx_ba = mt7615_mcu_uni_tx_ba,
1214         .add_rx_ba = mt7615_mcu_uni_rx_ba,
1215         .sta_add = mt7615_mcu_uni_add_sta,
1216         .set_drv_ctrl = mt7615_mcu_lp_drv_pmctrl,
1217         .set_fw_ctrl = mt7615_mcu_fw_pmctrl,
1218         .set_sta_decap_offload = mt7615_mcu_sta_uni_update_hdr_trans,
1219 };
1220
1221 int mt7615_mcu_restart(struct mt76_dev *dev)
1222 {
1223         return mt76_mcu_send_msg(dev, MCU_CMD(RESTART_DL_REQ), NULL, 0, true);
1224 }
1225 EXPORT_SYMBOL_GPL(mt7615_mcu_restart);
1226
1227 static int mt7615_load_patch(struct mt7615_dev *dev, u32 addr, const char *name)
1228 {
1229         const struct mt7615_patch_hdr *hdr;
1230         const struct firmware *fw = NULL;
1231         int len, ret, sem;
1232
1233         ret = firmware_request_nowarn(&fw, name, dev->mt76.dev);
1234         if (ret)
1235                 return ret;
1236
1237         if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
1238                 dev_err(dev->mt76.dev, "Invalid firmware\n");
1239                 ret = -EINVAL;
1240                 goto release_fw;
1241         }
1242
1243         sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, true);
1244         switch (sem) {
1245         case PATCH_IS_DL:
1246                 goto release_fw;
1247         case PATCH_NOT_DL_SEM_SUCCESS:
1248                 break;
1249         default:
1250                 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n");
1251                 ret = -EAGAIN;
1252                 goto release_fw;
1253         }
1254
1255         hdr = (const struct mt7615_patch_hdr *)(fw->data);
1256
1257         dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
1258                  be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
1259
1260         len = fw->size - sizeof(*hdr);
1261
1262         ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
1263                                             DL_MODE_NEED_RSP);
1264         if (ret) {
1265                 dev_err(dev->mt76.dev, "Download request failed\n");
1266                 goto out;
1267         }
1268
1269         ret = mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
1270                                      fw->data + sizeof(*hdr), len);
1271         if (ret) {
1272                 dev_err(dev->mt76.dev, "Failed to send firmware to device\n");
1273                 goto out;
1274         }
1275
1276         ret = mt76_connac_mcu_start_patch(&dev->mt76);
1277         if (ret)
1278                 dev_err(dev->mt76.dev, "Failed to start patch\n");
1279
1280 out:
1281         sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false);
1282         switch (sem) {
1283         case PATCH_REL_SEM_SUCCESS:
1284                 break;
1285         default:
1286                 ret = -EAGAIN;
1287                 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n");
1288                 break;
1289         }
1290
1291 release_fw:
1292         release_firmware(fw);
1293
1294         return ret;
1295 }
1296
1297 static int
1298 mt7615_mcu_send_ram_firmware(struct mt7615_dev *dev,
1299                              const struct mt7615_fw_trailer *hdr,
1300                              const u8 *data, bool is_cr4)
1301 {
1302         int n_region = is_cr4 ? CR4_REGION_NUM : N9_REGION_NUM;
1303         int err, i, offset = 0;
1304         u32 len, addr, mode;
1305
1306         for (i = 0; i < n_region; i++) {
1307                 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
1308                                                    hdr[i].feature_set, is_cr4);
1309                 len = le32_to_cpu(hdr[i].len) + IMG_CRC_LEN;
1310                 addr = le32_to_cpu(hdr[i].addr);
1311
1312                 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
1313                                                     mode);
1314                 if (err) {
1315                         dev_err(dev->mt76.dev, "Download request failed\n");
1316                         return err;
1317                 }
1318
1319                 err = mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
1320                                              data + offset, len);
1321                 if (err) {
1322                         dev_err(dev->mt76.dev, "Failed to send firmware to device\n");
1323                         return err;
1324                 }
1325
1326                 offset += len;
1327         }
1328
1329         return 0;
1330 }
1331
1332 static int mt7615_load_n9(struct mt7615_dev *dev, const char *name)
1333 {
1334         const struct mt7615_fw_trailer *hdr;
1335         const struct firmware *fw;
1336         int ret;
1337
1338         ret = request_firmware(&fw, name, dev->mt76.dev);
1339         if (ret)
1340                 return ret;
1341
1342         if (!fw || !fw->data || fw->size < N9_REGION_NUM * sizeof(*hdr)) {
1343                 dev_err(dev->mt76.dev, "Invalid firmware\n");
1344                 ret = -EINVAL;
1345                 goto out;
1346         }
1347
1348         hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size -
1349                                         N9_REGION_NUM * sizeof(*hdr));
1350
1351         dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n",
1352                  hdr->fw_ver, hdr->build_date);
1353
1354         ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, false);
1355         if (ret)
1356                 goto out;
1357
1358         ret = mt76_connac_mcu_start_firmware(&dev->mt76,
1359                                              le32_to_cpu(hdr->addr),
1360                                              FW_START_OVERRIDE);
1361         if (ret) {
1362                 dev_err(dev->mt76.dev, "Failed to start N9 firmware\n");
1363                 goto out;
1364         }
1365
1366         snprintf(dev->mt76.hw->wiphy->fw_version,
1367                  sizeof(dev->mt76.hw->wiphy->fw_version),
1368                  "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
1369
1370         if (!is_mt7615(&dev->mt76)) {
1371                 dev->fw_ver = MT7615_FIRMWARE_V2;
1372                 dev->mcu_ops = &sta_update_ops;
1373         } else {
1374                 dev->fw_ver = MT7615_FIRMWARE_V1;
1375                 dev->mcu_ops = &wtbl_update_ops;
1376         }
1377
1378 out:
1379         release_firmware(fw);
1380         return ret;
1381 }
1382
1383 static int mt7615_load_cr4(struct mt7615_dev *dev, const char *name)
1384 {
1385         const struct mt7615_fw_trailer *hdr;
1386         const struct firmware *fw;
1387         int ret;
1388
1389         ret = request_firmware(&fw, name, dev->mt76.dev);
1390         if (ret)
1391                 return ret;
1392
1393         if (!fw || !fw->data || fw->size < CR4_REGION_NUM * sizeof(*hdr)) {
1394                 dev_err(dev->mt76.dev, "Invalid firmware\n");
1395                 ret = -EINVAL;
1396                 goto out;
1397         }
1398
1399         hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size -
1400                                         CR4_REGION_NUM * sizeof(*hdr));
1401
1402         dev_info(dev->mt76.dev, "CR4 Firmware Version: %.10s, Build Time: %.15s\n",
1403                  hdr->fw_ver, hdr->build_date);
1404
1405         ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, true);
1406         if (ret)
1407                 goto out;
1408
1409         ret = mt76_connac_mcu_start_firmware(&dev->mt76, 0,
1410                                              FW_START_WORKING_PDA_CR4);
1411         if (ret) {
1412                 dev_err(dev->mt76.dev, "Failed to start CR4 firmware\n");
1413                 goto out;
1414         }
1415
1416 out:
1417         release_firmware(fw);
1418
1419         return ret;
1420 }
1421
1422 static int mt7615_load_ram(struct mt7615_dev *dev)
1423 {
1424         int ret;
1425
1426         ret = mt7615_load_n9(dev, MT7615_FIRMWARE_N9);
1427         if (ret)
1428                 return ret;
1429
1430         return mt7615_load_cr4(dev, MT7615_FIRMWARE_CR4);
1431 }
1432
1433 static int mt7615_load_firmware(struct mt7615_dev *dev)
1434 {
1435         int ret;
1436         u32 val;
1437
1438         val = mt76_get_field(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE);
1439
1440         if (val != FW_STATE_FW_DOWNLOAD) {
1441                 dev_err(dev->mt76.dev, "Firmware is not ready for download\n");
1442                 return -EIO;
1443         }
1444
1445         ret = mt7615_load_patch(dev, MT7615_PATCH_ADDRESS, MT7615_ROM_PATCH);
1446         if (ret)
1447                 return ret;
1448
1449         ret = mt7615_load_ram(dev);
1450         if (ret)
1451                 return ret;
1452
1453         if (!mt76_poll_msec(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE,
1454                             FIELD_PREP(MT_TOP_MISC2_FW_STATE,
1455                                        FW_STATE_RDY), 500)) {
1456                 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
1457                 return -EIO;
1458         }
1459
1460         return 0;
1461 }
1462
1463 static int mt7622_load_firmware(struct mt7615_dev *dev)
1464 {
1465         int ret;
1466         u32 val;
1467
1468         mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH);
1469
1470         val = mt76_get_field(dev, MT_TOP_OFF_RSV, MT_TOP_OFF_RSV_FW_STATE);
1471         if (val != FW_STATE_FW_DOWNLOAD) {
1472                 dev_err(dev->mt76.dev, "Firmware is not ready for download\n");
1473                 return -EIO;
1474         }
1475
1476         ret = mt7615_load_patch(dev, MT7622_PATCH_ADDRESS, MT7622_ROM_PATCH);
1477         if (ret)
1478                 return ret;
1479
1480         ret = mt7615_load_n9(dev, MT7622_FIRMWARE_N9);
1481         if (ret)
1482                 return ret;
1483
1484         if (!mt76_poll_msec(dev, MT_TOP_OFF_RSV, MT_TOP_OFF_RSV_FW_STATE,
1485                             FIELD_PREP(MT_TOP_OFF_RSV_FW_STATE,
1486                                        FW_STATE_NORMAL_TRX), 1500)) {
1487                 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
1488                 return -EIO;
1489         }
1490
1491         mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH);
1492
1493         return 0;
1494 }
1495
1496 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl)
1497 {
1498         struct {
1499                 u8 ctrl_val;
1500                 u8 pad[3];
1501         } data = {
1502                 .ctrl_val = ctrl
1503         };
1504
1505         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST),
1506                                  &data, sizeof(data), true);
1507 }
1508
1509 static int mt7615_mcu_cal_cache_apply(struct mt7615_dev *dev)
1510 {
1511         struct {
1512                 bool cache_enable;
1513                 u8 pad[3];
1514         } data = {
1515                 .cache_enable = true
1516         };
1517
1518         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CAL_CACHE), &data,
1519                                  sizeof(data), false);
1520 }
1521
1522 static int mt7663_load_n9(struct mt7615_dev *dev, const char *name)
1523 {
1524         u32 offset = 0, override_addr = 0, flag = FW_START_DLYCAL;
1525         const struct mt7663_fw_trailer *hdr;
1526         const struct mt7663_fw_buf *buf;
1527         const struct firmware *fw;
1528         const u8 *base_addr;
1529         int i, ret;
1530
1531         ret = request_firmware(&fw, name, dev->mt76.dev);
1532         if (ret)
1533                 return ret;
1534
1535         if (!fw || !fw->data || fw->size < FW_V3_COMMON_TAILER_SIZE) {
1536                 dev_err(dev->mt76.dev, "Invalid firmware\n");
1537                 ret = -EINVAL;
1538                 goto out;
1539         }
1540
1541         hdr = (const struct mt7663_fw_trailer *)(fw->data + fw->size -
1542                                                  FW_V3_COMMON_TAILER_SIZE);
1543
1544         dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n",
1545                  hdr->fw_ver, hdr->build_date);
1546         dev_info(dev->mt76.dev, "Region number: 0x%x\n", hdr->n_region);
1547
1548         base_addr = fw->data + fw->size - FW_V3_COMMON_TAILER_SIZE;
1549         for (i = 0; i < hdr->n_region; i++) {
1550                 u32 shift = (hdr->n_region - i) * FW_V3_REGION_TAILER_SIZE;
1551                 u32 len, addr, mode;
1552
1553                 dev_info(dev->mt76.dev, "Parsing tailer Region: %d\n", i);
1554
1555                 buf = (const struct mt7663_fw_buf *)(base_addr - shift);
1556                 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
1557                                                    buf->feature_set, false);
1558                 addr = le32_to_cpu(buf->img_dest_addr);
1559                 len = le32_to_cpu(buf->img_size);
1560
1561                 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
1562                                                     mode);
1563                 if (ret) {
1564                         dev_err(dev->mt76.dev, "Download request failed\n");
1565                         goto out;
1566                 }
1567
1568                 ret = mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
1569                                              fw->data + offset, len);
1570                 if (ret) {
1571                         dev_err(dev->mt76.dev, "Failed to send firmware\n");
1572                         goto out;
1573                 }
1574
1575                 offset += le32_to_cpu(buf->img_size);
1576                 if (buf->feature_set & DL_MODE_VALID_RAM_ENTRY) {
1577                         override_addr = le32_to_cpu(buf->img_dest_addr);
1578                         dev_info(dev->mt76.dev, "Region %d, override_addr = 0x%08x\n",
1579                                  i, override_addr);
1580                 }
1581         }
1582
1583         if (override_addr)
1584                 flag |= FW_START_OVERRIDE;
1585
1586         dev_info(dev->mt76.dev, "override_addr = 0x%08x, option = %d\n",
1587                  override_addr, flag);
1588
1589         ret = mt76_connac_mcu_start_firmware(&dev->mt76, override_addr, flag);
1590         if (ret) {
1591                 dev_err(dev->mt76.dev, "Failed to start N9 firmware\n");
1592                 goto out;
1593         }
1594
1595         snprintf(dev->mt76.hw->wiphy->fw_version,
1596                  sizeof(dev->mt76.hw->wiphy->fw_version),
1597                  "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
1598
1599 out:
1600         release_firmware(fw);
1601
1602         return ret;
1603 }
1604
1605 static int
1606 mt7663_load_rom_patch(struct mt7615_dev *dev, const char **n9_firmware)
1607 {
1608         const char *selected_rom, *secondary_rom = MT7663_ROM_PATCH;
1609         const char *primary_rom = MT7663_OFFLOAD_ROM_PATCH;
1610         int ret;
1611
1612         if (!prefer_offload_fw) {
1613                 secondary_rom = MT7663_OFFLOAD_ROM_PATCH;
1614                 primary_rom = MT7663_ROM_PATCH;
1615         }
1616         selected_rom = primary_rom;
1617
1618         ret = mt7615_load_patch(dev, MT7663_PATCH_ADDRESS, primary_rom);
1619         if (ret) {
1620                 dev_info(dev->mt76.dev, "%s not found, switching to %s",
1621                          primary_rom, secondary_rom);
1622                 ret = mt7615_load_patch(dev, MT7663_PATCH_ADDRESS,
1623                                         secondary_rom);
1624                 if (ret) {
1625                         dev_err(dev->mt76.dev, "failed to load %s",
1626                                 secondary_rom);
1627                         return ret;
1628                 }
1629                 selected_rom = secondary_rom;
1630         }
1631
1632         if (!strcmp(selected_rom, MT7663_OFFLOAD_ROM_PATCH)) {
1633                 *n9_firmware = MT7663_OFFLOAD_FIRMWARE_N9;
1634                 dev->fw_ver = MT7615_FIRMWARE_V3;
1635                 dev->mcu_ops = &uni_update_ops;
1636         } else {
1637                 *n9_firmware = MT7663_FIRMWARE_N9;
1638                 dev->fw_ver = MT7615_FIRMWARE_V2;
1639                 dev->mcu_ops = &sta_update_ops;
1640         }
1641
1642         return 0;
1643 }
1644
1645 int __mt7663_load_firmware(struct mt7615_dev *dev)
1646 {
1647         const char *n9_firmware;
1648         int ret;
1649
1650         ret = mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY);
1651         if (ret) {
1652                 dev_dbg(dev->mt76.dev, "Firmware is already download\n");
1653                 return -EIO;
1654         }
1655
1656         ret = mt7663_load_rom_patch(dev, &n9_firmware);
1657         if (ret)
1658                 return ret;
1659
1660         ret = mt7663_load_n9(dev, n9_firmware);
1661         if (ret)
1662                 return ret;
1663
1664         if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY,
1665                             MT_TOP_MISC2_FW_N9_RDY, 1500)) {
1666                 ret = mt76_get_field(dev, MT_CONN_ON_MISC,
1667                                      MT7663_TOP_MISC2_FW_STATE);
1668                 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
1669                 return -EIO;
1670         }
1671
1672 #ifdef CONFIG_PM
1673         if (mt7615_firmware_offload(dev))
1674                 dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support;
1675 #endif /* CONFIG_PM */
1676
1677         dev_dbg(dev->mt76.dev, "Firmware init done\n");
1678
1679         return 0;
1680 }
1681 EXPORT_SYMBOL_GPL(__mt7663_load_firmware);
1682
1683 static int mt7663_load_firmware(struct mt7615_dev *dev)
1684 {
1685         int ret;
1686
1687         mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH);
1688
1689         ret = __mt7663_load_firmware(dev);
1690         if (ret)
1691                 return ret;
1692
1693         mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH);
1694
1695         return 0;
1696 }
1697
1698 int mt7615_mcu_init(struct mt7615_dev *dev)
1699 {
1700         static const struct mt76_mcu_ops mt7615_mcu_ops = {
1701                 .headroom = sizeof(struct mt7615_mcu_txd),
1702                 .mcu_skb_send_msg = mt7615_mcu_send_message,
1703                 .mcu_parse_response = mt7615_mcu_parse_response,
1704                 .mcu_restart = mt7615_mcu_restart,
1705         };
1706         int ret;
1707
1708         dev->mt76.mcu_ops = &mt7615_mcu_ops,
1709
1710         ret = mt7615_mcu_drv_pmctrl(dev);
1711         if (ret)
1712                 return ret;
1713
1714         switch (mt76_chip(&dev->mt76)) {
1715         case 0x7622:
1716                 ret = mt7622_load_firmware(dev);
1717                 break;
1718         case 0x7663:
1719                 ret = mt7663_load_firmware(dev);
1720                 break;
1721         default:
1722                 ret = mt7615_load_firmware(dev);
1723                 break;
1724         }
1725         if (ret)
1726                 return ret;
1727
1728         mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
1729         dev_dbg(dev->mt76.dev, "Firmware init done\n");
1730         set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
1731
1732         if (dev->dbdc_support) {
1733                 ret = mt7615_mcu_cal_cache_apply(dev);
1734                 if (ret)
1735                         return ret;
1736         }
1737
1738         return mt7615_mcu_fw_log_2_host(dev, 0);
1739 }
1740 EXPORT_SYMBOL_GPL(mt7615_mcu_init);
1741
1742 void mt7615_mcu_exit(struct mt7615_dev *dev)
1743 {
1744         __mt76_mcu_restart(&dev->mt76);
1745         mt7615_mcu_set_fw_ctrl(dev);
1746         skb_queue_purge(&dev->mt76.mcu.res_q);
1747 }
1748 EXPORT_SYMBOL_GPL(mt7615_mcu_exit);
1749
1750 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev)
1751 {
1752         struct {
1753                 u8 buffer_mode;
1754                 u8 content_format;
1755                 __le16 len;
1756         } __packed req_hdr = {
1757                 .buffer_mode = 1,
1758         };
1759         u8 *eep = (u8 *)dev->mt76.eeprom.data;
1760         struct sk_buff *skb;
1761         int eep_len, offset;
1762
1763         switch (mt76_chip(&dev->mt76)) {
1764         case 0x7622:
1765                 eep_len = MT7622_EE_MAX - MT_EE_NIC_CONF_0;
1766                 offset = MT_EE_NIC_CONF_0;
1767                 break;
1768         case 0x7663:
1769                 eep_len = MT7663_EE_MAX - MT_EE_CHIP_ID;
1770                 req_hdr.content_format = 1;
1771                 offset = MT_EE_CHIP_ID;
1772                 break;
1773         default:
1774                 eep_len = MT7615_EE_MAX - MT_EE_NIC_CONF_0;
1775                 offset = MT_EE_NIC_CONF_0;
1776                 break;
1777         }
1778
1779         req_hdr.len = cpu_to_le16(eep_len);
1780
1781         skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req_hdr) + eep_len);
1782         if (!skb)
1783                 return -ENOMEM;
1784
1785         skb_put_data(skb, &req_hdr, sizeof(req_hdr));
1786         skb_put_data(skb, eep + offset, eep_len);
1787
1788         return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1789                                      MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);
1790 }
1791
1792 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
1793                        const struct ieee80211_tx_queue_params *params)
1794 {
1795 #define WMM_AIFS_SET    BIT(0)
1796 #define WMM_CW_MIN_SET  BIT(1)
1797 #define WMM_CW_MAX_SET  BIT(2)
1798 #define WMM_TXOP_SET    BIT(3)
1799 #define WMM_PARAM_SET   (WMM_AIFS_SET | WMM_CW_MIN_SET | \
1800                          WMM_CW_MAX_SET | WMM_TXOP_SET)
1801         struct req_data {
1802                 u8 number;
1803                 u8 rsv[3];
1804                 u8 queue;
1805                 u8 valid;
1806                 u8 aifs;
1807                 u8 cw_min;
1808                 __le16 cw_max;
1809                 __le16 txop;
1810         } __packed req = {
1811                 .number = 1,
1812                 .queue = queue,
1813                 .valid = WMM_PARAM_SET,
1814                 .aifs = params->aifs,
1815                 .cw_min = 5,
1816                 .cw_max = cpu_to_le16(10),
1817                 .txop = cpu_to_le16(params->txop),
1818         };
1819
1820         if (params->cw_min)
1821                 req.cw_min = fls(params->cw_min);
1822         if (params->cw_max)
1823                 req.cw_max = cpu_to_le16(fls(params->cw_max));
1824
1825         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE),
1826                                  &req, sizeof(req), true);
1827 }
1828
1829 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev)
1830 {
1831         struct mt7615_phy *ext_phy = mt7615_ext_phy(dev);
1832         struct dbdc_entry {
1833                 u8 type;
1834                 u8 index;
1835                 u8 band;
1836                 u8 _rsv;
1837         };
1838         struct {
1839                 u8 enable;
1840                 u8 num;
1841                 u8 _rsv[2];
1842                 struct dbdc_entry entry[64];
1843         } req = {
1844                 .enable = !!ext_phy,
1845         };
1846         int i;
1847
1848         if (!ext_phy)
1849                 goto out;
1850
1851 #define ADD_DBDC_ENTRY(_type, _idx, _band)              \
1852         do { \
1853                 req.entry[req.num].type = _type;                \
1854                 req.entry[req.num].index = _idx;                \
1855                 req.entry[req.num++].band = _band;              \
1856         } while (0)
1857
1858         for (i = 0; i < 4; i++) {
1859                 bool band = !!(ext_phy->omac_mask & BIT_ULL(i));
1860
1861                 ADD_DBDC_ENTRY(DBDC_TYPE_BSS, i, band);
1862         }
1863
1864         for (i = 0; i < 14; i++) {
1865                 bool band = !!(ext_phy->omac_mask & BIT_ULL(0x11 + i));
1866
1867                 ADD_DBDC_ENTRY(DBDC_TYPE_MBSS, i, band);
1868         }
1869
1870         ADD_DBDC_ENTRY(DBDC_TYPE_MU, 0, 1);
1871
1872         for (i = 0; i < 3; i++)
1873                 ADD_DBDC_ENTRY(DBDC_TYPE_BF, i, 1);
1874
1875         ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 0, 0);
1876         ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 1, 0);
1877         ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 2, 1);
1878         ADD_DBDC_ENTRY(DBDC_TYPE_WMM, 3, 1);
1879
1880         ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 0, 0);
1881         ADD_DBDC_ENTRY(DBDC_TYPE_MGMT, 1, 1);
1882
1883 out:
1884         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DBDC_CTRL), &req,
1885                                  sizeof(req), true);
1886 }
1887
1888 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev)
1889 {
1890         struct wtbl_req_hdr req = {
1891                 .operation = WTBL_RESET_ALL,
1892         };
1893
1894         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(WTBL_UPDATE),
1895                                  &req, sizeof(req), true);
1896 }
1897
1898 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val)
1899 {
1900         struct {
1901                 __le16 tag;
1902                 __le16 min_lpn;
1903         } req = {
1904                 .tag = cpu_to_le16(0x1),
1905                 .min_lpn = cpu_to_le16(val),
1906         };
1907
1908         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RADAR_TH),
1909                                  &req, sizeof(req), true);
1910 }
1911
1912 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
1913                             const struct mt7615_dfs_pulse *pulse)
1914 {
1915         struct {
1916                 __le16 tag;
1917                 __le32 max_width;       /* us */
1918                 __le32 max_pwr;         /* dbm */
1919                 __le32 min_pwr;         /* dbm */
1920                 __le32 min_stgr_pri;    /* us */
1921                 __le32 max_stgr_pri;    /* us */
1922                 __le32 min_cr_pri;      /* us */
1923                 __le32 max_cr_pri;      /* us */
1924         } req = {
1925                 .tag = cpu_to_le16(0x3),
1926 #define __req_field(field) .field = cpu_to_le32(pulse->field)
1927                 __req_field(max_width),
1928                 __req_field(max_pwr),
1929                 __req_field(min_pwr),
1930                 __req_field(min_stgr_pri),
1931                 __req_field(max_stgr_pri),
1932                 __req_field(min_cr_pri),
1933                 __req_field(max_cr_pri),
1934 #undef  __req_field
1935         };
1936
1937         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RADAR_TH),
1938                                  &req, sizeof(req), true);
1939 }
1940
1941 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
1942                             const struct mt7615_dfs_pattern *pattern)
1943 {
1944         struct {
1945                 __le16 tag;
1946                 __le16 radar_type;
1947                 u8 enb;
1948                 u8 stgr;
1949                 u8 min_crpn;
1950                 u8 max_crpn;
1951                 u8 min_crpr;
1952                 u8 min_pw;
1953                 u8 max_pw;
1954                 __le32 min_pri;
1955                 __le32 max_pri;
1956                 u8 min_crbn;
1957                 u8 max_crbn;
1958                 u8 min_stgpn;
1959                 u8 max_stgpn;
1960                 u8 min_stgpr;
1961         } req = {
1962                 .tag = cpu_to_le16(0x2),
1963                 .radar_type = cpu_to_le16(index),
1964 #define __req_field_u8(field) .field = pattern->field
1965 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
1966                 __req_field_u8(enb),
1967                 __req_field_u8(stgr),
1968                 __req_field_u8(min_crpn),
1969                 __req_field_u8(max_crpn),
1970                 __req_field_u8(min_crpr),
1971                 __req_field_u8(min_pw),
1972                 __req_field_u8(max_pw),
1973                 __req_field_u32(min_pri),
1974                 __req_field_u32(max_pri),
1975                 __req_field_u8(min_crbn),
1976                 __req_field_u8(max_crbn),
1977                 __req_field_u8(min_stgpn),
1978                 __req_field_u8(max_stgpn),
1979                 __req_field_u8(min_stgpr),
1980 #undef __req_field_u8
1981 #undef __req_field_u32
1982         };
1983
1984         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RADAR_TH),
1985                                  &req, sizeof(req), true);
1986 }
1987
1988 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev)
1989 {
1990         struct {
1991                 u8 pulse_num;
1992                 u8 rsv[3];
1993                 struct {
1994                         __le32 start_time;
1995                         __le16 width;
1996                         __le16 power;
1997                 } pattern[32];
1998         } req = {
1999                 .pulse_num = dev->radar_pattern.n_pulses,
2000         };
2001         u32 start_time = ktime_to_ms(ktime_get_boottime());
2002         int i;
2003
2004         if (dev->radar_pattern.n_pulses > ARRAY_SIZE(req.pattern))
2005                 return -EINVAL;
2006
2007         /* TODO: add some noise here */
2008         for (i = 0; i < dev->radar_pattern.n_pulses; i++) {
2009                 u32 ts = start_time + i * dev->radar_pattern.period;
2010
2011                 req.pattern[i].width = cpu_to_le16(dev->radar_pattern.width);
2012                 req.pattern[i].power = cpu_to_le16(dev->radar_pattern.power);
2013                 req.pattern[i].start_time = cpu_to_le32(ts);
2014         }
2015
2016         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_PATTERN),
2017                                  &req, sizeof(req), false);
2018 }
2019
2020 static void mt7615_mcu_set_txpower_sku(struct mt7615_phy *phy, u8 *sku)
2021 {
2022         struct mt76_phy *mphy = phy->mt76;
2023         struct ieee80211_hw *hw = mphy->hw;
2024         struct mt76_power_limits limits;
2025         s8 *limits_array = (s8 *)&limits;
2026         int n_chains = hweight8(mphy->antenna_mask);
2027         int tx_power = hw->conf.power_level * 2;
2028         int i;
2029         static const u8 sku_mapping[] = {
2030 #define SKU_FIELD(_type, _field) \
2031                 [MT_SKU_##_type] = offsetof(struct mt76_power_limits, _field)
2032                 SKU_FIELD(CCK_1_2, cck[0]),
2033                 SKU_FIELD(CCK_55_11, cck[2]),
2034                 SKU_FIELD(OFDM_6_9, ofdm[0]),
2035                 SKU_FIELD(OFDM_12_18, ofdm[2]),
2036                 SKU_FIELD(OFDM_24_36, ofdm[4]),
2037                 SKU_FIELD(OFDM_48, ofdm[6]),
2038                 SKU_FIELD(OFDM_54, ofdm[7]),
2039                 SKU_FIELD(HT20_0_8, mcs[0][0]),
2040                 SKU_FIELD(HT20_32, ofdm[0]),
2041                 SKU_FIELD(HT20_1_2_9_10, mcs[0][1]),
2042                 SKU_FIELD(HT20_3_4_11_12, mcs[0][3]),
2043                 SKU_FIELD(HT20_5_13, mcs[0][5]),
2044                 SKU_FIELD(HT20_6_14, mcs[0][6]),
2045                 SKU_FIELD(HT20_7_15, mcs[0][7]),
2046                 SKU_FIELD(HT40_0_8, mcs[1][0]),
2047                 SKU_FIELD(HT40_32, ofdm[0]),
2048                 SKU_FIELD(HT40_1_2_9_10, mcs[1][1]),
2049                 SKU_FIELD(HT40_3_4_11_12, mcs[1][3]),
2050                 SKU_FIELD(HT40_5_13, mcs[1][5]),
2051                 SKU_FIELD(HT40_6_14, mcs[1][6]),
2052                 SKU_FIELD(HT40_7_15, mcs[1][7]),
2053                 SKU_FIELD(VHT20_0, mcs[0][0]),
2054                 SKU_FIELD(VHT20_1_2, mcs[0][1]),
2055                 SKU_FIELD(VHT20_3_4, mcs[0][3]),
2056                 SKU_FIELD(VHT20_5_6, mcs[0][5]),
2057                 SKU_FIELD(VHT20_7, mcs[0][7]),
2058                 SKU_FIELD(VHT20_8, mcs[0][8]),
2059                 SKU_FIELD(VHT20_9, mcs[0][9]),
2060                 SKU_FIELD(VHT40_0, mcs[1][0]),
2061                 SKU_FIELD(VHT40_1_2, mcs[1][1]),
2062                 SKU_FIELD(VHT40_3_4, mcs[1][3]),
2063                 SKU_FIELD(VHT40_5_6, mcs[1][5]),
2064                 SKU_FIELD(VHT40_7, mcs[1][7]),
2065                 SKU_FIELD(VHT40_8, mcs[1][8]),
2066                 SKU_FIELD(VHT40_9, mcs[1][9]),
2067                 SKU_FIELD(VHT80_0, mcs[2][0]),
2068                 SKU_FIELD(VHT80_1_2, mcs[2][1]),
2069                 SKU_FIELD(VHT80_3_4, mcs[2][3]),
2070                 SKU_FIELD(VHT80_5_6, mcs[2][5]),
2071                 SKU_FIELD(VHT80_7, mcs[2][7]),
2072                 SKU_FIELD(VHT80_8, mcs[2][8]),
2073                 SKU_FIELD(VHT80_9, mcs[2][9]),
2074                 SKU_FIELD(VHT160_0, mcs[3][0]),
2075                 SKU_FIELD(VHT160_1_2, mcs[3][1]),
2076                 SKU_FIELD(VHT160_3_4, mcs[3][3]),
2077                 SKU_FIELD(VHT160_5_6, mcs[3][5]),
2078                 SKU_FIELD(VHT160_7, mcs[3][7]),
2079                 SKU_FIELD(VHT160_8, mcs[3][8]),
2080                 SKU_FIELD(VHT160_9, mcs[3][9]),
2081 #undef SKU_FIELD
2082         };
2083
2084         tx_power = mt76_get_sar_power(mphy, mphy->chandef.chan, tx_power);
2085         tx_power -= mt76_tx_power_nss_delta(n_chains);
2086         tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
2087                                               &limits, tx_power);
2088         mphy->txpower_cur = tx_power;
2089
2090         if (is_mt7663(mphy->dev)) {
2091                 memset(sku, tx_power, MT_SKU_4SS_DELTA + 1);
2092                 return;
2093         }
2094
2095         for (i = 0; i < MT_SKU_1SS_DELTA; i++)
2096                 sku[i] = limits_array[sku_mapping[i]];
2097
2098         for (i = 0; i < 4; i++) {
2099                 int delta = 0;
2100
2101                 if (i < n_chains - 1)
2102                         delta = mt76_tx_power_nss_delta(n_chains) -
2103                                 mt76_tx_power_nss_delta(i + 1);
2104                 sku[MT_SKU_1SS_DELTA + i] = delta;
2105         }
2106 }
2107
2108 static u8 mt7615_mcu_chan_bw(struct cfg80211_chan_def *chandef)
2109 {
2110         static const u8 width_to_bw[] = {
2111                 [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ,
2112                 [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ,
2113                 [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ,
2114                 [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ,
2115                 [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ,
2116                 [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ,
2117                 [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ,
2118                 [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ,
2119         };
2120
2121         if (chandef->width >= ARRAY_SIZE(width_to_bw))
2122                 return 0;
2123
2124         return width_to_bw[chandef->width];
2125 }
2126
2127 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd)
2128 {
2129         struct mt7615_dev *dev = phy->dev;
2130         struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2131         int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2;
2132         struct {
2133                 u8 control_chan;
2134                 u8 center_chan;
2135                 u8 bw;
2136                 u8 tx_streams;
2137                 u8 rx_streams_mask;
2138                 u8 switch_reason;
2139                 u8 band_idx;
2140                 /* for 80+80 only */
2141                 u8 center_chan2;
2142                 __le16 cac_case;
2143                 u8 channel_band;
2144                 u8 rsv0;
2145                 __le32 outband_freq;
2146                 u8 txpower_drop;
2147                 u8 rsv1[3];
2148                 u8 txpower_sku[53];
2149                 u8 rsv2[3];
2150         } req = {
2151                 .control_chan = chandef->chan->hw_value,
2152                 .center_chan = ieee80211_frequency_to_channel(freq1),
2153                 .tx_streams = hweight8(phy->mt76->antenna_mask),
2154                 .rx_streams_mask = phy->mt76->chainmask,
2155                 .center_chan2 = ieee80211_frequency_to_channel(freq2),
2156         };
2157
2158         if (cmd == MCU_EXT_CMD(SET_RX_PATH) ||
2159             dev->mt76.hw->conf.flags & IEEE80211_CONF_MONITOR)
2160                 req.switch_reason = CH_SWITCH_NORMAL;
2161         else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
2162                 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2163         else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2164                                           NL80211_IFTYPE_AP))
2165                 req.switch_reason = CH_SWITCH_DFS;
2166         else
2167                 req.switch_reason = CH_SWITCH_NORMAL;
2168
2169         req.band_idx = phy != &dev->phy;
2170         req.bw = mt7615_mcu_chan_bw(chandef);
2171
2172         if (mt76_testmode_enabled(phy->mt76))
2173                 memset(req.txpower_sku, 0x3f, 49);
2174         else
2175                 mt7615_mcu_set_txpower_sku(phy, req.txpower_sku);
2176
2177         return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
2178 }
2179
2180 int mt7615_mcu_get_temperature(struct mt7615_dev *dev)
2181 {
2182         struct {
2183                 u8 action;
2184                 u8 rsv[3];
2185         } req = {};
2186
2187         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL),
2188                                  &req, sizeof(req), true);
2189 }
2190
2191 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
2192                               u32 val)
2193 {
2194         struct {
2195                 u8 test_mode_en;
2196                 u8 param_idx;
2197                 u8 _rsv[2];
2198
2199                 __le32 value;
2200
2201                 u8 pad[8];
2202         } req = {
2203                 .test_mode_en = test_mode,
2204                 .param_idx = param,
2205                 .value = cpu_to_le32(val),
2206         };
2207
2208         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL),
2209                                  &req, sizeof(req), false);
2210 }
2211
2212 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable)
2213 {
2214         struct mt7615_dev *dev = phy->dev;
2215         struct {
2216                 u8 format_id;
2217                 u8 sku_enable;
2218                 u8 band_idx;
2219                 u8 rsv;
2220         } req = {
2221                 .format_id = 0,
2222                 .band_idx = phy != &dev->phy,
2223                 .sku_enable = enable,
2224         };
2225
2226         return mt76_mcu_send_msg(&dev->mt76,
2227                                  MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
2228                                  &req, sizeof(req), true);
2229 }
2230
2231 static int mt7615_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)
2232 {
2233         int i;
2234
2235         for (i = 0; i < n_freqs; i++)
2236                 if (cur == freqs[i])
2237                         return i;
2238
2239         return -1;
2240 }
2241
2242 static int mt7615_dcoc_freq_idx(u16 freq, u8 bw)
2243 {
2244         static const u16 freq_list[] = {
2245                 4980, 5805, 5905, 5190,
2246                 5230, 5270, 5310, 5350,
2247                 5390, 5430, 5470, 5510,
2248                 5550, 5590, 5630, 5670,
2249                 5710, 5755, 5795, 5835,
2250                 5875, 5210, 5290, 5370,
2251                 5450, 5530, 5610, 5690,
2252                 5775, 5855
2253         };
2254         static const u16 freq_bw40[] = {
2255                 5190, 5230, 5270, 5310,
2256                 5350, 5390, 5430, 5470,
2257                 5510, 5550, 5590, 5630,
2258                 5670, 5710, 5755, 5795,
2259                 5835, 5875
2260         };
2261         int offset_2g = ARRAY_SIZE(freq_list);
2262         int idx;
2263
2264         if (freq < 4000) {
2265                 if (freq < 2427)
2266                         return offset_2g;
2267                 if (freq < 2442)
2268                         return offset_2g + 1;
2269                 if (freq < 2457)
2270                         return offset_2g + 2;
2271
2272                 return offset_2g + 3;
2273         }
2274
2275         switch (bw) {
2276         case NL80211_CHAN_WIDTH_80:
2277         case NL80211_CHAN_WIDTH_80P80:
2278         case NL80211_CHAN_WIDTH_160:
2279                 break;
2280         default:
2281                 idx = mt7615_find_freq_idx(freq_bw40, ARRAY_SIZE(freq_bw40),
2282                                            freq + 10);
2283                 if (idx >= 0) {
2284                         freq = freq_bw40[idx];
2285                         break;
2286                 }
2287
2288                 idx = mt7615_find_freq_idx(freq_bw40, ARRAY_SIZE(freq_bw40),
2289                                            freq - 10);
2290                 if (idx >= 0) {
2291                         freq = freq_bw40[idx];
2292                         break;
2293                 }
2294                 fallthrough;
2295         case NL80211_CHAN_WIDTH_40:
2296                 idx = mt7615_find_freq_idx(freq_bw40, ARRAY_SIZE(freq_bw40),
2297                                            freq);
2298                 if (idx >= 0)
2299                         break;
2300
2301                 return -1;
2302
2303         }
2304
2305         return mt7615_find_freq_idx(freq_list, ARRAY_SIZE(freq_list), freq);
2306 }
2307
2308 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy)
2309 {
2310         struct mt7615_dev *dev = phy->dev;
2311         struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2312         int freq2 = chandef->center_freq2;
2313         int ret;
2314         struct {
2315                 u8 direction;
2316                 u8 runtime_calibration;
2317                 u8 _rsv[2];
2318
2319                 __le16 center_freq;
2320                 u8 bw;
2321                 u8 band;
2322                 u8 is_freq2;
2323                 u8 success;
2324                 u8 dbdc_en;
2325
2326                 u8 _rsv2;
2327
2328                 struct {
2329                         __le32 sx0_i_lna[4];
2330                         __le32 sx0_q_lna[4];
2331
2332                         __le32 sx2_i_lna[4];
2333                         __le32 sx2_q_lna[4];
2334                 } dcoc_data[4];
2335         } req = {
2336                 .direction = 1,
2337
2338                 .bw = mt7615_mcu_chan_bw(chandef),
2339                 .band = chandef->center_freq1 > 4000,
2340                 .dbdc_en = !!dev->mt76.phy2,
2341         };
2342         u16 center_freq = chandef->center_freq1;
2343         int freq_idx;
2344         u8 *eep = dev->mt76.eeprom.data;
2345
2346         if (!(eep[MT_EE_CALDATA_FLASH] & MT_EE_CALDATA_FLASH_RX_CAL))
2347                 return 0;
2348
2349         if (chandef->width == NL80211_CHAN_WIDTH_160) {
2350                 freq2 = center_freq + 40;
2351                 center_freq -= 40;
2352         }
2353
2354 again:
2355         req.runtime_calibration = 1;
2356         freq_idx = mt7615_dcoc_freq_idx(center_freq, chandef->width);
2357         if (freq_idx < 0)
2358                 goto out;
2359
2360         memcpy(req.dcoc_data, eep + MT7615_EEPROM_DCOC_OFFSET +
2361                               freq_idx * MT7615_EEPROM_DCOC_SIZE,
2362                sizeof(req.dcoc_data));
2363         req.runtime_calibration = 0;
2364
2365 out:
2366         req.center_freq = cpu_to_le16(center_freq);
2367         ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RXDCOC_CAL), &req,
2368                                 sizeof(req), true);
2369
2370         if ((chandef->width == NL80211_CHAN_WIDTH_80P80 ||
2371              chandef->width == NL80211_CHAN_WIDTH_160) && !req.is_freq2) {
2372                 req.is_freq2 = true;
2373                 center_freq = freq2;
2374                 goto again;
2375         }
2376
2377         return ret;
2378 }
2379
2380 static int mt7615_dpd_freq_idx(u16 freq, u8 bw)
2381 {
2382         static const u16 freq_list[] = {
2383                 4920, 4940, 4960, 4980,
2384                 5040, 5060, 5080, 5180,
2385                 5200, 5220, 5240, 5260,
2386                 5280, 5300, 5320, 5340,
2387                 5360, 5380, 5400, 5420,
2388                 5440, 5460, 5480, 5500,
2389                 5520, 5540, 5560, 5580,
2390                 5600, 5620, 5640, 5660,
2391                 5680, 5700, 5720, 5745,
2392                 5765, 5785, 5805, 5825,
2393                 5845, 5865, 5885, 5905
2394         };
2395         int offset_2g = ARRAY_SIZE(freq_list);
2396         int idx;
2397
2398         if (freq < 4000) {
2399                 if (freq < 2432)
2400                         return offset_2g;
2401                 if (freq < 2457)
2402                         return offset_2g + 1;
2403
2404                 return offset_2g + 2;
2405         }
2406
2407         if (bw != NL80211_CHAN_WIDTH_20) {
2408                 idx = mt7615_find_freq_idx(freq_list, ARRAY_SIZE(freq_list),
2409                                            freq + 10);
2410                 if (idx >= 0)
2411                         return idx;
2412
2413                 idx = mt7615_find_freq_idx(freq_list, ARRAY_SIZE(freq_list),
2414                                            freq - 10);
2415                 if (idx >= 0)
2416                         return idx;
2417         }
2418
2419         return mt7615_find_freq_idx(freq_list, ARRAY_SIZE(freq_list), freq);
2420 }
2421
2422
2423 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy)
2424 {
2425         struct mt7615_dev *dev = phy->dev;
2426         struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2427         int freq2 = chandef->center_freq2;
2428         int ret;
2429         struct {
2430                 u8 direction;
2431                 u8 runtime_calibration;
2432                 u8 _rsv[2];
2433
2434                 __le16 center_freq;
2435                 u8 bw;
2436                 u8 band;
2437                 u8 is_freq2;
2438                 u8 success;
2439                 u8 dbdc_en;
2440
2441                 u8 _rsv2;
2442
2443                 struct {
2444                         struct {
2445                                 u32 dpd_g0;
2446                                 u8 data[32];
2447                         } wf0, wf1;
2448
2449                         struct {
2450                                 u32 dpd_g0_prim;
2451                                 u32 dpd_g0_sec;
2452                                 u8 data_prim[32];
2453                                 u8 data_sec[32];
2454                         } wf2, wf3;
2455                 } dpd_data;
2456         } req = {
2457                 .direction = 1,
2458
2459                 .bw = mt7615_mcu_chan_bw(chandef),
2460                 .band = chandef->center_freq1 > 4000,
2461                 .dbdc_en = !!dev->mt76.phy2,
2462         };
2463         u16 center_freq = chandef->center_freq1;
2464         int freq_idx;
2465         u8 *eep = dev->mt76.eeprom.data;
2466
2467         if (!(eep[MT_EE_CALDATA_FLASH] & MT_EE_CALDATA_FLASH_TX_DPD))
2468                 return 0;
2469
2470         if (chandef->width == NL80211_CHAN_WIDTH_160) {
2471                 freq2 = center_freq + 40;
2472                 center_freq -= 40;
2473         }
2474
2475 again:
2476         req.runtime_calibration = 1;
2477         freq_idx = mt7615_dpd_freq_idx(center_freq, chandef->width);
2478         if (freq_idx < 0)
2479                 goto out;
2480
2481         memcpy(&req.dpd_data, eep + MT7615_EEPROM_TXDPD_OFFSET +
2482                               freq_idx * MT7615_EEPROM_TXDPD_SIZE,
2483                sizeof(req.dpd_data));
2484         req.runtime_calibration = 0;
2485
2486 out:
2487         req.center_freq = cpu_to_le16(center_freq);
2488         ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXDPD_CAL),
2489                                 &req, sizeof(req), true);
2490
2491         if ((chandef->width == NL80211_CHAN_WIDTH_80P80 ||
2492              chandef->width == NL80211_CHAN_WIDTH_160) && !req.is_freq2) {
2493                 req.is_freq2 = true;
2494                 center_freq = freq2;
2495                 goto again;
2496         }
2497
2498         return ret;
2499 }
2500
2501 int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev)
2502 {
2503         struct {
2504                 u8 operation;
2505                 u8 count;
2506                 u8 _rsv[2];
2507                 u8 index;
2508                 u8 enable;
2509                 __le16 etype;
2510         } req = {
2511                 .operation = 1,
2512                 .count = 1,
2513                 .enable = 1,
2514                 .etype = cpu_to_le16(ETH_P_PAE),
2515         };
2516
2517         return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2518                                  &req, sizeof(req), false);
2519 }
2520
2521 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
2522                           bool enable)
2523 {
2524         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
2525         struct {
2526                 u8 bss_idx;
2527                 u8 dtim_period;
2528                 __le16 aid;
2529                 __le16 bcn_interval;
2530                 __le16 atim_window;
2531                 u8 uapsd;
2532                 u8 bmc_delivered_ac;
2533                 u8 bmc_triggered_ac;
2534                 u8 pad;
2535         } req = {
2536                 .bss_idx = mvif->mt76.idx,
2537                 .aid = cpu_to_le16(vif->bss_conf.aid),
2538                 .dtim_period = vif->bss_conf.dtim_period,
2539                 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int),
2540         };
2541         struct {
2542                 u8 bss_idx;
2543                 u8 pad[3];
2544         } req_hdr = {
2545                 .bss_idx = mvif->mt76.idx,
2546         };
2547         int err;
2548
2549         if (vif->type != NL80211_IFTYPE_STATION)
2550                 return 0;
2551
2552         err = mt76_mcu_send_msg(&dev->mt76, MCU_CE_CMD(SET_BSS_ABORT),
2553                                 &req_hdr, sizeof(req_hdr), false);
2554         if (err < 0 || !enable)
2555                 return err;
2556
2557         return mt76_mcu_send_msg(&dev->mt76, MCU_CE_CMD(SET_BSS_CONNECTED),
2558                                  &req, sizeof(req), false);
2559 }
2560
2561 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
2562                        struct ieee80211_channel *chan, int duration)
2563 {
2564         struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
2565         struct mt7615_dev *dev = phy->dev;
2566         struct mt7615_roc_tlv req = {
2567                 .bss_idx = mvif->mt76.idx,
2568                 .active = !chan,
2569                 .max_interval = cpu_to_le32(duration),
2570                 .primary_chan = chan ? chan->hw_value : 0,
2571                 .band = chan ? chan->band : 0,
2572                 .req_type = 2,
2573         };
2574
2575         phy->roc_grant = false;
2576
2577         return mt76_mcu_send_msg(&dev->mt76, MCU_CE_CMD(SET_ROC),
2578                                  &req, sizeof(req), false);
2579 }