1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
4 #include <linux/etherdevice.h>
5 #include <linux/hwmon.h>
6 #include <linux/hwmon-sysfs.h>
7 #include <linux/thermal.h>
13 static const struct ieee80211_iface_limit if_limits[] = {
16 .types = BIT(NL80211_IFTYPE_ADHOC)
19 .types = BIT(NL80211_IFTYPE_AP)
20 #ifdef CONFIG_MAC80211_MESH
21 | BIT(NL80211_IFTYPE_MESH_POINT)
24 .max = MT7915_MAX_INTERFACES,
25 .types = BIT(NL80211_IFTYPE_STATION)
29 static const struct ieee80211_iface_combination if_comb[] = {
32 .n_limits = ARRAY_SIZE(if_limits),
33 .max_interfaces = MT7915_MAX_INTERFACES,
34 .num_different_channels = 1,
35 .beacon_int_infra_match = true,
36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
37 BIT(NL80211_CHAN_WIDTH_20) |
38 BIT(NL80211_CHAN_WIDTH_40) |
39 BIT(NL80211_CHAN_WIDTH_80) |
40 BIT(NL80211_CHAN_WIDTH_160) |
41 BIT(NL80211_CHAN_WIDTH_80P80),
45 static ssize_t mt7915_thermal_temp_show(struct device *dev,
46 struct device_attribute *attr,
49 struct mt7915_phy *phy = dev_get_drvdata(dev);
50 int i = to_sensor_dev_attr(attr)->index;
55 temperature = mt7915_mcu_get_temperature(phy);
58 /* display in millidegree celcius */
59 return sprintf(buf, "%u\n", temperature * 1000);
62 return sprintf(buf, "%u\n",
63 phy->throttle_temp[i - 1] * 1000);
65 return sprintf(buf, "%hhu\n", phy->throttle_state);
71 static ssize_t mt7915_thermal_temp_store(struct device *dev,
72 struct device_attribute *attr,
73 const char *buf, size_t count)
75 struct mt7915_phy *phy = dev_get_drvdata(dev);
76 int ret, i = to_sensor_dev_attr(attr)->index;
79 ret = kstrtol(buf, 10, &val);
83 mutex_lock(&phy->dev->mt76.mutex);
84 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
85 phy->throttle_temp[i - 1] = val;
86 mutex_unlock(&phy->dev->mt76.mutex);
91 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
92 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
93 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
94 static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
96 static struct attribute *mt7915_hwmon_attrs[] = {
97 &sensor_dev_attr_temp1_input.dev_attr.attr,
98 &sensor_dev_attr_temp1_crit.dev_attr.attr,
99 &sensor_dev_attr_temp1_max.dev_attr.attr,
100 &sensor_dev_attr_throttle1.dev_attr.attr,
103 ATTRIBUTE_GROUPS(mt7915_hwmon);
106 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
107 unsigned long *state)
109 *state = MT7915_CDEV_THROTTLE_MAX;
115 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
116 unsigned long *state)
118 struct mt7915_phy *phy = cdev->devdata;
120 *state = phy->cdev_state;
126 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
129 struct mt7915_phy *phy = cdev->devdata;
130 u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
133 if (state > MT7915_CDEV_THROTTLE_MAX)
136 if (phy->throttle_temp[0] > phy->throttle_temp[1])
139 if (state == phy->cdev_state)
143 * cooling_device convention: 0 = no cooling, more = more cooling
144 * mcu convention: 1 = max cooling, more = less cooling
146 ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
150 phy->cdev_state = state;
155 static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
156 .get_max_state = mt7915_thermal_get_max_throttle_state,
157 .get_cur_state = mt7915_thermal_get_cur_throttle_state,
158 .set_cur_state = mt7915_thermal_set_cur_throttle_state,
161 static void mt7915_unregister_thermal(struct mt7915_phy *phy)
163 struct wiphy *wiphy = phy->mt76->hw->wiphy;
168 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
169 thermal_cooling_device_unregister(phy->cdev);
172 static int mt7915_thermal_init(struct mt7915_phy *phy)
174 struct wiphy *wiphy = phy->mt76->hw->wiphy;
175 struct thermal_cooling_device *cdev;
176 struct device *hwmon;
179 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
182 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
184 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
185 "cooling_device") < 0)
186 thermal_cooling_device_unregister(cdev);
191 if (!IS_REACHABLE(CONFIG_HWMON))
194 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
195 mt7915_hwmon_groups);
197 return PTR_ERR(hwmon);
199 /* initialize critical/maximum high temperature */
200 phy->throttle_temp[0] = 110;
201 phy->throttle_temp[1] = 120;
203 return mt7915_mcu_set_thermal_throttling(phy,
204 MT7915_THERMAL_THROTTLE_MAX);
207 static void mt7915_led_set_config(struct led_classdev *led_cdev,
208 u8 delay_on, u8 delay_off)
210 struct mt7915_dev *dev;
211 struct mt76_dev *mt76;
214 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
215 dev = container_of(mt76, struct mt7915_dev, mt76);
217 /* select TX blink mode, 2: only data frames */
218 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
221 mt76_wr(dev, MT_LED_EN(0), 1);
223 /* set LED Tx blink on/off time */
224 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
225 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
226 mt76_wr(dev, MT_LED_TX_BLINK(0), val);
229 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
230 if (dev->mt76.led_al)
231 val |= MT_LED_CTRL_POLARITY;
233 mt76_wr(dev, MT_LED_CTRL(0), val);
234 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
237 static int mt7915_led_set_blink(struct led_classdev *led_cdev,
238 unsigned long *delay_on,
239 unsigned long *delay_off)
241 u16 delta_on = 0, delta_off = 0;
244 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
247 delta_on = TO_HW_TICK(*delay_on);
249 delta_off = TO_HW_TICK(*delay_off);
251 mt7915_led_set_config(led_cdev, delta_on, delta_off);
256 static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
257 enum led_brightness brightness)
260 mt7915_led_set_config(led_cdev, 0, 0xff);
262 mt7915_led_set_config(led_cdev, 0xff, 0);
266 mt7915_init_txpower(struct mt7915_dev *dev,
267 struct ieee80211_supported_band *sband)
269 int i, n_chains = hweight8(dev->mphy.antenna_mask);
270 int nss_delta = mt76_tx_power_nss_delta(n_chains);
271 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
272 struct mt76_power_limits limits;
274 for (i = 0; i < sband->n_channels; i++) {
275 struct ieee80211_channel *chan = &sband->channels[i];
276 u32 target_power = 0;
279 for (j = 0; j < n_chains; j++) {
282 val = mt7915_eeprom_get_target_power(dev, chan, j);
283 target_power = max(target_power, val);
286 target_power += pwr_delta;
287 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
290 target_power += nss_delta;
291 target_power = DIV_ROUND_UP(target_power, 2);
292 chan->max_power = min_t(int, chan->max_reg_power,
294 chan->orig_mpwr = target_power;
299 mt7915_regd_notifier(struct wiphy *wiphy,
300 struct regulatory_request *request)
302 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
303 struct mt7915_dev *dev = mt7915_hw_dev(hw);
304 struct mt76_phy *mphy = hw->priv;
305 struct mt7915_phy *phy = mphy->priv;
307 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
308 dev->mt76.region = request->dfs_region;
310 if (dev->mt76.region == NL80211_DFS_UNSET)
311 mt7915_mcu_rdd_background_enable(phy, NULL);
313 mt7915_init_txpower(dev, &mphy->sband_2g.sband);
314 mt7915_init_txpower(dev, &mphy->sband_5g.sband);
315 mt7915_init_txpower(dev, &mphy->sband_6g.sband);
317 mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
318 mt7915_dfs_init_radar_detector(phy);
322 mt7915_init_wiphy(struct ieee80211_hw *hw)
324 struct mt7915_phy *phy = mt7915_hw_phy(hw);
325 struct mt76_dev *mdev = &phy->dev->mt76;
326 struct wiphy *wiphy = hw->wiphy;
327 struct mt7915_dev *dev = phy->dev;
330 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
331 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
332 hw->netdev_features = NETIF_F_RXCSUM;
334 hw->radiotap_timestamp.units_pos =
335 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
339 hw->sta_data_size = sizeof(struct mt7915_sta);
340 hw->vif_data_size = sizeof(struct mt7915_vif);
342 wiphy->iface_combinations = if_comb;
343 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
344 wiphy->reg_notifier = mt7915_regd_notifier;
345 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
346 wiphy->mbssid_max_interfaces = 16;
348 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
349 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
350 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
351 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
352 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
353 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
355 if (!mdev->dev->of_node ||
356 !of_property_read_bool(mdev->dev->of_node,
357 "mediatek,disable-radar-background"))
358 wiphy_ext_feature_set(wiphy,
359 NL80211_EXT_FEATURE_RADAR_BACKGROUND);
361 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
362 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
363 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
364 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
365 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
367 hw->max_tx_fragments = 4;
369 if (phy->mt76->cap.has_2ghz)
370 phy->mt76->sband_2g.sband.ht_cap.cap |=
371 IEEE80211_HT_CAP_LDPC_CODING |
372 IEEE80211_HT_CAP_MAX_AMSDU;
374 if (phy->mt76->cap.has_5ghz) {
375 phy->mt76->sband_5g.sband.ht_cap.cap |=
376 IEEE80211_HT_CAP_LDPC_CODING |
377 IEEE80211_HT_CAP_MAX_AMSDU;
379 if (is_mt7915(&dev->mt76)) {
380 phy->mt76->sband_5g.sband.vht_cap.cap |=
381 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
382 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
384 if (!dev->dbdc_support)
385 phy->mt76->sband_5g.sband.vht_cap.cap |=
386 IEEE80211_VHT_CAP_SHORT_GI_160 |
387 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
389 phy->mt76->sband_5g.sband.vht_cap.cap |=
390 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
391 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
393 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
394 phy->mt76->sband_5g.sband.vht_cap.cap |=
395 IEEE80211_VHT_CAP_SHORT_GI_160 |
396 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
400 mt76_set_stream_caps(phy->mt76, true);
401 mt7915_set_stream_vht_txbf_caps(phy);
402 mt7915_set_stream_he_caps(phy);
404 wiphy->available_antennas_rx = phy->mt76->antenna_mask;
405 wiphy->available_antennas_tx = phy->mt76->antenna_mask;
409 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
413 mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
414 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
415 mt76_set(dev, MT_TMAC_CTCR0(band),
416 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
417 MT_TMAC_CTCR0_INS_DDLMT_EN);
419 mask = MT_MDP_RCFR0_MCU_RX_MGMT |
420 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
421 MT_MDP_RCFR0_MCU_RX_CTL_BAR;
422 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
423 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
424 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
425 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
427 mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
428 MT_MDP_RCFR1_RX_DROPPED_UCAST |
429 MT_MDP_RCFR1_RX_DROPPED_MCAST;
430 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
431 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
432 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
433 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
435 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
437 /* mt7915: disable rx rate report by default due to hw issues */
438 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
441 static void mt7915_mac_init(struct mt7915_dev *dev)
444 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
446 /* config pse qid6 wfdma port selection */
447 if (!is_mt7915(&dev->mt76) && dev->hif2)
448 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
449 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
451 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
453 /* enable hardware de-agg */
454 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
456 for (i = 0; i < mt7915_wtbl_size(dev); i++)
457 mt7915_mac_wtbl_update(dev, i,
458 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
459 for (i = 0; i < 2; i++)
460 mt7915_mac_init_band(dev, i);
462 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
463 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
464 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
468 static int mt7915_txbf_init(struct mt7915_dev *dev)
472 if (dev->dbdc_support) {
473 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
478 /* trigger sounding packets */
479 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
484 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
487 static struct mt7915_phy *
488 mt7915_alloc_ext_phy(struct mt7915_dev *dev)
490 struct mt7915_phy *phy;
491 struct mt76_phy *mphy;
493 if (!dev->dbdc_support)
496 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops);
498 return ERR_PTR(-ENOMEM);
504 /* Bind main phy to band0 and ext_phy to band1 for dbdc case */
511 mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
513 struct mt76_phy *mphy = phy->mt76;
516 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
518 mt7915_eeprom_parse_hw_cap(dev, phy);
520 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
522 /* Make the secondary PHY MAC address local without overlapping with
523 * the usual MAC address allocation scheme on multiple virtual interfaces
525 if (!is_valid_ether_addr(mphy->macaddr)) {
526 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
528 mphy->macaddr[0] |= 2;
529 mphy->macaddr[0] ^= BIT(7);
531 mt76_eeprom_override(mphy);
533 /* init wiphy according to mphy and phy */
534 mt7915_init_wiphy(mphy->hw);
536 ret = mt76_register_phy(mphy, true, mt76_rates,
537 ARRAY_SIZE(mt76_rates));
541 ret = mt7915_thermal_init(phy);
545 mt7915_init_debugfs(phy);
550 mt76_unregister_phy(mphy);
554 static void mt7915_init_work(struct work_struct *work)
556 struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
559 mt7915_mcu_set_eeprom(dev);
560 mt7915_mac_init(dev);
561 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
562 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
563 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
564 mt7915_txbf_init(dev);
567 void mt7915_wfsys_reset(struct mt7915_dev *dev)
569 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
570 #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16)
572 if (is_mt7915(&dev->mt76)) {
573 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
575 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
577 /* change to software control */
578 val |= MT_TOP_PWR_SW_RST;
579 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
582 val &= ~MT_TOP_PWR_SW_RST;
583 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
585 /* release wfsys then mcu re-executes romcode */
586 val |= MT_TOP_PWR_SW_RST;
587 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
589 /* switch to hw control */
590 val &= ~MT_TOP_PWR_SW_RST;
591 val |= MT_TOP_PWR_HW_CTRL;
592 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
594 /* check whether mcu resets to default */
595 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
596 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
598 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
602 /* wfsys reset won't clear host registers */
603 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
606 } else if (is_mt7986(&dev->mt76)) {
607 mt7986_wmac_disable(dev);
610 mt7986_wmac_enable(dev);
613 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
616 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
621 static bool mt7915_band_config(struct mt7915_dev *dev)
625 dev->phy.band_idx = 0;
627 if (is_mt7986(&dev->mt76)) {
628 u32 sku = mt7915_check_adie(dev, true);
631 * for mt7986, dbdc support is determined by the number
632 * of adie chips and the main phy is bound to band1 when
635 if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
636 dev->phy.band_idx = 1;
640 ret = is_mt7915(&dev->mt76) ?
641 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
648 mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
652 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
654 INIT_WORK(&dev->init_work, mt7915_init_work);
656 ret = mt7915_dma_init(dev, phy2);
660 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
662 ret = mt7915_mcu_init(dev);
666 ret = mt7915_eeprom_init(dev);
670 if (dev->flash_mode) {
671 ret = mt7915_mcu_apply_group_cal(dev);
676 /* Beacon and mgmt frames should occupy wcid 0 */
677 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
681 dev->mt76.global_wcid.idx = idx;
682 dev->mt76.global_wcid.hw_key_idx = -1;
683 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
684 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
689 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
694 if (!phy->mt76->cap.has_5ghz)
697 nss = hweight8(phy->mt76->chainmask);
698 cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
700 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
701 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
702 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
704 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
705 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
706 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
711 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
712 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
713 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
718 mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev,
719 struct ieee80211_sta_he_cap *he_cap,
722 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
725 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
726 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
731 #ifdef CONFIG_MAC80211_MESH
732 if (vif == NL80211_IFTYPE_MESH_POINT)
736 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
737 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
739 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
740 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
741 elem->phy_cap_info[5] &= ~c;
743 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
744 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
745 elem->phy_cap_info[6] &= ~c;
747 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
749 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
750 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
751 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
752 elem->phy_cap_info[2] |= c;
754 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
755 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
756 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
757 elem->phy_cap_info[4] |= c;
759 /* do not support NG16 due to spec D4.0 changes subcarrier idx */
760 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
761 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
763 if (vif == NL80211_IFTYPE_STATION)
764 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
766 elem->phy_cap_info[6] |= c;
771 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
772 elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3;
774 if (vif != NL80211_IFTYPE_AP)
777 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
778 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
781 * for mt7915, max supported nss is 2 for bw > 80MHz
783 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
785 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
787 elem->phy_cap_info[5] |= c;
789 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
790 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
791 elem->phy_cap_info[6] |= c;
793 if (!is_mt7915(&dev->mt76)) {
794 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
795 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
796 elem->phy_cap_info[7] |= c;
801 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss)
803 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */
804 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
806 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
807 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
810 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
811 nss * hweight8(ru_bit_mask) * 2;
812 ppet_size = DIV_ROUND_UP(ppet_bits, 8);
814 for (i = 0; i < ppet_size - 1; i++)
815 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
817 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
818 (0xff >> (8 - (ppet_bits - 1) % 8));
822 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
823 struct ieee80211_sband_iftype_data *data)
825 struct mt7915_dev *dev = phy->dev;
826 int i, idx = 0, nss = hweight8(phy->mt76->chainmask);
831 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
832 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
837 for (i = 0; i < 8; i++) {
839 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
841 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
844 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
846 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
849 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
850 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
851 struct ieee80211_he_cap_elem *he_cap_elem =
852 &he_cap->he_cap_elem;
853 struct ieee80211_he_mcs_nss_supp *he_mcs =
854 &he_cap->he_mcs_nss_supp;
857 case NL80211_IFTYPE_STATION:
858 case NL80211_IFTYPE_AP:
859 #ifdef CONFIG_MAC80211_MESH
860 case NL80211_IFTYPE_MESH_POINT:
867 data[idx].types_mask = BIT(i);
868 he_cap->has_he = true;
870 he_cap_elem->mac_cap_info[0] =
871 IEEE80211_HE_MAC_CAP0_HTC_HE;
872 he_cap_elem->mac_cap_info[3] =
873 IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
874 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
875 he_cap_elem->mac_cap_info[4] =
876 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
878 if (band == NL80211_BAND_2GHZ)
879 he_cap_elem->phy_cap_info[0] =
880 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
882 he_cap_elem->phy_cap_info[0] =
883 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
884 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
885 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
887 he_cap_elem->phy_cap_info[1] =
888 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
889 he_cap_elem->phy_cap_info[2] =
890 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
891 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
894 case NL80211_IFTYPE_AP:
895 he_cap_elem->mac_cap_info[0] |=
896 IEEE80211_HE_MAC_CAP0_TWT_RES;
897 he_cap_elem->mac_cap_info[2] |=
898 IEEE80211_HE_MAC_CAP2_BSR;
899 he_cap_elem->mac_cap_info[4] |=
900 IEEE80211_HE_MAC_CAP4_BQR;
901 he_cap_elem->mac_cap_info[5] |=
902 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
903 he_cap_elem->phy_cap_info[3] |=
904 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
905 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
906 he_cap_elem->phy_cap_info[6] |=
907 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
908 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
909 he_cap_elem->phy_cap_info[9] |=
910 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
911 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
913 case NL80211_IFTYPE_STATION:
914 he_cap_elem->mac_cap_info[1] |=
915 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
917 if (band == NL80211_BAND_2GHZ)
918 he_cap_elem->phy_cap_info[0] |=
919 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
921 he_cap_elem->phy_cap_info[0] |=
922 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
924 he_cap_elem->phy_cap_info[1] |=
925 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
926 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
927 he_cap_elem->phy_cap_info[3] |=
928 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
929 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
930 he_cap_elem->phy_cap_info[6] |=
931 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
932 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
933 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
934 he_cap_elem->phy_cap_info[7] |=
935 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
936 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
937 he_cap_elem->phy_cap_info[8] |=
938 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
939 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
940 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
941 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
942 he_cap_elem->phy_cap_info[9] |=
943 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
944 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
945 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
946 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
947 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
948 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
952 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
953 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
954 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
955 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
956 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
957 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
959 mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss);
961 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
962 if (he_cap_elem->phy_cap_info[6] &
963 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
964 mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss);
966 he_cap_elem->phy_cap_info[9] |=
967 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
968 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
971 if (band == NL80211_BAND_6GHZ) {
972 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
973 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
975 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_8,
976 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
977 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
978 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
979 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
980 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
982 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
991 void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
993 struct ieee80211_sband_iftype_data *data;
994 struct ieee80211_supported_band *band;
997 if (phy->mt76->cap.has_2ghz) {
998 data = phy->iftype[NL80211_BAND_2GHZ];
999 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1001 band = &phy->mt76->sband_2g.sband;
1002 band->iftype_data = data;
1003 band->n_iftype_data = n;
1006 if (phy->mt76->cap.has_5ghz) {
1007 data = phy->iftype[NL80211_BAND_5GHZ];
1008 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1010 band = &phy->mt76->sband_5g.sband;
1011 band->iftype_data = data;
1012 band->n_iftype_data = n;
1015 if (phy->mt76->cap.has_6ghz) {
1016 data = phy->iftype[NL80211_BAND_6GHZ];
1017 n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1019 band = &phy->mt76->sband_6g.sband;
1020 band->iftype_data = data;
1021 band->n_iftype_data = n;
1025 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1027 struct mt7915_phy *phy = mt7915_ext_phy(dev);
1028 struct mt76_phy *mphy = dev->mt76.phy2;
1033 mt7915_unregister_thermal(phy);
1034 mt76_unregister_phy(mphy);
1035 ieee80211_free_hw(mphy->hw);
1038 static void mt7915_stop_hardware(struct mt7915_dev *dev)
1040 mt7915_mcu_exit(dev);
1041 mt7915_tx_token_put(dev);
1042 mt7915_dma_cleanup(dev);
1043 tasklet_disable(&dev->irq_tasklet);
1045 if (is_mt7986(&dev->mt76))
1046 mt7986_wmac_disable(dev);
1050 int mt7915_register_device(struct mt7915_dev *dev)
1052 struct ieee80211_hw *hw = mt76_hw(dev);
1053 struct mt7915_phy *phy2;
1057 dev->phy.mt76 = &dev->mt76.phy;
1058 dev->mt76.phy.priv = &dev->phy;
1059 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1060 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1061 INIT_LIST_HEAD(&dev->sta_rc_list);
1062 INIT_LIST_HEAD(&dev->sta_poll_list);
1063 INIT_LIST_HEAD(&dev->twt_list);
1064 spin_lock_init(&dev->sta_poll_lock);
1066 init_waitqueue_head(&dev->reset_wait);
1067 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1069 dev->dbdc_support = mt7915_band_config(dev);
1071 phy2 = mt7915_alloc_ext_phy(dev);
1073 return PTR_ERR(phy2);
1075 ret = mt7915_init_hardware(dev, phy2);
1079 mt7915_init_wiphy(hw);
1081 #ifdef CONFIG_NL80211_TESTMODE
1082 dev->mt76.test_ops = &mt7915_testmode_ops;
1085 /* init led callbacks */
1086 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
1087 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
1088 dev->mt76.led_cdev.blink_set = mt7915_led_set_blink;
1091 ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1092 ARRAY_SIZE(mt76_rates));
1096 ret = mt7915_thermal_init(&dev->phy);
1100 ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1103 ret = mt7915_register_ext_phy(dev, phy2);
1108 mt7915_init_debugfs(&dev->phy);
1113 mt7915_unregister_thermal(&dev->phy);
1115 mt76_unregister_device(&dev->mt76);
1117 mt7915_stop_hardware(dev);
1120 ieee80211_free_hw(phy2->mt76->hw);
1124 void mt7915_unregister_device(struct mt7915_dev *dev)
1126 mt7915_unregister_ext_phy(dev);
1127 mt7915_unregister_thermal(&dev->phy);
1128 mt76_unregister_device(&dev->mt76);
1129 mt7915_stop_hardware(dev);
1131 mt76_free_device(&dev->mt76);