1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
48 #include <net/mac80211.h>
50 #include <asm/div64.h>
52 #define DRV_NAME "iwlagn"
54 #include "iwl-eeprom.h"
58 #include "iwl-helpers.h"
60 #include "iwl-calib.h"
64 /******************************************************************************
68 ******************************************************************************/
71 * module name, copyright, version, etc.
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
75 #ifdef CONFIG_IWLWIFI_DEBUG
81 #define DRV_VERSION IWLWIFI_VERSION VD
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
91 * iwl_commit_rxon - commit staging_rxon to hardware
93 * The RXON command in staging_rxon is committed to the hardware and
94 * the active_rxon structure is updated with the new data. This
95 * function correctly transitions out of the RXON_ASSOC_MSK state if
96 * a HW tune is required based on the RXON structure changes.
98 int iwl_commit_rxon(struct iwl_priv *priv)
100 /* cast away the const for active_rxon in this function */
101 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
104 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
106 if (!iwl_is_alive(priv))
109 /* always get timestamp with Rx frame */
110 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
112 ret = iwl_check_rxon_cmd(priv);
114 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
119 * receive commit_rxon request
120 * abort any previous channel switch if still in process
122 if (priv->switch_rxon.switch_in_progress &&
123 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
124 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
125 le16_to_cpu(priv->switch_rxon.channel));
126 iwl_chswitch_done(priv, false);
129 /* If we don't need to send a full RXON, we can use
130 * iwl_rxon_assoc_cmd which is used to reconfigure filter
131 * and other flags for the current radio configuration. */
132 if (!iwl_full_rxon_required(priv)) {
133 ret = iwl_send_rxon_assoc(priv);
135 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
139 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
140 iwl_print_rx_config_cmd(priv);
144 /* If we are currently associated and the new config requires
145 * an RXON_ASSOC and the new config wants the associated mask enabled,
146 * we must clear the associated from the active configuration
147 * before we apply the new config */
148 if (iwl_is_associated(priv) && new_assoc) {
149 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
150 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
153 sizeof(struct iwl_rxon_cmd),
156 /* If the mask clearing failed then we set
157 * active_rxon back to what it was previously */
159 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
160 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
163 iwl_clear_ucode_stations(priv);
164 iwl_restore_stations(priv);
165 ret = iwl_restore_default_wep_keys(priv);
167 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
172 IWL_DEBUG_INFO(priv, "Sending RXON\n"
173 "* with%s RXON_FILTER_ASSOC_MSK\n"
176 (new_assoc ? "" : "out"),
177 le16_to_cpu(priv->staging_rxon.channel),
178 priv->staging_rxon.bssid_addr);
180 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
182 /* Apply the new configuration
183 * RXON unassoc clears the station table in uCode so restoration of
184 * stations is needed after it (the RXON command) completes
187 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
188 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
190 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
193 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
194 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
195 iwl_clear_ucode_stations(priv);
196 iwl_restore_stations(priv);
197 ret = iwl_restore_default_wep_keys(priv);
199 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
204 priv->start_calib = 0;
206 /* Apply the new configuration
207 * RXON assoc doesn't clear the station table in uCode,
209 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
210 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
212 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
215 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
217 iwl_print_rx_config_cmd(priv);
219 iwl_init_sensitivity(priv);
221 /* If we issue a new RXON command which required a tune then we must
222 * send a new TXPOWER command or we won't be able to Tx any frames */
223 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
225 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
232 void iwl_update_chain_flags(struct iwl_priv *priv)
235 if (priv->cfg->ops->hcmd->set_rxon_chain)
236 priv->cfg->ops->hcmd->set_rxon_chain(priv);
237 iwlcore_commit_rxon(priv);
240 static void iwl_clear_free_frames(struct iwl_priv *priv)
242 struct list_head *element;
244 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
247 while (!list_empty(&priv->free_frames)) {
248 element = priv->free_frames.next;
250 kfree(list_entry(element, struct iwl_frame, list));
251 priv->frames_count--;
254 if (priv->frames_count) {
255 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
257 priv->frames_count = 0;
261 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
263 struct iwl_frame *frame;
264 struct list_head *element;
265 if (list_empty(&priv->free_frames)) {
266 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
268 IWL_ERR(priv, "Could not allocate frame!\n");
272 priv->frames_count++;
276 element = priv->free_frames.next;
278 return list_entry(element, struct iwl_frame, list);
281 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
283 memset(frame, 0, sizeof(*frame));
284 list_add(&frame->list, &priv->free_frames);
287 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
288 struct ieee80211_hdr *hdr,
291 if (!priv->ibss_beacon)
294 if (priv->ibss_beacon->len > left)
297 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
299 return priv->ibss_beacon->len;
302 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
303 static void iwl_set_beacon_tim(struct iwl_priv *priv,
304 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
305 u8 *beacon, u32 frame_size)
308 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
311 * The index is relative to frame start but we start looking at the
312 * variable-length part of the beacon.
314 tim_idx = mgmt->u.beacon.variable - beacon;
316 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
317 while ((tim_idx < (frame_size - 2)) &&
318 (beacon[tim_idx] != WLAN_EID_TIM))
319 tim_idx += beacon[tim_idx+1] + 2;
321 /* If TIM field was found, set variables */
322 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
323 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
324 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
326 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
329 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
330 struct iwl_frame *frame)
332 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
337 * We have to set up the TX command, the TX Beacon command, and the
341 /* Initialize memory */
342 tx_beacon_cmd = &frame->u.beacon;
343 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
345 /* Set up TX beacon contents */
346 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
347 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
348 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
351 /* Set up TX command fields */
352 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
353 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
354 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
355 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
356 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
358 /* Set up TX beacon command fields */
359 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
362 /* Set up packet rate and flags */
363 rate = iwl_rate_get_lowest_plcp(priv);
364 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
365 priv->hw_params.valid_tx_ant);
366 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
367 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
368 rate_flags |= RATE_MCS_CCK_MSK;
369 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
372 return sizeof(*tx_beacon_cmd) + frame_size;
374 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
376 struct iwl_frame *frame;
377 unsigned int frame_size;
380 frame = iwl_get_free_frame(priv);
382 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
387 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
389 IWL_ERR(priv, "Error configuring the beacon command\n");
390 iwl_free_frame(priv, frame);
394 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
397 iwl_free_frame(priv, frame);
402 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
404 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
406 dma_addr_t addr = get_unaligned_le32(&tb->lo);
407 if (sizeof(dma_addr_t) > sizeof(u32))
409 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
414 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
416 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
418 return le16_to_cpu(tb->hi_n_len) >> 4;
421 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
422 dma_addr_t addr, u16 len)
424 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
425 u16 hi_n_len = len << 4;
427 put_unaligned_le32(addr, &tb->lo);
428 if (sizeof(dma_addr_t) > sizeof(u32))
429 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
431 tb->hi_n_len = cpu_to_le16(hi_n_len);
433 tfd->num_tbs = idx + 1;
436 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
438 return tfd->num_tbs & 0x1f;
442 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
443 * @priv - driver private data
446 * Does NOT advance any TFD circular buffer read/write indexes
447 * Does NOT free the TFD itself (which is within circular buffer)
449 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
451 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
453 struct pci_dev *dev = priv->pci_dev;
454 int index = txq->q.read_ptr;
458 tfd = &tfd_tmp[index];
460 /* Sanity check on number of chunks */
461 num_tbs = iwl_tfd_get_num_tbs(tfd);
463 if (num_tbs >= IWL_NUM_OF_TBS) {
464 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
465 /* @todo issue fatal error, it is quite serious situation */
471 pci_unmap_single(dev,
472 dma_unmap_addr(&txq->meta[index], mapping),
473 dma_unmap_len(&txq->meta[index], len),
474 PCI_DMA_BIDIRECTIONAL);
476 /* Unmap chunks, if any. */
477 for (i = 1; i < num_tbs; i++)
478 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
479 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
485 skb = txq->txb[txq->q.read_ptr].skb;
487 /* can be called from irqs-disabled context */
489 dev_kfree_skb_any(skb);
490 txq->txb[txq->q.read_ptr].skb = NULL;
495 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
496 struct iwl_tx_queue *txq,
497 dma_addr_t addr, u16 len,
501 struct iwl_tfd *tfd, *tfd_tmp;
505 tfd_tmp = (struct iwl_tfd *)txq->tfds;
506 tfd = &tfd_tmp[q->write_ptr];
509 memset(tfd, 0, sizeof(*tfd));
511 num_tbs = iwl_tfd_get_num_tbs(tfd);
513 /* Each TFD can point to a maximum 20 Tx buffers */
514 if (num_tbs >= IWL_NUM_OF_TBS) {
515 IWL_ERR(priv, "Error can not send more than %d chunks\n",
520 BUG_ON(addr & ~DMA_BIT_MASK(36));
521 if (unlikely(addr & ~IWL_TX_DMA_MASK))
522 IWL_ERR(priv, "Unaligned address = %llx\n",
523 (unsigned long long)addr);
525 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
531 * Tell nic where to find circular buffer of Tx Frame Descriptors for
532 * given Tx queue, and enable the DMA channel used for that queue.
534 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
535 * channels supported in hardware.
537 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
538 struct iwl_tx_queue *txq)
540 int txq_id = txq->q.id;
542 /* Circular buffer (TFD queue in DRAM) physical base address */
543 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
544 txq->q.dma_addr >> 8);
549 /******************************************************************************
551 * Generic RX handler implementations
553 ******************************************************************************/
554 static void iwl_rx_reply_alive(struct iwl_priv *priv,
555 struct iwl_rx_mem_buffer *rxb)
557 struct iwl_rx_packet *pkt = rxb_addr(rxb);
558 struct iwl_alive_resp *palive;
559 struct delayed_work *pwork;
561 palive = &pkt->u.alive_frame;
563 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
565 palive->is_valid, palive->ver_type,
566 palive->ver_subtype);
568 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
569 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
570 memcpy(&priv->card_alive_init,
572 sizeof(struct iwl_init_alive_resp));
573 pwork = &priv->init_alive_start;
575 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
576 memcpy(&priv->card_alive, &pkt->u.alive_frame,
577 sizeof(struct iwl_alive_resp));
578 pwork = &priv->alive_start;
581 /* We delay the ALIVE response by 5ms to
582 * give the HW RF Kill time to activate... */
583 if (palive->is_valid == UCODE_VALID_OK)
584 queue_delayed_work(priv->workqueue, pwork,
585 msecs_to_jiffies(5));
587 IWL_WARN(priv, "uCode did not respond OK.\n");
590 static void iwl_bg_beacon_update(struct work_struct *work)
592 struct iwl_priv *priv =
593 container_of(work, struct iwl_priv, beacon_update);
594 struct sk_buff *beacon;
596 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
597 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
600 IWL_ERR(priv, "update beacon failed\n");
604 mutex_lock(&priv->mutex);
605 /* new beacon skb is allocated every time; dispose previous.*/
606 if (priv->ibss_beacon)
607 dev_kfree_skb(priv->ibss_beacon);
609 priv->ibss_beacon = beacon;
610 mutex_unlock(&priv->mutex);
612 iwl_send_beacon_cmd(priv);
616 * iwl_bg_statistics_periodic - Timer callback to queue statistics
618 * This callback is provided in order to send a statistics request.
620 * This timer function is continually reset to execute within
621 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
622 * was received. We need to ensure we receive the statistics in order
623 * to update the temperature used for calibrating the TXPOWER.
625 static void iwl_bg_statistics_periodic(unsigned long data)
627 struct iwl_priv *priv = (struct iwl_priv *)data;
629 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
632 /* dont send host command if rf-kill is on */
633 if (!iwl_is_ready_rf(priv))
636 iwl_send_statistics_request(priv, CMD_ASYNC, false);
640 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
641 u32 start_idx, u32 num_events,
645 u32 ptr; /* SRAM byte address of log data */
646 u32 ev, time, data; /* event log data */
647 unsigned long reg_flags;
650 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
652 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
654 /* Make sure device is powered up for SRAM reads */
655 spin_lock_irqsave(&priv->reg_lock, reg_flags);
656 if (iwl_grab_nic_access(priv)) {
657 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
661 /* Set starting address; reads will auto-increment */
662 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
666 * "time" is actually "data" for mode 0 (no timestamp).
667 * place event id # at far right for easier visual parsing.
669 for (i = 0; i < num_events; i++) {
670 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
671 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
673 trace_iwlwifi_dev_ucode_cont_event(priv,
676 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
677 trace_iwlwifi_dev_ucode_cont_event(priv,
681 /* Allow device to power down */
682 iwl_release_nic_access(priv);
683 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
686 static void iwl_continuous_event_trace(struct iwl_priv *priv)
688 u32 capacity; /* event log capacity in # entries */
689 u32 base; /* SRAM byte address of event log header */
690 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
691 u32 num_wraps; /* # times uCode wrapped to top of log */
692 u32 next_entry; /* index of next entry to be written by uCode */
694 if (priv->ucode_type == UCODE_INIT)
695 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
697 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
698 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
699 capacity = iwl_read_targ_mem(priv, base);
700 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
701 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
702 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
706 if (num_wraps == priv->event_log.num_wraps) {
707 iwl_print_cont_event_trace(priv,
708 base, priv->event_log.next_entry,
709 next_entry - priv->event_log.next_entry,
711 priv->event_log.non_wraps_count++;
713 if ((num_wraps - priv->event_log.num_wraps) > 1)
714 priv->event_log.wraps_more_count++;
716 priv->event_log.wraps_once_count++;
717 trace_iwlwifi_dev_ucode_wrap_event(priv,
718 num_wraps - priv->event_log.num_wraps,
719 next_entry, priv->event_log.next_entry);
720 if (next_entry < priv->event_log.next_entry) {
721 iwl_print_cont_event_trace(priv, base,
722 priv->event_log.next_entry,
723 capacity - priv->event_log.next_entry,
726 iwl_print_cont_event_trace(priv, base, 0,
729 iwl_print_cont_event_trace(priv, base,
730 next_entry, capacity - next_entry,
733 iwl_print_cont_event_trace(priv, base, 0,
737 priv->event_log.num_wraps = num_wraps;
738 priv->event_log.next_entry = next_entry;
742 * iwl_bg_ucode_trace - Timer callback to log ucode event
744 * The timer is continually set to execute every
745 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
746 * this function is to perform continuous uCode event logging operation
749 static void iwl_bg_ucode_trace(unsigned long data)
751 struct iwl_priv *priv = (struct iwl_priv *)data;
753 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
756 if (priv->event_log.ucode_trace) {
757 iwl_continuous_event_trace(priv);
758 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
759 mod_timer(&priv->ucode_trace,
760 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
764 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
765 struct iwl_rx_mem_buffer *rxb)
767 struct iwl_rx_packet *pkt = rxb_addr(rxb);
768 struct iwl4965_beacon_notif *beacon =
769 (struct iwl4965_beacon_notif *)pkt->u.raw;
770 #ifdef CONFIG_IWLWIFI_DEBUG
771 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
773 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
774 "tsf %d %d rate %d\n",
775 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
776 beacon->beacon_notify_hdr.failure_frame,
777 le32_to_cpu(beacon->ibss_mgr_status),
778 le32_to_cpu(beacon->high_tsf),
779 le32_to_cpu(beacon->low_tsf), rate);
782 priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
784 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
785 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
786 queue_work(priv->workqueue, &priv->beacon_update);
789 /* Handle notification from uCode that card's power state is changing
790 * due to software, hardware, or critical temperature RFKILL */
791 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
792 struct iwl_rx_mem_buffer *rxb)
794 struct iwl_rx_packet *pkt = rxb_addr(rxb);
795 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
796 unsigned long status = priv->status;
798 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
799 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
800 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
801 (flags & CT_CARD_DISABLED) ?
802 "Reached" : "Not reached");
804 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
807 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
808 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
810 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
811 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
813 if (!(flags & RXON_CARD_DISABLED)) {
814 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
815 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
816 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
817 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
819 if (flags & CT_CARD_DISABLED)
820 iwl_tt_enter_ct_kill(priv);
822 if (!(flags & CT_CARD_DISABLED))
823 iwl_tt_exit_ct_kill(priv);
825 if (flags & HW_CARD_DISABLED)
826 set_bit(STATUS_RF_KILL_HW, &priv->status);
828 clear_bit(STATUS_RF_KILL_HW, &priv->status);
831 if (!(flags & RXON_CARD_DISABLED))
832 iwl_scan_cancel(priv);
834 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
835 test_bit(STATUS_RF_KILL_HW, &priv->status)))
836 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
837 test_bit(STATUS_RF_KILL_HW, &priv->status));
839 wake_up_interruptible(&priv->wait_command_queue);
842 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
844 if (src == IWL_PWR_SRC_VAUX) {
845 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
846 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
847 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
848 ~APMG_PS_CTRL_MSK_PWR_SRC);
850 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
851 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
852 ~APMG_PS_CTRL_MSK_PWR_SRC);
858 static void iwl_bg_tx_flush(struct work_struct *work)
860 struct iwl_priv *priv =
861 container_of(work, struct iwl_priv, tx_flush);
863 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
866 /* do nothing if rf-kill is on */
867 if (!iwl_is_ready_rf(priv))
870 if (priv->cfg->ops->lib->txfifo_flush) {
871 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
872 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
877 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
879 * Setup the RX handlers for each of the reply types sent from the uCode
882 * This function chains into the hardware specific files for them to setup
883 * any hardware specific handlers as well.
885 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
887 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
888 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
889 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
890 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
891 iwl_rx_spectrum_measure_notif;
892 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
893 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
894 iwl_rx_pm_debug_statistics_notif;
895 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
898 * The same handler is used for both the REPLY to a discrete
899 * statistics request from the host as well as for the periodic
900 * statistics notifications (after received beacons) from the uCode.
902 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
903 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
905 iwl_setup_rx_scan_handlers(priv);
907 /* status change handler */
908 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
910 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
911 iwl_rx_missed_beacon_notif;
913 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
914 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
916 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
917 /* Set up hardware specific Rx handlers */
918 priv->cfg->ops->lib->rx_handler_setup(priv);
922 * iwl_rx_handle - Main entry function for receiving responses from uCode
924 * Uses the priv->rx_handlers callback function array to invoke
925 * the appropriate handlers, including command responses,
926 * frame-received notifications, and other notifications.
928 void iwl_rx_handle(struct iwl_priv *priv)
930 struct iwl_rx_mem_buffer *rxb;
931 struct iwl_rx_packet *pkt;
932 struct iwl_rx_queue *rxq = &priv->rxq;
940 /* uCode's read index (stored in shared DRAM) indicates the last Rx
941 * buffer that the driver may process (last buffer filled by ucode). */
942 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
945 /* Rx interrupt, but nothing sent from uCode */
947 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
949 /* calculate total frames need to be restock after handling RX */
950 total_empty = r - rxq->write_actual;
952 total_empty += RX_QUEUE_SIZE;
954 if (total_empty > (RX_QUEUE_SIZE / 2))
962 /* If an RXB doesn't have a Rx queue slot associated with it,
963 * then a bug has been introduced in the queue refilling
964 * routines -- catch it here */
967 rxq->queue[i] = NULL;
969 pci_unmap_page(priv->pci_dev, rxb->page_dma,
970 PAGE_SIZE << priv->hw_params.rx_page_order,
974 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
975 len += sizeof(u32); /* account for status word */
976 trace_iwlwifi_dev_rx(priv, pkt, len);
978 /* Reclaim a command buffer only if this packet is a response
979 * to a (driver-originated) command.
980 * If the packet (e.g. Rx frame) originated from uCode,
981 * there is no command buffer to reclaim.
982 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
983 * but apparently a few don't get set; catch them here. */
984 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
985 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
986 (pkt->hdr.cmd != REPLY_RX) &&
987 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
988 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
989 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
990 (pkt->hdr.cmd != REPLY_TX);
992 /* Based on type of command response or notification,
993 * handle those that need handling via function in
994 * rx_handlers table. See iwl_setup_rx_handlers() */
995 if (priv->rx_handlers[pkt->hdr.cmd]) {
996 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
997 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
998 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
999 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1001 /* No handling needed */
1003 "r %d i %d No handler needed for %s, 0x%02x\n",
1004 r, i, get_cmd_string(pkt->hdr.cmd),
1009 * XXX: After here, we should always check rxb->page
1010 * against NULL before touching it or its virtual
1011 * memory (pkt). Because some rx_handler might have
1012 * already taken or freed the pages.
1016 /* Invoke any callbacks, transfer the buffer to caller,
1017 * and fire off the (possibly) blocking iwl_send_cmd()
1018 * as we reclaim the driver command queue */
1020 iwl_tx_cmd_complete(priv, rxb);
1022 IWL_WARN(priv, "Claim null rxb?\n");
1025 /* Reuse the page if possible. For notification packets and
1026 * SKBs that fail to Rx correctly, add them back into the
1027 * rx_free list for reuse later. */
1028 spin_lock_irqsave(&rxq->lock, flags);
1029 if (rxb->page != NULL) {
1030 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1031 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1032 PCI_DMA_FROMDEVICE);
1033 list_add_tail(&rxb->list, &rxq->rx_free);
1036 list_add_tail(&rxb->list, &rxq->rx_used);
1038 spin_unlock_irqrestore(&rxq->lock, flags);
1040 i = (i + 1) & RX_QUEUE_MASK;
1041 /* If there are a lot of unused frames,
1042 * restock the Rx queue so ucode wont assert. */
1047 iwlagn_rx_replenish_now(priv);
1053 /* Backtrack one entry */
1056 iwlagn_rx_replenish_now(priv);
1058 iwlagn_rx_queue_restock(priv);
1061 /* call this function to flush any scheduled tasklet */
1062 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1064 /* wait to make sure we flush pending tasklet*/
1065 synchronize_irq(priv->pci_dev->irq);
1066 tasklet_kill(&priv->irq_tasklet);
1069 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1071 u32 inta, handled = 0;
1073 unsigned long flags;
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1079 spin_lock_irqsave(&priv->lock, flags);
1081 /* Ack/clear/reset pending uCode interrupts.
1082 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1083 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1084 inta = iwl_read32(priv, CSR_INT);
1085 iwl_write32(priv, CSR_INT, inta);
1087 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1088 * Any new interrupts that happen after this, either while we're
1089 * in this tasklet, or later, will show up in next ISR/tasklet. */
1090 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1091 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1093 #ifdef CONFIG_IWLWIFI_DEBUG
1094 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1095 /* just for debug */
1096 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1097 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1098 inta, inta_mask, inta_fh);
1102 spin_unlock_irqrestore(&priv->lock, flags);
1104 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1105 * atomic, make sure that inta covers all the interrupts that
1106 * we've discovered, even if FH interrupt came in just after
1107 * reading CSR_INT. */
1108 if (inta_fh & CSR49_FH_INT_RX_MASK)
1109 inta |= CSR_INT_BIT_FH_RX;
1110 if (inta_fh & CSR49_FH_INT_TX_MASK)
1111 inta |= CSR_INT_BIT_FH_TX;
1113 /* Now service all interrupt bits discovered above. */
1114 if (inta & CSR_INT_BIT_HW_ERR) {
1115 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1117 /* Tell the device to stop sending interrupts */
1118 iwl_disable_interrupts(priv);
1120 priv->isr_stats.hw++;
1121 iwl_irq_handle_error(priv);
1123 handled |= CSR_INT_BIT_HW_ERR;
1128 #ifdef CONFIG_IWLWIFI_DEBUG
1129 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1130 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1131 if (inta & CSR_INT_BIT_SCD) {
1132 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1133 "the frame/frames.\n");
1134 priv->isr_stats.sch++;
1137 /* Alive notification via Rx interrupt will do the real work */
1138 if (inta & CSR_INT_BIT_ALIVE) {
1139 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1140 priv->isr_stats.alive++;
1144 /* Safely ignore these bits for debug checks below */
1145 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1147 /* HW RF KILL switch toggled */
1148 if (inta & CSR_INT_BIT_RF_KILL) {
1150 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1151 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1154 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1155 hw_rf_kill ? "disable radio" : "enable radio");
1157 priv->isr_stats.rfkill++;
1159 /* driver only loads ucode once setting the interface up.
1160 * the driver allows loading the ucode even if the radio
1161 * is killed. Hence update the killswitch state here. The
1162 * rfkill handler will care about restarting if needed.
1164 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1166 set_bit(STATUS_RF_KILL_HW, &priv->status);
1168 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1169 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1172 handled |= CSR_INT_BIT_RF_KILL;
1175 /* Chip got too hot and stopped itself */
1176 if (inta & CSR_INT_BIT_CT_KILL) {
1177 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1178 priv->isr_stats.ctkill++;
1179 handled |= CSR_INT_BIT_CT_KILL;
1182 /* Error detected by uCode */
1183 if (inta & CSR_INT_BIT_SW_ERR) {
1184 IWL_ERR(priv, "Microcode SW error detected. "
1185 " Restarting 0x%X.\n", inta);
1186 priv->isr_stats.sw++;
1187 priv->isr_stats.sw_err = inta;
1188 iwl_irq_handle_error(priv);
1189 handled |= CSR_INT_BIT_SW_ERR;
1193 * uCode wakes up after power-down sleep.
1194 * Tell device about any new tx or host commands enqueued,
1195 * and about any Rx buffers made available while asleep.
1197 if (inta & CSR_INT_BIT_WAKEUP) {
1198 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1199 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1200 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1201 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1202 priv->isr_stats.wakeup++;
1203 handled |= CSR_INT_BIT_WAKEUP;
1206 /* All uCode command responses, including Tx command responses,
1207 * Rx "responses" (frame-received notification), and other
1208 * notifications from uCode come through here*/
1209 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1210 iwl_rx_handle(priv);
1211 priv->isr_stats.rx++;
1212 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1215 /* This "Tx" DMA channel is used only for loading uCode */
1216 if (inta & CSR_INT_BIT_FH_TX) {
1217 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1218 priv->isr_stats.tx++;
1219 handled |= CSR_INT_BIT_FH_TX;
1220 /* Wake up uCode load routine, now that load is complete */
1221 priv->ucode_write_complete = 1;
1222 wake_up_interruptible(&priv->wait_command_queue);
1225 if (inta & ~handled) {
1226 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1227 priv->isr_stats.unhandled++;
1230 if (inta & ~(priv->inta_mask)) {
1231 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1232 inta & ~priv->inta_mask);
1233 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1236 /* Re-enable all interrupts */
1237 /* only Re-enable if diabled by irq */
1238 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1239 iwl_enable_interrupts(priv);
1241 #ifdef CONFIG_IWLWIFI_DEBUG
1242 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1243 inta = iwl_read32(priv, CSR_INT);
1244 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1245 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1246 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1247 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1252 /* tasklet for iwlagn interrupt */
1253 static void iwl_irq_tasklet(struct iwl_priv *priv)
1257 unsigned long flags;
1259 #ifdef CONFIG_IWLWIFI_DEBUG
1263 spin_lock_irqsave(&priv->lock, flags);
1265 /* Ack/clear/reset pending uCode interrupts.
1266 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1268 /* There is a hardware bug in the interrupt mask function that some
1269 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1270 * they are disabled in the CSR_INT_MASK register. Furthermore the
1271 * ICT interrupt handling mechanism has another bug that might cause
1272 * these unmasked interrupts fail to be detected. We workaround the
1273 * hardware bugs here by ACKing all the possible interrupts so that
1274 * interrupt coalescing can still be achieved.
1276 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1278 inta = priv->_agn.inta;
1280 #ifdef CONFIG_IWLWIFI_DEBUG
1281 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1282 /* just for debug */
1283 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1284 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1289 spin_unlock_irqrestore(&priv->lock, flags);
1291 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1292 priv->_agn.inta = 0;
1294 /* Now service all interrupt bits discovered above. */
1295 if (inta & CSR_INT_BIT_HW_ERR) {
1296 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1298 /* Tell the device to stop sending interrupts */
1299 iwl_disable_interrupts(priv);
1301 priv->isr_stats.hw++;
1302 iwl_irq_handle_error(priv);
1304 handled |= CSR_INT_BIT_HW_ERR;
1309 #ifdef CONFIG_IWLWIFI_DEBUG
1310 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1311 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1312 if (inta & CSR_INT_BIT_SCD) {
1313 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1314 "the frame/frames.\n");
1315 priv->isr_stats.sch++;
1318 /* Alive notification via Rx interrupt will do the real work */
1319 if (inta & CSR_INT_BIT_ALIVE) {
1320 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1321 priv->isr_stats.alive++;
1325 /* Safely ignore these bits for debug checks below */
1326 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1328 /* HW RF KILL switch toggled */
1329 if (inta & CSR_INT_BIT_RF_KILL) {
1331 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1332 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1335 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1336 hw_rf_kill ? "disable radio" : "enable radio");
1338 priv->isr_stats.rfkill++;
1340 /* driver only loads ucode once setting the interface up.
1341 * the driver allows loading the ucode even if the radio
1342 * is killed. Hence update the killswitch state here. The
1343 * rfkill handler will care about restarting if needed.
1345 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1347 set_bit(STATUS_RF_KILL_HW, &priv->status);
1349 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1350 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1353 handled |= CSR_INT_BIT_RF_KILL;
1356 /* Chip got too hot and stopped itself */
1357 if (inta & CSR_INT_BIT_CT_KILL) {
1358 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1359 priv->isr_stats.ctkill++;
1360 handled |= CSR_INT_BIT_CT_KILL;
1363 /* Error detected by uCode */
1364 if (inta & CSR_INT_BIT_SW_ERR) {
1365 IWL_ERR(priv, "Microcode SW error detected. "
1366 " Restarting 0x%X.\n", inta);
1367 priv->isr_stats.sw++;
1368 priv->isr_stats.sw_err = inta;
1369 iwl_irq_handle_error(priv);
1370 handled |= CSR_INT_BIT_SW_ERR;
1373 /* uCode wakes up after power-down sleep */
1374 if (inta & CSR_INT_BIT_WAKEUP) {
1375 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1376 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1377 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1378 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1380 priv->isr_stats.wakeup++;
1382 handled |= CSR_INT_BIT_WAKEUP;
1385 /* All uCode command responses, including Tx command responses,
1386 * Rx "responses" (frame-received notification), and other
1387 * notifications from uCode come through here*/
1388 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1389 CSR_INT_BIT_RX_PERIODIC)) {
1390 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1391 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1392 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1393 iwl_write32(priv, CSR_FH_INT_STATUS,
1394 CSR49_FH_INT_RX_MASK);
1396 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1397 handled |= CSR_INT_BIT_RX_PERIODIC;
1398 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1400 /* Sending RX interrupt require many steps to be done in the
1402 * 1- write interrupt to current index in ICT table.
1404 * 3- update RX shared data to indicate last write index.
1405 * 4- send interrupt.
1406 * This could lead to RX race, driver could receive RX interrupt
1407 * but the shared data changes does not reflect this;
1408 * periodic interrupt will detect any dangling Rx activity.
1411 /* Disable periodic interrupt; we use it as just a one-shot. */
1412 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1413 CSR_INT_PERIODIC_DIS);
1414 iwl_rx_handle(priv);
1417 * Enable periodic interrupt in 8 msec only if we received
1418 * real RX interrupt (instead of just periodic int), to catch
1419 * any dangling Rx interrupt. If it was just the periodic
1420 * interrupt, there was no dangling Rx activity, and no need
1421 * to extend the periodic interrupt; one-shot is enough.
1423 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1424 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1425 CSR_INT_PERIODIC_ENA);
1427 priv->isr_stats.rx++;
1430 /* This "Tx" DMA channel is used only for loading uCode */
1431 if (inta & CSR_INT_BIT_FH_TX) {
1432 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1433 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1434 priv->isr_stats.tx++;
1435 handled |= CSR_INT_BIT_FH_TX;
1436 /* Wake up uCode load routine, now that load is complete */
1437 priv->ucode_write_complete = 1;
1438 wake_up_interruptible(&priv->wait_command_queue);
1441 if (inta & ~handled) {
1442 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1443 priv->isr_stats.unhandled++;
1446 if (inta & ~(priv->inta_mask)) {
1447 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1448 inta & ~priv->inta_mask);
1451 /* Re-enable all interrupts */
1452 /* only Re-enable if diabled by irq */
1453 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1454 iwl_enable_interrupts(priv);
1457 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1458 #define ACK_CNT_RATIO (50)
1459 #define BA_TIMEOUT_CNT (5)
1460 #define BA_TIMEOUT_MAX (16)
1463 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1465 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1466 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1469 bool iwl_good_ack_health(struct iwl_priv *priv,
1470 struct iwl_rx_packet *pkt)
1473 int actual_ack_cnt_delta, expected_ack_cnt_delta;
1474 int ba_timeout_delta;
1476 actual_ack_cnt_delta =
1477 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1478 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1479 expected_ack_cnt_delta =
1480 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1481 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1483 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1484 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1485 if ((priv->_agn.agg_tids_count > 0) &&
1486 (expected_ack_cnt_delta > 0) &&
1487 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1489 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1490 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1491 " expected_ack_cnt = %d\n",
1492 actual_ack_cnt_delta, expected_ack_cnt_delta);
1494 #ifdef CONFIG_IWLWIFI_DEBUGFS
1496 * This is ifdef'ed on DEBUGFS because otherwise the
1497 * statistics aren't available. If DEBUGFS is set but
1498 * DEBUG is not, these will just compile out.
1500 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1501 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1502 IWL_DEBUG_RADIO(priv,
1503 "ack_or_ba_timeout_collision delta = %d\n",
1504 priv->_agn.delta_statistics.tx.
1505 ack_or_ba_timeout_collision);
1507 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1509 if (!actual_ack_cnt_delta &&
1510 (ba_timeout_delta >= BA_TIMEOUT_MAX))
1517 /*****************************************************************************
1521 *****************************************************************************/
1523 #ifdef CONFIG_IWLWIFI_DEBUG
1526 * The following adds a new attribute to the sysfs representation
1527 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1528 * used for controlling the debug level.
1530 * See the level definitions in iwl for details.
1532 * The debug_level being managed using sysfs below is a per device debug
1533 * level that is used instead of the global debug level if it (the per
1534 * device debug level) is set.
1536 static ssize_t show_debug_level(struct device *d,
1537 struct device_attribute *attr, char *buf)
1539 struct iwl_priv *priv = dev_get_drvdata(d);
1540 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1542 static ssize_t store_debug_level(struct device *d,
1543 struct device_attribute *attr,
1544 const char *buf, size_t count)
1546 struct iwl_priv *priv = dev_get_drvdata(d);
1550 ret = strict_strtoul(buf, 0, &val);
1552 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1554 priv->debug_level = val;
1555 if (iwl_alloc_traffic_mem(priv))
1557 "Not enough memory to generate traffic log\n");
1559 return strnlen(buf, count);
1562 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1563 show_debug_level, store_debug_level);
1566 #endif /* CONFIG_IWLWIFI_DEBUG */
1569 static ssize_t show_temperature(struct device *d,
1570 struct device_attribute *attr, char *buf)
1572 struct iwl_priv *priv = dev_get_drvdata(d);
1574 if (!iwl_is_alive(priv))
1577 return sprintf(buf, "%d\n", priv->temperature);
1580 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1582 static ssize_t show_tx_power(struct device *d,
1583 struct device_attribute *attr, char *buf)
1585 struct iwl_priv *priv = dev_get_drvdata(d);
1587 if (!iwl_is_ready_rf(priv))
1588 return sprintf(buf, "off\n");
1590 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1593 static ssize_t store_tx_power(struct device *d,
1594 struct device_attribute *attr,
1595 const char *buf, size_t count)
1597 struct iwl_priv *priv = dev_get_drvdata(d);
1601 ret = strict_strtoul(buf, 10, &val);
1603 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1605 ret = iwl_set_tx_power(priv, val, false);
1607 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1615 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1617 static struct attribute *iwl_sysfs_entries[] = {
1618 &dev_attr_temperature.attr,
1619 &dev_attr_tx_power.attr,
1620 #ifdef CONFIG_IWLWIFI_DEBUG
1621 &dev_attr_debug_level.attr,
1626 static struct attribute_group iwl_attribute_group = {
1627 .name = NULL, /* put in device directory */
1628 .attrs = iwl_sysfs_entries,
1631 /******************************************************************************
1633 * uCode download functions
1635 ******************************************************************************/
1637 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1639 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1640 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1641 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1642 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1643 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1644 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1647 static void iwl_nic_start(struct iwl_priv *priv)
1649 /* Remove all resets to allow NIC to operate */
1650 iwl_write32(priv, CSR_RESET, 0);
1653 struct iwlagn_ucode_capabilities {
1654 u32 max_probe_length;
1655 u32 standard_phy_calibration_size;
1658 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1659 static int iwl_mac_setup_register(struct iwl_priv *priv,
1660 struct iwlagn_ucode_capabilities *capa);
1662 #define UCODE_EXPERIMENTAL_INDEX 100
1663 #define UCODE_EXPERIMENTAL_TAG "exp"
1665 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1667 const char *name_pre = priv->cfg->fw_name_pre;
1671 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1672 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1673 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1674 } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1676 priv->fw_index = priv->cfg->ucode_api_max;
1677 sprintf(tag, "%d", priv->fw_index);
1680 sprintf(tag, "%d", priv->fw_index);
1683 if (priv->fw_index < priv->cfg->ucode_api_min) {
1684 IWL_ERR(priv, "no suitable firmware found!\n");
1688 sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1690 IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1691 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1692 ? "EXPERIMENTAL " : "",
1693 priv->firmware_name);
1695 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1696 &priv->pci_dev->dev, GFP_KERNEL, priv,
1697 iwl_ucode_callback);
1700 struct iwlagn_firmware_pieces {
1701 const void *inst, *data, *init, *init_data, *boot;
1702 size_t inst_size, data_size, init_size, init_data_size, boot_size;
1706 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1707 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1710 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1711 const struct firmware *ucode_raw,
1712 struct iwlagn_firmware_pieces *pieces)
1714 struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1715 u32 api_ver, hdr_size;
1718 priv->ucode_ver = le32_to_cpu(ucode->ver);
1719 api_ver = IWL_UCODE_API(priv->ucode_ver);
1724 * 4965 doesn't revision the firmware file format
1725 * along with the API version, it always uses v1
1728 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1729 CSR_HW_REV_TYPE_4965) {
1731 if (ucode_raw->size < hdr_size) {
1732 IWL_ERR(priv, "File size too small!\n");
1735 pieces->build = le32_to_cpu(ucode->u.v2.build);
1736 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1737 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1738 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1739 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1740 pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1741 src = ucode->u.v2.data;
1744 /* fall through for 4965 */
1749 if (ucode_raw->size < hdr_size) {
1750 IWL_ERR(priv, "File size too small!\n");
1754 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1755 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1756 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1757 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1758 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1759 src = ucode->u.v1.data;
1763 /* Verify size of file vs. image size info in file's header */
1764 if (ucode_raw->size != hdr_size + pieces->inst_size +
1765 pieces->data_size + pieces->init_size +
1766 pieces->init_data_size + pieces->boot_size) {
1769 "uCode file size %d does not match expected size\n",
1770 (int)ucode_raw->size);
1775 src += pieces->inst_size;
1777 src += pieces->data_size;
1779 src += pieces->init_size;
1780 pieces->init_data = src;
1781 src += pieces->init_data_size;
1783 src += pieces->boot_size;
1788 static int iwlagn_wanted_ucode_alternative = 1;
1790 static int iwlagn_load_firmware(struct iwl_priv *priv,
1791 const struct firmware *ucode_raw,
1792 struct iwlagn_firmware_pieces *pieces,
1793 struct iwlagn_ucode_capabilities *capa)
1795 struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1796 struct iwl_ucode_tlv *tlv;
1797 size_t len = ucode_raw->size;
1799 int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1802 enum iwl_ucode_tlv_type tlv_type;
1805 if (len < sizeof(*ucode)) {
1806 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1810 if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1811 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1812 le32_to_cpu(ucode->magic));
1817 * Check which alternatives are present, and "downgrade"
1818 * when the chosen alternative is not present, warning
1819 * the user when that happens. Some files may not have
1820 * any alternatives, so don't warn in that case.
1822 alternatives = le64_to_cpu(ucode->alternatives);
1823 tmp = wanted_alternative;
1824 if (wanted_alternative > 63)
1825 wanted_alternative = 63;
1826 while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1827 wanted_alternative--;
1828 if (wanted_alternative && wanted_alternative != tmp)
1830 "uCode alternative %d not available, choosing %d\n",
1831 tmp, wanted_alternative);
1833 priv->ucode_ver = le32_to_cpu(ucode->ver);
1834 pieces->build = le32_to_cpu(ucode->build);
1837 len -= sizeof(*ucode);
1839 while (len >= sizeof(*tlv)) {
1842 len -= sizeof(*tlv);
1845 tlv_len = le32_to_cpu(tlv->length);
1846 tlv_type = le16_to_cpu(tlv->type);
1847 tlv_alt = le16_to_cpu(tlv->alternative);
1848 tlv_data = tlv->data;
1850 if (len < tlv_len) {
1851 IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1855 len -= ALIGN(tlv_len, 4);
1856 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1859 * Alternative 0 is always valid.
1861 * Skip alternative TLVs that are not selected.
1863 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1867 case IWL_UCODE_TLV_INST:
1868 pieces->inst = tlv_data;
1869 pieces->inst_size = tlv_len;
1871 case IWL_UCODE_TLV_DATA:
1872 pieces->data = tlv_data;
1873 pieces->data_size = tlv_len;
1875 case IWL_UCODE_TLV_INIT:
1876 pieces->init = tlv_data;
1877 pieces->init_size = tlv_len;
1879 case IWL_UCODE_TLV_INIT_DATA:
1880 pieces->init_data = tlv_data;
1881 pieces->init_data_size = tlv_len;
1883 case IWL_UCODE_TLV_BOOT:
1884 pieces->boot = tlv_data;
1885 pieces->boot_size = tlv_len;
1887 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1888 if (tlv_len != sizeof(u32))
1889 goto invalid_tlv_len;
1890 capa->max_probe_length =
1891 le32_to_cpup((__le32 *)tlv_data);
1893 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1894 if (tlv_len != sizeof(u32))
1895 goto invalid_tlv_len;
1896 pieces->init_evtlog_ptr =
1897 le32_to_cpup((__le32 *)tlv_data);
1899 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1900 if (tlv_len != sizeof(u32))
1901 goto invalid_tlv_len;
1902 pieces->init_evtlog_size =
1903 le32_to_cpup((__le32 *)tlv_data);
1905 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1906 if (tlv_len != sizeof(u32))
1907 goto invalid_tlv_len;
1908 pieces->init_errlog_ptr =
1909 le32_to_cpup((__le32 *)tlv_data);
1911 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1912 if (tlv_len != sizeof(u32))
1913 goto invalid_tlv_len;
1914 pieces->inst_evtlog_ptr =
1915 le32_to_cpup((__le32 *)tlv_data);
1917 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1918 if (tlv_len != sizeof(u32))
1919 goto invalid_tlv_len;
1920 pieces->inst_evtlog_size =
1921 le32_to_cpup((__le32 *)tlv_data);
1923 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1924 if (tlv_len != sizeof(u32))
1925 goto invalid_tlv_len;
1926 pieces->inst_errlog_ptr =
1927 le32_to_cpup((__le32 *)tlv_data);
1929 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1931 goto invalid_tlv_len;
1932 priv->enhance_sensitivity_table = true;
1934 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1935 if (tlv_len != sizeof(u32))
1936 goto invalid_tlv_len;
1937 capa->standard_phy_calibration_size =
1938 le32_to_cpup((__le32 *)tlv_data);
1941 IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1947 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1948 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1955 IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1956 iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1962 * iwl_ucode_callback - callback when firmware was loaded
1964 * If loaded successfully, copies the firmware into buffers
1965 * for the card to fetch (via DMA).
1967 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1969 struct iwl_priv *priv = context;
1970 struct iwl_ucode_header *ucode;
1972 struct iwlagn_firmware_pieces pieces;
1973 const unsigned int api_max = priv->cfg->ucode_api_max;
1974 const unsigned int api_min = priv->cfg->ucode_api_min;
1978 struct iwlagn_ucode_capabilities ucode_capa = {
1979 .max_probe_length = 200,
1980 .standard_phy_calibration_size =
1981 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1984 memset(&pieces, 0, sizeof(pieces));
1987 if (priv->fw_index <= priv->cfg->ucode_api_max)
1989 "request for firmware file '%s' failed.\n",
1990 priv->firmware_name);
1994 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1995 priv->firmware_name, ucode_raw->size);
1997 /* Make sure that we got at least the API version number */
1998 if (ucode_raw->size < 4) {
1999 IWL_ERR(priv, "File size way too small!\n");
2003 /* Data from ucode file: header followed by uCode images */
2004 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2007 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2009 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2015 api_ver = IWL_UCODE_API(priv->ucode_ver);
2016 build = pieces.build;
2019 * api_ver should match the api version forming part of the
2020 * firmware filename ... but we don't check for that and only rely
2021 * on the API version read from firmware header from here on forward
2023 if (api_ver < api_min || api_ver > api_max) {
2024 IWL_ERR(priv, "Driver unable to support your firmware API. "
2025 "Driver supports v%u, firmware is v%u.\n",
2030 if (api_ver != api_max)
2031 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2032 "got v%u. New firmware can be obtained "
2033 "from http://www.intellinuxwireless.org.\n",
2037 sprintf(buildstr, " build %u%s", build,
2038 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2043 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2044 IWL_UCODE_MAJOR(priv->ucode_ver),
2045 IWL_UCODE_MINOR(priv->ucode_ver),
2046 IWL_UCODE_API(priv->ucode_ver),
2047 IWL_UCODE_SERIAL(priv->ucode_ver),
2050 snprintf(priv->hw->wiphy->fw_version,
2051 sizeof(priv->hw->wiphy->fw_version),
2053 IWL_UCODE_MAJOR(priv->ucode_ver),
2054 IWL_UCODE_MINOR(priv->ucode_ver),
2055 IWL_UCODE_API(priv->ucode_ver),
2056 IWL_UCODE_SERIAL(priv->ucode_ver),
2060 * For any of the failures below (before allocating pci memory)
2061 * we will try to load a version with a smaller API -- maybe the
2062 * user just got a corrupted version of the latest API.
2065 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2067 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2069 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2071 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2073 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2074 pieces.init_data_size);
2075 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2078 /* Verify that uCode images will fit in card's SRAM */
2079 if (pieces.inst_size > priv->hw_params.max_inst_size) {
2080 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2085 if (pieces.data_size > priv->hw_params.max_data_size) {
2086 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2091 if (pieces.init_size > priv->hw_params.max_inst_size) {
2092 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2097 if (pieces.init_data_size > priv->hw_params.max_data_size) {
2098 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2099 pieces.init_data_size);
2103 if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2104 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2109 /* Allocate ucode buffers for card's bus-master loading ... */
2111 /* Runtime instructions and 2 copies of data:
2112 * 1) unmodified from disk
2113 * 2) backup cache for save/restore during power-downs */
2114 priv->ucode_code.len = pieces.inst_size;
2115 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2117 priv->ucode_data.len = pieces.data_size;
2118 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2120 priv->ucode_data_backup.len = pieces.data_size;
2121 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2123 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2124 !priv->ucode_data_backup.v_addr)
2127 /* Initialization instructions and data */
2128 if (pieces.init_size && pieces.init_data_size) {
2129 priv->ucode_init.len = pieces.init_size;
2130 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2132 priv->ucode_init_data.len = pieces.init_data_size;
2133 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2135 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2139 /* Bootstrap (instructions only, no data) */
2140 if (pieces.boot_size) {
2141 priv->ucode_boot.len = pieces.boot_size;
2142 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2144 if (!priv->ucode_boot.v_addr)
2148 /* Now that we can no longer fail, copy information */
2151 * The (size - 16) / 12 formula is based on the information recorded
2152 * for each event, which is of mode 1 (including timestamp) for all
2153 * new microcodes that include this information.
2155 priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2156 if (pieces.init_evtlog_size)
2157 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2159 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2160 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2161 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2162 if (pieces.inst_evtlog_size)
2163 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2165 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2166 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2168 /* Copy images into buffers for card's bus-master reads ... */
2170 /* Runtime instructions (first block of data in file) */
2171 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2173 memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2175 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2176 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2180 * NOTE: Copy into backup buffer will be done in iwl_up()
2182 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2184 memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2185 memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2187 /* Initialization instructions */
2188 if (pieces.init_size) {
2189 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2191 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2194 /* Initialization data */
2195 if (pieces.init_data_size) {
2196 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2197 pieces.init_data_size);
2198 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2199 pieces.init_data_size);
2202 /* Bootstrap instructions */
2203 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2205 memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2208 * figure out the offset of chain noise reset and gain commands
2209 * base on the size of standard phy calibration commands table size
2211 if (ucode_capa.standard_phy_calibration_size >
2212 IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2213 ucode_capa.standard_phy_calibration_size =
2214 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2216 priv->_agn.phy_calib_chain_noise_reset_cmd =
2217 ucode_capa.standard_phy_calibration_size;
2218 priv->_agn.phy_calib_chain_noise_gain_cmd =
2219 ucode_capa.standard_phy_calibration_size + 1;
2221 /**************************************************
2222 * This is still part of probe() in a sense...
2224 * 9. Setup and register with mac80211 and debugfs
2225 **************************************************/
2226 err = iwl_mac_setup_register(priv, &ucode_capa);
2230 err = iwl_dbgfs_register(priv, DRV_NAME);
2232 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2234 err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2235 &iwl_attribute_group);
2237 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2241 /* We have our copies now, allow OS release its copies */
2242 release_firmware(ucode_raw);
2243 complete(&priv->_agn.firmware_loading_complete);
2247 /* try next, if any */
2248 if (iwl_request_firmware(priv, false))
2250 release_firmware(ucode_raw);
2254 IWL_ERR(priv, "failed to allocate pci memory\n");
2255 iwl_dealloc_ucode_pci(priv);
2257 complete(&priv->_agn.firmware_loading_complete);
2258 device_release_driver(&priv->pci_dev->dev);
2259 release_firmware(ucode_raw);
2262 static const char *desc_lookup_text[] = {
2267 "NMI_INTERRUPT_WDG",
2271 "HW_ERROR_TUNE_LOCK",
2272 "HW_ERROR_TEMPERATURE",
2273 "ILLEGAL_CHAN_FREQ",
2276 "NMI_INTERRUPT_HOST",
2277 "NMI_INTERRUPT_ACTION_PT",
2278 "NMI_INTERRUPT_UNKNOWN",
2279 "UCODE_VERSION_MISMATCH",
2280 "HW_ERROR_ABS_LOCK",
2281 "HW_ERROR_CAL_LOCK_FAIL",
2282 "NMI_INTERRUPT_INST_ACTION_PT",
2283 "NMI_INTERRUPT_DATA_ACTION_PT",
2285 "NMI_INTERRUPT_TRM",
2286 "NMI_INTERRUPT_BREAK_POINT"
2293 static struct { char *name; u8 num; } advanced_lookup[] = {
2294 { "NMI_INTERRUPT_WDG", 0x34 },
2295 { "SYSASSERT", 0x35 },
2296 { "UCODE_VERSION_MISMATCH", 0x37 },
2297 { "BAD_COMMAND", 0x38 },
2298 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2299 { "FATAL_ERROR", 0x3D },
2300 { "NMI_TRM_HW_ERR", 0x46 },
2301 { "NMI_INTERRUPT_TRM", 0x4C },
2302 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2303 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2304 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2305 { "NMI_INTERRUPT_HOST", 0x66 },
2306 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2307 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2308 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2309 { "ADVANCED_SYSASSERT", 0 },
2312 static const char *desc_lookup(u32 num)
2315 int max = ARRAY_SIZE(desc_lookup_text);
2318 return desc_lookup_text[num];
2320 max = ARRAY_SIZE(advanced_lookup) - 1;
2321 for (i = 0; i < max; i++) {
2322 if (advanced_lookup[i].num == num)
2325 return advanced_lookup[i].name;
2328 #define ERROR_START_OFFSET (1 * sizeof(u32))
2329 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
2331 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2334 u32 desc, time, count, base, data1;
2335 u32 blink1, blink2, ilink1, ilink2;
2338 if (priv->ucode_type == UCODE_INIT) {
2339 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2341 base = priv->_agn.init_errlog_ptr;
2343 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2345 base = priv->_agn.inst_errlog_ptr;
2348 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2350 "Not valid error log pointer 0x%08X for %s uCode\n",
2351 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2355 count = iwl_read_targ_mem(priv, base);
2357 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2358 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2359 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2360 priv->status, count);
2363 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2364 pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2365 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2366 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2367 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2368 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2369 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2370 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2371 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2372 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2373 hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2375 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2376 blink1, blink2, ilink1, ilink2);
2378 IWL_ERR(priv, "Desc Time "
2379 "data1 data2 line\n");
2380 IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2381 desc_lookup(desc), desc, time, data1, data2, line);
2382 IWL_ERR(priv, "pc blink1 blink2 ilink1 ilink2 hcmd\n");
2383 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2384 pc, blink1, blink2, ilink1, ilink2, hcmd);
2387 #define EVENT_START_OFFSET (4 * sizeof(u32))
2390 * iwl_print_event_log - Dump error event log to syslog
2393 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2394 u32 num_events, u32 mode,
2395 int pos, char **buf, size_t bufsz)
2398 u32 base; /* SRAM byte address of event log header */
2399 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2400 u32 ptr; /* SRAM byte address of log data */
2401 u32 ev, time, data; /* event log data */
2402 unsigned long reg_flags;
2404 if (num_events == 0)
2407 if (priv->ucode_type == UCODE_INIT) {
2408 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2410 base = priv->_agn.init_evtlog_ptr;
2412 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2414 base = priv->_agn.inst_evtlog_ptr;
2418 event_size = 2 * sizeof(u32);
2420 event_size = 3 * sizeof(u32);
2422 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2424 /* Make sure device is powered up for SRAM reads */
2425 spin_lock_irqsave(&priv->reg_lock, reg_flags);
2426 iwl_grab_nic_access(priv);
2428 /* Set starting address; reads will auto-increment */
2429 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2432 /* "time" is actually "data" for mode 0 (no timestamp).
2433 * place event id # at far right for easier visual parsing. */
2434 for (i = 0; i < num_events; i++) {
2435 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2436 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2440 pos += scnprintf(*buf + pos, bufsz - pos,
2441 "EVT_LOG:0x%08x:%04u\n",
2444 trace_iwlwifi_dev_ucode_event(priv, 0,
2446 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2450 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2452 pos += scnprintf(*buf + pos, bufsz - pos,
2453 "EVT_LOGT:%010u:0x%08x:%04u\n",
2456 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2458 trace_iwlwifi_dev_ucode_event(priv, time,
2464 /* Allow device to power down */
2465 iwl_release_nic_access(priv);
2466 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2471 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2473 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2474 u32 num_wraps, u32 next_entry,
2476 int pos, char **buf, size_t bufsz)
2479 * display the newest DEFAULT_LOG_ENTRIES entries
2480 * i.e the entries just before the next ont that uCode would fill.
2483 if (next_entry < size) {
2484 pos = iwl_print_event_log(priv,
2485 capacity - (size - next_entry),
2486 size - next_entry, mode,
2488 pos = iwl_print_event_log(priv, 0,
2492 pos = iwl_print_event_log(priv, next_entry - size,
2493 size, mode, pos, buf, bufsz);
2495 if (next_entry < size) {
2496 pos = iwl_print_event_log(priv, 0, next_entry,
2497 mode, pos, buf, bufsz);
2499 pos = iwl_print_event_log(priv, next_entry - size,
2500 size, mode, pos, buf, bufsz);
2506 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2508 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2509 char **buf, bool display)
2511 u32 base; /* SRAM byte address of event log header */
2512 u32 capacity; /* event log capacity in # entries */
2513 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2514 u32 num_wraps; /* # times uCode wrapped to top of log */
2515 u32 next_entry; /* index of next entry to be written by uCode */
2516 u32 size; /* # entries that we'll print */
2521 if (priv->ucode_type == UCODE_INIT) {
2522 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2523 logsize = priv->_agn.init_evtlog_size;
2525 base = priv->_agn.init_evtlog_ptr;
2527 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2528 logsize = priv->_agn.inst_evtlog_size;
2530 base = priv->_agn.inst_evtlog_ptr;
2533 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2535 "Invalid event log pointer 0x%08X for %s uCode\n",
2536 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2540 /* event log header */
2541 capacity = iwl_read_targ_mem(priv, base);
2542 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2543 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2544 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2546 if (capacity > logsize) {
2547 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2552 if (next_entry > logsize) {
2553 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2554 next_entry, logsize);
2555 next_entry = logsize;
2558 size = num_wraps ? capacity : next_entry;
2560 /* bail out if nothing in log */
2562 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2566 #ifdef CONFIG_IWLWIFI_DEBUG
2567 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2568 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2569 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2571 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2572 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2574 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2577 #ifdef CONFIG_IWLWIFI_DEBUG
2580 bufsz = capacity * 48;
2583 *buf = kmalloc(bufsz, GFP_KERNEL);
2587 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2589 * if uCode has wrapped back to top of log,
2590 * start at the oldest entry,
2591 * i.e the next one that uCode would fill.
2594 pos = iwl_print_event_log(priv, next_entry,
2595 capacity - next_entry, mode,
2597 /* (then/else) start at top of log */
2598 pos = iwl_print_event_log(priv, 0,
2599 next_entry, mode, pos, buf, bufsz);
2601 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2602 next_entry, size, mode,
2605 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2606 next_entry, size, mode,
2612 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2614 struct iwl_ct_kill_config cmd;
2615 struct iwl_ct_kill_throttling_config adv_cmd;
2616 unsigned long flags;
2619 spin_lock_irqsave(&priv->lock, flags);
2620 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2621 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2622 spin_unlock_irqrestore(&priv->lock, flags);
2623 priv->thermal_throttle.ct_kill_toggle = false;
2625 if (priv->cfg->support_ct_kill_exit) {
2626 adv_cmd.critical_temperature_enter =
2627 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2628 adv_cmd.critical_temperature_exit =
2629 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2631 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2632 sizeof(adv_cmd), &adv_cmd);
2634 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2636 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2638 "critical temperature enter is %d,"
2640 priv->hw_params.ct_kill_threshold,
2641 priv->hw_params.ct_kill_exit_threshold);
2643 cmd.critical_temperature_R =
2644 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2646 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2649 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2651 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2653 "critical temperature is %d\n",
2654 priv->hw_params.ct_kill_threshold);
2659 * iwl_alive_start - called after REPLY_ALIVE notification received
2660 * from protocol/runtime uCode (initialization uCode's
2661 * Alive gets handled by iwl_init_alive_start()).
2663 static void iwl_alive_start(struct iwl_priv *priv)
2667 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2669 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2670 /* We had an error bringing up the hardware, so take it
2671 * all the way back down so we can try again */
2672 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2676 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2677 * This is a paranoid check, because we would not have gotten the
2678 * "runtime" alive if code weren't properly loaded. */
2679 if (iwl_verify_ucode(priv)) {
2680 /* Runtime instruction load was bad;
2681 * take it all the way back down so we can try again */
2682 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2686 ret = priv->cfg->ops->lib->alive_notify(priv);
2689 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2693 /* After the ALIVE response, we can send host commands to the uCode */
2694 set_bit(STATUS_ALIVE, &priv->status);
2696 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2697 /* Enable timer to monitor the driver queues */
2698 mod_timer(&priv->monitor_recover,
2700 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2703 if (iwl_is_rfkill(priv))
2706 ieee80211_wake_queues(priv->hw);
2708 priv->active_rate = IWL_RATES_MASK;
2710 /* Configure Tx antenna selection based on H/W config */
2711 if (priv->cfg->ops->hcmd->set_tx_ant)
2712 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2714 if (iwl_is_associated(priv)) {
2715 struct iwl_rxon_cmd *active_rxon =
2716 (struct iwl_rxon_cmd *)&priv->active_rxon;
2717 /* apply any changes in staging */
2718 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2719 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2721 /* Initialize our rx_config data */
2722 iwl_connection_init_rx_config(priv, NULL);
2724 if (priv->cfg->ops->hcmd->set_rxon_chain)
2725 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2728 /* Configure Bluetooth device coexistence support */
2729 priv->cfg->ops->hcmd->send_bt_config(priv);
2731 iwl_reset_run_time_calib(priv);
2733 /* Configure the adapter for unassociated operation */
2734 iwlcore_commit_rxon(priv);
2736 /* At this point, the NIC is initialized and operational */
2737 iwl_rf_kill_ct_config(priv);
2739 iwl_leds_init(priv);
2741 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2742 set_bit(STATUS_READY, &priv->status);
2743 wake_up_interruptible(&priv->wait_command_queue);
2745 iwl_power_update_mode(priv, true);
2746 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2752 queue_work(priv->workqueue, &priv->restart);
2755 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2757 static void __iwl_down(struct iwl_priv *priv)
2759 unsigned long flags;
2760 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2762 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2765 set_bit(STATUS_EXIT_PENDING, &priv->status);
2767 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2768 * to prevent rearm timer */
2769 if (priv->cfg->ops->lib->recover_from_tx_stall)
2770 del_timer_sync(&priv->monitor_recover);
2772 iwl_clear_ucode_stations(priv);
2773 iwl_dealloc_bcast_station(priv);
2774 iwl_clear_driver_stations(priv);
2776 /* Unblock any waiting calls */
2777 wake_up_interruptible_all(&priv->wait_command_queue);
2779 /* Wipe out the EXIT_PENDING status bit if we are not actually
2780 * exiting the module */
2782 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2784 /* stop and reset the on-board processor */
2785 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2787 /* tell the device to stop sending interrupts */
2788 spin_lock_irqsave(&priv->lock, flags);
2789 iwl_disable_interrupts(priv);
2790 spin_unlock_irqrestore(&priv->lock, flags);
2791 iwl_synchronize_irq(priv);
2793 if (priv->mac80211_registered)
2794 ieee80211_stop_queues(priv->hw);
2796 /* If we have not previously called iwl_init() then
2797 * clear all bits but the RF Kill bit and return */
2798 if (!iwl_is_init(priv)) {
2799 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2801 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2802 STATUS_GEO_CONFIGURED |
2803 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2804 STATUS_EXIT_PENDING;
2808 /* ...otherwise clear out all the status bits but the RF Kill
2809 * bit and continue taking the NIC down. */
2810 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2812 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2813 STATUS_GEO_CONFIGURED |
2814 test_bit(STATUS_FW_ERROR, &priv->status) <<
2816 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2817 STATUS_EXIT_PENDING;
2819 /* device going down, Stop using ICT table */
2820 iwl_disable_ict(priv);
2822 iwlagn_txq_ctx_stop(priv);
2823 iwlagn_rxq_stop(priv);
2825 /* Power-down device's busmaster DMA clocks */
2826 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2829 /* Make sure (redundant) we've released our request to stay awake */
2830 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2832 /* Stop the device, and put it in low power state */
2833 priv->cfg->ops->lib->apm_ops.stop(priv);
2836 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2838 if (priv->ibss_beacon)
2839 dev_kfree_skb(priv->ibss_beacon);
2840 priv->ibss_beacon = NULL;
2842 /* clear out any free frames */
2843 iwl_clear_free_frames(priv);
2846 static void iwl_down(struct iwl_priv *priv)
2848 mutex_lock(&priv->mutex);
2850 mutex_unlock(&priv->mutex);
2852 iwl_cancel_deferred_work(priv);
2855 #define HW_READY_TIMEOUT (50)
2857 static int iwl_set_hw_ready(struct iwl_priv *priv)
2861 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2862 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2864 /* See if we got it */
2865 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2866 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2867 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2869 if (ret != -ETIMEDOUT)
2870 priv->hw_ready = true;
2872 priv->hw_ready = false;
2874 IWL_DEBUG_INFO(priv, "hardware %s\n",
2875 (priv->hw_ready == 1) ? "ready" : "not ready");
2879 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2883 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2885 ret = iwl_set_hw_ready(priv);
2889 /* If HW is not ready, prepare the conditions to check again */
2890 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2891 CSR_HW_IF_CONFIG_REG_PREPARE);
2893 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2894 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2895 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2897 /* HW should be ready by now, check again. */
2898 if (ret != -ETIMEDOUT)
2899 iwl_set_hw_ready(priv);
2904 #define MAX_HW_RESTARTS 5
2906 static int __iwl_up(struct iwl_priv *priv)
2911 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2912 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2916 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2917 IWL_ERR(priv, "ucode not available for device bringup\n");
2921 ret = iwl_alloc_bcast_station(priv, true);
2925 iwl_prepare_card_hw(priv);
2927 if (!priv->hw_ready) {
2928 IWL_WARN(priv, "Exit HW not ready\n");
2932 /* If platform's RF_KILL switch is NOT set to KILL */
2933 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2934 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2936 set_bit(STATUS_RF_KILL_HW, &priv->status);
2938 if (iwl_is_rfkill(priv)) {
2939 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2941 iwl_enable_interrupts(priv);
2942 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2946 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2948 ret = iwlagn_hw_nic_init(priv);
2950 IWL_ERR(priv, "Unable to init nic\n");
2954 /* make sure rfkill handshake bits are cleared */
2955 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2956 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2957 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2959 /* clear (again), then enable host interrupts */
2960 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2961 iwl_enable_interrupts(priv);
2963 /* really make sure rfkill handshake bits are cleared */
2964 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2965 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2967 /* Copy original ucode data image from disk into backup cache.
2968 * This will be used to initialize the on-board processor's
2969 * data SRAM for a clean start when the runtime program first loads. */
2970 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2971 priv->ucode_data.len);
2973 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2975 /* load bootstrap state machine,
2976 * load bootstrap program into processor's memory,
2977 * prepare to load the "initialize" uCode */
2978 ret = priv->cfg->ops->lib->load_ucode(priv);
2981 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2986 /* start card; "initialize" will load runtime ucode */
2987 iwl_nic_start(priv);
2989 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2994 set_bit(STATUS_EXIT_PENDING, &priv->status);
2996 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2998 /* tried to restart and config the device for as long as our
2999 * patience could withstand */
3000 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3005 /*****************************************************************************
3007 * Workqueue callbacks
3009 *****************************************************************************/
3011 static void iwl_bg_init_alive_start(struct work_struct *data)
3013 struct iwl_priv *priv =
3014 container_of(data, struct iwl_priv, init_alive_start.work);
3016 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3019 mutex_lock(&priv->mutex);
3020 priv->cfg->ops->lib->init_alive_start(priv);
3021 mutex_unlock(&priv->mutex);
3024 static void iwl_bg_alive_start(struct work_struct *data)
3026 struct iwl_priv *priv =
3027 container_of(data, struct iwl_priv, alive_start.work);
3029 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3032 /* enable dram interrupt */
3033 iwl_reset_ict(priv);
3035 mutex_lock(&priv->mutex);
3036 iwl_alive_start(priv);
3037 mutex_unlock(&priv->mutex);
3040 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3042 struct iwl_priv *priv = container_of(work, struct iwl_priv,
3043 run_time_calib_work);
3045 mutex_lock(&priv->mutex);
3047 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3048 test_bit(STATUS_SCANNING, &priv->status)) {
3049 mutex_unlock(&priv->mutex);
3053 if (priv->start_calib) {
3054 if (priv->cfg->bt_statistics) {
3055 iwl_chain_noise_calibration(priv,
3056 (void *)&priv->_agn.statistics_bt);
3057 iwl_sensitivity_calibration(priv,
3058 (void *)&priv->_agn.statistics_bt);
3060 iwl_chain_noise_calibration(priv,
3061 (void *)&priv->_agn.statistics);
3062 iwl_sensitivity_calibration(priv,
3063 (void *)&priv->_agn.statistics);
3067 mutex_unlock(&priv->mutex);
3070 static void iwl_bg_restart(struct work_struct *data)
3072 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3074 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3077 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3078 mutex_lock(&priv->mutex);
3081 mutex_unlock(&priv->mutex);
3083 ieee80211_restart_hw(priv->hw);
3087 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3090 mutex_lock(&priv->mutex);
3092 mutex_unlock(&priv->mutex);
3096 static void iwl_bg_rx_replenish(struct work_struct *data)
3098 struct iwl_priv *priv =
3099 container_of(data, struct iwl_priv, rx_replenish);
3101 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3104 mutex_lock(&priv->mutex);
3105 iwlagn_rx_replenish(priv);
3106 mutex_unlock(&priv->mutex);
3109 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3111 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3113 struct ieee80211_conf *conf = NULL;
3116 if (!vif || !priv->is_open)
3119 if (vif->type == NL80211_IFTYPE_AP) {
3120 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3124 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3127 iwl_scan_cancel_timeout(priv, 200);
3129 conf = ieee80211_get_hw_conf(priv->hw);
3131 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3132 iwlcore_commit_rxon(priv);
3134 ret = iwl_send_rxon_timing(priv, vif);
3136 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3137 "Attempting to continue.\n");
3139 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3141 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3143 if (priv->cfg->ops->hcmd->set_rxon_chain)
3144 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3146 priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3148 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3149 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3151 if (vif->bss_conf.use_short_preamble)
3152 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3154 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3156 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3157 if (vif->bss_conf.use_short_slot)
3158 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3160 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3163 iwlcore_commit_rxon(priv);
3165 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3166 vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3168 switch (vif->type) {
3169 case NL80211_IFTYPE_STATION:
3171 case NL80211_IFTYPE_ADHOC:
3172 iwl_send_beacon_cmd(priv);
3175 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3176 __func__, vif->type);
3180 /* the chain noise calibration will enabled PM upon completion
3181 * If chain noise has already been run, then we need to enable
3182 * power management here */
3183 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3184 iwl_power_update_mode(priv, false);
3186 /* Enable Rx differential gain and sensitivity calibrations */
3187 iwl_chain_noise_reset(priv);
3188 priv->start_calib = 1;
3192 /*****************************************************************************
3194 * mac80211 entry point functions
3196 *****************************************************************************/
3198 #define UCODE_READY_TIMEOUT (4 * HZ)
3201 * Not a mac80211 entry point function, but it fits in with all the
3202 * other mac80211 functions grouped here.
3204 static int iwl_mac_setup_register(struct iwl_priv *priv,
3205 struct iwlagn_ucode_capabilities *capa)
3208 struct ieee80211_hw *hw = priv->hw;
3209 hw->rate_control_algorithm = "iwl-agn-rs";
3211 /* Tell mac80211 our characteristics */
3212 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3213 IEEE80211_HW_AMPDU_AGGREGATION |
3214 IEEE80211_HW_SPECTRUM_MGMT;
3216 if (!priv->cfg->broken_powersave)
3217 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3218 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3220 if (priv->cfg->sku & IWL_SKU_N)
3221 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3222 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3224 hw->sta_data_size = sizeof(struct iwl_station_priv);
3225 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3227 hw->wiphy->interface_modes =
3228 BIT(NL80211_IFTYPE_STATION) |
3229 BIT(NL80211_IFTYPE_ADHOC);
3231 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3232 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3235 * For now, disable PS by default because it affects
3236 * RX performance significantly.
3238 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3240 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3241 /* we create the 802.11 header and a zero-length SSID element */
3242 hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3244 /* Default value; 4 EDCA QOS priorities */
3247 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3249 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3250 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3251 &priv->bands[IEEE80211_BAND_2GHZ];
3252 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3253 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3254 &priv->bands[IEEE80211_BAND_5GHZ];
3256 ret = ieee80211_register_hw(priv->hw);
3258 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3261 priv->mac80211_registered = 1;
3267 static int iwl_mac_start(struct ieee80211_hw *hw)
3269 struct iwl_priv *priv = hw->priv;
3272 IWL_DEBUG_MAC80211(priv, "enter\n");
3274 /* we should be verifying the device is ready to be opened */
3275 mutex_lock(&priv->mutex);
3276 ret = __iwl_up(priv);
3277 mutex_unlock(&priv->mutex);
3282 if (iwl_is_rfkill(priv))
3285 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3287 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3288 * mac80211 will not be run successfully. */
3289 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3290 test_bit(STATUS_READY, &priv->status),
3291 UCODE_READY_TIMEOUT);
3293 if (!test_bit(STATUS_READY, &priv->status)) {
3294 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3295 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3300 iwl_led_start(priv);
3304 IWL_DEBUG_MAC80211(priv, "leave\n");
3308 static void iwl_mac_stop(struct ieee80211_hw *hw)
3310 struct iwl_priv *priv = hw->priv;
3312 IWL_DEBUG_MAC80211(priv, "enter\n");
3319 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3320 /* stop mac, cancel any scan request and clear
3321 * RXON_FILTER_ASSOC_MSK BIT
3323 mutex_lock(&priv->mutex);
3324 iwl_scan_cancel_timeout(priv, 100);
3325 mutex_unlock(&priv->mutex);
3330 flush_workqueue(priv->workqueue);
3332 /* enable interrupts again in order to receive rfkill changes */
3333 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3334 iwl_enable_interrupts(priv);
3336 IWL_DEBUG_MAC80211(priv, "leave\n");
3339 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3341 struct iwl_priv *priv = hw->priv;
3343 IWL_DEBUG_MACDUMP(priv, "enter\n");
3345 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3346 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3348 if (iwlagn_tx_skb(priv, skb))
3349 dev_kfree_skb_any(skb);
3351 IWL_DEBUG_MACDUMP(priv, "leave\n");
3352 return NETDEV_TX_OK;
3355 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3359 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3362 /* The following should be done only at AP bring up */
3363 if (!iwl_is_associated(priv)) {
3365 /* RXON - unassoc (to set timing command) */
3366 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3367 iwlcore_commit_rxon(priv);
3370 ret = iwl_send_rxon_timing(priv, vif);
3372 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3373 "Attempting to continue.\n");
3375 /* AP has all antennas */
3376 priv->chain_noise_data.active_chains =
3377 priv->hw_params.valid_rx_ant;
3378 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3379 if (priv->cfg->ops->hcmd->set_rxon_chain)
3380 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3382 priv->staging_rxon.assoc_id = 0;
3384 if (vif->bss_conf.use_short_preamble)
3385 priv->staging_rxon.flags |=
3386 RXON_FLG_SHORT_PREAMBLE_MSK;
3388 priv->staging_rxon.flags &=
3389 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3391 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3392 if (vif->bss_conf.use_short_slot)
3393 priv->staging_rxon.flags |=
3394 RXON_FLG_SHORT_SLOT_MSK;
3396 priv->staging_rxon.flags &=
3397 ~RXON_FLG_SHORT_SLOT_MSK;
3399 /* restore RXON assoc */
3400 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3401 iwlcore_commit_rxon(priv);
3403 iwl_send_beacon_cmd(priv);
3405 /* FIXME - we need to add code here to detect a totally new
3406 * configuration, reset the AP, unassoc, rxon timing, assoc,
3407 * clear sta table, add BCAST sta... */
3410 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3411 struct ieee80211_vif *vif,
3412 struct ieee80211_key_conf *keyconf,
3413 struct ieee80211_sta *sta,
3414 u32 iv32, u16 *phase1key)
3417 struct iwl_priv *priv = hw->priv;
3418 IWL_DEBUG_MAC80211(priv, "enter\n");
3420 iwl_update_tkip_key(priv, keyconf, sta,
3423 IWL_DEBUG_MAC80211(priv, "leave\n");
3426 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3427 struct ieee80211_vif *vif,
3428 struct ieee80211_sta *sta,
3429 struct ieee80211_key_conf *key)
3431 struct iwl_priv *priv = hw->priv;
3434 bool is_default_wep_key = false;
3436 IWL_DEBUG_MAC80211(priv, "enter\n");
3438 if (priv->cfg->mod_params->sw_crypto) {
3439 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3443 sta_id = iwl_sta_id_or_broadcast(priv, sta);
3444 if (sta_id == IWL_INVALID_STATION)
3447 mutex_lock(&priv->mutex);
3448 iwl_scan_cancel_timeout(priv, 100);
3451 * If we are getting WEP group key and we didn't receive any key mapping
3452 * so far, we are in legacy wep mode (group key only), otherwise we are
3454 * In legacy wep mode, we use another host command to the uCode.
3456 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3457 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3460 is_default_wep_key = !priv->key_mapping_key;
3462 is_default_wep_key =
3463 (key->hw_key_idx == HW_KEY_DEFAULT);
3468 if (is_default_wep_key)
3469 ret = iwl_set_default_wep_key(priv, key);
3471 ret = iwl_set_dynamic_key(priv, key, sta_id);
3473 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3476 if (is_default_wep_key)
3477 ret = iwl_remove_default_wep_key(priv, key);
3479 ret = iwl_remove_dynamic_key(priv, key, sta_id);
3481 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3487 mutex_unlock(&priv->mutex);
3488 IWL_DEBUG_MAC80211(priv, "leave\n");
3493 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3494 struct ieee80211_vif *vif,
3495 enum ieee80211_ampdu_mlme_action action,
3496 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3498 struct iwl_priv *priv = hw->priv;
3501 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3504 if (!(priv->cfg->sku & IWL_SKU_N))
3507 mutex_lock(&priv->mutex);
3510 case IEEE80211_AMPDU_RX_START:
3511 IWL_DEBUG_HT(priv, "start Rx\n");
3512 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3514 case IEEE80211_AMPDU_RX_STOP:
3515 IWL_DEBUG_HT(priv, "stop Rx\n");
3516 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3517 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3520 case IEEE80211_AMPDU_TX_START:
3521 IWL_DEBUG_HT(priv, "start Tx\n");
3522 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3524 priv->_agn.agg_tids_count++;
3525 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3526 priv->_agn.agg_tids_count);
3529 case IEEE80211_AMPDU_TX_STOP:
3530 IWL_DEBUG_HT(priv, "stop Tx\n");
3531 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3532 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3533 priv->_agn.agg_tids_count--;
3534 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3535 priv->_agn.agg_tids_count);
3537 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3539 if (priv->cfg->use_rts_for_aggregation) {
3540 struct iwl_station_priv *sta_priv =
3541 (void *) sta->drv_priv;
3543 * switch off RTS/CTS if it was previously enabled
3546 sta_priv->lq_sta.lq.general_params.flags &=
3547 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3548 iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3552 case IEEE80211_AMPDU_TX_OPERATIONAL:
3553 if (priv->cfg->use_rts_for_aggregation) {
3554 struct iwl_station_priv *sta_priv =
3555 (void *) sta->drv_priv;
3558 * switch to RTS/CTS if it is the prefer protection
3559 * method for HT traffic
3562 sta_priv->lq_sta.lq.general_params.flags |=
3563 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3564 iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3570 mutex_unlock(&priv->mutex);
3575 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3576 struct ieee80211_vif *vif,
3577 enum sta_notify_cmd cmd,
3578 struct ieee80211_sta *sta)
3580 struct iwl_priv *priv = hw->priv;
3581 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3585 case STA_NOTIFY_SLEEP:
3586 WARN_ON(!sta_priv->client);
3587 sta_priv->asleep = true;
3588 if (atomic_read(&sta_priv->pending_frames) > 0)
3589 ieee80211_sta_block_awake(hw, sta, true);
3591 case STA_NOTIFY_AWAKE:
3592 WARN_ON(!sta_priv->client);
3593 if (!sta_priv->asleep)
3595 sta_priv->asleep = false;
3596 sta_id = iwl_sta_id(sta);
3597 if (sta_id != IWL_INVALID_STATION)
3598 iwl_sta_modify_ps_wake(priv, sta_id);
3605 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3606 struct ieee80211_vif *vif,
3607 struct ieee80211_sta *sta)
3609 struct iwl_priv *priv = hw->priv;
3610 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3611 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3615 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3617 mutex_lock(&priv->mutex);
3618 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3620 sta_priv->common.sta_id = IWL_INVALID_STATION;
3622 atomic_set(&sta_priv->pending_frames, 0);
3623 if (vif->type == NL80211_IFTYPE_AP)
3624 sta_priv->client = true;
3626 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3629 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3631 /* Should we return success if return code is EEXIST ? */
3632 mutex_unlock(&priv->mutex);
3636 sta_priv->common.sta_id = sta_id;
3638 /* Initialize rate scaling */
3639 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3641 iwl_rs_rate_init(priv, sta, sta_id);
3642 mutex_unlock(&priv->mutex);
3647 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3648 struct ieee80211_channel_switch *ch_switch)
3650 struct iwl_priv *priv = hw->priv;
3651 const struct iwl_channel_info *ch_info;
3652 struct ieee80211_conf *conf = &hw->conf;
3653 struct ieee80211_channel *channel = ch_switch->channel;
3654 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3656 unsigned long flags = 0;
3658 IWL_DEBUG_MAC80211(priv, "enter\n");
3660 if (iwl_is_rfkill(priv))
3663 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3664 test_bit(STATUS_SCANNING, &priv->status))
3667 if (!iwl_is_associated(priv))
3670 /* channel switch in progress */
3671 if (priv->switch_rxon.switch_in_progress == true)
3674 mutex_lock(&priv->mutex);
3675 if (priv->cfg->ops->lib->set_channel_switch) {
3677 ch = channel->hw_value;
3678 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3679 ch_info = iwl_get_channel_info(priv,
3682 if (!is_channel_valid(ch_info)) {
3683 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3686 spin_lock_irqsave(&priv->lock, flags);
3688 priv->current_ht_config.smps = conf->smps_mode;
3690 /* Configure HT40 channels */
3691 ht_conf->is_ht = conf_is_ht(conf);
3692 if (ht_conf->is_ht) {
3693 if (conf_is_ht40_minus(conf)) {
3694 ht_conf->extension_chan_offset =
3695 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3696 ht_conf->is_40mhz = true;
3697 } else if (conf_is_ht40_plus(conf)) {
3698 ht_conf->extension_chan_offset =
3699 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3700 ht_conf->is_40mhz = true;
3702 ht_conf->extension_chan_offset =
3703 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3704 ht_conf->is_40mhz = false;
3707 ht_conf->is_40mhz = false;
3709 if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3710 priv->staging_rxon.flags = 0;
3712 iwl_set_rxon_channel(priv, channel);
3713 iwl_set_rxon_ht(priv, ht_conf);
3714 iwl_set_flags_for_band(priv, channel->band,
3716 spin_unlock_irqrestore(&priv->lock, flags);
3720 * at this point, staging_rxon has the
3721 * configuration for channel switch
3723 if (priv->cfg->ops->lib->set_channel_switch(priv,
3725 priv->switch_rxon.switch_in_progress = false;
3729 mutex_unlock(&priv->mutex);
3731 if (!priv->switch_rxon.switch_in_progress)
3732 ieee80211_chswitch_done(priv->vif, false);
3733 IWL_DEBUG_MAC80211(priv, "leave\n");
3736 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3737 unsigned int changed_flags,
3738 unsigned int *total_flags,
3741 struct iwl_priv *priv = hw->priv;
3742 __le32 filter_or = 0, filter_nand = 0;
3744 #define CHK(test, flag) do { \
3745 if (*total_flags & (test)) \
3746 filter_or |= (flag); \
3748 filter_nand |= (flag); \
3751 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3752 changed_flags, *total_flags);
3754 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3755 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3756 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3760 mutex_lock(&priv->mutex);
3762 priv->staging_rxon.filter_flags &= ~filter_nand;
3763 priv->staging_rxon.filter_flags |= filter_or;
3765 iwlcore_commit_rxon(priv);
3767 mutex_unlock(&priv->mutex);
3770 * Receiving all multicast frames is always enabled by the
3771 * default flags setup in iwl_connection_init_rx_config()
3772 * since we currently do not support programming multicast
3773 * filters into the device.
3775 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3776 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3779 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3781 struct iwl_priv *priv = hw->priv;
3783 mutex_lock(&priv->mutex);
3784 IWL_DEBUG_MAC80211(priv, "enter\n");
3786 /* do not support "flush" */
3787 if (!priv->cfg->ops->lib->txfifo_flush)
3790 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3791 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3794 if (iwl_is_rfkill(priv)) {
3795 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3800 * mac80211 will not push any more frames for transmit
3801 * until the flush is completed
3804 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3805 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3806 IWL_ERR(priv, "flush request fail\n");
3810 IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3811 iwlagn_wait_tx_queue_empty(priv);
3813 mutex_unlock(&priv->mutex);
3814 IWL_DEBUG_MAC80211(priv, "leave\n");
3817 /*****************************************************************************
3819 * driver setup and teardown
3821 *****************************************************************************/
3823 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3825 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3827 init_waitqueue_head(&priv->wait_command_queue);
3829 INIT_WORK(&priv->restart, iwl_bg_restart);
3830 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3831 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3832 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3833 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3834 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3835 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3837 iwl_setup_scan_deferred_work(priv);
3839 if (priv->cfg->ops->lib->setup_deferred_work)
3840 priv->cfg->ops->lib->setup_deferred_work(priv);
3842 init_timer(&priv->statistics_periodic);
3843 priv->statistics_periodic.data = (unsigned long)priv;
3844 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3846 init_timer(&priv->ucode_trace);
3847 priv->ucode_trace.data = (unsigned long)priv;
3848 priv->ucode_trace.function = iwl_bg_ucode_trace;
3850 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3851 init_timer(&priv->monitor_recover);
3852 priv->monitor_recover.data = (unsigned long)priv;
3853 priv->monitor_recover.function =
3854 priv->cfg->ops->lib->recover_from_tx_stall;
3857 if (!priv->cfg->use_isr_legacy)
3858 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3859 iwl_irq_tasklet, (unsigned long)priv);
3861 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3862 iwl_irq_tasklet_legacy, (unsigned long)priv);
3865 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3867 if (priv->cfg->ops->lib->cancel_deferred_work)
3868 priv->cfg->ops->lib->cancel_deferred_work(priv);
3870 cancel_delayed_work_sync(&priv->init_alive_start);
3871 cancel_delayed_work(&priv->scan_check);
3872 cancel_work_sync(&priv->start_internal_scan);
3873 cancel_delayed_work(&priv->alive_start);
3874 cancel_work_sync(&priv->run_time_calib_work);
3875 cancel_work_sync(&priv->beacon_update);
3876 del_timer_sync(&priv->statistics_periodic);
3877 del_timer_sync(&priv->ucode_trace);
3880 static void iwl_init_hw_rates(struct iwl_priv *priv,
3881 struct ieee80211_rate *rates)
3885 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3886 rates[i].bitrate = iwl_rates[i].ieee * 5;
3887 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3888 rates[i].hw_value_short = i;
3890 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3892 * If CCK != 1M then set short preamble rate flag.
3895 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3896 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3901 static int iwl_init_drv(struct iwl_priv *priv)
3905 priv->ibss_beacon = NULL;
3907 spin_lock_init(&priv->sta_lock);
3908 spin_lock_init(&priv->hcmd_lock);
3910 INIT_LIST_HEAD(&priv->free_frames);
3912 mutex_init(&priv->mutex);
3913 mutex_init(&priv->sync_cmd_mutex);
3915 priv->ieee_channels = NULL;
3916 priv->ieee_rates = NULL;
3917 priv->band = IEEE80211_BAND_2GHZ;
3919 priv->iw_mode = NL80211_IFTYPE_STATION;
3920 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3921 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3922 priv->_agn.agg_tids_count = 0;
3924 /* initialize force reset */
3925 priv->force_reset[IWL_RF_RESET].reset_duration =
3926 IWL_DELAY_NEXT_FORCE_RF_RESET;
3927 priv->force_reset[IWL_FW_RESET].reset_duration =
3928 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3930 /* Choose which receivers/antennas to use */
3931 if (priv->cfg->ops->hcmd->set_rxon_chain)
3932 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3934 iwl_init_scan_params(priv);
3936 /* Set the tx_power_user_lmt to the lowest power level
3937 * this value will get overwritten by channel max power avg
3939 priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3941 ret = iwl_init_channel_map(priv);
3943 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3947 ret = iwlcore_init_geos(priv);
3949 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3950 goto err_free_channel_map;
3952 iwl_init_hw_rates(priv, priv->ieee_rates);
3956 err_free_channel_map:
3957 iwl_free_channel_map(priv);
3962 static void iwl_uninit_drv(struct iwl_priv *priv)
3964 iwl_calib_free_results(priv);
3965 iwlcore_free_geos(priv);
3966 iwl_free_channel_map(priv);
3967 kfree(priv->scan_cmd);
3970 static struct ieee80211_ops iwl_hw_ops = {
3972 .start = iwl_mac_start,
3973 .stop = iwl_mac_stop,
3974 .add_interface = iwl_mac_add_interface,
3975 .remove_interface = iwl_mac_remove_interface,
3976 .config = iwl_mac_config,
3977 .configure_filter = iwlagn_configure_filter,
3978 .set_key = iwl_mac_set_key,
3979 .update_tkip_key = iwl_mac_update_tkip_key,
3980 .conf_tx = iwl_mac_conf_tx,
3981 .reset_tsf = iwl_mac_reset_tsf,
3982 .bss_info_changed = iwl_bss_info_changed,
3983 .ampdu_action = iwl_mac_ampdu_action,
3984 .hw_scan = iwl_mac_hw_scan,
3985 .sta_notify = iwl_mac_sta_notify,
3986 .sta_add = iwlagn_mac_sta_add,
3987 .sta_remove = iwl_mac_sta_remove,
3988 .channel_switch = iwl_mac_channel_switch,
3989 .flush = iwl_mac_flush,
3990 .tx_last_beacon = iwl_mac_tx_last_beacon,
3993 static void iwl_hw_detect(struct iwl_priv *priv)
3995 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3996 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3997 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
3998 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4001 static int iwl_set_hw_params(struct iwl_priv *priv)
4003 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4004 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4005 if (priv->cfg->mod_params->amsdu_size_8K)
4006 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4008 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4010 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4012 if (priv->cfg->mod_params->disable_11n)
4013 priv->cfg->sku &= ~IWL_SKU_N;
4015 /* Device-specific setup */
4016 return priv->cfg->ops->lib->set_hw_params(priv);
4019 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4022 struct iwl_priv *priv;
4023 struct ieee80211_hw *hw;
4024 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4025 unsigned long flags;
4026 u16 pci_cmd, num_mac;
4028 /************************
4029 * 1. Allocating HW data
4030 ************************/
4032 /* Disabling hardware scan means that mac80211 will perform scans
4033 * "the hard way", rather than using device's scan. */
4034 if (cfg->mod_params->disable_hw_scan) {
4035 if (iwl_debug_level & IWL_DL_INFO)
4036 dev_printk(KERN_DEBUG, &(pdev->dev),
4037 "Disabling hw_scan\n");
4038 iwl_hw_ops.hw_scan = NULL;
4041 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4047 /* At this point both hw and priv are allocated. */
4049 SET_IEEE80211_DEV(hw, &pdev->dev);
4051 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4053 priv->pci_dev = pdev;
4054 priv->inta_mask = CSR_INI_SET_MASK;
4056 if (iwl_alloc_traffic_mem(priv))
4057 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4059 /**************************
4060 * 2. Initializing PCI bus
4061 **************************/
4062 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4063 PCIE_LINK_STATE_CLKPM);
4065 if (pci_enable_device(pdev)) {
4067 goto out_ieee80211_free_hw;
4070 pci_set_master(pdev);
4072 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4074 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4076 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4078 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4079 /* both attempts failed: */
4081 IWL_WARN(priv, "No suitable DMA available.\n");
4082 goto out_pci_disable_device;
4086 err = pci_request_regions(pdev, DRV_NAME);
4088 goto out_pci_disable_device;
4090 pci_set_drvdata(pdev, priv);
4093 /***********************
4094 * 3. Read REV register
4095 ***********************/
4096 priv->hw_base = pci_iomap(pdev, 0, 0);
4097 if (!priv->hw_base) {
4099 goto out_pci_release_regions;
4102 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4103 (unsigned long long) pci_resource_len(pdev, 0));
4104 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4106 /* these spin locks will be used in apm_ops.init and EEPROM access
4107 * we should init now
4109 spin_lock_init(&priv->reg_lock);
4110 spin_lock_init(&priv->lock);
4113 * stop and reset the on-board processor just in case it is in a
4114 * strange state ... like being left stranded by a primary kernel
4115 * and this is now the kdump kernel trying to start up
4117 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4119 iwl_hw_detect(priv);
4120 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4121 priv->cfg->name, priv->hw_rev);
4123 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4124 * PCI Tx retries from interfering with C3 CPU state */
4125 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4127 iwl_prepare_card_hw(priv);
4128 if (!priv->hw_ready) {
4129 IWL_WARN(priv, "Failed, HW not ready\n");
4136 /* Read the EEPROM */
4137 err = iwl_eeprom_init(priv);
4139 IWL_ERR(priv, "Unable to init EEPROM\n");
4142 err = iwl_eeprom_check_version(priv);
4144 goto out_free_eeprom;
4146 /* extract MAC Address */
4147 iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4148 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4149 priv->hw->wiphy->addresses = priv->addresses;
4150 priv->hw->wiphy->n_addresses = 1;
4151 num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4153 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4155 priv->addresses[1].addr[5]++;
4156 priv->hw->wiphy->n_addresses++;
4159 /************************
4160 * 5. Setup HW constants
4161 ************************/
4162 if (iwl_set_hw_params(priv)) {
4163 IWL_ERR(priv, "failed to set hw parameters\n");
4164 goto out_free_eeprom;
4167 /*******************
4169 *******************/
4171 err = iwl_init_drv(priv);
4173 goto out_free_eeprom;
4174 /* At this point both hw and priv are initialized. */
4176 /********************
4178 ********************/
4179 spin_lock_irqsave(&priv->lock, flags);
4180 iwl_disable_interrupts(priv);
4181 spin_unlock_irqrestore(&priv->lock, flags);
4183 pci_enable_msi(priv->pci_dev);
4185 iwl_alloc_isr_ict(priv);
4186 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4187 IRQF_SHARED, DRV_NAME, priv);
4189 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4190 goto out_disable_msi;
4193 iwl_setup_deferred_work(priv);
4194 iwl_setup_rx_handlers(priv);
4196 /*********************************************
4197 * 8. Enable interrupts and read RFKILL state
4198 *********************************************/
4200 /* enable interrupts if needed: hw bug w/a */
4201 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4202 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4203 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4204 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4207 iwl_enable_interrupts(priv);
4209 /* If platform's RF_KILL switch is NOT set to KILL */
4210 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4211 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4213 set_bit(STATUS_RF_KILL_HW, &priv->status);
4215 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4216 test_bit(STATUS_RF_KILL_HW, &priv->status));
4218 iwl_power_initialize(priv);
4219 iwl_tt_initialize(priv);
4221 init_completion(&priv->_agn.firmware_loading_complete);
4223 err = iwl_request_firmware(priv, true);
4225 goto out_destroy_workqueue;
4229 out_destroy_workqueue:
4230 destroy_workqueue(priv->workqueue);
4231 priv->workqueue = NULL;
4232 free_irq(priv->pci_dev->irq, priv);
4233 iwl_free_isr_ict(priv);
4235 pci_disable_msi(priv->pci_dev);
4236 iwl_uninit_drv(priv);
4238 iwl_eeprom_free(priv);
4240 pci_iounmap(pdev, priv->hw_base);
4241 out_pci_release_regions:
4242 pci_set_drvdata(pdev, NULL);
4243 pci_release_regions(pdev);
4244 out_pci_disable_device:
4245 pci_disable_device(pdev);
4246 out_ieee80211_free_hw:
4247 iwl_free_traffic_mem(priv);
4248 ieee80211_free_hw(priv->hw);
4253 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4255 struct iwl_priv *priv = pci_get_drvdata(pdev);
4256 unsigned long flags;
4261 wait_for_completion(&priv->_agn.firmware_loading_complete);
4263 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4265 iwl_dbgfs_unregister(priv);
4266 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4268 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4269 * to be called and iwl_down since we are removing the device
4270 * we need to set STATUS_EXIT_PENDING bit.
4272 set_bit(STATUS_EXIT_PENDING, &priv->status);
4273 if (priv->mac80211_registered) {
4274 ieee80211_unregister_hw(priv->hw);
4275 priv->mac80211_registered = 0;
4281 * Make sure device is reset to low power before unloading driver.
4282 * This may be redundant with iwl_down(), but there are paths to
4283 * run iwl_down() without calling apm_ops.stop(), and there are
4284 * paths to avoid running iwl_down() at all before leaving driver.
4285 * This (inexpensive) call *makes sure* device is reset.
4287 priv->cfg->ops->lib->apm_ops.stop(priv);
4291 /* make sure we flush any pending irq or
4292 * tasklet for the driver
4294 spin_lock_irqsave(&priv->lock, flags);
4295 iwl_disable_interrupts(priv);
4296 spin_unlock_irqrestore(&priv->lock, flags);
4298 iwl_synchronize_irq(priv);
4300 iwl_dealloc_ucode_pci(priv);
4303 iwlagn_rx_queue_free(priv, &priv->rxq);
4304 iwlagn_hw_txq_ctx_free(priv);
4306 iwl_eeprom_free(priv);
4309 /*netif_stop_queue(dev); */
4310 flush_workqueue(priv->workqueue);
4312 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4313 * priv->workqueue... so we can't take down the workqueue
4315 destroy_workqueue(priv->workqueue);
4316 priv->workqueue = NULL;
4317 iwl_free_traffic_mem(priv);
4319 free_irq(priv->pci_dev->irq, priv);
4320 pci_disable_msi(priv->pci_dev);
4321 pci_iounmap(pdev, priv->hw_base);
4322 pci_release_regions(pdev);
4323 pci_disable_device(pdev);
4324 pci_set_drvdata(pdev, NULL);
4326 iwl_uninit_drv(priv);
4328 iwl_free_isr_ict(priv);
4330 if (priv->ibss_beacon)
4331 dev_kfree_skb(priv->ibss_beacon);
4333 ieee80211_free_hw(priv->hw);
4337 /*****************************************************************************
4339 * driver and module entry point
4341 *****************************************************************************/
4343 /* Hardware specific file defines the PCI IDs table for that hardware module */
4344 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4345 #ifdef CONFIG_IWL4965
4346 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4347 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4348 #endif /* CONFIG_IWL4965 */
4349 #ifdef CONFIG_IWL5000
4350 /* 5100 Series WiFi */
4351 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4352 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4353 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4354 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4355 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4356 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4357 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4358 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4359 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4360 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4361 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4362 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4363 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4364 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4365 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4366 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4367 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4368 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4369 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4370 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4371 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4372 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4373 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4374 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4376 /* 5300 Series WiFi */
4377 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4378 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4379 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4380 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4381 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4382 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4383 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4384 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4385 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4386 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4387 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4388 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4390 /* 5350 Series WiFi/WiMax */
4391 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4392 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4393 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4395 /* 5150 Series Wifi/WiMax */
4396 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4397 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4398 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4399 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4400 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4401 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4403 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4404 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4405 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4406 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4409 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4410 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4411 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4412 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4413 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4414 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4415 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4416 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4417 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4418 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4420 /* 6x00 Series Gen2a */
4421 {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4422 {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4423 {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4424 {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4425 {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4426 {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4427 {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4428 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4429 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4430 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4431 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4432 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4433 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4434 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4436 /* 6x00 Series Gen2b */
4437 {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4438 {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4439 {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4440 {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4441 {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4442 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4443 {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4444 {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4445 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4446 {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4447 {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4448 {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4449 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4450 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4451 {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4452 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4453 {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4454 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4455 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4456 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4457 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4458 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4459 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4460 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4461 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4462 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4463 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4464 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4466 /* 6x50 WiFi/WiMax Series */
4467 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4468 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4469 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4470 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4471 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4472 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4474 /* 6x50 WiFi/WiMax Series Gen2 */
4475 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4476 {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4477 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4478 {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4479 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4480 {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4482 /* 1000 Series WiFi */
4483 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4484 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4485 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4486 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4487 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4488 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4489 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4490 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4491 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4492 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4493 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4494 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4495 #endif /* CONFIG_IWL5000 */
4499 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4501 static struct pci_driver iwl_driver = {
4503 .id_table = iwl_hw_card_ids,
4504 .probe = iwl_pci_probe,
4505 .remove = __devexit_p(iwl_pci_remove),
4507 .suspend = iwl_pci_suspend,
4508 .resume = iwl_pci_resume,
4512 static int __init iwl_init(void)
4516 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4517 pr_info(DRV_COPYRIGHT "\n");
4519 ret = iwlagn_rate_control_register();
4521 pr_err("Unable to register rate control algorithm: %d\n", ret);
4525 ret = pci_register_driver(&iwl_driver);
4527 pr_err("Unable to initialize PCI module\n");
4528 goto error_register;
4534 iwlagn_rate_control_unregister();
4538 static void __exit iwl_exit(void)
4540 pci_unregister_driver(&iwl_driver);
4541 iwlagn_rate_control_unregister();
4544 module_exit(iwl_exit);
4545 module_init(iwl_init);
4547 #ifdef CONFIG_IWLWIFI_DEBUG
4548 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4549 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4550 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4551 MODULE_PARM_DESC(debug, "debug output mask");
4554 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4555 MODULE_PARM_DESC(swcrypto50,
4556 "using crypto in software (default 0 [hardware]) (deprecated)");
4557 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4558 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4559 module_param_named(queues_num50,
4560 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4561 MODULE_PARM_DESC(queues_num50,
4562 "number of hw queues in 50xx series (deprecated)");
4563 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4564 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4565 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4566 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4567 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4568 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4569 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4571 MODULE_PARM_DESC(amsdu_size_8K50,
4572 "enable 8K amsdu size in 50XX series (deprecated)");
4573 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4575 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4576 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4577 MODULE_PARM_DESC(fw_restart50,
4578 "restart firmware in case of error (deprecated)");
4579 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4580 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4582 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4583 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4585 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4587 MODULE_PARM_DESC(ucode_alternative,
4588 "specify ucode alternative to use from ucode file");