drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/slab.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/sched.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/wireless.h>
  41 #include <linux/firmware.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/if_arp.h>
  44
  45 #include <net/mac80211.h>
  46
  47 #include <asm/div64.h>
  48
  49 #define DRV_NAME        "iwlagn"
  50
  51 #include "iwl-eeprom.h"
  52 #include "iwl-dev.h"
  53 #include "iwl-core.h"
  54 #include "iwl-io.h"
  55 #include "iwl-helpers.h"
  56 #include "iwl-sta.h"
  57 #include "iwl-calib.h"
  58 #include "iwl-agn.h"
  59
  60
  61 /******************************************************************************
  62  *
  63  * module boiler plate
  64  *
  65  ******************************************************************************/
  66
  67 /*
  68  * module name, copyright, version, etc.
  69  */
  70 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  71
  72 #ifdef CONFIG_IWLWIFI_DEBUG
  73 #define VD "d"
  74 #else
  75 #define VD
  76 #endif
  77
  78 #define DRV_VERSION     IWLWIFI_VERSION VD
  79
  80
  81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  82 MODULE_VERSION(DRV_VERSION);
  83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  84 MODULE_LICENSE("GPL");
  85 MODULE_ALIAS("iwl4965");
  86
  87 /**
  88  * iwl_commit_rxon - commit staging_rxon to hardware
  89  *
  90  * The RXON command in staging_rxon is committed to the hardware and
  91  * the active_rxon structure is updated with the new data.  This
  92  * function correctly transitions out of the RXON_ASSOC_MSK state if
  93  * a HW tune is required based on the RXON structure changes.
  94  */
  95 int iwl_commit_rxon(struct iwl_priv *priv)
  96 {
  97         /* cast away the const for active_rxon in this function */
  98         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  99         int ret;
 100         bool new_assoc =
 101                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 102
 103         if (!iwl_is_alive(priv))
 104                 return -EBUSY;
 105
 106         /* always get timestamp with Rx frame */
 107         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 108
 109         ret = iwl_check_rxon_cmd(priv);
 110         if (ret) {
 111                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 112                 return -EINVAL;
 113         }
 114
 115         /*
 116          * receive commit_rxon request
 117          * abort any previous channel switch if still in process
 118          */
 119         if (priv->switch_rxon.switch_in_progress &&
 120             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 121                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 122                       le16_to_cpu(priv->switch_rxon.channel));
 123                 iwl_chswitch_done(priv, false);
 124         }
 125
 126         /* If we don't need to send a full RXON, we can use
 127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 128          * and other flags for the current radio configuration. */
 129         if (!iwl_full_rxon_required(priv)) {
 130                 ret = iwl_send_rxon_assoc(priv);
 131                 if (ret) {
 132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 133                         return ret;
 134                 }
 135
 136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 137                 iwl_print_rx_config_cmd(priv);
 138                 return 0;
 139         }
 140
 141         /* If we are currently associated and the new config requires
 142          * an RXON_ASSOC and the new config wants the associated mask enabled,
 143          * we must clear the associated from the active configuration
 144          * before we apply the new config */
 145         if (iwl_is_associated(priv) && new_assoc) {
 146                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 147                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 148
 149                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 150                                       sizeof(struct iwl_rxon_cmd),
 151                                       &priv->active_rxon);
 152
 153                 /* If the mask clearing failed then we set
 154                  * active_rxon back to what it was previously */
 155                 if (ret) {
 156                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 157                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 158                         return ret;
 159                 }
 160                 iwl_clear_ucode_stations(priv);
 161                 iwl_restore_stations(priv);
 162                 ret = iwl_restore_default_wep_keys(priv);
 163                 if (ret) {
 164                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 165                         return ret;
 166                 }
 167         }
 168
 169         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 170                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 171                        "* channel = %d\n"
 172                        "* bssid = %pM\n",
 173                        (new_assoc ? "" : "out"),
 174                        le16_to_cpu(priv->staging_rxon.channel),
 175                        priv->staging_rxon.bssid_addr);
 176
 177         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 178
 179         /* Apply the new configuration
 180          * RXON unassoc clears the station table in uCode so restoration of
 181          * stations is needed after it (the RXON command) completes
 182          */
 183         if (!new_assoc) {
 184                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 185                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 186                 if (ret) {
 187                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 188                         return ret;
 189                 }
 190                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 191                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 192                 iwl_clear_ucode_stations(priv);
 193                 iwl_restore_stations(priv);
 194                 ret = iwl_restore_default_wep_keys(priv);
 195                 if (ret) {
 196                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 197                         return ret;
 198                 }
 199         }
 200
 201         priv->start_calib = 0;
 202         if (new_assoc) {
 203                 /*
 204                  * allow CTS-to-self if possible for new association.
 205                  * this is relevant only for 5000 series and up,
 206                  * but will not damage 4965
 207                  */
 208                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 209
 210                 /* Apply the new configuration
 211                  * RXON assoc doesn't clear the station table in uCode,
 212                  */
 213                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 214                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 220         }
 221         iwl_print_rx_config_cmd(priv);
 222
 223         iwl_init_sensitivity(priv);
 224
 225         /* If we issue a new RXON command which required a tune then we must
 226          * send a new TXPOWER command or we won't be able to Tx any frames */
 227         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 228         if (ret) {
 229                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 230                 return ret;
 231         }
 232
 233         return 0;
 234 }
 235
 236 void iwl_update_chain_flags(struct iwl_priv *priv)
 237 {
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain)
 240                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 241         iwlcore_commit_rxon(priv);
 242 }
 243
 244 static void iwl_clear_free_frames(struct iwl_priv *priv)
 245 {
 246         struct list_head *element;
 247
 248         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 249                        priv->frames_count);
 250
 251         while (!list_empty(&priv->free_frames)) {
 252                 element = priv->free_frames.next;
 253                 list_del(element);
 254                 kfree(list_entry(element, struct iwl_frame, list));
 255                 priv->frames_count--;
 256         }
 257
 258         if (priv->frames_count) {
 259                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 260                             priv->frames_count);
 261                 priv->frames_count = 0;
 262         }
 263 }
 264
 265 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 266 {
 267         struct iwl_frame *frame;
 268         struct list_head *element;
 269         if (list_empty(&priv->free_frames)) {
 270                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 271                 if (!frame) {
 272                         IWL_ERR(priv, "Could not allocate frame!\n");
 273                         return NULL;
 274                 }
 275
 276                 priv->frames_count++;
 277                 return frame;
 278         }
 279
 280         element = priv->free_frames.next;
 281         list_del(element);
 282         return list_entry(element, struct iwl_frame, list);
 283 }
 284
 285 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 286 {
 287         memset(frame, 0, sizeof(*frame));
 288         list_add(&frame->list, &priv->free_frames);
 289 }
 290
 291 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 292                                           struct ieee80211_hdr *hdr,
 293                                           int left)
 294 {
 295         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 296             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 297              (priv->iw_mode != NL80211_IFTYPE_AP)))
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 371                                               priv->hw_params.valid_tx_ant);
 372         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 373         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 374                 rate_flags |= RATE_MCS_CCK_MSK;
 375         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 376                         rate_flags);
 377
 378         return sizeof(*tx_beacon_cmd) + frame_size;
 379 }
 380 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 381 {
 382         struct iwl_frame *frame;
 383         unsigned int frame_size;
 384         int rc;
 385
 386         frame = iwl_get_free_frame(priv);
 387         if (!frame) {
 388                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 389                           "command.\n");
 390                 return -ENOMEM;
 391         }
 392
 393         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 394         if (!frame_size) {
 395                 IWL_ERR(priv, "Error configuring the beacon command\n");
 396                 iwl_free_frame(priv, frame);
 397                 return -EINVAL;
 398         }
 399
 400         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 401                               &frame->u.cmd[0]);
 402
 403         iwl_free_frame(priv, frame);
 404
 405         return rc;
 406 }
 407
 408 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 409 {
 410         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 411
 412         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 413         if (sizeof(dma_addr_t) > sizeof(u32))
 414                 addr |=
 415                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 416
 417         return addr;
 418 }
 419
 420 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 421 {
 422         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 423
 424         return le16_to_cpu(tb->hi_n_len) >> 4;
 425 }
 426
 427 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 428                                   dma_addr_t addr, u16 len)
 429 {
 430         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 431         u16 hi_n_len = len << 4;
 432
 433         put_unaligned_le32(addr, &tb->lo);
 434         if (sizeof(dma_addr_t) > sizeof(u32))
 435                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 436
 437         tb->hi_n_len = cpu_to_le16(hi_n_len);
 438
 439         tfd->num_tbs = idx + 1;
 440 }
 441
 442 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 443 {
 444         return tfd->num_tbs & 0x1f;
 445 }
 446
 447 /**
 448  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 449  * @priv - driver private data
 450  * @txq - tx queue
 451  *
 452  * Does NOT advance any TFD circular buffer read/write indexes
 453  * Does NOT free the TFD itself (which is within circular buffer)
 454  */
 455 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 456 {
 457         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 458         struct iwl_tfd *tfd;
 459         struct pci_dev *dev = priv->pci_dev;
 460         int index = txq->q.read_ptr;
 461         int i;
 462         int num_tbs;
 463
 464         tfd = &tfd_tmp[index];
 465
 466         /* Sanity check on number of chunks */
 467         num_tbs = iwl_tfd_get_num_tbs(tfd);
 468
 469         if (num_tbs >= IWL_NUM_OF_TBS) {
 470                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 471                 /* @todo issue fatal error, it is quite serious situation */
 472                 return;
 473         }
 474
 475         /* Unmap tx_cmd */
 476         if (num_tbs)
 477                 pci_unmap_single(dev,
 478                                 dma_unmap_addr(&txq->meta[index], mapping),
 479                                 dma_unmap_len(&txq->meta[index], len),
 480                                 PCI_DMA_BIDIRECTIONAL);
 481
 482         /* Unmap chunks, if any. */
 483         for (i = 1; i < num_tbs; i++)
 484                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 485                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 486
 487         /* free SKB */
 488         if (txq->txb) {
 489                 struct sk_buff *skb;
 490
 491                 skb = txq->txb[txq->q.read_ptr].skb;
 492
 493                 /* can be called from irqs-disabled context */
 494                 if (skb) {
 495                         dev_kfree_skb_any(skb);
 496                         txq->txb[txq->q.read_ptr].skb = NULL;
 497                 }
 498         }
 499 }
 500
 501 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 502                                  struct iwl_tx_queue *txq,
 503                                  dma_addr_t addr, u16 len,
 504                                  u8 reset, u8 pad)
 505 {
 506         struct iwl_queue *q;
 507         struct iwl_tfd *tfd, *tfd_tmp;
 508         u32 num_tbs;
 509
 510         q = &txq->q;
 511         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 512         tfd = &tfd_tmp[q->write_ptr];
 513
 514         if (reset)
 515                 memset(tfd, 0, sizeof(*tfd));
 516
 517         num_tbs = iwl_tfd_get_num_tbs(tfd);
 518
 519         /* Each TFD can point to a maximum 20 Tx buffers */
 520         if (num_tbs >= IWL_NUM_OF_TBS) {
 521                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 522                           IWL_NUM_OF_TBS);
 523                 return -EINVAL;
 524         }
 525
 526         BUG_ON(addr & ~DMA_BIT_MASK(36));
 527         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 528                 IWL_ERR(priv, "Unaligned address = %llx\n",
 529                           (unsigned long long)addr);
 530
 531         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 532
 533         return 0;
 534 }
 535
 536 /*
 537  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 538  * given Tx queue, and enable the DMA channel used for that queue.
 539  *
 540  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 541  * channels supported in hardware.
 542  */
 543 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 544                          struct iwl_tx_queue *txq)
 545 {
 546         int txq_id = txq->q.id;
 547
 548         /* Circular buffer (TFD queue in DRAM) physical base address */
 549         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 550                              txq->q.dma_addr >> 8);
 551
 552         return 0;
 553 }
 554
 555 /******************************************************************************
 556  *
 557  * Generic RX handler implementations
 558  *
 559  ******************************************************************************/
 560 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 561                                 struct iwl_rx_mem_buffer *rxb)
 562 {
 563         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 564         struct iwl_alive_resp *palive;
 565         struct delayed_work *pwork;
 566
 567         palive = &pkt->u.alive_frame;
 568
 569         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 570                        "0x%01X 0x%01X\n",
 571                        palive->is_valid, palive->ver_type,
 572                        palive->ver_subtype);
 573
 574         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 575                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 576                 memcpy(&priv->card_alive_init,
 577                        &pkt->u.alive_frame,
 578                        sizeof(struct iwl_init_alive_resp));
 579                 pwork = &priv->init_alive_start;
 580         } else {
 581                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 582                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 583                        sizeof(struct iwl_alive_resp));
 584                 pwork = &priv->alive_start;
 585         }
 586
 587         /* We delay the ALIVE response by 5ms to
 588          * give the HW RF Kill time to activate... */
 589         if (palive->is_valid == UCODE_VALID_OK)
 590                 queue_delayed_work(priv->workqueue, pwork,
 591                                    msecs_to_jiffies(5));
 592         else
 593                 IWL_WARN(priv, "uCode did not respond OK.\n");
 594 }
 595
 596 static void iwl_bg_beacon_update(struct work_struct *work)
 597 {
 598         struct iwl_priv *priv =
 599                 container_of(work, struct iwl_priv, beacon_update);
 600         struct sk_buff *beacon;
 601
 602         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 603         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 604
 605         if (!beacon) {
 606                 IWL_ERR(priv, "update beacon failed\n");
 607                 return;
 608         }
 609
 610         mutex_lock(&priv->mutex);
 611         /* new beacon skb is allocated every time; dispose previous.*/
 612         if (priv->ibss_beacon)
 613                 dev_kfree_skb(priv->ibss_beacon);
 614
 615         priv->ibss_beacon = beacon;
 616         mutex_unlock(&priv->mutex);
 617
 618         iwl_send_beacon_cmd(priv);
 619 }
 620
 621 /**
 622  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 623  *
 624  * This callback is provided in order to send a statistics request.
 625  *
 626  * This timer function is continually reset to execute within
 627  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 628  * was received.  We need to ensure we receive the statistics in order
 629  * to update the temperature used for calibrating the TXPOWER.
 630  */
 631 static void iwl_bg_statistics_periodic(unsigned long data)
 632 {
 633         struct iwl_priv *priv = (struct iwl_priv *)data;
 634
 635         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 636                 return;
 637
 638         /* dont send host command if rf-kill is on */
 639         if (!iwl_is_ready_rf(priv))
 640                 return;
 641
 642         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 643 }
 644
 645
 646 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 647                                         u32 start_idx, u32 num_events,
 648                                         u32 mode)
 649 {
 650         u32 i;
 651         u32 ptr;        /* SRAM byte address of log data */
 652         u32 ev, time, data; /* event log data */
 653         unsigned long reg_flags;
 654
 655         if (mode == 0)
 656                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 657         else
 658                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 659
 660         /* Make sure device is powered up for SRAM reads */
 661         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 662         if (iwl_grab_nic_access(priv)) {
 663                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 664                 return;
 665         }
 666
 667         /* Set starting address; reads will auto-increment */
 668         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 669         rmb();
 670
 671         /*
 672          * "time" is actually "data" for mode 0 (no timestamp).
 673          * place event id # at far right for easier visual parsing.
 674          */
 675         for (i = 0; i < num_events; i++) {
 676                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 678                 if (mode == 0) {
 679                         trace_iwlwifi_dev_ucode_cont_event(priv,
 680                                                         0, time, ev);
 681                 } else {
 682                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 683                         trace_iwlwifi_dev_ucode_cont_event(priv,
 684                                                 time, data, ev);
 685                 }
 686         }
 687         /* Allow device to power down */
 688         iwl_release_nic_access(priv);
 689         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 690 }
 691
 692 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 693 {
 694         u32 capacity;   /* event log capacity in # entries */
 695         u32 base;       /* SRAM byte address of event log header */
 696         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 697         u32 num_wraps;  /* # times uCode wrapped to top of log */
 698         u32 next_entry; /* index of next entry to be written by uCode */
 699
 700         if (priv->ucode_type == UCODE_INIT)
 701                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 702         else
 703                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 704         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 705                 capacity = iwl_read_targ_mem(priv, base);
 706                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 707                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 708                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 709         } else
 710                 return;
 711
 712         if (num_wraps == priv->event_log.num_wraps) {
 713                 iwl_print_cont_event_trace(priv,
 714                                        base, priv->event_log.next_entry,
 715                                        next_entry - priv->event_log.next_entry,
 716                                        mode);
 717                 priv->event_log.non_wraps_count++;
 718         } else {
 719                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 720                         priv->event_log.wraps_more_count++;
 721                 else
 722                         priv->event_log.wraps_once_count++;
 723                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 724                                 num_wraps - priv->event_log.num_wraps,
 725                                 next_entry, priv->event_log.next_entry);
 726                 if (next_entry < priv->event_log.next_entry) {
 727                         iwl_print_cont_event_trace(priv, base,
 728                                priv->event_log.next_entry,
 729                                capacity - priv->event_log.next_entry,
 730                                mode);
 731
 732                         iwl_print_cont_event_trace(priv, base, 0,
 733                                 next_entry, mode);
 734                 } else {
 735                         iwl_print_cont_event_trace(priv, base,
 736                                next_entry, capacity - next_entry,
 737                                mode);
 738
 739                         iwl_print_cont_event_trace(priv, base, 0,
 740                                 next_entry, mode);
 741                 }
 742         }
 743         priv->event_log.num_wraps = num_wraps;
 744         priv->event_log.next_entry = next_entry;
 745 }
 746
 747 /**
 748  * iwl_bg_ucode_trace - Timer callback to log ucode event
 749  *
 750  * The timer is continually set to execute every
 751  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 752  * this function is to perform continuous uCode event logging operation
 753  * if enabled
 754  */
 755 static void iwl_bg_ucode_trace(unsigned long data)
 756 {
 757         struct iwl_priv *priv = (struct iwl_priv *)data;
 758
 759         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 760                 return;
 761
 762         if (priv->event_log.ucode_trace) {
 763                 iwl_continuous_event_trace(priv);
 764                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 765                 mod_timer(&priv->ucode_trace,
 766                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 767         }
 768 }
 769
 770 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 771                                 struct iwl_rx_mem_buffer *rxb)
 772 {
 773 #ifdef CONFIG_IWLWIFI_DEBUG
 774         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 775         struct iwl4965_beacon_notif *beacon =
 776                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 777         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 778
 779         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 780                 "tsf %d %d rate %d\n",
 781                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 782                 beacon->beacon_notify_hdr.failure_frame,
 783                 le32_to_cpu(beacon->ibss_mgr_status),
 784                 le32_to_cpu(beacon->high_tsf),
 785                 le32_to_cpu(beacon->low_tsf), rate);
 786 #endif
 787
 788         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 789             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 790                 queue_work(priv->workqueue, &priv->beacon_update);
 791 }
 792
 793 /* Handle notification from uCode that card's power state is changing
 794  * due to software, hardware, or critical temperature RFKILL */
 795 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 796                                     struct iwl_rx_mem_buffer *rxb)
 797 {
 798         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 799         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 800         unsigned long status = priv->status;
 801
 802         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 803                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 804                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 805                           (flags & CT_CARD_DISABLED) ?
 806                           "Reached" : "Not reached");
 807
 808         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 809                      CT_CARD_DISABLED)) {
 810
 811                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 812                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 813
 814                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 815                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 816
 817                 if (!(flags & RXON_CARD_DISABLED)) {
 818                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 819                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 820                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 821                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 822                 }
 823                 if (flags & CT_CARD_DISABLED)
 824                         iwl_tt_enter_ct_kill(priv);
 825         }
 826         if (!(flags & CT_CARD_DISABLED))
 827                 iwl_tt_exit_ct_kill(priv);
 828
 829         if (flags & HW_CARD_DISABLED)
 830                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 831         else
 832                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 833
 834
 835         if (!(flags & RXON_CARD_DISABLED))
 836                 iwl_scan_cancel(priv);
 837
 838         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 839              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 840                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 841                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 842         else
 843                 wake_up_interruptible(&priv->wait_command_queue);
 844 }
 845
 846 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 847 {
 848         if (src == IWL_PWR_SRC_VAUX) {
 849                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 850                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 851                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 852                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 853         } else {
 854                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 855                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 856                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 857         }
 858
 859         return 0;
 860 }
 861
 862 /**
 863  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 864  *
 865  * Setup the RX handlers for each of the reply types sent from the uCode
 866  * to the host.
 867  *
 868  * This function chains into the hardware specific files for them to setup
 869  * any hardware specific handlers as well.
 870  */
 871 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 872 {
 873         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 874         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 875         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 876         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 877                         iwl_rx_spectrum_measure_notif;
 878         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 879         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 880             iwl_rx_pm_debug_statistics_notif;
 881         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 882
 883         /*
 884          * The same handler is used for both the REPLY to a discrete
 885          * statistics request from the host as well as for the periodic
 886          * statistics notifications (after received beacons) from the uCode.
 887          */
 888         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 889         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 890
 891         iwl_setup_rx_scan_handlers(priv);
 892
 893         /* status change handler */
 894         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 895
 896         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 897             iwl_rx_missed_beacon_notif;
 898         /* Rx handlers */
 899         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 900         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 901         /* block ack */
 902         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 903         /* Set up hardware specific Rx handlers */
 904         priv->cfg->ops->lib->rx_handler_setup(priv);
 905 }
 906
 907 /**
 908  * iwl_rx_handle - Main entry function for receiving responses from uCode
 909  *
 910  * Uses the priv->rx_handlers callback function array to invoke
 911  * the appropriate handlers, including command responses,
 912  * frame-received notifications, and other notifications.
 913  */
 914 void iwl_rx_handle(struct iwl_priv *priv)
 915 {
 916         struct iwl_rx_mem_buffer *rxb;
 917         struct iwl_rx_packet *pkt;
 918         struct iwl_rx_queue *rxq = &priv->rxq;
 919         u32 r, i;
 920         int reclaim;
 921         unsigned long flags;
 922         u8 fill_rx = 0;
 923         u32 count = 8;
 924         int total_empty;
 925
 926         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 927          * buffer that the driver may process (last buffer filled by ucode). */
 928         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 929         i = rxq->read;
 930
 931         /* Rx interrupt, but nothing sent from uCode */
 932         if (i == r)
 933                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 934
 935         /* calculate total frames need to be restock after handling RX */
 936         total_empty = r - rxq->write_actual;
 937         if (total_empty < 0)
 938                 total_empty += RX_QUEUE_SIZE;
 939
 940         if (total_empty > (RX_QUEUE_SIZE / 2))
 941                 fill_rx = 1;
 942
 943         while (i != r) {
 944                 int len;
 945
 946                 rxb = rxq->queue[i];
 947
 948                 /* If an RXB doesn't have a Rx queue slot associated with it,
 949                  * then a bug has been introduced in the queue refilling
 950                  * routines -- catch it here */
 951                 BUG_ON(rxb == NULL);
 952
 953                 rxq->queue[i] = NULL;
 954
 955                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 956                                PAGE_SIZE << priv->hw_params.rx_page_order,
 957                                PCI_DMA_FROMDEVICE);
 958                 pkt = rxb_addr(rxb);
 959
 960                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 961                 len += sizeof(u32); /* account for status word */
 962                 trace_iwlwifi_dev_rx(priv, pkt, len);
 963
 964                 /* Reclaim a command buffer only if this packet is a response
 965                  *   to a (driver-originated) command.
 966                  * If the packet (e.g. Rx frame) originated from uCode,
 967                  *   there is no command buffer to reclaim.
 968                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 969                  *   but apparently a few don't get set; catch them here. */
 970                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 971                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 972                         (pkt->hdr.cmd != REPLY_RX) &&
 973                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 974                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 975                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 976                         (pkt->hdr.cmd != REPLY_TX);
 977
 978                 /* Based on type of command response or notification,
 979                  *   handle those that need handling via function in
 980                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 981                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 982                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 983                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 984                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 985                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 986                 } else {
 987                         /* No handling needed */
 988                         IWL_DEBUG_RX(priv,
 989                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 990                                 r, i, get_cmd_string(pkt->hdr.cmd),
 991                                 pkt->hdr.cmd);
 992                 }
 993
 994                 /*
 995                  * XXX: After here, we should always check rxb->page
 996                  * against NULL before touching it or its virtual
 997                  * memory (pkt). Because some rx_handler might have
 998                  * already taken or freed the pages.
 999                  */
1000
1001                 if (reclaim) {
1002                         /* Invoke any callbacks, transfer the buffer to caller,
1003                          * and fire off the (possibly) blocking iwl_send_cmd()
1004                          * as we reclaim the driver command queue */
1005                         if (rxb->page)
1006                                 iwl_tx_cmd_complete(priv, rxb);
1007                         else
1008                                 IWL_WARN(priv, "Claim null rxb?\n");
1009                 }
1010
1011                 /* Reuse the page if possible. For notification packets and
1012                  * SKBs that fail to Rx correctly, add them back into the
1013                  * rx_free list for reuse later. */
1014                 spin_lock_irqsave(&rxq->lock, flags);
1015                 if (rxb->page != NULL) {
1016                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1017                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1018                                 PCI_DMA_FROMDEVICE);
1019                         list_add_tail(&rxb->list, &rxq->rx_free);
1020                         rxq->free_count++;
1021                 } else
1022                         list_add_tail(&rxb->list, &rxq->rx_used);
1023
1024                 spin_unlock_irqrestore(&rxq->lock, flags);
1025
1026                 i = (i + 1) & RX_QUEUE_MASK;
1027                 /* If there are a lot of unused frames,
1028                  * restock the Rx queue so ucode wont assert. */
1029                 if (fill_rx) {
1030                         count++;
1031                         if (count >= 8) {
1032                                 rxq->read = i;
1033                                 iwlagn_rx_replenish_now(priv);
1034                                 count = 0;
1035                         }
1036                 }
1037         }
1038
1039         /* Backtrack one entry */
1040         rxq->read = i;
1041         if (fill_rx)
1042                 iwlagn_rx_replenish_now(priv);
1043         else
1044                 iwlagn_rx_queue_restock(priv);
1045 }
1046
1047 /* call this function to flush any scheduled tasklet */
1048 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1049 {
1050         /* wait to make sure we flush pending tasklet*/
1051         synchronize_irq(priv->pci_dev->irq);
1052         tasklet_kill(&priv->irq_tasklet);
1053 }
1054
1055 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1056 {
1057         u32 inta, handled = 0;
1058         u32 inta_fh;
1059         unsigned long flags;
1060         u32 i;
1061 #ifdef CONFIG_IWLWIFI_DEBUG
1062         u32 inta_mask;
1063 #endif
1064
1065         spin_lock_irqsave(&priv->lock, flags);
1066
1067         /* Ack/clear/reset pending uCode interrupts.
1068          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1069          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1070         inta = iwl_read32(priv, CSR_INT);
1071         iwl_write32(priv, CSR_INT, inta);
1072
1073         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1074          * Any new interrupts that happen after this, either while we're
1075          * in this tasklet, or later, will show up in next ISR/tasklet. */
1076         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1077         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1078
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1081                 /* just for debug */
1082                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1083                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1084                               inta, inta_mask, inta_fh);
1085         }
1086 #endif
1087
1088         spin_unlock_irqrestore(&priv->lock, flags);
1089
1090         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1091          * atomic, make sure that inta covers all the interrupts that
1092          * we've discovered, even if FH interrupt came in just after
1093          * reading CSR_INT. */
1094         if (inta_fh & CSR49_FH_INT_RX_MASK)
1095                 inta |= CSR_INT_BIT_FH_RX;
1096         if (inta_fh & CSR49_FH_INT_TX_MASK)
1097                 inta |= CSR_INT_BIT_FH_TX;
1098
1099         /* Now service all interrupt bits discovered above. */
1100         if (inta & CSR_INT_BIT_HW_ERR) {
1101                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1102
1103                 /* Tell the device to stop sending interrupts */
1104                 iwl_disable_interrupts(priv);
1105
1106                 priv->isr_stats.hw++;
1107                 iwl_irq_handle_error(priv);
1108
1109                 handled |= CSR_INT_BIT_HW_ERR;
1110
1111                 return;
1112         }
1113
1114 #ifdef CONFIG_IWLWIFI_DEBUG
1115         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1116                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1117                 if (inta & CSR_INT_BIT_SCD) {
1118                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1119                                       "the frame/frames.\n");
1120                         priv->isr_stats.sch++;
1121                 }
1122
1123                 /* Alive notification via Rx interrupt will do the real work */
1124                 if (inta & CSR_INT_BIT_ALIVE) {
1125                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1126                         priv->isr_stats.alive++;
1127                 }
1128         }
1129 #endif
1130         /* Safely ignore these bits for debug checks below */
1131         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1132
1133         /* HW RF KILL switch toggled */
1134         if (inta & CSR_INT_BIT_RF_KILL) {
1135                 int hw_rf_kill = 0;
1136                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1137                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1138                         hw_rf_kill = 1;
1139
1140                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1141                                 hw_rf_kill ? "disable radio" : "enable radio");
1142
1143                 priv->isr_stats.rfkill++;
1144
1145                 /* driver only loads ucode once setting the interface up.
1146                  * the driver allows loading the ucode even if the radio
1147                  * is killed. Hence update the killswitch state here. The
1148                  * rfkill handler will care about restarting if needed.
1149                  */
1150                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1151                         if (hw_rf_kill)
1152                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1153                         else
1154                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1155                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1156                 }
1157
1158                 handled |= CSR_INT_BIT_RF_KILL;
1159         }
1160
1161         /* Chip got too hot and stopped itself */
1162         if (inta & CSR_INT_BIT_CT_KILL) {
1163                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1164                 priv->isr_stats.ctkill++;
1165                 handled |= CSR_INT_BIT_CT_KILL;
1166         }
1167
1168         /* Error detected by uCode */
1169         if (inta & CSR_INT_BIT_SW_ERR) {
1170                 IWL_ERR(priv, "Microcode SW error detected. "
1171                         " Restarting 0x%X.\n", inta);
1172                 priv->isr_stats.sw++;
1173                 priv->isr_stats.sw_err = inta;
1174                 iwl_irq_handle_error(priv);
1175                 handled |= CSR_INT_BIT_SW_ERR;
1176         }
1177
1178         /*
1179          * uCode wakes up after power-down sleep.
1180          * Tell device about any new tx or host commands enqueued,
1181          * and about any Rx buffers made available while asleep.
1182          */
1183         if (inta & CSR_INT_BIT_WAKEUP) {
1184                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1185                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1186                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1187                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1188                 priv->isr_stats.wakeup++;
1189                 handled |= CSR_INT_BIT_WAKEUP;
1190         }
1191
1192         /* All uCode command responses, including Tx command responses,
1193          * Rx "responses" (frame-received notification), and other
1194          * notifications from uCode come through here*/
1195         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1196                 iwl_rx_handle(priv);
1197                 priv->isr_stats.rx++;
1198                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1199         }
1200
1201         /* This "Tx" DMA channel is used only for loading uCode */
1202         if (inta & CSR_INT_BIT_FH_TX) {
1203                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1204                 priv->isr_stats.tx++;
1205                 handled |= CSR_INT_BIT_FH_TX;
1206                 /* Wake up uCode load routine, now that load is complete */
1207                 priv->ucode_write_complete = 1;
1208                 wake_up_interruptible(&priv->wait_command_queue);
1209         }
1210
1211         if (inta & ~handled) {
1212                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1213                 priv->isr_stats.unhandled++;
1214         }
1215
1216         if (inta & ~(priv->inta_mask)) {
1217                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1218                          inta & ~priv->inta_mask);
1219                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1220         }
1221
1222         /* Re-enable all interrupts */
1223         /* only Re-enable if diabled by irq */
1224         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1225                 iwl_enable_interrupts(priv);
1226
1227 #ifdef CONFIG_IWLWIFI_DEBUG
1228         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1229                 inta = iwl_read32(priv, CSR_INT);
1230                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1231                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1232                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1233                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1234         }
1235 #endif
1236 }
1237
1238 /* tasklet for iwlagn interrupt */
1239 static void iwl_irq_tasklet(struct iwl_priv *priv)
1240 {
1241         u32 inta = 0;
1242         u32 handled = 0;
1243         unsigned long flags;
1244         u32 i;
1245 #ifdef CONFIG_IWLWIFI_DEBUG
1246         u32 inta_mask;
1247 #endif
1248
1249         spin_lock_irqsave(&priv->lock, flags);
1250
1251         /* Ack/clear/reset pending uCode interrupts.
1252          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1253          */
1254         /* There is a hardware bug in the interrupt mask function that some
1255          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1256          * they are disabled in the CSR_INT_MASK register. Furthermore the
1257          * ICT interrupt handling mechanism has another bug that might cause
1258          * these unmasked interrupts fail to be detected. We workaround the
1259          * hardware bugs here by ACKing all the possible interrupts so that
1260          * interrupt coalescing can still be achieved.
1261          */
1262         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1263
1264         inta = priv->_agn.inta;
1265
1266 #ifdef CONFIG_IWLWIFI_DEBUG
1267         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1268                 /* just for debug */
1269                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1270                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1271                                 inta, inta_mask);
1272         }
1273 #endif
1274
1275         spin_unlock_irqrestore(&priv->lock, flags);
1276
1277         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1278         priv->_agn.inta = 0;
1279
1280         /* Now service all interrupt bits discovered above. */
1281         if (inta & CSR_INT_BIT_HW_ERR) {
1282                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1283
1284                 /* Tell the device to stop sending interrupts */
1285                 iwl_disable_interrupts(priv);
1286
1287                 priv->isr_stats.hw++;
1288                 iwl_irq_handle_error(priv);
1289
1290                 handled |= CSR_INT_BIT_HW_ERR;
1291
1292                 return;
1293         }
1294
1295 #ifdef CONFIG_IWLWIFI_DEBUG
1296         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1297                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1298                 if (inta & CSR_INT_BIT_SCD) {
1299                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1300                                       "the frame/frames.\n");
1301                         priv->isr_stats.sch++;
1302                 }
1303
1304                 /* Alive notification via Rx interrupt will do the real work */
1305                 if (inta & CSR_INT_BIT_ALIVE) {
1306                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1307                         priv->isr_stats.alive++;
1308                 }
1309         }
1310 #endif
1311         /* Safely ignore these bits for debug checks below */
1312         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1313
1314         /* HW RF KILL switch toggled */
1315         if (inta & CSR_INT_BIT_RF_KILL) {
1316                 int hw_rf_kill = 0;
1317                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1318                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1319                         hw_rf_kill = 1;
1320
1321                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1322                                 hw_rf_kill ? "disable radio" : "enable radio");
1323
1324                 priv->isr_stats.rfkill++;
1325
1326                 /* driver only loads ucode once setting the interface up.
1327                  * the driver allows loading the ucode even if the radio
1328                  * is killed. Hence update the killswitch state here. The
1329                  * rfkill handler will care about restarting if needed.
1330                  */
1331                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1332                         if (hw_rf_kill)
1333                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1334                         else
1335                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1336                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1337                 }
1338
1339                 handled |= CSR_INT_BIT_RF_KILL;
1340         }
1341
1342         /* Chip got too hot and stopped itself */
1343         if (inta & CSR_INT_BIT_CT_KILL) {
1344                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1345                 priv->isr_stats.ctkill++;
1346                 handled |= CSR_INT_BIT_CT_KILL;
1347         }
1348
1349         /* Error detected by uCode */
1350         if (inta & CSR_INT_BIT_SW_ERR) {
1351                 IWL_ERR(priv, "Microcode SW error detected. "
1352                         " Restarting 0x%X.\n", inta);
1353                 priv->isr_stats.sw++;
1354                 priv->isr_stats.sw_err = inta;
1355                 iwl_irq_handle_error(priv);
1356                 handled |= CSR_INT_BIT_SW_ERR;
1357         }
1358
1359         /* uCode wakes up after power-down sleep */
1360         if (inta & CSR_INT_BIT_WAKEUP) {
1361                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1362                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1363                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1364                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1365
1366                 priv->isr_stats.wakeup++;
1367
1368                 handled |= CSR_INT_BIT_WAKEUP;
1369         }
1370
1371         /* All uCode command responses, including Tx command responses,
1372          * Rx "responses" (frame-received notification), and other
1373          * notifications from uCode come through here*/
1374         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1375                         CSR_INT_BIT_RX_PERIODIC)) {
1376                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1377                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1378                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1379                         iwl_write32(priv, CSR_FH_INT_STATUS,
1380                                         CSR49_FH_INT_RX_MASK);
1381                 }
1382                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1383                         handled |= CSR_INT_BIT_RX_PERIODIC;
1384                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1385                 }
1386                 /* Sending RX interrupt require many steps to be done in the
1387                  * the device:
1388                  * 1- write interrupt to current index in ICT table.
1389                  * 2- dma RX frame.
1390                  * 3- update RX shared data to indicate last write index.
1391                  * 4- send interrupt.
1392                  * This could lead to RX race, driver could receive RX interrupt
1393                  * but the shared data changes does not reflect this;
1394                  * periodic interrupt will detect any dangling Rx activity.
1395                  */
1396
1397                 /* Disable periodic interrupt; we use it as just a one-shot. */
1398                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1399                             CSR_INT_PERIODIC_DIS);
1400                 iwl_rx_handle(priv);
1401
1402                 /*
1403                  * Enable periodic interrupt in 8 msec only if we received
1404                  * real RX interrupt (instead of just periodic int), to catch
1405                  * any dangling Rx interrupt.  If it was just the periodic
1406                  * interrupt, there was no dangling Rx activity, and no need
1407                  * to extend the periodic interrupt; one-shot is enough.
1408                  */
1409                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1410                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1411                                     CSR_INT_PERIODIC_ENA);
1412
1413                 priv->isr_stats.rx++;
1414         }
1415
1416         /* This "Tx" DMA channel is used only for loading uCode */
1417         if (inta & CSR_INT_BIT_FH_TX) {
1418                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1419                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1420                 priv->isr_stats.tx++;
1421                 handled |= CSR_INT_BIT_FH_TX;
1422                 /* Wake up uCode load routine, now that load is complete */
1423                 priv->ucode_write_complete = 1;
1424                 wake_up_interruptible(&priv->wait_command_queue);
1425         }
1426
1427         if (inta & ~handled) {
1428                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1429                 priv->isr_stats.unhandled++;
1430         }
1431
1432         if (inta & ~(priv->inta_mask)) {
1433                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1434                          inta & ~priv->inta_mask);
1435         }
1436
1437         /* Re-enable all interrupts */
1438         /* only Re-enable if diabled by irq */
1439         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1440                 iwl_enable_interrupts(priv);
1441 }
1442
1443 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1444 #define ACK_CNT_RATIO (50)
1445 #define BA_TIMEOUT_CNT (5)
1446 #define BA_TIMEOUT_MAX (16)
1447
1448 /**
1449  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1450  *
1451  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1452  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1453  * operation state.
1454  */
1455 bool iwl_good_ack_health(struct iwl_priv *priv,
1456                                 struct iwl_rx_packet *pkt)
1457 {
1458         bool rc = true;
1459         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1460         int ba_timeout_delta;
1461
1462         actual_ack_cnt_delta =
1463                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1464                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1465         expected_ack_cnt_delta =
1466                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1467                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1468         ba_timeout_delta =
1469                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1470                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1471         if ((priv->_agn.agg_tids_count > 0) &&
1472             (expected_ack_cnt_delta > 0) &&
1473             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1474                 < ACK_CNT_RATIO) &&
1475             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1476                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1477                                 " expected_ack_cnt = %d\n",
1478                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1479
1480 #ifdef CONFIG_IWLWIFI_DEBUGFS
1481                 /*
1482                  * This is ifdef'ed on DEBUGFS because otherwise the
1483                  * statistics aren't available. If DEBUGFS is set but
1484                  * DEBUG is not, these will just compile out.
1485                  */
1486                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1487                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1488                 IWL_DEBUG_RADIO(priv,
1489                                 "ack_or_ba_timeout_collision delta = %d\n",
1490                                 priv->_agn.delta_statistics.tx.
1491                                 ack_or_ba_timeout_collision);
1492 #endif
1493                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1494                                 ba_timeout_delta);
1495                 if (!actual_ack_cnt_delta &&
1496                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1497                         rc = false;
1498         }
1499         return rc;
1500 }
1501
1502
1503 /*****************************************************************************
1504  *
1505  * sysfs attributes
1506  *
1507  *****************************************************************************/
1508
1509 #ifdef CONFIG_IWLWIFI_DEBUG
1510
1511 /*
1512  * The following adds a new attribute to the sysfs representation
1513  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1514  * used for controlling the debug level.
1515  *
1516  * See the level definitions in iwl for details.
1517  *
1518  * The debug_level being managed using sysfs below is a per device debug
1519  * level that is used instead of the global debug level if it (the per
1520  * device debug level) is set.
1521  */
1522 static ssize_t show_debug_level(struct device *d,
1523                                 struct device_attribute *attr, char *buf)
1524 {
1525         struct iwl_priv *priv = dev_get_drvdata(d);
1526         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1527 }
1528 static ssize_t store_debug_level(struct device *d,
1529                                 struct device_attribute *attr,
1530                                  const char *buf, size_t count)
1531 {
1532         struct iwl_priv *priv = dev_get_drvdata(d);
1533         unsigned long val;
1534         int ret;
1535
1536         ret = strict_strtoul(buf, 0, &val);
1537         if (ret)
1538                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1539         else {
1540                 priv->debug_level = val;
1541                 if (iwl_alloc_traffic_mem(priv))
1542                         IWL_ERR(priv,
1543                                 "Not enough memory to generate traffic log\n");
1544         }
1545         return strnlen(buf, count);
1546 }
1547
1548 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1549                         show_debug_level, store_debug_level);
1550
1551
1552 #endif /* CONFIG_IWLWIFI_DEBUG */
1553
1554
1555 static ssize_t show_temperature(struct device *d,
1556                                 struct device_attribute *attr, char *buf)
1557 {
1558         struct iwl_priv *priv = dev_get_drvdata(d);
1559
1560         if (!iwl_is_alive(priv))
1561                 return -EAGAIN;
1562
1563         return sprintf(buf, "%d\n", priv->temperature);
1564 }
1565
1566 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1567
1568 static ssize_t show_tx_power(struct device *d,
1569                              struct device_attribute *attr, char *buf)
1570 {
1571         struct iwl_priv *priv = dev_get_drvdata(d);
1572
1573         if (!iwl_is_ready_rf(priv))
1574                 return sprintf(buf, "off\n");
1575         else
1576                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1577 }
1578
1579 static ssize_t store_tx_power(struct device *d,
1580                               struct device_attribute *attr,
1581                               const char *buf, size_t count)
1582 {
1583         struct iwl_priv *priv = dev_get_drvdata(d);
1584         unsigned long val;
1585         int ret;
1586
1587         ret = strict_strtoul(buf, 10, &val);
1588         if (ret)
1589                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1590         else {
1591                 ret = iwl_set_tx_power(priv, val, false);
1592                 if (ret)
1593                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1594                                 ret);
1595                 else
1596                         ret = count;
1597         }
1598         return ret;
1599 }
1600
1601 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1602
1603 static ssize_t show_rts_ht_protection(struct device *d,
1604                              struct device_attribute *attr, char *buf)
1605 {
1606         struct iwl_priv *priv = dev_get_drvdata(d);
1607
1608         return sprintf(buf, "%s\n",
1609                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
1610 }
1611
1612 static ssize_t store_rts_ht_protection(struct device *d,
1613                               struct device_attribute *attr,
1614                               const char *buf, size_t count)
1615 {
1616         struct iwl_priv *priv = dev_get_drvdata(d);
1617         unsigned long val;
1618         int ret;
1619
1620         ret = strict_strtoul(buf, 10, &val);
1621         if (ret)
1622                 IWL_INFO(priv, "Input is not in decimal form.\n");
1623         else {
1624                 if (!iwl_is_associated(priv))
1625                         priv->cfg->use_rts_for_ht = val ? true : false;
1626                 else
1627                         IWL_ERR(priv, "Sta associated with AP - "
1628                                 "Change protection mechanism is not allowed\n");
1629                 ret = count;
1630         }
1631         return ret;
1632 }
1633
1634 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
1635                         show_rts_ht_protection, store_rts_ht_protection);
1636
1637
1638 static struct attribute *iwl_sysfs_entries[] = {
1639         &dev_attr_temperature.attr,
1640         &dev_attr_tx_power.attr,
1641         &dev_attr_rts_ht_protection.attr,
1642 #ifdef CONFIG_IWLWIFI_DEBUG
1643         &dev_attr_debug_level.attr,
1644 #endif
1645         NULL
1646 };
1647
1648 static struct attribute_group iwl_attribute_group = {
1649         .name = NULL,           /* put in device directory */
1650         .attrs = iwl_sysfs_entries,
1651 };
1652
1653 /******************************************************************************
1654  *
1655  * uCode download functions
1656  *
1657  ******************************************************************************/
1658
1659 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1660 {
1661         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1662         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1663         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1664         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1665         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1666         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1667 }
1668
1669 static void iwl_nic_start(struct iwl_priv *priv)
1670 {
1671         /* Remove all resets to allow NIC to operate */
1672         iwl_write32(priv, CSR_RESET, 0);
1673 }
1674
1675 struct iwlagn_ucode_capabilities {
1676         u32 max_probe_length;
1677 };
1678
1679 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1680 static int iwl_mac_setup_register(struct iwl_priv *priv,
1681                                   struct iwlagn_ucode_capabilities *capa);
1682
1683 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1684 {
1685         const char *name_pre = priv->cfg->fw_name_pre;
1686
1687         if (first)
1688                 priv->fw_index = priv->cfg->ucode_api_max;
1689         else
1690                 priv->fw_index--;
1691
1692         if (priv->fw_index < priv->cfg->ucode_api_min) {
1693                 IWL_ERR(priv, "no suitable firmware found!\n");
1694                 return -ENOENT;
1695         }
1696
1697         sprintf(priv->firmware_name, "%s%d%s",
1698                 name_pre, priv->fw_index, ".ucode");
1699
1700         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1701                        priv->firmware_name);
1702
1703         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1704                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1705                                        iwl_ucode_callback);
1706 }
1707
1708 struct iwlagn_firmware_pieces {
1709         const void *inst, *data, *init, *init_data, *boot;
1710         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1711
1712         u32 build;
1713
1714         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1715         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1716 };
1717
1718 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1719                                        const struct firmware *ucode_raw,
1720                                        struct iwlagn_firmware_pieces *pieces)
1721 {
1722         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1723         u32 api_ver, hdr_size;
1724         const u8 *src;
1725
1726         priv->ucode_ver = le32_to_cpu(ucode->ver);
1727         api_ver = IWL_UCODE_API(priv->ucode_ver);
1728
1729         switch (api_ver) {
1730         default:
1731                 /*
1732                  * 4965 doesn't revision the firmware file format
1733                  * along with the API version, it always uses v1
1734                  * file format.
1735                  */
1736                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1737                                 CSR_HW_REV_TYPE_4965) {
1738                         hdr_size = 28;
1739                         if (ucode_raw->size < hdr_size) {
1740                                 IWL_ERR(priv, "File size too small!\n");
1741                                 return -EINVAL;
1742                         }
1743                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1744                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1745                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1746                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1747                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1748                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1749                         src = ucode->u.v2.data;
1750                         break;
1751                 }
1752                 /* fall through for 4965 */
1753         case 0:
1754         case 1:
1755         case 2:
1756                 hdr_size = 24;
1757                 if (ucode_raw->size < hdr_size) {
1758                         IWL_ERR(priv, "File size too small!\n");
1759                         return -EINVAL;
1760                 }
1761                 pieces->build = 0;
1762                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1763                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1764                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1765                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1766                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1767                 src = ucode->u.v1.data;
1768                 break;
1769         }
1770
1771         /* Verify size of file vs. image size info in file's header */
1772         if (ucode_raw->size != hdr_size + pieces->inst_size +
1773                                 pieces->data_size + pieces->init_size +
1774                                 pieces->init_data_size + pieces->boot_size) {
1775
1776                 IWL_ERR(priv,
1777                         "uCode file size %d does not match expected size\n",
1778                         (int)ucode_raw->size);
1779                 return -EINVAL;
1780         }
1781
1782         pieces->inst = src;
1783         src += pieces->inst_size;
1784         pieces->data = src;
1785         src += pieces->data_size;
1786         pieces->init = src;
1787         src += pieces->init_size;
1788         pieces->init_data = src;
1789         src += pieces->init_data_size;
1790         pieces->boot = src;
1791         src += pieces->boot_size;
1792
1793         return 0;
1794 }
1795
1796 static int iwlagn_wanted_ucode_alternative = 1;
1797
1798 static int iwlagn_load_firmware(struct iwl_priv *priv,
1799                                 const struct firmware *ucode_raw,
1800                                 struct iwlagn_firmware_pieces *pieces,
1801                                 struct iwlagn_ucode_capabilities *capa)
1802 {
1803         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1804         struct iwl_ucode_tlv *tlv;
1805         size_t len = ucode_raw->size;
1806         const u8 *data;
1807         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1808         u64 alternatives;
1809         u32 tlv_len;
1810         enum iwl_ucode_tlv_type tlv_type;
1811         const u8 *tlv_data;
1812         int ret = 0;
1813
1814         if (len < sizeof(*ucode)) {
1815                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1816                 return -EINVAL;
1817         }
1818
1819         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1820                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1821                         le32_to_cpu(ucode->magic));
1822                 return -EINVAL;
1823         }
1824
1825         /*
1826          * Check which alternatives are present, and "downgrade"
1827          * when the chosen alternative is not present, warning
1828          * the user when that happens. Some files may not have
1829          * any alternatives, so don't warn in that case.
1830          */
1831         alternatives = le64_to_cpu(ucode->alternatives);
1832         tmp = wanted_alternative;
1833         if (wanted_alternative > 63)
1834                 wanted_alternative = 63;
1835         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1836                 wanted_alternative--;
1837         if (wanted_alternative && wanted_alternative != tmp)
1838                 IWL_WARN(priv,
1839                          "uCode alternative %d not available, choosing %d\n",
1840                          tmp, wanted_alternative);
1841
1842         priv->ucode_ver = le32_to_cpu(ucode->ver);
1843         pieces->build = le32_to_cpu(ucode->build);
1844         data = ucode->data;
1845
1846         len -= sizeof(*ucode);
1847
1848         while (len >= sizeof(*tlv) && !ret) {
1849                 u16 tlv_alt;
1850                 u32 fixed_tlv_size = 4;
1851
1852                 len -= sizeof(*tlv);
1853                 tlv = (void *)data;
1854
1855                 tlv_len = le32_to_cpu(tlv->length);
1856                 tlv_type = le16_to_cpu(tlv->type);
1857                 tlv_alt = le16_to_cpu(tlv->alternative);
1858                 tlv_data = tlv->data;
1859
1860                 if (len < tlv_len) {
1861                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1862                                 len, tlv_len);
1863                         return -EINVAL;
1864                 }
1865                 len -= ALIGN(tlv_len, 4);
1866                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1867
1868                 /*
1869                  * Alternative 0 is always valid.
1870                  *
1871                  * Skip alternative TLVs that are not selected.
1872                  */
1873                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1874                         continue;
1875
1876                 switch (tlv_type) {
1877                 case IWL_UCODE_TLV_INST:
1878                         pieces->inst = tlv_data;
1879                         pieces->inst_size = tlv_len;
1880                         break;
1881                 case IWL_UCODE_TLV_DATA:
1882                         pieces->data = tlv_data;
1883                         pieces->data_size = tlv_len;
1884                         break;
1885                 case IWL_UCODE_TLV_INIT:
1886                         pieces->init = tlv_data;
1887                         pieces->init_size = tlv_len;
1888                         break;
1889                 case IWL_UCODE_TLV_INIT_DATA:
1890                         pieces->init_data = tlv_data;
1891                         pieces->init_data_size = tlv_len;
1892                         break;
1893                 case IWL_UCODE_TLV_BOOT:
1894                         pieces->boot = tlv_data;
1895                         pieces->boot_size = tlv_len;
1896                         break;
1897                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1898                         if (tlv_len != fixed_tlv_size)
1899                                 ret = -EINVAL;
1900                         else
1901                                 capa->max_probe_length =
1902                                         le32_to_cpup((__le32 *)tlv_data);
1903                         break;
1904                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1905                         if (tlv_len != fixed_tlv_size)
1906                                 ret = -EINVAL;
1907                         else
1908                                 pieces->init_evtlog_ptr =
1909                                         le32_to_cpup((__le32 *)tlv_data);
1910                         break;
1911                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1912                         if (tlv_len != fixed_tlv_size)
1913                                 ret = -EINVAL;
1914                         else
1915                                 pieces->init_evtlog_size =
1916                                         le32_to_cpup((__le32 *)tlv_data);
1917                         break;
1918                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1919                         if (tlv_len != fixed_tlv_size)
1920                                 ret = -EINVAL;
1921                         else
1922                                 pieces->init_errlog_ptr =
1923                                         le32_to_cpup((__le32 *)tlv_data);
1924                         break;
1925                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1926                         if (tlv_len != fixed_tlv_size)
1927                                 ret = -EINVAL;
1928                         else
1929                                 pieces->inst_evtlog_ptr =
1930                                         le32_to_cpup((__le32 *)tlv_data);
1931                         break;
1932                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1933                         if (tlv_len != fixed_tlv_size)
1934                                 ret = -EINVAL;
1935                         else
1936                                 pieces->inst_evtlog_size =
1937                                         le32_to_cpup((__le32 *)tlv_data);
1938                         break;
1939                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1940                         if (tlv_len != fixed_tlv_size)
1941                                 ret = -EINVAL;
1942                         else
1943                                 pieces->inst_errlog_ptr =
1944                                         le32_to_cpup((__le32 *)tlv_data);
1945                         break;
1946                 default:
1947                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1948                         break;
1949                 }
1950         }
1951
1952         if (len) {
1953                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1954                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1955                 ret = -EINVAL;
1956         } else if (ret) {
1957                 IWL_ERR(priv, "TLV %d has invalid size: %u\n",
1958                         tlv_type, tlv_len);
1959                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)tlv_data, tlv_len);
1960         }
1961
1962         return ret;
1963 }
1964
1965 /**
1966  * iwl_ucode_callback - callback when firmware was loaded
1967  *
1968  * If loaded successfully, copies the firmware into buffers
1969  * for the card to fetch (via DMA).
1970  */
1971 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1972 {
1973         struct iwl_priv *priv = context;
1974         struct iwl_ucode_header *ucode;
1975         int err;
1976         struct iwlagn_firmware_pieces pieces;
1977         const unsigned int api_max = priv->cfg->ucode_api_max;
1978         const unsigned int api_min = priv->cfg->ucode_api_min;
1979         u32 api_ver;
1980         char buildstr[25];
1981         u32 build;
1982         struct iwlagn_ucode_capabilities ucode_capa = {
1983                 .max_probe_length = 200,
1984         };
1985
1986         memset(&pieces, 0, sizeof(pieces));
1987
1988         if (!ucode_raw) {
1989                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1990                         priv->firmware_name);
1991                 goto try_again;
1992         }
1993
1994         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1995                        priv->firmware_name, ucode_raw->size);
1996
1997         /* Make sure that we got at least the API version number */
1998         if (ucode_raw->size < 4) {
1999                 IWL_ERR(priv, "File size way too small!\n");
2000                 goto try_again;
2001         }
2002
2003         /* Data from ucode file:  header followed by uCode images */
2004         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2005
2006         if (ucode->ver)
2007                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2008         else
2009                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2010                                            &ucode_capa);
2011
2012         if (err)
2013                 goto try_again;
2014
2015         api_ver = IWL_UCODE_API(priv->ucode_ver);
2016         build = pieces.build;
2017
2018         /*
2019          * api_ver should match the api version forming part of the
2020          * firmware filename ... but we don't check for that and only rely
2021          * on the API version read from firmware header from here on forward
2022          */
2023         if (api_ver < api_min || api_ver > api_max) {
2024                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2025                           "Driver supports v%u, firmware is v%u.\n",
2026                           api_max, api_ver);
2027                 goto try_again;
2028         }
2029
2030         if (api_ver != api_max)
2031                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2032                           "got v%u. New firmware can be obtained "
2033                           "from http://www.intellinuxwireless.org.\n",
2034                           api_max, api_ver);
2035
2036         if (build)
2037                 sprintf(buildstr, " build %u", build);
2038         else
2039                 buildstr[0] = '\0';
2040
2041         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2042                  IWL_UCODE_MAJOR(priv->ucode_ver),
2043                  IWL_UCODE_MINOR(priv->ucode_ver),
2044                  IWL_UCODE_API(priv->ucode_ver),
2045                  IWL_UCODE_SERIAL(priv->ucode_ver),
2046                  buildstr);
2047
2048         snprintf(priv->hw->wiphy->fw_version,
2049                  sizeof(priv->hw->wiphy->fw_version),
2050                  "%u.%u.%u.%u%s",
2051                  IWL_UCODE_MAJOR(priv->ucode_ver),
2052                  IWL_UCODE_MINOR(priv->ucode_ver),
2053                  IWL_UCODE_API(priv->ucode_ver),
2054                  IWL_UCODE_SERIAL(priv->ucode_ver),
2055                  buildstr);
2056
2057         /*
2058          * For any of the failures below (before allocating pci memory)
2059          * we will try to load a version with a smaller API -- maybe the
2060          * user just got a corrupted version of the latest API.
2061          */
2062
2063         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2064                        priv->ucode_ver);
2065         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2066                        pieces.inst_size);
2067         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2068                        pieces.data_size);
2069         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2070                        pieces.init_size);
2071         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2072                        pieces.init_data_size);
2073         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2074                        pieces.boot_size);
2075
2076         /* Verify that uCode images will fit in card's SRAM */
2077         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2078                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2079                         pieces.inst_size);
2080                 goto try_again;
2081         }
2082
2083         if (pieces.data_size > priv->hw_params.max_data_size) {
2084                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2085                         pieces.data_size);
2086                 goto try_again;
2087         }
2088
2089         if (pieces.init_size > priv->hw_params.max_inst_size) {
2090                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2091                         pieces.init_size);
2092                 goto try_again;
2093         }
2094
2095         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2096                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2097                         pieces.init_data_size);
2098                 goto try_again;
2099         }
2100
2101         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2102                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2103                         pieces.boot_size);
2104                 goto try_again;
2105         }
2106
2107         /* Allocate ucode buffers for card's bus-master loading ... */
2108
2109         /* Runtime instructions and 2 copies of data:
2110          * 1) unmodified from disk
2111          * 2) backup cache for save/restore during power-downs */
2112         priv->ucode_code.len = pieces.inst_size;
2113         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2114
2115         priv->ucode_data.len = pieces.data_size;
2116         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2117
2118         priv->ucode_data_backup.len = pieces.data_size;
2119         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2120
2121         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2122             !priv->ucode_data_backup.v_addr)
2123                 goto err_pci_alloc;
2124
2125         /* Initialization instructions and data */
2126         if (pieces.init_size && pieces.init_data_size) {
2127                 priv->ucode_init.len = pieces.init_size;
2128                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2129
2130                 priv->ucode_init_data.len = pieces.init_data_size;
2131                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2132
2133                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2134                         goto err_pci_alloc;
2135         }
2136
2137         /* Bootstrap (instructions only, no data) */
2138         if (pieces.boot_size) {
2139                 priv->ucode_boot.len = pieces.boot_size;
2140                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2141
2142                 if (!priv->ucode_boot.v_addr)
2143                         goto err_pci_alloc;
2144         }
2145
2146         /* Now that we can no longer fail, copy information */
2147
2148         /*
2149          * The (size - 16) / 12 formula is based on the information recorded
2150          * for each event, which is of mode 1 (including timestamp) for all
2151          * new microcodes that include this information.
2152          */
2153         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2154         if (pieces.init_evtlog_size)
2155                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2156         else
2157                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2158         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2159         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2160         if (pieces.inst_evtlog_size)
2161                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2162         else
2163                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2164         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2165
2166         /* Copy images into buffers for card's bus-master reads ... */
2167
2168         /* Runtime instructions (first block of data in file) */
2169         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2170                         pieces.inst_size);
2171         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2172
2173         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2174                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2175
2176         /*
2177          * Runtime data
2178          * NOTE:  Copy into backup buffer will be done in iwl_up()
2179          */
2180         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2181                         pieces.data_size);
2182         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2183         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2184
2185         /* Initialization instructions */
2186         if (pieces.init_size) {
2187                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2188                                 pieces.init_size);
2189                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2190         }
2191
2192         /* Initialization data */
2193         if (pieces.init_data_size) {
2194                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2195                                pieces.init_data_size);
2196                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2197                        pieces.init_data_size);
2198         }
2199
2200         /* Bootstrap instructions */
2201         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2202                         pieces.boot_size);
2203         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2204
2205         /**************************************************
2206          * This is still part of probe() in a sense...
2207          *
2208          * 9. Setup and register with mac80211 and debugfs
2209          **************************************************/
2210         err = iwl_mac_setup_register(priv, &ucode_capa);
2211         if (err)
2212                 goto out_unbind;
2213
2214         err = iwl_dbgfs_register(priv, DRV_NAME);
2215         if (err)
2216                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2217
2218         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2219                                         &iwl_attribute_group);
2220         if (err) {
2221                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2222                 goto out_unbind;
2223         }
2224
2225         /* We have our copies now, allow OS release its copies */
2226         release_firmware(ucode_raw);
2227         complete(&priv->_agn.firmware_loading_complete);
2228         return;
2229
2230  try_again:
2231         /* try next, if any */
2232         if (iwl_request_firmware(priv, false))
2233                 goto out_unbind;
2234         release_firmware(ucode_raw);
2235         return;
2236
2237  err_pci_alloc:
2238         IWL_ERR(priv, "failed to allocate pci memory\n");
2239         iwl_dealloc_ucode_pci(priv);
2240  out_unbind:
2241         complete(&priv->_agn.firmware_loading_complete);
2242         device_release_driver(&priv->pci_dev->dev);
2243         release_firmware(ucode_raw);
2244 }
2245
2246 static const char *desc_lookup_text[] = {
2247         "OK",
2248         "FAIL",
2249         "BAD_PARAM",
2250         "BAD_CHECKSUM",
2251         "NMI_INTERRUPT_WDG",
2252         "SYSASSERT",
2253         "FATAL_ERROR",
2254         "BAD_COMMAND",
2255         "HW_ERROR_TUNE_LOCK",
2256         "HW_ERROR_TEMPERATURE",
2257         "ILLEGAL_CHAN_FREQ",
2258         "VCC_NOT_STABLE",
2259         "FH_ERROR",
2260         "NMI_INTERRUPT_HOST",
2261         "NMI_INTERRUPT_ACTION_PT",
2262         "NMI_INTERRUPT_UNKNOWN",
2263         "UCODE_VERSION_MISMATCH",
2264         "HW_ERROR_ABS_LOCK",
2265         "HW_ERROR_CAL_LOCK_FAIL",
2266         "NMI_INTERRUPT_INST_ACTION_PT",
2267         "NMI_INTERRUPT_DATA_ACTION_PT",
2268         "NMI_TRM_HW_ER",
2269         "NMI_INTERRUPT_TRM",
2270         "NMI_INTERRUPT_BREAK_POINT"
2271         "DEBUG_0",
2272         "DEBUG_1",
2273         "DEBUG_2",
2274         "DEBUG_3",
2275         "ADVANCED SYSASSERT"
2276 };
2277
2278 static const char *desc_lookup(int i)
2279 {
2280         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2281
2282         if (i < 0 || i > max)
2283                 i = max;
2284
2285         return desc_lookup_text[i];
2286 }
2287
2288 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2289 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2290
2291 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2292 {
2293         u32 data2, line;
2294         u32 desc, time, count, base, data1;
2295         u32 blink1, blink2, ilink1, ilink2;
2296         u32 pc, hcmd;
2297
2298         if (priv->ucode_type == UCODE_INIT) {
2299                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2300                 if (!base)
2301                         base = priv->_agn.init_errlog_ptr;
2302         } else {
2303                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2304                 if (!base)
2305                         base = priv->_agn.inst_errlog_ptr;
2306         }
2307
2308         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2309                 IWL_ERR(priv,
2310                         "Not valid error log pointer 0x%08X for %s uCode\n",
2311                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2312                 return;
2313         }
2314
2315         count = iwl_read_targ_mem(priv, base);
2316
2317         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2318                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2319                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2320                         priv->status, count);
2321         }
2322
2323         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2324         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2325         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2326         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2327         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2328         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2329         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2330         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2331         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2332         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2333         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2334
2335         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2336                                       blink1, blink2, ilink1, ilink2);
2337
2338         IWL_ERR(priv, "Desc                                  Time       "
2339                 "data1      data2      line\n");
2340         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2341                 desc_lookup(desc), desc, time, data1, data2, line);
2342         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2343         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2344                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2345 }
2346
2347 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2348
2349 /**
2350  * iwl_print_event_log - Dump error event log to syslog
2351  *
2352  */
2353 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2354                                u32 num_events, u32 mode,
2355                                int pos, char **buf, size_t bufsz)
2356 {
2357         u32 i;
2358         u32 base;       /* SRAM byte address of event log header */
2359         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2360         u32 ptr;        /* SRAM byte address of log data */
2361         u32 ev, time, data; /* event log data */
2362         unsigned long reg_flags;
2363
2364         if (num_events == 0)
2365                 return pos;
2366
2367         if (priv->ucode_type == UCODE_INIT) {
2368                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2369                 if (!base)
2370                         base = priv->_agn.init_evtlog_ptr;
2371         } else {
2372                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2373                 if (!base)
2374                         base = priv->_agn.inst_evtlog_ptr;
2375         }
2376
2377         if (mode == 0)
2378                 event_size = 2 * sizeof(u32);
2379         else
2380                 event_size = 3 * sizeof(u32);
2381
2382         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2383
2384         /* Make sure device is powered up for SRAM reads */
2385         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2386         iwl_grab_nic_access(priv);
2387
2388         /* Set starting address; reads will auto-increment */
2389         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2390         rmb();
2391
2392         /* "time" is actually "data" for mode 0 (no timestamp).
2393         * place event id # at far right for easier visual parsing. */
2394         for (i = 0; i < num_events; i++) {
2395                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2396                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2397                 if (mode == 0) {
2398                         /* data, ev */
2399                         if (bufsz) {
2400                                 pos += scnprintf(*buf + pos, bufsz - pos,
2401                                                 "EVT_LOG:0x%08x:%04u\n",
2402                                                 time, ev);
2403                         } else {
2404                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2405                                         time, ev);
2406                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2407                                         time, ev);
2408                         }
2409                 } else {
2410                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2411                         if (bufsz) {
2412                                 pos += scnprintf(*buf + pos, bufsz - pos,
2413                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2414                                                  time, data, ev);
2415                         } else {
2416                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2417                                         time, data, ev);
2418                                 trace_iwlwifi_dev_ucode_event(priv, time,
2419                                         data, ev);
2420                         }
2421                 }
2422         }
2423
2424         /* Allow device to power down */
2425         iwl_release_nic_access(priv);
2426         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2427         return pos;
2428 }
2429
2430 /**
2431  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2432  */
2433 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2434                                     u32 num_wraps, u32 next_entry,
2435                                     u32 size, u32 mode,
2436                                     int pos, char **buf, size_t bufsz)
2437 {
2438         /*
2439          * display the newest DEFAULT_LOG_ENTRIES entries
2440          * i.e the entries just before the next ont that uCode would fill.
2441          */
2442         if (num_wraps) {
2443                 if (next_entry < size) {
2444                         pos = iwl_print_event_log(priv,
2445                                                 capacity - (size - next_entry),
2446                                                 size - next_entry, mode,
2447                                                 pos, buf, bufsz);
2448                         pos = iwl_print_event_log(priv, 0,
2449                                                   next_entry, mode,
2450                                                   pos, buf, bufsz);
2451                 } else
2452                         pos = iwl_print_event_log(priv, next_entry - size,
2453                                                   size, mode, pos, buf, bufsz);
2454         } else {
2455                 if (next_entry < size) {
2456                         pos = iwl_print_event_log(priv, 0, next_entry,
2457                                                   mode, pos, buf, bufsz);
2458                 } else {
2459                         pos = iwl_print_event_log(priv, next_entry - size,
2460                                                   size, mode, pos, buf, bufsz);
2461                 }
2462         }
2463         return pos;
2464 }
2465
2466 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2467
2468 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2469                             char **buf, bool display)
2470 {
2471         u32 base;       /* SRAM byte address of event log header */
2472         u32 capacity;   /* event log capacity in # entries */
2473         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2474         u32 num_wraps;  /* # times uCode wrapped to top of log */
2475         u32 next_entry; /* index of next entry to be written by uCode */
2476         u32 size;       /* # entries that we'll print */
2477         u32 logsize;
2478         int pos = 0;
2479         size_t bufsz = 0;
2480
2481         if (priv->ucode_type == UCODE_INIT) {
2482                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2483                 logsize = priv->_agn.init_evtlog_size;
2484                 if (!base)
2485                         base = priv->_agn.init_evtlog_ptr;
2486         } else {
2487                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2488                 logsize = priv->_agn.inst_evtlog_size;
2489                 if (!base)
2490                         base = priv->_agn.inst_evtlog_ptr;
2491         }
2492
2493         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2494                 IWL_ERR(priv,
2495                         "Invalid event log pointer 0x%08X for %s uCode\n",
2496                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2497                 return -EINVAL;
2498         }
2499
2500         /* event log header */
2501         capacity = iwl_read_targ_mem(priv, base);
2502         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2503         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2504         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2505
2506         if (capacity > logsize) {
2507                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2508                         capacity, logsize);
2509                 capacity = logsize;
2510         }
2511
2512         if (next_entry > logsize) {
2513                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2514                         next_entry, logsize);
2515                 next_entry = logsize;
2516         }
2517
2518         size = num_wraps ? capacity : next_entry;
2519
2520         /* bail out if nothing in log */
2521         if (size == 0) {
2522                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2523                 return pos;
2524         }
2525
2526 #ifdef CONFIG_IWLWIFI_DEBUG
2527         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2528                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2529                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2530 #else
2531         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2532                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2533 #endif
2534         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2535                 size);
2536
2537 #ifdef CONFIG_IWLWIFI_DEBUG
2538         if (display) {
2539                 if (full_log)
2540                         bufsz = capacity * 48;
2541                 else
2542                         bufsz = size * 48;
2543                 *buf = kmalloc(bufsz, GFP_KERNEL);
2544                 if (!*buf)
2545                         return -ENOMEM;
2546         }
2547         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2548                 /*
2549                  * if uCode has wrapped back to top of log,
2550                  * start at the oldest entry,
2551                  * i.e the next one that uCode would fill.
2552                  */
2553                 if (num_wraps)
2554                         pos = iwl_print_event_log(priv, next_entry,
2555                                                 capacity - next_entry, mode,
2556                                                 pos, buf, bufsz);
2557                 /* (then/else) start at top of log */
2558                 pos = iwl_print_event_log(priv, 0,
2559                                           next_entry, mode, pos, buf, bufsz);
2560         } else
2561                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2562                                                 next_entry, size, mode,
2563                                                 pos, buf, bufsz);
2564 #else
2565         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2566                                         next_entry, size, mode,
2567                                         pos, buf, bufsz);
2568 #endif
2569         return pos;
2570 }
2571
2572 /**
2573  * iwl_alive_start - called after REPLY_ALIVE notification received
2574  *                   from protocol/runtime uCode (initialization uCode's
2575  *                   Alive gets handled by iwl_init_alive_start()).
2576  */
2577 static void iwl_alive_start(struct iwl_priv *priv)
2578 {
2579         int ret = 0;
2580
2581         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2582
2583         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2584                 /* We had an error bringing up the hardware, so take it
2585                  * all the way back down so we can try again */
2586                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2587                 goto restart;
2588         }
2589
2590         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2591          * This is a paranoid check, because we would not have gotten the
2592          * "runtime" alive if code weren't properly loaded.  */
2593         if (iwl_verify_ucode(priv)) {
2594                 /* Runtime instruction load was bad;
2595                  * take it all the way back down so we can try again */
2596                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2597                 goto restart;
2598         }
2599
2600         ret = priv->cfg->ops->lib->alive_notify(priv);
2601         if (ret) {
2602                 IWL_WARN(priv,
2603                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2604                 goto restart;
2605         }
2606
2607         /* After the ALIVE response, we can send host commands to the uCode */
2608         set_bit(STATUS_ALIVE, &priv->status);
2609
2610         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2611                 /* Enable timer to monitor the driver queues */
2612                 mod_timer(&priv->monitor_recover,
2613                         jiffies +
2614                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2615         }
2616
2617         if (iwl_is_rfkill(priv))
2618                 return;
2619
2620         ieee80211_wake_queues(priv->hw);
2621
2622         priv->active_rate = IWL_RATES_MASK;
2623
2624         /* Configure Tx antenna selection based on H/W config */
2625         if (priv->cfg->ops->hcmd->set_tx_ant)
2626                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2627
2628         if (iwl_is_associated(priv)) {
2629                 struct iwl_rxon_cmd *active_rxon =
2630                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2631                 /* apply any changes in staging */
2632                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2633                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2634         } else {
2635                 /* Initialize our rx_config data */
2636                 iwl_connection_init_rx_config(priv, NULL);
2637
2638                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2639                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2640         }
2641
2642         /* Configure Bluetooth device coexistence support */
2643         priv->cfg->ops->hcmd->send_bt_config(priv);
2644
2645         iwl_reset_run_time_calib(priv);
2646
2647         /* Configure the adapter for unassociated operation */
2648         iwlcore_commit_rxon(priv);
2649
2650         /* At this point, the NIC is initialized and operational */
2651         iwl_rf_kill_ct_config(priv);
2652
2653         iwl_leds_init(priv);
2654
2655         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2656         set_bit(STATUS_READY, &priv->status);
2657         wake_up_interruptible(&priv->wait_command_queue);
2658
2659         iwl_power_update_mode(priv, true);
2660         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2661
2662
2663         return;
2664
2665  restart:
2666         queue_work(priv->workqueue, &priv->restart);
2667 }
2668
2669 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2670
2671 static void __iwl_down(struct iwl_priv *priv)
2672 {
2673         unsigned long flags;
2674         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2675
2676         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2677
2678         if (!exit_pending)
2679                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2680
2681         iwl_clear_ucode_stations(priv);
2682         iwl_dealloc_bcast_station(priv);
2683         iwl_clear_driver_stations(priv);
2684
2685         /* Unblock any waiting calls */
2686         wake_up_interruptible_all(&priv->wait_command_queue);
2687
2688         /* Wipe out the EXIT_PENDING status bit if we are not actually
2689          * exiting the module */
2690         if (!exit_pending)
2691                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2692
2693         /* stop and reset the on-board processor */
2694         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2695
2696         /* tell the device to stop sending interrupts */
2697         spin_lock_irqsave(&priv->lock, flags);
2698         iwl_disable_interrupts(priv);
2699         spin_unlock_irqrestore(&priv->lock, flags);
2700         iwl_synchronize_irq(priv);
2701
2702         if (priv->mac80211_registered)
2703                 ieee80211_stop_queues(priv->hw);
2704
2705         /* If we have not previously called iwl_init() then
2706          * clear all bits but the RF Kill bit and return */
2707         if (!iwl_is_init(priv)) {
2708                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2709                                         STATUS_RF_KILL_HW |
2710                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2711                                         STATUS_GEO_CONFIGURED |
2712                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2713                                         STATUS_EXIT_PENDING;
2714                 goto exit;
2715         }
2716
2717         /* ...otherwise clear out all the status bits but the RF Kill
2718          * bit and continue taking the NIC down. */
2719         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2720                                 STATUS_RF_KILL_HW |
2721                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2722                                 STATUS_GEO_CONFIGURED |
2723                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2724                                 STATUS_FW_ERROR |
2725                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2726                                 STATUS_EXIT_PENDING;
2727
2728         /* device going down, Stop using ICT table */
2729         iwl_disable_ict(priv);
2730
2731         iwlagn_txq_ctx_stop(priv);
2732         iwlagn_rxq_stop(priv);
2733
2734         /* Power-down device's busmaster DMA clocks */
2735         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2736         udelay(5);
2737
2738         /* Make sure (redundant) we've released our request to stay awake */
2739         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2740
2741         /* Stop the device, and put it in low power state */
2742         priv->cfg->ops->lib->apm_ops.stop(priv);
2743
2744  exit:
2745         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2746
2747         if (priv->ibss_beacon)
2748                 dev_kfree_skb(priv->ibss_beacon);
2749         priv->ibss_beacon = NULL;
2750
2751         /* clear out any free frames */
2752         iwl_clear_free_frames(priv);
2753 }
2754
2755 static void iwl_down(struct iwl_priv *priv)
2756 {
2757         mutex_lock(&priv->mutex);
2758         __iwl_down(priv);
2759         mutex_unlock(&priv->mutex);
2760
2761         iwl_cancel_deferred_work(priv);
2762 }
2763
2764 #define HW_READY_TIMEOUT (50)
2765
2766 static int iwl_set_hw_ready(struct iwl_priv *priv)
2767 {
2768         int ret = 0;
2769
2770         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2771                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2772
2773         /* See if we got it */
2774         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2775                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2776                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2777                                 HW_READY_TIMEOUT);
2778         if (ret != -ETIMEDOUT)
2779                 priv->hw_ready = true;
2780         else
2781                 priv->hw_ready = false;
2782
2783         IWL_DEBUG_INFO(priv, "hardware %s\n",
2784                       (priv->hw_ready == 1) ? "ready" : "not ready");
2785         return ret;
2786 }
2787
2788 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2789 {
2790         int ret = 0;
2791
2792         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2793
2794         ret = iwl_set_hw_ready(priv);
2795         if (priv->hw_ready)
2796                 return ret;
2797
2798         /* If HW is not ready, prepare the conditions to check again */
2799         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2800                         CSR_HW_IF_CONFIG_REG_PREPARE);
2801
2802         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2803                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2804                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2805
2806         /* HW should be ready by now, check again. */
2807         if (ret != -ETIMEDOUT)
2808                 iwl_set_hw_ready(priv);
2809
2810         return ret;
2811 }
2812
2813 #define MAX_HW_RESTARTS 5
2814
2815 static int __iwl_up(struct iwl_priv *priv)
2816 {
2817         int i;
2818         int ret;
2819
2820         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2821                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2822                 return -EIO;
2823         }
2824
2825         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2826                 IWL_ERR(priv, "ucode not available for device bringup\n");
2827                 return -EIO;
2828         }
2829
2830         ret = iwl_alloc_bcast_station(priv, true);
2831         if (ret)
2832                 return ret;
2833
2834         iwl_prepare_card_hw(priv);
2835
2836         if (!priv->hw_ready) {
2837                 IWL_WARN(priv, "Exit HW not ready\n");
2838                 return -EIO;
2839         }
2840
2841         /* If platform's RF_KILL switch is NOT set to KILL */
2842         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2843                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2844         else
2845                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2846
2847         if (iwl_is_rfkill(priv)) {
2848                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2849
2850                 iwl_enable_interrupts(priv);
2851                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2852                 return 0;
2853         }
2854
2855         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2856
2857         ret = iwlagn_hw_nic_init(priv);
2858         if (ret) {
2859                 IWL_ERR(priv, "Unable to init nic\n");
2860                 return ret;
2861         }
2862
2863         /* make sure rfkill handshake bits are cleared */
2864         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2865         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2866                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2867
2868         /* clear (again), then enable host interrupts */
2869         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2870         iwl_enable_interrupts(priv);
2871
2872         /* really make sure rfkill handshake bits are cleared */
2873         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2874         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2875
2876         /* Copy original ucode data image from disk into backup cache.
2877          * This will be used to initialize the on-board processor's
2878          * data SRAM for a clean start when the runtime program first loads. */
2879         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2880                priv->ucode_data.len);
2881
2882         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2883
2884                 /* load bootstrap state machine,
2885                  * load bootstrap program into processor's memory,
2886                  * prepare to load the "initialize" uCode */
2887                 ret = priv->cfg->ops->lib->load_ucode(priv);
2888
2889                 if (ret) {
2890                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2891                                 ret);
2892                         continue;
2893                 }
2894
2895                 /* start card; "initialize" will load runtime ucode */
2896                 iwl_nic_start(priv);
2897
2898                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2899
2900                 return 0;
2901         }
2902
2903         set_bit(STATUS_EXIT_PENDING, &priv->status);
2904         __iwl_down(priv);
2905         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2906
2907         /* tried to restart and config the device for as long as our
2908          * patience could withstand */
2909         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2910         return -EIO;
2911 }
2912
2913
2914 /*****************************************************************************
2915  *
2916  * Workqueue callbacks
2917  *
2918  *****************************************************************************/
2919
2920 static void iwl_bg_init_alive_start(struct work_struct *data)
2921 {
2922         struct iwl_priv *priv =
2923             container_of(data, struct iwl_priv, init_alive_start.work);
2924
2925         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2926                 return;
2927
2928         mutex_lock(&priv->mutex);
2929         priv->cfg->ops->lib->init_alive_start(priv);
2930         mutex_unlock(&priv->mutex);
2931 }
2932
2933 static void iwl_bg_alive_start(struct work_struct *data)
2934 {
2935         struct iwl_priv *priv =
2936             container_of(data, struct iwl_priv, alive_start.work);
2937
2938         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2939                 return;
2940
2941         /* enable dram interrupt */
2942         iwl_reset_ict(priv);
2943
2944         mutex_lock(&priv->mutex);
2945         iwl_alive_start(priv);
2946         mutex_unlock(&priv->mutex);
2947 }
2948
2949 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2950 {
2951         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2952                         run_time_calib_work);
2953
2954         mutex_lock(&priv->mutex);
2955
2956         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2957             test_bit(STATUS_SCANNING, &priv->status)) {
2958                 mutex_unlock(&priv->mutex);
2959                 return;
2960         }
2961
2962         if (priv->start_calib) {
2963                 iwl_chain_noise_calibration(priv, &priv->_agn.statistics);
2964
2965                 iwl_sensitivity_calibration(priv, &priv->_agn.statistics);
2966         }
2967
2968         mutex_unlock(&priv->mutex);
2969 }
2970
2971 static void iwl_bg_restart(struct work_struct *data)
2972 {
2973         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2974
2975         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2976                 return;
2977
2978         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2979                 mutex_lock(&priv->mutex);
2980                 priv->vif = NULL;
2981                 priv->is_open = 0;
2982                 mutex_unlock(&priv->mutex);
2983                 iwl_down(priv);
2984                 ieee80211_restart_hw(priv->hw);
2985         } else {
2986                 iwl_down(priv);
2987
2988                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2989                         return;
2990
2991                 mutex_lock(&priv->mutex);
2992                 __iwl_up(priv);
2993                 mutex_unlock(&priv->mutex);
2994         }
2995 }
2996
2997 static void iwl_bg_rx_replenish(struct work_struct *data)
2998 {
2999         struct iwl_priv *priv =
3000             container_of(data, struct iwl_priv, rx_replenish);
3001
3002         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3003                 return;
3004
3005         mutex_lock(&priv->mutex);
3006         iwlagn_rx_replenish(priv);
3007         mutex_unlock(&priv->mutex);
3008 }
3009
3010 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3011
3012 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3013 {
3014         struct ieee80211_conf *conf = NULL;
3015         int ret = 0;
3016
3017         if (!vif || !priv->is_open)
3018                 return;
3019
3020         if (vif->type == NL80211_IFTYPE_AP) {
3021                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3022                 return;
3023         }
3024
3025         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3026                 return;
3027
3028         iwl_scan_cancel_timeout(priv, 200);
3029
3030         conf = ieee80211_get_hw_conf(priv->hw);
3031
3032         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3033         iwlcore_commit_rxon(priv);
3034
3035         iwl_setup_rxon_timing(priv, vif);
3036         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3037                               sizeof(priv->rxon_timing), &priv->rxon_timing);
3038         if (ret)
3039                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3040                             "Attempting to continue.\n");
3041
3042         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3043
3044         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3045
3046         if (priv->cfg->ops->hcmd->set_rxon_chain)
3047                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3048
3049         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3050
3051         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3052                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3053
3054         if (vif->bss_conf.use_short_preamble)
3055                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3056         else
3057                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3058
3059         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3060                 if (vif->bss_conf.use_short_slot)
3061                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3062                 else
3063                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3064         }
3065
3066         iwlcore_commit_rxon(priv);
3067
3068         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3069                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3070
3071         switch (vif->type) {
3072         case NL80211_IFTYPE_STATION:
3073                 break;
3074         case NL80211_IFTYPE_ADHOC:
3075                 iwl_send_beacon_cmd(priv);
3076                 break;
3077         default:
3078                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3079                           __func__, vif->type);
3080                 break;
3081         }
3082
3083         /* the chain noise calibration will enabled PM upon completion
3084          * If chain noise has already been run, then we need to enable
3085          * power management here */
3086         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3087                 iwl_power_update_mode(priv, false);
3088
3089         /* Enable Rx differential gain and sensitivity calibrations */
3090         iwl_chain_noise_reset(priv);
3091         priv->start_calib = 1;
3092
3093 }
3094
3095 /*****************************************************************************
3096  *
3097  * mac80211 entry point functions
3098  *
3099  *****************************************************************************/
3100
3101 #define UCODE_READY_TIMEOUT     (4 * HZ)
3102
3103 /*
3104  * Not a mac80211 entry point function, but it fits in with all the
3105  * other mac80211 functions grouped here.
3106  */
3107 static int iwl_mac_setup_register(struct iwl_priv *priv,
3108                                   struct iwlagn_ucode_capabilities *capa)
3109 {
3110         int ret;
3111         struct ieee80211_hw *hw = priv->hw;
3112         hw->rate_control_algorithm = "iwl-agn-rs";
3113
3114         /* Tell mac80211 our characteristics */
3115         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3116                     IEEE80211_HW_AMPDU_AGGREGATION |
3117                     IEEE80211_HW_SPECTRUM_MGMT;
3118
3119         if (!priv->cfg->broken_powersave)
3120                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3121                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3122
3123         if (priv->cfg->sku & IWL_SKU_N)
3124                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3125                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3126
3127         hw->sta_data_size = sizeof(struct iwl_station_priv);
3128         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3129
3130         hw->wiphy->interface_modes =
3131                 BIT(NL80211_IFTYPE_STATION) |
3132                 BIT(NL80211_IFTYPE_ADHOC);
3133
3134         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3135                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3136
3137         /*
3138          * For now, disable PS by default because it affects
3139          * RX performance significantly.
3140          */
3141         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3142
3143         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3144         /* we create the 802.11 header and a zero-length SSID element */
3145         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3146
3147         /* Default value; 4 EDCA QOS priorities */
3148         hw->queues = 4;
3149
3150         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3151
3152         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3153                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3154                         &priv->bands[IEEE80211_BAND_2GHZ];
3155         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3156                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3157                         &priv->bands[IEEE80211_BAND_5GHZ];
3158
3159         ret = ieee80211_register_hw(priv->hw);
3160         if (ret) {
3161                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3162                 return ret;
3163         }
3164         priv->mac80211_registered = 1;
3165
3166         return 0;
3167 }
3168
3169
3170 static int iwl_mac_start(struct ieee80211_hw *hw)
3171 {
3172         struct iwl_priv *priv = hw->priv;
3173         int ret;
3174
3175         IWL_DEBUG_MAC80211(priv, "enter\n");
3176
3177         /* we should be verifying the device is ready to be opened */
3178         mutex_lock(&priv->mutex);
3179         ret = __iwl_up(priv);
3180         mutex_unlock(&priv->mutex);
3181
3182         if (ret)
3183                 return ret;
3184
3185         if (iwl_is_rfkill(priv))
3186                 goto out;
3187
3188         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3189
3190         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3191          * mac80211 will not be run successfully. */
3192         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3193                         test_bit(STATUS_READY, &priv->status),
3194                         UCODE_READY_TIMEOUT);
3195         if (!ret) {
3196                 if (!test_bit(STATUS_READY, &priv->status)) {
3197                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3198                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3199                         return -ETIMEDOUT;
3200                 }
3201         }
3202
3203         iwl_led_start(priv);
3204
3205 out:
3206         priv->is_open = 1;
3207         IWL_DEBUG_MAC80211(priv, "leave\n");
3208         return 0;
3209 }
3210
3211 static void iwl_mac_stop(struct ieee80211_hw *hw)
3212 {
3213         struct iwl_priv *priv = hw->priv;
3214
3215         IWL_DEBUG_MAC80211(priv, "enter\n");
3216
3217         if (!priv->is_open)
3218                 return;
3219
3220         priv->is_open = 0;
3221
3222         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3223                 /* stop mac, cancel any scan request and clear
3224                  * RXON_FILTER_ASSOC_MSK BIT
3225                  */
3226                 mutex_lock(&priv->mutex);
3227                 iwl_scan_cancel_timeout(priv, 100);
3228                 mutex_unlock(&priv->mutex);
3229         }
3230
3231         iwl_down(priv);
3232
3233         flush_workqueue(priv->workqueue);
3234
3235         /* enable interrupts again in order to receive rfkill changes */
3236         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3237         iwl_enable_interrupts(priv);
3238
3239         IWL_DEBUG_MAC80211(priv, "leave\n");
3240 }
3241
3242 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3243 {
3244         struct iwl_priv *priv = hw->priv;
3245
3246         IWL_DEBUG_MACDUMP(priv, "enter\n");
3247
3248         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3249                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3250
3251         if (iwlagn_tx_skb(priv, skb))
3252                 dev_kfree_skb_any(skb);
3253
3254         IWL_DEBUG_MACDUMP(priv, "leave\n");
3255         return NETDEV_TX_OK;
3256 }
3257
3258 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3259 {
3260         int ret = 0;
3261
3262         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3263                 return;
3264
3265         /* The following should be done only at AP bring up */
3266         if (!iwl_is_associated(priv)) {
3267
3268                 /* RXON - unassoc (to set timing command) */
3269                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3270                 iwlcore_commit_rxon(priv);
3271
3272                 /* RXON Timing */
3273                 iwl_setup_rxon_timing(priv, vif);
3274                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3275                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3276                 if (ret)
3277                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3278                                         "Attempting to continue.\n");
3279
3280                 /* AP has all antennas */
3281                 priv->chain_noise_data.active_chains =
3282                         priv->hw_params.valid_rx_ant;
3283                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3284                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3285                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3286
3287                 priv->staging_rxon.assoc_id = 0;
3288
3289                 if (vif->bss_conf.use_short_preamble)
3290                         priv->staging_rxon.flags |=
3291                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3292                 else
3293                         priv->staging_rxon.flags &=
3294                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3295
3296                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3297                         if (vif->bss_conf.use_short_slot)
3298                                 priv->staging_rxon.flags |=
3299                                         RXON_FLG_SHORT_SLOT_MSK;
3300                         else
3301                                 priv->staging_rxon.flags &=
3302                                         ~RXON_FLG_SHORT_SLOT_MSK;
3303                 }
3304                 /* restore RXON assoc */
3305                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3306                 iwlcore_commit_rxon(priv);
3307         }
3308         iwl_send_beacon_cmd(priv);
3309
3310         /* FIXME - we need to add code here to detect a totally new
3311          * configuration, reset the AP, unassoc, rxon timing, assoc,
3312          * clear sta table, add BCAST sta... */
3313 }
3314
3315 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3316                                     struct ieee80211_vif *vif,
3317                                     struct ieee80211_key_conf *keyconf,
3318                                     struct ieee80211_sta *sta,
3319                                     u32 iv32, u16 *phase1key)
3320 {
3321
3322         struct iwl_priv *priv = hw->priv;
3323         IWL_DEBUG_MAC80211(priv, "enter\n");
3324
3325         iwl_update_tkip_key(priv, keyconf, sta,
3326                             iv32, phase1key);
3327
3328         IWL_DEBUG_MAC80211(priv, "leave\n");
3329 }
3330
3331 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3332                            struct ieee80211_vif *vif,
3333                            struct ieee80211_sta *sta,
3334                            struct ieee80211_key_conf *key)
3335 {
3336         struct iwl_priv *priv = hw->priv;
3337         int ret;
3338         u8 sta_id;
3339         bool is_default_wep_key = false;
3340
3341         IWL_DEBUG_MAC80211(priv, "enter\n");
3342
3343         if (priv->cfg->mod_params->sw_crypto) {
3344                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3345                 return -EOPNOTSUPP;
3346         }
3347
3348         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3349         if (sta_id == IWL_INVALID_STATION)
3350                 return -EINVAL;
3351
3352         mutex_lock(&priv->mutex);
3353         iwl_scan_cancel_timeout(priv, 100);
3354
3355         /*
3356          * If we are getting WEP group key and we didn't receive any key mapping
3357          * so far, we are in legacy wep mode (group key only), otherwise we are
3358          * in 1X mode.
3359          * In legacy wep mode, we use another host command to the uCode.
3360          */
3361         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3362                 if (cmd == SET_KEY)
3363                         is_default_wep_key = !priv->key_mapping_key;
3364                 else
3365                         is_default_wep_key =
3366                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3367         }
3368
3369         switch (cmd) {
3370         case SET_KEY:
3371                 if (is_default_wep_key)
3372                         ret = iwl_set_default_wep_key(priv, key);
3373                 else
3374                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3375
3376                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3377                 break;
3378         case DISABLE_KEY:
3379                 if (is_default_wep_key)
3380                         ret = iwl_remove_default_wep_key(priv, key);
3381                 else
3382                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3383
3384                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3385                 break;
3386         default:
3387                 ret = -EINVAL;
3388         }
3389
3390         mutex_unlock(&priv->mutex);
3391         IWL_DEBUG_MAC80211(priv, "leave\n");
3392
3393         return ret;
3394 }
3395
3396 /*
3397  * switch to RTS/CTS for TX
3398  */
3399 static void iwl_enable_rts_cts(struct iwl_priv *priv)
3400 {
3401
3402         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3403                 return;
3404
3405         priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
3406         if (!test_bit(STATUS_SCANNING, &priv->status)) {
3407                 IWL_DEBUG_INFO(priv, "use RTS/CTS protection\n");
3408                 iwlcore_commit_rxon(priv);
3409         } else {
3410                 /* scanning, defer the request until scan completed */
3411                 IWL_DEBUG_INFO(priv, "defer setting RTS/CTS protection\n");
3412         }
3413 }
3414
3415 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3416                                 struct ieee80211_vif *vif,
3417                                 enum ieee80211_ampdu_mlme_action action,
3418                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3419 {
3420         struct iwl_priv *priv = hw->priv;
3421         int ret = -EINVAL;
3422
3423         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3424                      sta->addr, tid);
3425
3426         if (!(priv->cfg->sku & IWL_SKU_N))
3427                 return -EACCES;
3428
3429         mutex_lock(&priv->mutex);
3430
3431         switch (action) {
3432         case IEEE80211_AMPDU_RX_START:
3433                 IWL_DEBUG_HT(priv, "start Rx\n");
3434                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3435                 break;
3436         case IEEE80211_AMPDU_RX_STOP:
3437                 IWL_DEBUG_HT(priv, "stop Rx\n");
3438                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3439                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3440                         ret = 0;
3441                 break;
3442         case IEEE80211_AMPDU_TX_START:
3443                 IWL_DEBUG_HT(priv, "start Tx\n");
3444                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3445                 if (ret == 0) {
3446                         priv->_agn.agg_tids_count++;
3447                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3448                                      priv->_agn.agg_tids_count);
3449                 }
3450                 break;
3451         case IEEE80211_AMPDU_TX_STOP:
3452                 IWL_DEBUG_HT(priv, "stop Tx\n");
3453                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3454                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3455                         priv->_agn.agg_tids_count--;
3456                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3457                                      priv->_agn.agg_tids_count);
3458                 }
3459                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3460                         ret = 0;
3461                 break;
3462         case IEEE80211_AMPDU_TX_OPERATIONAL:
3463                 if (priv->cfg->use_rts_for_ht) {
3464                         /*
3465                          * switch to RTS/CTS if it is the prefer protection
3466                          * method for HT traffic
3467                          */
3468                         iwl_enable_rts_cts(priv);
3469                 }
3470                 ret = 0;
3471                 break;
3472         }
3473         mutex_unlock(&priv->mutex);
3474
3475         return ret;
3476 }
3477
3478 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3479                                struct ieee80211_vif *vif,
3480                                enum sta_notify_cmd cmd,
3481                                struct ieee80211_sta *sta)
3482 {
3483         struct iwl_priv *priv = hw->priv;
3484         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3485         int sta_id;
3486
3487         switch (cmd) {
3488         case STA_NOTIFY_SLEEP:
3489                 WARN_ON(!sta_priv->client);
3490                 sta_priv->asleep = true;
3491                 if (atomic_read(&sta_priv->pending_frames) > 0)
3492                         ieee80211_sta_block_awake(hw, sta, true);
3493                 break;
3494         case STA_NOTIFY_AWAKE:
3495                 WARN_ON(!sta_priv->client);
3496                 if (!sta_priv->asleep)
3497                         break;
3498                 sta_priv->asleep = false;
3499                 sta_id = iwl_sta_id(sta);
3500                 if (sta_id != IWL_INVALID_STATION)
3501                         iwl_sta_modify_ps_wake(priv, sta_id);
3502                 break;
3503         default:
3504                 break;
3505         }
3506 }
3507
3508 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3509                               struct ieee80211_vif *vif,
3510                               struct ieee80211_sta *sta)
3511 {
3512         struct iwl_priv *priv = hw->priv;
3513         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3514         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3515         int ret;
3516         u8 sta_id;
3517
3518         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3519                         sta->addr);
3520         mutex_lock(&priv->mutex);
3521         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3522                         sta->addr);
3523         sta_priv->common.sta_id = IWL_INVALID_STATION;
3524
3525         atomic_set(&sta_priv->pending_frames, 0);
3526         if (vif->type == NL80211_IFTYPE_AP)
3527                 sta_priv->client = true;
3528
3529         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3530                                      &sta_id);
3531         if (ret) {
3532                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3533                         sta->addr, ret);
3534                 /* Should we return success if return code is EEXIST ? */
3535                 mutex_unlock(&priv->mutex);
3536                 return ret;
3537         }
3538
3539         sta_priv->common.sta_id = sta_id;
3540
3541         /* Initialize rate scaling */
3542         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3543                        sta->addr);
3544         iwl_rs_rate_init(priv, sta, sta_id);
3545         mutex_unlock(&priv->mutex);
3546
3547         return 0;
3548 }
3549
3550 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3551                                    struct ieee80211_channel_switch *ch_switch)
3552 {
3553         struct iwl_priv *priv = hw->priv;
3554         const struct iwl_channel_info *ch_info;
3555         struct ieee80211_conf *conf = &hw->conf;
3556         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3557         u16 ch;
3558         unsigned long flags = 0;
3559
3560         IWL_DEBUG_MAC80211(priv, "enter\n");
3561
3562         if (iwl_is_rfkill(priv))
3563                 goto out_exit;
3564
3565         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3566             test_bit(STATUS_SCANNING, &priv->status))
3567                 goto out_exit;
3568
3569         if (!iwl_is_associated(priv))
3570                 goto out_exit;
3571
3572         /* channel switch in progress */
3573         if (priv->switch_rxon.switch_in_progress == true)
3574                 goto out_exit;
3575
3576         mutex_lock(&priv->mutex);
3577         if (priv->cfg->ops->lib->set_channel_switch) {
3578
3579                 ch = ieee80211_frequency_to_channel(
3580                         ch_switch->channel->center_freq);
3581                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3582                         ch_info = iwl_get_channel_info(priv,
3583                                                        conf->channel->band,
3584                                                        ch);
3585                         if (!is_channel_valid(ch_info)) {
3586                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3587                                 goto out;
3588                         }
3589                         spin_lock_irqsave(&priv->lock, flags);
3590
3591                         priv->current_ht_config.smps = conf->smps_mode;
3592
3593                         /* Configure HT40 channels */
3594                         ht_conf->is_ht = conf_is_ht(conf);
3595                         if (ht_conf->is_ht) {
3596                                 if (conf_is_ht40_minus(conf)) {
3597                                         ht_conf->extension_chan_offset =
3598                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3599                                         ht_conf->is_40mhz = true;
3600                                 } else if (conf_is_ht40_plus(conf)) {
3601                                         ht_conf->extension_chan_offset =
3602                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3603                                         ht_conf->is_40mhz = true;
3604                                 } else {
3605                                         ht_conf->extension_chan_offset =
3606                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3607                                         ht_conf->is_40mhz = false;
3608                                 }
3609                         } else
3610                                 ht_conf->is_40mhz = false;
3611
3612                         /* if we are switching from ht to 2.4 clear flags
3613                          * from any ht related info since 2.4 does not
3614                          * support ht */
3615                         if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3616                                 priv->staging_rxon.flags = 0;
3617
3618                         iwl_set_rxon_channel(priv, conf->channel);
3619                         iwl_set_rxon_ht(priv, ht_conf);
3620                         iwl_set_flags_for_band(priv, conf->channel->band,
3621                                                priv->vif);
3622                         spin_unlock_irqrestore(&priv->lock, flags);
3623
3624                         iwl_set_rate(priv);
3625                         /*
3626                          * at this point, staging_rxon has the
3627                          * configuration for channel switch
3628                          */
3629                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3630                                                                     ch_switch))
3631                                 priv->switch_rxon.switch_in_progress = false;
3632                 }
3633         }
3634 out:
3635         mutex_unlock(&priv->mutex);
3636 out_exit:
3637         if (!priv->switch_rxon.switch_in_progress)
3638                 ieee80211_chswitch_done(priv->vif, false);
3639         IWL_DEBUG_MAC80211(priv, "leave\n");
3640 }
3641
3642 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3643 {
3644         struct iwl_priv *priv = hw->priv;
3645
3646         mutex_lock(&priv->mutex);
3647         IWL_DEBUG_MAC80211(priv, "enter\n");
3648
3649         /* do not support "flush" */
3650         if (!priv->cfg->ops->lib->txfifo_flush)
3651                 goto done;
3652
3653         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3654                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3655                 goto done;
3656         }
3657         if (iwl_is_rfkill(priv)) {
3658                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3659                 goto done;
3660         }
3661
3662         /*
3663          * mac80211 will not push any more frames for transmit
3664          * until the flush is completed
3665          */
3666         if (drop) {
3667                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3668                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3669                         IWL_ERR(priv, "flush request fail\n");
3670                         goto done;
3671                 }
3672         }
3673         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3674         iwlagn_wait_tx_queue_empty(priv);
3675 done:
3676         mutex_unlock(&priv->mutex);
3677         IWL_DEBUG_MAC80211(priv, "leave\n");
3678 }
3679
3680 /*****************************************************************************
3681  *
3682  * driver setup and teardown
3683  *
3684  *****************************************************************************/
3685
3686 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3687 {
3688         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3689
3690         init_waitqueue_head(&priv->wait_command_queue);
3691
3692         INIT_WORK(&priv->restart, iwl_bg_restart);
3693         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3694         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3695         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3696         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3697         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3698
3699         iwl_setup_scan_deferred_work(priv);
3700
3701         if (priv->cfg->ops->lib->setup_deferred_work)
3702                 priv->cfg->ops->lib->setup_deferred_work(priv);
3703
3704         init_timer(&priv->statistics_periodic);
3705         priv->statistics_periodic.data = (unsigned long)priv;
3706         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3707
3708         init_timer(&priv->ucode_trace);
3709         priv->ucode_trace.data = (unsigned long)priv;
3710         priv->ucode_trace.function = iwl_bg_ucode_trace;
3711
3712         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3713                 init_timer(&priv->monitor_recover);
3714                 priv->monitor_recover.data = (unsigned long)priv;
3715                 priv->monitor_recover.function =
3716                         priv->cfg->ops->lib->recover_from_tx_stall;
3717         }
3718
3719         if (!priv->cfg->use_isr_legacy)
3720                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3721                         iwl_irq_tasklet, (unsigned long)priv);
3722         else
3723                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3724                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3725 }
3726
3727 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3728 {
3729         if (priv->cfg->ops->lib->cancel_deferred_work)
3730                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3731
3732         cancel_delayed_work_sync(&priv->init_alive_start);
3733         cancel_delayed_work(&priv->scan_check);
3734         cancel_work_sync(&priv->start_internal_scan);
3735         cancel_delayed_work(&priv->alive_start);
3736         cancel_work_sync(&priv->run_time_calib_work);
3737         cancel_work_sync(&priv->beacon_update);
3738         del_timer_sync(&priv->statistics_periodic);
3739         del_timer_sync(&priv->ucode_trace);
3740         if (priv->cfg->ops->lib->recover_from_tx_stall)
3741                 del_timer_sync(&priv->monitor_recover);
3742 }
3743
3744 static void iwl_init_hw_rates(struct iwl_priv *priv,
3745                               struct ieee80211_rate *rates)
3746 {
3747         int i;
3748
3749         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3750                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3751                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3752                 rates[i].hw_value_short = i;
3753                 rates[i].flags = 0;
3754                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3755                         /*
3756                          * If CCK != 1M then set short preamble rate flag.
3757                          */
3758                         rates[i].flags |=
3759                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3760                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3761                 }
3762         }
3763 }
3764
3765 static int iwl_init_drv(struct iwl_priv *priv)
3766 {
3767         int ret;
3768
3769         priv->ibss_beacon = NULL;
3770
3771         spin_lock_init(&priv->sta_lock);
3772         spin_lock_init(&priv->hcmd_lock);
3773
3774         INIT_LIST_HEAD(&priv->free_frames);
3775
3776         mutex_init(&priv->mutex);
3777         mutex_init(&priv->sync_cmd_mutex);
3778
3779         priv->ieee_channels = NULL;
3780         priv->ieee_rates = NULL;
3781         priv->band = IEEE80211_BAND_2GHZ;
3782
3783         priv->iw_mode = NL80211_IFTYPE_STATION;
3784         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3785         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3786         priv->_agn.agg_tids_count = 0;
3787
3788         /* initialize force reset */
3789         priv->force_reset[IWL_RF_RESET].reset_duration =
3790                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3791         priv->force_reset[IWL_FW_RESET].reset_duration =
3792                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3793
3794         /* Choose which receivers/antennas to use */
3795         if (priv->cfg->ops->hcmd->set_rxon_chain)
3796                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3797
3798         iwl_init_scan_params(priv);
3799
3800         /* Set the tx_power_user_lmt to the lowest power level
3801          * this value will get overwritten by channel max power avg
3802          * from eeprom */
3803         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3804
3805         ret = iwl_init_channel_map(priv);
3806         if (ret) {
3807                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3808                 goto err;
3809         }
3810
3811         ret = iwlcore_init_geos(priv);
3812         if (ret) {
3813                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3814                 goto err_free_channel_map;
3815         }
3816         iwl_init_hw_rates(priv, priv->ieee_rates);
3817
3818         return 0;
3819
3820 err_free_channel_map:
3821         iwl_free_channel_map(priv);
3822 err:
3823         return ret;
3824 }
3825
3826 static void iwl_uninit_drv(struct iwl_priv *priv)
3827 {
3828         iwl_calib_free_results(priv);
3829         iwlcore_free_geos(priv);
3830         iwl_free_channel_map(priv);
3831         kfree(priv->scan_cmd);
3832 }
3833
3834 static struct ieee80211_ops iwl_hw_ops = {
3835         .tx = iwl_mac_tx,
3836         .start = iwl_mac_start,
3837         .stop = iwl_mac_stop,
3838         .add_interface = iwl_mac_add_interface,
3839         .remove_interface = iwl_mac_remove_interface,
3840         .config = iwl_mac_config,
3841         .configure_filter = iwl_configure_filter,
3842         .set_key = iwl_mac_set_key,
3843         .update_tkip_key = iwl_mac_update_tkip_key,
3844         .conf_tx = iwl_mac_conf_tx,
3845         .reset_tsf = iwl_mac_reset_tsf,
3846         .bss_info_changed = iwl_bss_info_changed,
3847         .ampdu_action = iwl_mac_ampdu_action,
3848         .hw_scan = iwl_mac_hw_scan,
3849         .sta_notify = iwl_mac_sta_notify,
3850         .sta_add = iwlagn_mac_sta_add,
3851         .sta_remove = iwl_mac_sta_remove,
3852         .channel_switch = iwl_mac_channel_switch,
3853         .flush = iwl_mac_flush,
3854 };
3855
3856 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3857 {
3858         int err = 0;
3859         struct iwl_priv *priv;
3860         struct ieee80211_hw *hw;
3861         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3862         unsigned long flags;
3863         u16 pci_cmd;
3864         u8 perm_addr[ETH_ALEN];
3865
3866         /************************
3867          * 1. Allocating HW data
3868          ************************/
3869
3870         /* Disabling hardware scan means that mac80211 will perform scans
3871          * "the hard way", rather than using device's scan. */
3872         if (cfg->mod_params->disable_hw_scan) {
3873                 if (iwl_debug_level & IWL_DL_INFO)
3874                         dev_printk(KERN_DEBUG, &(pdev->dev),
3875                                    "Disabling hw_scan\n");
3876                 iwl_hw_ops.hw_scan = NULL;
3877         }
3878
3879         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3880         if (!hw) {
3881                 err = -ENOMEM;
3882                 goto out;
3883         }
3884         priv = hw->priv;
3885         /* At this point both hw and priv are allocated. */
3886
3887         SET_IEEE80211_DEV(hw, &pdev->dev);
3888
3889         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3890         priv->cfg = cfg;
3891         priv->pci_dev = pdev;
3892         priv->inta_mask = CSR_INI_SET_MASK;
3893
3894         if (iwl_alloc_traffic_mem(priv))
3895                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3896
3897         /**************************
3898          * 2. Initializing PCI bus
3899          **************************/
3900         if (pci_enable_device(pdev)) {
3901                 err = -ENODEV;
3902                 goto out_ieee80211_free_hw;
3903         }
3904
3905         pci_set_master(pdev);
3906
3907         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3908         if (!err)
3909                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3910         if (err) {
3911                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3912                 if (!err)
3913                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3914                 /* both attempts failed: */
3915                 if (err) {
3916                         IWL_WARN(priv, "No suitable DMA available.\n");
3917                         goto out_pci_disable_device;
3918                 }
3919         }
3920
3921         err = pci_request_regions(pdev, DRV_NAME);
3922         if (err)
3923                 goto out_pci_disable_device;
3924
3925         pci_set_drvdata(pdev, priv);
3926
3927
3928         /***********************
3929          * 3. Read REV register
3930          ***********************/
3931         priv->hw_base = pci_iomap(pdev, 0, 0);
3932         if (!priv->hw_base) {
3933                 err = -ENODEV;
3934                 goto out_pci_release_regions;
3935         }
3936
3937         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3938                 (unsigned long long) pci_resource_len(pdev, 0));
3939         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3940
3941         /* these spin locks will be used in apm_ops.init and EEPROM access
3942          * we should init now
3943          */
3944         spin_lock_init(&priv->reg_lock);
3945         spin_lock_init(&priv->lock);
3946
3947         /*
3948          * stop and reset the on-board processor just in case it is in a
3949          * strange state ... like being left stranded by a primary kernel
3950          * and this is now the kdump kernel trying to start up
3951          */
3952         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3953
3954         iwl_hw_detect(priv);
3955         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3956                 priv->cfg->name, priv->hw_rev);
3957
3958         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3959          * PCI Tx retries from interfering with C3 CPU state */
3960         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3961
3962         iwl_prepare_card_hw(priv);
3963         if (!priv->hw_ready) {
3964                 IWL_WARN(priv, "Failed, HW not ready\n");
3965                 goto out_iounmap;
3966         }
3967
3968         /*****************
3969          * 4. Read EEPROM
3970          *****************/
3971         /* Read the EEPROM */
3972         err = iwl_eeprom_init(priv);
3973         if (err) {
3974                 IWL_ERR(priv, "Unable to init EEPROM\n");
3975                 goto out_iounmap;
3976         }
3977         err = iwl_eeprom_check_version(priv);
3978         if (err)
3979                 goto out_free_eeprom;
3980
3981         /* extract MAC Address */
3982         iwl_eeprom_get_mac(priv, perm_addr);
3983         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", perm_addr);
3984         SET_IEEE80211_PERM_ADDR(priv->hw, perm_addr);
3985
3986         /************************
3987          * 5. Setup HW constants
3988          ************************/
3989         if (iwl_set_hw_params(priv)) {
3990                 IWL_ERR(priv, "failed to set hw parameters\n");
3991                 goto out_free_eeprom;
3992         }
3993
3994         /*******************
3995          * 6. Setup priv
3996          *******************/
3997
3998         err = iwl_init_drv(priv);
3999         if (err)
4000                 goto out_free_eeprom;
4001         /* At this point both hw and priv are initialized. */
4002
4003         /********************
4004          * 7. Setup services
4005          ********************/
4006         spin_lock_irqsave(&priv->lock, flags);
4007         iwl_disable_interrupts(priv);
4008         spin_unlock_irqrestore(&priv->lock, flags);
4009
4010         pci_enable_msi(priv->pci_dev);
4011
4012         iwl_alloc_isr_ict(priv);
4013         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4014                           IRQF_SHARED, DRV_NAME, priv);
4015         if (err) {
4016                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4017                 goto out_disable_msi;
4018         }
4019
4020         iwl_setup_deferred_work(priv);
4021         iwl_setup_rx_handlers(priv);
4022
4023         /*********************************************
4024          * 8. Enable interrupts and read RFKILL state
4025          *********************************************/
4026
4027         /* enable interrupts if needed: hw bug w/a */
4028         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4029         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4030                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4031                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4032         }
4033
4034         iwl_enable_interrupts(priv);
4035
4036         /* If platform's RF_KILL switch is NOT set to KILL */
4037         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4038                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4039         else
4040                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4041
4042         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4043                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4044
4045         iwl_power_initialize(priv);
4046         iwl_tt_initialize(priv);
4047
4048         init_completion(&priv->_agn.firmware_loading_complete);
4049
4050         err = iwl_request_firmware(priv, true);
4051         if (err)
4052                 goto out_destroy_workqueue;
4053
4054         return 0;
4055
4056  out_destroy_workqueue:
4057         destroy_workqueue(priv->workqueue);
4058         priv->workqueue = NULL;
4059         free_irq(priv->pci_dev->irq, priv);
4060         iwl_free_isr_ict(priv);
4061  out_disable_msi:
4062         pci_disable_msi(priv->pci_dev);
4063         iwl_uninit_drv(priv);
4064  out_free_eeprom:
4065         iwl_eeprom_free(priv);
4066  out_iounmap:
4067         pci_iounmap(pdev, priv->hw_base);
4068  out_pci_release_regions:
4069         pci_set_drvdata(pdev, NULL);
4070         pci_release_regions(pdev);
4071  out_pci_disable_device:
4072         pci_disable_device(pdev);
4073  out_ieee80211_free_hw:
4074         iwl_free_traffic_mem(priv);
4075         ieee80211_free_hw(priv->hw);
4076  out:
4077         return err;
4078 }
4079
4080 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4081 {
4082         struct iwl_priv *priv = pci_get_drvdata(pdev);
4083         unsigned long flags;
4084
4085         if (!priv)
4086                 return;
4087
4088         wait_for_completion(&priv->_agn.firmware_loading_complete);
4089
4090         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4091
4092         iwl_dbgfs_unregister(priv);
4093         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4094
4095         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4096          * to be called and iwl_down since we are removing the device
4097          * we need to set STATUS_EXIT_PENDING bit.
4098          */
4099         set_bit(STATUS_EXIT_PENDING, &priv->status);
4100         if (priv->mac80211_registered) {
4101                 ieee80211_unregister_hw(priv->hw);
4102                 priv->mac80211_registered = 0;
4103         } else {
4104                 iwl_down(priv);
4105         }
4106
4107         /*
4108          * Make sure device is reset to low power before unloading driver.
4109          * This may be redundant with iwl_down(), but there are paths to
4110          * run iwl_down() without calling apm_ops.stop(), and there are
4111          * paths to avoid running iwl_down() at all before leaving driver.
4112          * This (inexpensive) call *makes sure* device is reset.
4113          */
4114         priv->cfg->ops->lib->apm_ops.stop(priv);
4115
4116         iwl_tt_exit(priv);
4117
4118         /* make sure we flush any pending irq or
4119          * tasklet for the driver
4120          */
4121         spin_lock_irqsave(&priv->lock, flags);
4122         iwl_disable_interrupts(priv);
4123         spin_unlock_irqrestore(&priv->lock, flags);
4124
4125         iwl_synchronize_irq(priv);
4126
4127         iwl_dealloc_ucode_pci(priv);
4128
4129         if (priv->rxq.bd)
4130                 iwlagn_rx_queue_free(priv, &priv->rxq);
4131         iwlagn_hw_txq_ctx_free(priv);
4132
4133         iwl_eeprom_free(priv);
4134
4135
4136         /*netif_stop_queue(dev); */
4137         flush_workqueue(priv->workqueue);
4138
4139         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4140          * priv->workqueue... so we can't take down the workqueue
4141          * until now... */
4142         destroy_workqueue(priv->workqueue);
4143         priv->workqueue = NULL;
4144         iwl_free_traffic_mem(priv);
4145
4146         free_irq(priv->pci_dev->irq, priv);
4147         pci_disable_msi(priv->pci_dev);
4148         pci_iounmap(pdev, priv->hw_base);
4149         pci_release_regions(pdev);
4150         pci_disable_device(pdev);
4151         pci_set_drvdata(pdev, NULL);
4152
4153         iwl_uninit_drv(priv);
4154
4155         iwl_free_isr_ict(priv);
4156
4157         if (priv->ibss_beacon)
4158                 dev_kfree_skb(priv->ibss_beacon);
4159
4160         ieee80211_free_hw(priv->hw);
4161 }
4162
4163
4164 /*****************************************************************************
4165  *
4166  * driver and module entry point
4167  *
4168  *****************************************************************************/
4169
4170 /* Hardware specific file defines the PCI IDs table for that hardware module */
4171 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4172 #ifdef CONFIG_IWL4965
4173         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4174         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4175 #endif /* CONFIG_IWL4965 */
4176 #ifdef CONFIG_IWL5000
4177 /* 5100 Series WiFi */
4178         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4179         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4180         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4181         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4182         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4183         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4184         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4185         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4186         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4187         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4188         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4189         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4190         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4191         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4192         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4193         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4194         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4195         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4196         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4197         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4198         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4199         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4200         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4201         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4202
4203 /* 5300 Series WiFi */
4204         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4205         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4206         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4207         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4208         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4209         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4210         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4211         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4212         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4213         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4214         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4215         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4216
4217 /* 5350 Series WiFi/WiMax */
4218         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4219         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4220         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4221
4222 /* 5150 Series Wifi/WiMax */
4223         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4224         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4225         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4226         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4227         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4228         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4229
4230         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4231         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4232         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4233         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4234
4235 /* 6x00 Series */
4236         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4237         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4238         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4239         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4240         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4241         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4242         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4243         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4244         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4245         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4246
4247 /* 6x00 Series Gen2a */
4248         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4249         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4250         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4251         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4252         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4253         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4254         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4255         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4256         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4257         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4258         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4259         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4260         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4261         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4262
4263 /* 6x00 Series Gen2b */
4264         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4265         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4266         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4267         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4268         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4269         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4270         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4271         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4272         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4273         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4274         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4275         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4276         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4277         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4278         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4279         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4280         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4281         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4282         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4283         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4284         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4285         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4286         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4287         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4288         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4289         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4290         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4291         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4292
4293 /* 6x50 WiFi/WiMax Series */
4294         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4295         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4296         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4297         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4298         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4299         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4300
4301 /* 1000 Series WiFi */
4302         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4303         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4304         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4305         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4306         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4307         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4308         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4309         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4310         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4311         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4312         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4313         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4314 #endif /* CONFIG_IWL5000 */
4315
4316         {0}
4317 };
4318 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4319
4320 static struct pci_driver iwl_driver = {
4321         .name = DRV_NAME,
4322         .id_table = iwl_hw_card_ids,
4323         .probe = iwl_pci_probe,
4324         .remove = __devexit_p(iwl_pci_remove),
4325 #ifdef CONFIG_PM
4326         .suspend = iwl_pci_suspend,
4327         .resume = iwl_pci_resume,
4328 #endif
4329 };
4330
4331 static int __init iwl_init(void)
4332 {
4333
4334         int ret;
4335         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4336         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4337
4338         ret = iwlagn_rate_control_register();
4339         if (ret) {
4340                 printk(KERN_ERR DRV_NAME
4341                        "Unable to register rate control algorithm: %d\n", ret);
4342                 return ret;
4343         }
4344
4345         ret = pci_register_driver(&iwl_driver);
4346         if (ret) {
4347                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4348                 goto error_register;
4349         }
4350
4351         return ret;
4352
4353 error_register:
4354         iwlagn_rate_control_unregister();
4355         return ret;
4356 }
4357
4358 static void __exit iwl_exit(void)
4359 {
4360         pci_unregister_driver(&iwl_driver);
4361         iwlagn_rate_control_unregister();
4362 }
4363
4364 module_exit(iwl_exit);
4365 module_init(iwl_init);
4366
4367 #ifdef CONFIG_IWLWIFI_DEBUG
4368 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4369 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4370 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4371 MODULE_PARM_DESC(debug, "debug output mask");
4372 #endif
4373
4374 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4375 MODULE_PARM_DESC(swcrypto50,
4376                  "using crypto in software (default 0 [hardware]) (deprecated)");
4377 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4378 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4379 module_param_named(queues_num50,
4380                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4381 MODULE_PARM_DESC(queues_num50,
4382                  "number of hw queues in 50xx series (deprecated)");
4383 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4384 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4385 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4386 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4387 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4388 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4389 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4390                    int, S_IRUGO);
4391 MODULE_PARM_DESC(amsdu_size_8K50,
4392                  "enable 8K amsdu size in 50XX series (deprecated)");
4393 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4394                    int, S_IRUGO);
4395 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4396 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4397 MODULE_PARM_DESC(fw_restart50,
4398                  "restart firmware in case of error (deprecated)");
4399 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4400 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4401 module_param_named(
4402         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4403 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4404
4405 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4406                    S_IRUGO);
4407 MODULE_PARM_DESC(ucode_alternative,
4408                  "specify ucode alternative to use from ucode file");