1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
29 #include <linux/interrupt.h>
30 #include <linux/pci.h> /* for struct pci_device_id */
31 #include <linux/kernel.h>
32 #include <linux/leds.h>
33 #include <linux/wait.h>
35 #include <net/mac80211.h>
36 #include <net/ieee80211_radiotap.h>
46 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
47 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
48 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
50 #define RX_QUEUE_SIZE 256
51 #define RX_QUEUE_MASK 255
52 #define RX_QUEUE_SIZE_LOG 8
55 * RX related structures and functions
57 #define RX_FREE_BUFFERS 64
58 #define RX_LOW_WATERMARK 8
60 #define U32_PAD(n) ((4-(n))&0x3)
62 /* CT-KILL constants */
63 #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
65 /* Default noise level to report when noise measurement is not available.
66 * This may be because we're:
67 * 1) Not associated (4965, no beacon stats being sent to driver)
68 * 2) Scanning (noise measurement does not apply to associated channel)
69 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
70 * Use default noise value of -127 ... this is below the range of measurable
71 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
72 * Also, -127 works better than 0 when averaging frames with/without
73 * noise info (e.g. averaging might be done in app); measured dBm values are
74 * always negative ... using a negative value as the default keeps all
75 * averages within an s8's (used in some apps) range of negative values. */
76 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
79 * RTS threshold here is total size [2347] minus 4 FCS bytes
81 * a value of 0 means RTS on all data/management packets
82 * a value > max MSDU size means no RTS
83 * else RTS for data/management frames where MPDU is larger
86 #define DEFAULT_RTS_THRESHOLD 2347U
87 #define MIN_RTS_THRESHOLD 0U
88 #define MAX_RTS_THRESHOLD 2347U
89 #define MAX_MSDU_SIZE 2304U
90 #define MAX_MPDU_SIZE 2346U
91 #define DEFAULT_BEACON_INTERVAL 100U
92 #define DEFAULT_SHORT_RETRY_LIMIT 7U
93 #define DEFAULT_LONG_RETRY_LIMIT 4U
98 struct list_head list;
101 #define rxb_addr(r) page_address(r->page)
104 struct il_device_cmd;
107 /* only for SYNC commands, iff the reply skb is wanted */
108 struct il_host_cmd *source;
110 * only for ASYNC commands
111 * (which is somewhat stupid -- look at common.c for instance
112 * which duplicates a bunch of code because the callback isn't
113 * invoked for SYNC commands, if it were and its result passed
114 * through it would be simpler...)
116 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
117 struct il_rx_pkt *pkt);
119 /* The CMD_SIZE_HUGE flag bit indicates that the command
120 * structure is stored at the end of the shared queue memory. */
123 DEFINE_DMA_UNMAP_ADDR(mapping);
124 DEFINE_DMA_UNMAP_LEN(len);
128 * Generic queue structure
130 * Contains common data for Rx and Tx queues
133 int n_bd; /* number of BDs in this queue */
134 int write_ptr; /* 1-st empty entry (idx) host_w */
135 int read_ptr; /* last used entry (idx) host_r */
136 /* use for monitoring and recovering the stuck queue */
137 dma_addr_t dma_addr; /* physical addr for BD's */
138 int n_win; /* safe queue win */
140 int low_mark; /* low watermark, resume queue if free
141 * space more than this */
142 int high_mark; /* high watermark, stop queue if free
143 * space less than this */
147 * struct il_tx_queue - Tx Queue for DMA
148 * @q: generic Rx/Tx queue descriptor
149 * @bd: base of circular buffer of TFDs
150 * @cmd: array of command/TX buffer pointers
151 * @meta: array of meta data for each command/tx buffer
152 * @dma_addr_cmd: physical address of cmd/tx buffer array
153 * @skbs: array of per-TFD socket buffer pointers
154 * @time_stamp: time (in jiffies) of last read_ptr change
155 * @need_update: indicates need to update read/write idx
156 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
158 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
159 * descriptors) and required locking structures.
161 #define TFD_TX_CMD_SLOTS 256
162 #define TFD_CMD_SLOTS 32
167 struct il_device_cmd **cmd;
168 struct il_cmd_meta *meta;
169 struct sk_buff **skbs;
170 unsigned long time_stamp;
178 * EEPROM access time values:
180 * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
181 * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
182 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
183 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
185 #define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
187 #define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
188 #define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
191 * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags.
193 * IBSS and/or AP operation is allowed *only* on those channels with
194 * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
195 * RADAR detection is not supported by the 4965 driver, but is a
196 * requirement for establishing a new network for legal operation on channels
197 * requiring RADAR detection or restricting ACTIVE scanning.
199 * NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
200 * It only indicates that 20 MHz channel use is supported; HT40 channel
201 * usage is indicated by a separate set of regulatory flags for each
204 * NOTE: Using a channel inappropriately will result in a uCode error!
206 #define IL_NUM_TX_CALIB_GROUPS 5
208 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
209 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
211 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
212 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
213 EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
214 /* Bit 6 Reserved (was Narrow Channel) */
215 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
218 /* SKU Capabilities */
220 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
221 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
223 /* *regulatory* channel data format in eeprom, one for each channel.
224 * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
225 struct il_eeprom_channel {
226 u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
227 s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
231 #define EEPROM_3945_EEPROM_VERSION (0x2f)
233 /* 4965 has two radio transmitters (and 3 radio receivers) */
234 #define EEPROM_TX_POWER_TX_CHAINS (2)
236 /* 4965 has room for up to 8 sets of txpower calibration data */
237 #define EEPROM_TX_POWER_BANDS (8)
239 /* 4965 factory calibration measures txpower gain settings for
240 * each of 3 target output levels */
241 #define EEPROM_TX_POWER_MEASUREMENTS (3)
244 /* 4965 driver does not work with txpower calibration version < 5 */
245 #define EEPROM_4965_TX_POWER_VERSION (5)
246 #define EEPROM_4965_EEPROM_VERSION (0x2f)
247 #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
248 #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
249 #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
250 #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
253 extern const u8 il_eeprom_band_1[14];
256 * factory calibration data for one txpower level, on one channel,
257 * measured on one of the 2 tx chains (radio transmitter and associated
258 * antenna). EEPROM contains:
260 * 1) Temperature (degrees Celsius) of device when measurement was made.
262 * 2) Gain table idx used to achieve the target measurement power.
263 * This refers to the "well-known" gain tables (see 4965.h).
265 * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
267 * 4) RF power amplifier detector level measurement (not used).
269 struct il_eeprom_calib_measure {
270 u8 temperature; /* Device temperature (Celsius) */
271 u8 gain_idx; /* Index into gain table */
272 u8 actual_pow; /* Measured RF output power, half-dBm */
273 s8 pa_det; /* Power amp detector level (not used) */
277 * measurement set for one channel. EEPROM contains:
279 * 1) Channel number measured
281 * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
282 * (a.k.a. "tx chains") (6 measurements altogether)
284 struct il_eeprom_calib_ch_info {
286 struct il_eeprom_calib_measure
287 measurements[EEPROM_TX_POWER_TX_CHAINS]
288 [EEPROM_TX_POWER_MEASUREMENTS];
292 * txpower subband info.
294 * For each frequency subband, EEPROM contains the following:
296 * 1) First and last channels within range of the subband. "0" values
297 * indicate that this sample set is not being used.
299 * 2) Sample measurement sets for 2 channels close to the range endpoints.
301 struct il_eeprom_calib_subband_info {
302 u8 ch_from; /* channel number of lowest channel in subband */
303 u8 ch_to; /* channel number of highest channel in subband */
304 struct il_eeprom_calib_ch_info ch1;
305 struct il_eeprom_calib_ch_info ch2;
309 * txpower calibration info. EEPROM contains:
311 * 1) Factory-measured saturation power levels (maximum levels at which
312 * tx power amplifier can output a signal without too much distortion).
313 * There is one level for 2.4 GHz band and one for 5 GHz band. These
314 * values apply to all channels within each of the bands.
316 * 2) Factory-measured power supply voltage level. This is assumed to be
317 * constant (i.e. same value applies to all channels/bands) while the
318 * factory measurements are being made.
320 * 3) Up to 8 sets of factory-measured txpower calibration values.
321 * These are for different frequency ranges, since txpower gain
322 * characteristics of the analog radio circuitry vary with frequency.
324 * Not all sets need to be filled with data;
325 * struct il_eeprom_calib_subband_info contains range of channels
326 * (0 if unused) for each set of data.
328 struct il_eeprom_calib_info {
329 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
330 u8 saturation_power52; /* half-dBm */
331 __le16 voltage; /* signed */
332 struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
336 #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
337 #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
338 #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
339 #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
340 #define EEPROM_VERSION (2*0x44) /* 2 bytes */
341 #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */
342 #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
343 #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
344 #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
345 #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
347 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
348 #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
349 #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
350 #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
351 #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
352 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
353 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
355 #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
356 #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
359 * Per-channel regulatory data.
361 * Each channel that *might* be supported by iwl has a fixed location
362 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
365 * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
366 * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
368 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
370 #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
371 #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
372 #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
375 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
376 * 5.0 GHz channels 7, 8, 11, 12, 16
377 * (4915-5080MHz) (none of these is ever supported)
379 #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
380 #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
383 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
386 #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
387 #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
390 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
393 #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
394 #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
397 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
400 #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
401 #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
404 * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
406 * The channel listed is the center of the lower 20 MHz half of the channel.
407 * The overall center frequency is actually 2 channels (10 MHz) above that,
408 * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
409 * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
410 * and the overall HT40 channel width centers on channel 3.
412 * NOTE: The RXON command uses 20 MHz channel numbers to specify the
413 * control channel to which to tune. RXON also specifies whether the
414 * control channel is the upper or lower half of a HT40 channel.
416 * NOTE: 4965 does not support HT40 channels on 2.4 GHz.
418 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
421 * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
422 * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
424 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
426 #define EEPROM_REGULATORY_BAND_NO_HT40 (0)
428 struct il_eeprom_ops {
429 int (*acquire_semaphore) (struct il_priv *il);
430 void (*release_semaphore) (struct il_priv *il);
433 int il_eeprom_init(struct il_priv *il);
434 void il_eeprom_free(struct il_priv *il);
435 const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
436 u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
437 int il_init_channel_map(struct il_priv *il);
438 void il_free_channel_map(struct il_priv *il);
439 const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
440 enum ieee80211_band band,
443 #define IL_NUM_SCAN_RATES (2)
445 struct il4965_channel_tgd_info {
450 struct il4965_channel_tgh_info {
454 #define IL4965_MAX_RATE (33)
456 struct il3945_clip_group {
457 /* maximum power level to prevent clipping for each rate, derived by
458 * us from this band's saturation power in EEPROM */
459 const s8 clip_powers[IL_MAX_RATES];
462 /* current Tx power values to use, one for each rate for each channel.
463 * requested power is limited by:
464 * -- regulatory EEPROM limits for this channel
465 * -- hardware capabilities (clip-powers)
466 * -- spectrum management
467 * -- user preference (e.g. iwconfig)
468 * when requested power is set, base power idx must also be set. */
469 struct il3945_channel_power_info {
470 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
471 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
472 s8 base_power_idx; /* gain idx for power at factory temp. */
473 s8 requested_power; /* power (dBm) requested for this chnl/rate */
476 /* current scan Tx power values to use, one for each scan rate for each
478 struct il3945_scan_power_info {
479 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
480 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
481 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
485 * One for each channel, holds all channel setup data
486 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
489 struct il_channel_info {
490 struct il4965_channel_tgd_info tgd;
491 struct il4965_channel_tgh_info tgh;
492 struct il_eeprom_channel eeprom; /* EEPROM regulatory limit */
493 struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
496 u8 channel; /* channel number */
497 u8 flags; /* flags copied from EEPROM */
498 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
499 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
500 s8 min_power; /* always 0 */
501 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
503 u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
504 u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
505 enum ieee80211_band band;
507 /* HT40 channel info */
508 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
509 u8 ht40_flags; /* flags copied from EEPROM */
510 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
512 /* Radio/DSP gain settings for each "normal" data Tx rate.
513 * These include, in addition to RF and DSP gain, a few fields for
514 * remembering/modifying gain settings (idxes). */
515 struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
517 /* Radio/DSP gain settings for each scan rate, for directed scans. */
518 struct il3945_scan_power_info scan_pwr_info[IL_NUM_SCAN_RATES];
521 #define IL_TX_FIFO_BK 0 /* shared */
522 #define IL_TX_FIFO_BE 1
523 #define IL_TX_FIFO_VI 2 /* shared */
524 #define IL_TX_FIFO_VO 3
525 #define IL_TX_FIFO_UNUSED -1
527 /* Minimum number of queues. MAX_NUM is defined in hw specific files.
528 * Set the minimum to accommodate the 4 standard TX queues, 1 command
529 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
530 #define IL_MIN_NUM_QUEUES 10
532 #define IL_DEFAULT_CMD_QUEUE_NUM 4
534 #define IEEE80211_DATA_LEN 2304
535 #define IEEE80211_4ADDR_LEN 30
536 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
537 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
541 struct ieee80211_hdr frame;
542 struct il_tx_beacon_cmd beacon;
543 u8 raw[IEEE80211_FRAME_LEN];
546 struct list_head list;
549 #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
550 #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
551 #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
557 CMD_SIZE_HUGE = (1 << 0),
558 CMD_ASYNC = (1 << 1),
559 CMD_WANT_SKB = (1 << 2),
560 CMD_MAPPED = (1 << 3),
563 #define DEF_CMD_PAYLOAD_SIZE 320
566 * struct il_device_cmd
568 * For allocation of the command and tx queues, this establishes the overall
569 * size of the largest command we send to uCode, except for a scan command
570 * (which is relatively huge; space is allocated separately).
572 struct il_device_cmd {
573 struct il_cmd_header hdr; /* uCode API */
580 u8 payload[DEF_CMD_PAYLOAD_SIZE];
584 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
588 unsigned long reply_page;
589 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
590 struct il_rx_pkt *pkt);
596 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
597 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
598 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
601 * struct il_rx_queue - Rx queue
602 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
603 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
604 * @read: Shared idx to newest available Rx buffer
605 * @write: Shared idx to oldest written Rx packet
606 * @free_count: Number of pre-allocated buffers in rx_free
607 * @rx_free: list of free SKBs for use
608 * @rx_used: List of Rx buffers with no SKB
609 * @need_update: flag to indicate we need to update read/write idx
610 * @rb_stts: driver's pointer to receive buffer status
611 * @rb_stts_dma: bus address of receive buffer status
613 * NOTE: rx_free and rx_used are used as a FIFO for il_rx_bufs
618 struct il_rx_buf pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
619 struct il_rx_buf *queue[RX_QUEUE_SIZE];
624 struct list_head rx_free;
625 struct list_head rx_used;
627 struct il_rb_status *rb_stts;
628 dma_addr_t rb_stts_dma;
632 #define IL_SUPPORTED_RATES_IE_LEN 8
634 #define MAX_TID_COUNT 9
636 #define IL_INVALID_RATE 0xFF
637 #define IL_INVALID_VALUE -1
640 * struct il_ht_agg -- aggregation status while waiting for block-ack
641 * @txq_id: Tx queue used for Tx attempt
642 * @frame_count: # frames attempted by Tx command
643 * @wait_for_ba: Expect block-ack before next Tx reply
644 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
645 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
646 * @bitmap1: High order, one bit for each frame pending ACK in Tx win
647 * @rate_n_flags: Rate at which Tx was attempted
649 * If C_TX indicates that aggregation was attempted, driver must wait
650 * for block ack (N_COMPRESSED_BA). This struct stores tx reply info
651 * until block ack arrives.
662 #define IL_EMPTYING_HW_QUEUE_ADDBA 2
663 #define IL_EMPTYING_HW_QUEUE_DELBA 3
668 u16 seq_number; /* 4965 only */
670 struct il_ht_agg agg;
680 union il_ht_rate_supp {
688 #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
689 #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
690 #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
691 #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
692 #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
693 #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
694 #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
697 * Maximal MPDU density for TX aggregation
703 #define CFG_HT_MPDU_DENSITY_2USEC (0x4)
704 #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
705 #define CFG_HT_MPDU_DENSITY_8USEC (0x6)
706 #define CFG_HT_MPDU_DENSITY_16USEC (0x7)
707 #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
708 #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
709 #define CFG_HT_MPDU_DENSITY_MIN (0x1)
711 struct il_ht_config {
712 bool single_chain_sufficient;
713 enum ieee80211_smps_mode smps; /* current smps mode */
719 struct il_qosparam_cmd def_qos_parm;
723 * Structure should be accessed with sta_lock held. When station addition
724 * is in progress (IL_STA_UCODE_INPROGRESS) it is possible to access only
725 * the commands (il_addsta_cmd and il_link_quality_cmd) without
728 struct il_station_entry {
729 struct il_addsta_cmd sta;
730 struct il_tid_data tid[MAX_TID_COUNT];
732 struct il_hw_key keyinfo;
733 struct il_link_quality_cmd *lq;
736 struct il_station_priv_common {
741 * struct il_vif_priv - driver's ilate per-interface information
743 * When mac80211 allocates a virtual interface, it can allocate
744 * space for us to put data into.
747 u8 ibss_bssid_sta_id;
750 /* one for each uCode image (inst/data, boot/init/runtime) */
752 void *v_addr; /* access by driver */
753 dma_addr_t p_addr; /* access by card's busmaster DMA */
757 /* uCode file layout */
758 struct il_ucode_header {
759 __le32 ver; /* major/minor/API/serial */
761 __le32 inst_size; /* bytes of runtime code */
762 __le32 data_size; /* bytes of runtime data */
763 __le32 init_size; /* bytes of init code */
764 __le32 init_data_size; /* bytes of init data */
765 __le32 boot_size; /* bytes of bootstrap code */
766 u8 data[0]; /* in same order as sizes */
770 struct il4965_ibss_seq {
774 unsigned long packet_time;
775 struct list_head list;
778 struct il_sensitivity_ranges {
785 u16 auto_corr_min_ofdm;
786 u16 auto_corr_min_ofdm_mrc;
787 u16 auto_corr_min_ofdm_x1;
788 u16 auto_corr_min_ofdm_mrc_x1;
790 u16 auto_corr_max_ofdm;
791 u16 auto_corr_max_ofdm_mrc;
792 u16 auto_corr_max_ofdm_x1;
793 u16 auto_corr_max_ofdm_mrc_x1;
795 u16 auto_corr_max_cck;
796 u16 auto_corr_max_cck_mrc;
797 u16 auto_corr_min_cck;
798 u16 auto_corr_min_cck_mrc;
800 u16 barker_corr_th_min;
801 u16 barker_corr_th_min_mrc;
805 #define KELVIN_TO_CELSIUS(x) ((x)-273)
806 #define CELSIUS_TO_KELVIN(x) ((x)+273)
809 * struct il_hw_params
810 * @bcast_id: f/w broadcast station ID
811 * @max_txq_num: Max # Tx queues supported
812 * @dma_chnl_num: Number of Tx DMA/FIFO channels
813 * @scd_bc_tbls_size: size of scheduler byte count tables
814 * @tfd_size: TFD size
815 * @tx/rx_chains_num: Number of TX/RX chains
816 * @valid_tx/rx_ant: usable antennas
817 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
818 * @max_rxq_log: Log-base-2 of max_rxq_size
819 * @rx_page_order: Rx buffer page order
820 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
822 * @ht40_channel: is 40MHz width possible in band 2.4
823 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
824 * @sw_crypto: 0 for hw, 1 for sw
825 * @max_xxx_size: for ucode uses
826 * @ct_kill_threshold: temperature threshold
827 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
828 * @struct il_sensitivity_ranges: range of sensitivity values
830 struct il_hw_params {
834 u16 scd_bc_tbls_size;
846 u8 max_beacon_itrvl; /* in 1024 ms */
850 u32 ct_kill_threshold; /* value in hw-dependent units */
851 u16 beacon_time_tsf_bits;
852 const struct il_sensitivity_ranges *sens;
855 /******************************************************************************
857 * Functions implemented in core module which are forward declared here
858 * for use by iwl-[4-5].c
860 * NOTE: The implementation of these functions are not hardware specific
861 * which is why they are in the core module files.
863 * Naming convention --
864 * il_ <-- Is part of iwlwifi
865 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
866 * il4965_bg_ <-- Called from work queue context
867 * il4965_mac_ <-- mac80211 callback
869 ****************************************************************************/
870 extern void il4965_update_chain_flags(struct il_priv *il);
871 extern const u8 il_bcast_addr[ETH_ALEN];
872 extern int il_queue_space(const struct il_queue *q);
874 il_queue_used(const struct il_queue *q, int i)
876 return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr &&
877 i < q->write_ptr) : !(i <
885 il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge)
888 * This is for init calibration result and scan command which
889 * required buffer > TFD_MAX_PAYLOAD_SIZE,
890 * the big buffer at end of command array
893 return q->n_win; /* must be power of 2 */
895 /* Otherwise, use normal size buffers */
896 return idx & (q->n_win - 1);
905 #define IL_OPERATION_MODE_AUTO 0
906 #define IL_OPERATION_MODE_HT_ONLY 1
907 #define IL_OPERATION_MODE_MIXED 2
908 #define IL_OPERATION_MODE_20MHZ 3
910 #define IL_TX_CRC_SIZE 4
911 #define IL_TX_DELIMITER_SIZE 4
913 #define TX_POWER_IL_ILLEGAL_VOLTAGE -10000
915 /* Sensitivity and chain noise calibration */
916 #define INITIALIZATION_VALUE 0xFFFF
917 #define IL4965_CAL_NUM_BEACONS 20
918 #define IL_CAL_NUM_BEACONS 16
919 #define MAXIMUM_ALLOWED_PATHLOSS 15
921 #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
923 #define MAX_FA_OFDM 50
924 #define MIN_FA_OFDM 5
925 #define MAX_FA_CCK 50
928 #define AUTO_CORR_STEP_OFDM 1
930 #define AUTO_CORR_STEP_CCK 3
931 #define AUTO_CORR_MAX_TH_CCK 160
934 #define NRG_STEP_CCK 2
936 #define MAX_NUMBER_CCK_NO_FA 100
938 #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
943 #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
944 #define ALL_BAND_FILTER 0xFF00
945 #define IN_BAND_FILTER 0xFF
946 #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
948 #define NRG_NUM_PREV_STAT_L 20
949 #define NUM_RX_CHAINS 3
951 enum il4965_false_alarm_state {
954 IL_FA_GOOD_RANGE = 2,
957 enum il4965_chain_noise_state {
958 IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
959 IL_CHAIN_NOISE_ACCUMULATE,
960 IL_CHAIN_NOISE_CALIBRATED,
964 enum il4965_calib_enabled_state {
965 IL_CALIB_DISABLED = 0, /* must be 0 */
966 IL_CALIB_ENABLED = 1,
971 * defines the order in which results of initial calibrations
972 * should be sent to the runtime uCode
978 /* Opaque calibration results */
979 struct il_calib_result {
990 /* Sensitivity calib data */
991 struct il_sensitivity_data {
993 u32 auto_corr_ofdm_mrc;
994 u32 auto_corr_ofdm_x1;
995 u32 auto_corr_ofdm_mrc_x1;
997 u32 auto_corr_cck_mrc;
999 u32 last_bad_plcp_cnt_ofdm;
1000 u32 last_fa_cnt_ofdm;
1001 u32 last_bad_plcp_cnt_cck;
1002 u32 last_fa_cnt_cck;
1007 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
1008 u32 nrg_silence_ref;
1010 u32 nrg_silence_idx;
1012 s32 nrg_auto_corr_silence_diff;
1013 u32 num_in_cck_no_fa;
1016 u16 barker_corr_th_min;
1017 u16 barker_corr_th_min_mrc;
1021 /* Chain noise (differential Rx gain) calib data */
1022 struct il_chain_noise_data {
1031 u8 disconn_array[NUM_RX_CHAINS];
1032 u8 delta_gain_code[NUM_RX_CHAINS];
1037 #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
1038 #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
1040 #define IL_TRAFFIC_ENTRIES (256)
1041 #define IL_TRAFFIC_ENTRY_SIZE (64)
1044 MEASUREMENT_READY = (1 << 0),
1045 MEASUREMENT_ACTIVE = (1 << 1),
1048 /* interrupt stats */
1059 u32 handlers[IL_CN_MAX];
1064 /* management stats */
1065 enum il_mgmt_stats {
1066 MANAGEMENT_ASSOC_REQ = 0,
1067 MANAGEMENT_ASSOC_RESP,
1068 MANAGEMENT_REASSOC_REQ,
1069 MANAGEMENT_REASSOC_RESP,
1070 MANAGEMENT_PROBE_REQ,
1071 MANAGEMENT_PROBE_RESP,
1074 MANAGEMENT_DISASSOC,
1081 enum il_ctrl_stats {
1082 CONTROL_BACK_REQ = 0,
1093 struct traffic_stats {
1094 #ifdef CONFIG_IWLEGACY_DEBUGFS
1095 u32 mgmt[MANAGEMENT_MAX];
1096 u32 ctrl[CONTROL_MAX];
1103 * host interrupt timeout value
1104 * used with setting interrupt coalescing timer
1105 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1107 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1108 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1110 #define IL_HOST_INT_TIMEOUT_MAX (0xFF)
1111 #define IL_HOST_INT_TIMEOUT_DEF (0x40)
1112 #define IL_HOST_INT_TIMEOUT_MIN (0x0)
1113 #define IL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
1114 #define IL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
1115 #define IL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
1117 #define IL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1119 /* TX queue watchdog timeouts in mSecs */
1120 #define IL_DEF_WD_TIMEOUT (2000)
1121 #define IL_LONG_WD_TIMEOUT (10000)
1122 #define IL_MAX_WD_TIMEOUT (120000)
1124 struct il_force_reset {
1125 int reset_request_count;
1126 int reset_success_count;
1127 int reset_reject_count;
1128 unsigned long reset_duration;
1129 unsigned long last_force_reset_jiffies;
1132 /* extend beacon time format bit shifting */
1135 * bits 31:24 - extended
1136 * bits 23:0 - interval
1138 #define IL3945_EXT_BEACON_TIME_POS 24
1141 * bits 31:22 - extended
1142 * bits 21:0 - interval
1144 #define IL4965_EXT_BEACON_TIME_POS 22
1146 struct il_rxon_context {
1147 struct ieee80211_vif *vif;
1150 struct il_power_mgr {
1151 struct il_powertable_cmd sleep_cmd;
1152 struct il_powertable_cmd sleep_cmd_next;
1153 int debug_sleep_level_override;
1159 /* ieee device used by generic ieee processing code */
1160 struct ieee80211_hw *hw;
1161 struct ieee80211_channel *ieee_channels;
1162 struct ieee80211_rate *ieee_rates;
1164 const struct il_ops *ops;
1166 /* temporary frame storage list */
1167 struct list_head free_frames;
1170 enum ieee80211_band band;
1173 void (*handlers[IL_CN_MAX]) (struct il_priv *il,
1174 struct il_rx_buf *rxb);
1176 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1178 /* spectrum measurement report caching */
1179 struct il_spectrum_notification measure_report;
1180 u8 measurement_status;
1182 /* ucode beacon time */
1183 u32 ucode_beacon_time;
1184 int missed_beacon_threshold;
1186 /* track IBSS manager (last beacon) status */
1190 struct il_force_reset force_reset;
1192 /* we allocate array of il_channel_info for NIC's valid channels.
1193 * Access via channel # using indirect idx array */
1194 struct il_channel_info *channel_info; /* channel info array */
1195 u8 channel_count; /* # of channels */
1197 /* thermal calibration */
1198 s32 temperature; /* degrees Kelvin */
1199 s32 last_temperature;
1201 /* init calibration results */
1202 struct il_calib_result calib_results[IL_CALIB_MAX];
1204 /* Scan related variables */
1205 unsigned long scan_start;
1206 unsigned long scan_start_tsf;
1208 enum ieee80211_band scan_band;
1209 struct cfg80211_scan_request *scan_request;
1210 struct ieee80211_vif *scan_vif;
1211 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1215 spinlock_t lock; /* protect general shared data */
1216 spinlock_t hcmd_lock; /* protect hcmd */
1217 spinlock_t reg_lock; /* protect hw register access */
1220 /* basic pci-network driver stuff */
1221 struct pci_dev *pci_dev;
1223 /* pci hardware address support */
1224 void __iomem *hw_base;
1229 /* command queue number */
1232 /* max number of station keys */
1235 /* EEPROM MAC addresses */
1236 struct mac_address addresses[1];
1238 /* uCode images, save to reload in case of failure */
1239 int fw_idx; /* firmware we're trying to load */
1240 u32 ucode_ver; /* version of ucode, copy of
1242 struct fw_desc ucode_code; /* runtime inst */
1243 struct fw_desc ucode_data; /* runtime data original */
1244 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1245 struct fw_desc ucode_init; /* initialization inst */
1246 struct fw_desc ucode_init_data; /* initialization data */
1247 struct fw_desc ucode_boot; /* bootstrap inst */
1248 enum ucode_type ucode_type;
1249 u8 ucode_write_complete; /* the image write is complete */
1250 char firmware_name[25];
1252 struct ieee80211_vif *vif;
1254 struct il_qos_info qos_data;
1259 bool non_gf_sta_present;
1261 u8 extension_chan_offset;
1265 * We declare this const so it can only be
1266 * changed via explicit cast within the
1267 * routines that actually update the physical
1270 const struct il_rxon_cmd active;
1271 struct il_rxon_cmd staging;
1273 struct il_rxon_time_cmd timing;
1275 __le16 switch_channel;
1277 /* 1st responses from initialize and runtime uCode images.
1278 * _4965's initialize alive response contains some calibration data. */
1279 struct il_init_alive_resp card_alive_init;
1280 struct il_alive_resp card_alive;
1285 struct il_sensitivity_data sensitivity_data;
1286 struct il_chain_noise_data chain_noise_data;
1287 __le16 sensitivity_tbl[HD_TBL_SIZE];
1289 struct il_ht_config current_ht_config;
1291 /* Rate scaling data */
1294 wait_queue_head_t wait_command_queue;
1296 int activity_timer_active;
1298 /* Rx and Tx DMA processing queues */
1299 struct il_rx_queue rxq;
1300 struct il_tx_queue *txq;
1301 unsigned long txq_ctx_active_msk;
1302 struct il_dma_ptr kw; /* keep warm address */
1303 struct il_dma_ptr scd_bc_tbls;
1305 u32 scd_base_addr; /* scheduler sram base address */
1307 unsigned long status;
1309 /* counts mgmt, ctl, and data packets */
1310 struct traffic_stats tx_stats;
1311 struct traffic_stats rx_stats;
1313 /* counts interrupts */
1314 struct isr_stats isr_stats;
1316 struct il_power_mgr power_data;
1318 /* context information */
1319 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1321 /* station table variables */
1323 /* Note: if lock and sta_lock are needed, lock must be acquired first */
1324 spinlock_t sta_lock;
1326 struct il_station_entry stations[IL_STATION_COUNT];
1327 unsigned long ucode_key_table;
1329 /* queue refcounts */
1330 #define IL_MAX_HW_QUEUES 32
1331 unsigned long queue_stopped[BITS_TO_LONGS(IL_MAX_HW_QUEUES)];
1333 atomic_t queue_stop_count[4];
1335 /* Indication if ieee80211_ops->open has been called */
1338 u8 mac80211_registered;
1340 /* eeprom -- this is in the card's little endian byte order */
1342 struct il_eeprom_calib_info *calib_info;
1344 enum nl80211_iftype iw_mode;
1346 /* Last Rx'd beacon timestamp */
1350 #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1353 dma_addr_t shared_phys;
1355 struct delayed_work thermal_periodic;
1356 struct delayed_work rfkill_poll;
1358 struct il3945_notif_stats stats;
1359 #ifdef CONFIG_IWLEGACY_DEBUGFS
1360 struct il3945_notif_stats accum_stats;
1361 struct il3945_notif_stats delta_stats;
1362 struct il3945_notif_stats max_delta;
1366 int last_rx_rssi; /* From Rx packet stats */
1368 /* Rx'd packet timing information */
1369 u32 last_beacon_time;
1373 * each calibration channel group in the
1374 * EEPROM has a derived clip setting for
1377 const struct il3945_clip_group clip_groups[5];
1381 #if defined(CONFIG_IWL4965) || defined(CONFIG_IWL4965_MODULE)
1383 struct il_rx_phy_res last_phy_res;
1384 bool last_phy_res_valid;
1386 struct completion firmware_loading_complete;
1389 * chain noise reset and gain commands are the
1390 * two extra calibration commands follows the standard
1391 * phy calibration commands
1393 u8 phy_calib_chain_noise_reset_cmd;
1394 u8 phy_calib_chain_noise_gain_cmd;
1396 u8 key_mapping_keys;
1397 struct il_wep_key wep_keys[WEP_KEYS_MAX];
1399 struct il_notif_stats stats;
1400 #ifdef CONFIG_IWLEGACY_DEBUGFS
1401 struct il_notif_stats accum_stats;
1402 struct il_notif_stats delta_stats;
1403 struct il_notif_stats max_delta;
1410 struct il_hw_params hw_params;
1414 struct workqueue_struct *workqueue;
1416 struct work_struct restart;
1417 struct work_struct scan_completed;
1418 struct work_struct rx_replenish;
1419 struct work_struct abort_scan;
1421 bool beacon_enabled;
1422 struct sk_buff *beacon_skb;
1424 struct work_struct tx_flush;
1426 struct tasklet_struct irq_tasklet;
1428 struct delayed_work init_alive_start;
1429 struct delayed_work alive_start;
1430 struct delayed_work scan_check;
1433 s8 tx_power_user_lmt;
1434 s8 tx_power_device_lmt;
1437 #ifdef CONFIG_IWLEGACY_DEBUG
1438 /* debugging info */
1439 u32 debug_level; /* per device debugging will override global
1440 il_debug_level if set */
1441 #endif /* CONFIG_IWLEGACY_DEBUG */
1442 #ifdef CONFIG_IWLEGACY_DEBUGFS
1448 struct dentry *debugfs_dir;
1449 u32 dbgfs_sram_offset, dbgfs_sram_len;
1451 #endif /* CONFIG_IWLEGACY_DEBUGFS */
1453 struct work_struct txpower_work;
1454 u32 disable_sens_cal;
1455 u32 disable_chain_noise_cal;
1456 u32 disable_tx_power_cal;
1457 struct work_struct run_time_calib_work;
1458 struct timer_list stats_periodic;
1459 struct timer_list watchdog;
1462 struct led_classdev led;
1463 unsigned long blink_on, blink_off;
1464 bool led_registered;
1468 il_txq_ctx_activate(struct il_priv *il, int txq_id)
1470 set_bit(txq_id, &il->txq_ctx_active_msk);
1474 il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
1476 clear_bit(txq_id, &il->txq_ctx_active_msk);
1480 il_is_associated(struct il_priv *il)
1482 return (il->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1486 il_is_any_associated(struct il_priv *il)
1488 return il_is_associated(il);
1492 il_is_channel_valid(const struct il_channel_info *ch_info)
1494 if (ch_info == NULL)
1496 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1500 il_is_channel_radar(const struct il_channel_info *ch_info)
1502 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1506 il_is_channel_a_band(const struct il_channel_info *ch_info)
1508 return ch_info->band == IEEE80211_BAND_5GHZ;
1512 il_is_channel_passive(const struct il_channel_info *ch)
1514 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1518 il_is_channel_ibss(const struct il_channel_info *ch)
1520 return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
1524 __il_free_pages(struct il_priv *il, struct page *page)
1526 __free_pages(page, il->hw_params.rx_page_order);
1527 il->alloc_rxb_page--;
1531 il_free_pages(struct il_priv *il, unsigned long page)
1533 free_pages(page, il->hw_params.rx_page_order);
1534 il->alloc_rxb_page--;
1537 #define IWLWIFI_VERSION "in-tree:"
1538 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
1539 #define DRV_AUTHOR "<ilw@linux.intel.com>"
1541 #define IL_PCI_DEVICE(dev, subdev, cfg) \
1542 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
1543 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
1544 .driver_data = (kernel_ulong_t)&(cfg)
1546 #define TIME_UNIT 1024
1548 #define IL_SKU_G 0x1
1549 #define IL_SKU_A 0x2
1550 #define IL_SKU_N 0x8
1552 #define IL_CMD(x) case x: return #x
1554 /* Size of one Rx buffer in host DRAM */
1555 #define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */
1556 #define IL_RX_BUF_SIZE_4K (4 * 1024)
1557 #define IL_RX_BUF_SIZE_8K (8 * 1024)
1559 struct il_hcmd_ops {
1560 int (*rxon_assoc) (struct il_priv *il);
1561 int (*commit_rxon) (struct il_priv *il);
1562 void (*set_rxon_chain) (struct il_priv *il);
1565 struct il_hcmd_utils_ops {
1566 u16(*get_hcmd_size) (u8 cmd_id, u16 len);
1567 u16(*build_addsta_hcmd) (const struct il_addsta_cmd *cmd, u8 *data);
1568 int (*request_scan) (struct il_priv *il, struct ieee80211_vif *vif);
1569 void (*post_scan) (struct il_priv *il);
1573 int (*init) (struct il_priv *il);
1574 void (*config) (struct il_priv *il);
1577 #ifdef CONFIG_IWLEGACY_DEBUGFS
1578 struct il_debugfs_ops {
1579 ssize_t(*rx_stats_read) (struct file *file, char __user *user_buf,
1580 size_t count, loff_t *ppos);
1581 ssize_t(*tx_stats_read) (struct file *file, char __user *user_buf,
1582 size_t count, loff_t *ppos);
1583 ssize_t(*general_stats_read) (struct file *file,
1584 char __user *user_buf, size_t count,
1589 struct il_temp_ops {
1590 void (*temperature) (struct il_priv *il);
1595 void (*txq_update_byte_cnt_tbl) (struct il_priv *il,
1596 struct il_tx_queue *txq,
1598 int (*txq_attach_buf_to_tfd) (struct il_priv *il,
1599 struct il_tx_queue *txq, dma_addr_t addr,
1600 u16 len, u8 reset, u8 pad);
1601 void (*txq_free_tfd) (struct il_priv *il, struct il_tx_queue *txq);
1602 int (*txq_init) (struct il_priv *il, struct il_tx_queue *txq);
1603 /* alive notification after init uCode load */
1604 void (*init_alive_start) (struct il_priv *il);
1605 /* check validity of rtc data address */
1606 int (*is_valid_rtc_data_addr) (u32 addr);
1607 /* 1st ucode load */
1608 int (*load_ucode) (struct il_priv *il);
1610 void (*dump_nic_error_log) (struct il_priv *il);
1611 int (*dump_fh) (struct il_priv *il, char **buf, bool display);
1612 int (*set_channel_switch) (struct il_priv *il,
1613 struct ieee80211_channel_switch *ch_switch);
1614 /* power management */
1615 struct il_apm_ops apm_ops;
1618 int (*send_tx_power) (struct il_priv *il);
1619 void (*update_chain_flags) (struct il_priv *il);
1621 /* eeprom operations */
1622 struct il_eeprom_ops eeprom_ops;
1625 struct il_temp_ops temp_ops;
1627 #ifdef CONFIG_IWLEGACY_DEBUGFS
1628 struct il_debugfs_ops debugfs_ops;
1634 int (*cmd) (struct il_priv *il, struct il_led_cmd *led_cmd);
1637 struct il_legacy_ops {
1638 void (*post_associate) (struct il_priv *il);
1639 void (*config_ap) (struct il_priv *il);
1640 /* station management */
1641 int (*update_bcast_stations) (struct il_priv *il);
1642 int (*manage_ibss_station) (struct il_priv *il,
1643 struct ieee80211_vif *vif, bool add);
1647 const struct il_lib_ops *lib;
1648 const struct il_hcmd_ops *hcmd;
1649 const struct il_hcmd_utils_ops *utils;
1650 const struct il_led_ops *led;
1651 const struct il_nic_ops *nic;
1652 const struct il_legacy_ops *legacy;
1655 struct il_mod_params {
1656 int sw_crypto; /* def: 0 = using hardware encryption */
1657 int disable_hw_scan; /* def: 0 = use h/w scan */
1658 int num_of_queues; /* def: HW dependent */
1659 int disable_11n; /* def: 0 = 11n capabilities enabled */
1660 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */
1661 int antenna; /* def: 0 = both antennas (use diversity) */
1662 int restart_fw; /* def: 1 = restart firmware */
1666 * @led_compensation: compensate on the led on/off time per HW according
1667 * to the deviation to achieve the desired led frequency.
1668 * The detail algorithm is described in common.c
1669 * @chain_noise_num_beacons: number of beacons used to compute chain noise
1670 * @wd_timeout: TX queues watchdog timeout
1671 * @temperature_kelvin: temperature report by uCode in kelvin
1672 * @ucode_tracing: support ucode continuous tracing
1673 * @sensitivity_calib_by_driver: driver has the capability to perform
1674 * sensitivity calibration operation
1675 * @chain_noise_calib_by_driver: driver has the capability to perform
1676 * chain noise calibration operation
1678 struct il_base_params {
1681 #define IL_LED_SOLID 11
1682 #define IL_DEF_LED_INTRVL cpu_to_le32(1000)
1684 #define IL_LED_ACTIVITY (0<<1)
1685 #define IL_LED_LINK (1<<1)
1689 * IL_LED_DEFAULT: use device default
1690 * IL_LED_RF_STATE: turn LED on/off based on RF state
1693 * IL_LED_BLINK: adjust led blink rate based on blink table
1701 void il_leds_init(struct il_priv *il);
1702 void il_leds_exit(struct il_priv *il);
1706 * @fw_name_pre: Firmware filename prefix. The api version and extension
1707 * (.ucode) will be added to filename before loading from disk. The
1708 * filename is constructed as fw_name_pre<api>.ucode.
1709 * @ucode_api_max: Highest version of uCode API supported by driver.
1710 * @ucode_api_min: Lowest version of uCode API supported by driver.
1711 * @scan_antennas: available antenna for scan operation
1712 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
1714 * We enable the driver to be backward compatible wrt API version. The
1715 * driver specifies which APIs it supports (with @ucode_api_max being the
1716 * highest and @ucode_api_min the lowest). Firmware will only be loaded if
1717 * it has a supported API version. The firmware's API version will be
1718 * stored in @il_priv, enabling the driver to make runtime changes based
1719 * on firmware version used.
1722 * if (IL_UCODE_API(il->ucode_ver) >= 2) {
1723 * Driver interacts with Firmware API version >= 2.
1725 * Driver interacts with Firmware API version 1.
1728 * The ideal usage of this infrastructure is to treat a new ucode API
1729 * release as a new hardware revision. That is, through utilizing the
1730 * il_hcmd_utils_ops etc. we accommodate different command structures
1731 * and flows between hardware versions as well as their API
1736 /* params specific to an individual device within a device family */
1738 const char *fw_name_pre;
1739 const unsigned int ucode_api_max;
1740 const unsigned int ucode_api_min;
1745 u16 eeprom_calib_ver;
1746 /* module based parameters which can be set from modprobe cmd */
1747 const struct il_mod_params *mod_params;
1748 /* params not likely to change within a device family */
1749 struct il_base_params *base_params;
1750 /* params likely to change within a device family */
1751 u8 scan_rx_antennas[IEEE80211_NUM_BANDS];
1752 enum il_led_mode led_mode;
1755 int num_of_queues; /* def: HW dependent */
1756 int num_of_ampdu_queues; /* def: HW dependent */
1757 /* for il_apm_init() */
1762 u16 led_compensation;
1763 int chain_noise_num_beacons;
1764 unsigned int wd_timeout;
1765 bool temperature_kelvin;
1766 const bool ucode_tracing;
1767 const bool sensitivity_calib_by_driver;
1768 const bool chain_noise_calib_by_driver;
1770 const u32 regulatory_bands[7];
1773 /***************************
1775 ***************************/
1777 int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1778 u16 queue, const struct ieee80211_tx_queue_params *params);
1779 int il_mac_tx_last_beacon(struct ieee80211_hw *hw);
1781 void il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt);
1782 int il_check_rxon_cmd(struct il_priv *il);
1783 int il_full_rxon_required(struct il_priv *il);
1784 int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch);
1785 void il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
1786 struct ieee80211_vif *vif);
1787 u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band);
1788 void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
1789 bool il_is_ht40_tx_allowed(struct il_priv *il,
1790 struct ieee80211_sta_ht_cap *ht_cap);
1791 void il_connection_init_rx_config(struct il_priv *il);
1792 void il_set_rate(struct il_priv *il);
1793 int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
1794 u32 decrypt_res, struct ieee80211_rx_status *stats);
1795 void il_irq_handle_error(struct il_priv *il);
1796 int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1797 void il_mac_remove_interface(struct ieee80211_hw *hw,
1798 struct ieee80211_vif *vif);
1799 int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1800 enum nl80211_iftype newtype, bool newp2p);
1801 int il_alloc_txq_mem(struct il_priv *il);
1802 void il_txq_mem(struct il_priv *il);
1804 #ifdef CONFIG_IWLEGACY_DEBUGFS
1805 int il_alloc_traffic_mem(struct il_priv *il);
1806 void il_free_traffic_mem(struct il_priv *il);
1807 void il_reset_traffic_log(struct il_priv *il);
1808 void il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1809 struct ieee80211_hdr *header);
1810 void il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1811 struct ieee80211_hdr *header);
1812 const char *il_get_mgmt_string(int cmd);
1813 const char *il_get_ctrl_string(int cmd);
1814 void il_clear_traffic_stats(struct il_priv *il);
1815 void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
1818 il_alloc_traffic_mem(struct il_priv *il)
1824 il_free_traffic_mem(struct il_priv *il)
1829 il_reset_traffic_log(struct il_priv *il)
1834 il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1835 struct ieee80211_hdr *header)
1840 il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1841 struct ieee80211_hdr *header)
1846 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
1850 /*****************************************************
1852 * **************************************************/
1853 void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
1854 void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
1855 void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
1857 /*****************************************************
1859 ******************************************************/
1860 void il_cmd_queue_unmap(struct il_priv *il);
1861 void il_cmd_queue_free(struct il_priv *il);
1862 int il_rx_queue_alloc(struct il_priv *il);
1863 void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
1864 int il_rx_queue_space(const struct il_rx_queue *q);
1865 void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
1867 void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
1868 void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
1869 void il_chswitch_done(struct il_priv *il, bool is_success);
1870 void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1874 /*****************************************************
1876 ******************************************************/
1877 void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
1878 int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
1880 void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
1881 int slots_num, u32 txq_id);
1882 void il_tx_queue_unmap(struct il_priv *il, int txq_id);
1883 void il_tx_queue_free(struct il_priv *il, int txq_id);
1884 void il_setup_watchdog(struct il_priv *il);
1885 /*****************************************************
1887 ****************************************************/
1888 int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
1890 /*******************************************************************************
1892 ******************************************************************************/
1894 u8 il_get_lowest_plcp(struct il_priv *il);
1896 /*******************************************************************************
1898 ******************************************************************************/
1899 void il_init_scan_params(struct il_priv *il);
1900 int il_scan_cancel(struct il_priv *il);
1901 int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
1902 void il_force_scan_end(struct il_priv *il);
1903 int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1904 struct cfg80211_scan_request *req);
1905 void il_internal_short_hw_scan(struct il_priv *il);
1906 int il_force_reset(struct il_priv *il, bool external);
1907 u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1908 const u8 *ta, const u8 *ie, int ie_len, int left);
1909 void il_setup_rx_scan_handlers(struct il_priv *il);
1910 u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1912 u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1913 struct ieee80211_vif *vif);
1914 void il_setup_scan_deferred_work(struct il_priv *il);
1915 void il_cancel_scan_deferred_work(struct il_priv *il);
1917 /* For faster active scanning, scan will move to the next channel if fewer than
1918 * PLCP_QUIET_THRESH packets are heard on this channel within
1919 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
1920 * time if it's a quiet channel (nothing responded to our probe, and there's
1921 * no other traffic).
1922 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
1923 #define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */
1924 #define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */
1926 #define IL_SCAN_CHECK_WATCHDOG (HZ * 7)
1928 /*****************************************************
1929 * S e n d i n g H o s t C o m m a n d s *
1930 *****************************************************/
1932 const char *il_get_cmd_string(u8 cmd);
1933 int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
1934 int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
1935 int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
1937 int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
1938 void (*callback) (struct il_priv *il,
1939 struct il_device_cmd *cmd,
1940 struct il_rx_pkt *pkt));
1942 int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
1944 /*****************************************************
1946 *****************************************************/
1949 il_pcie_link_ctl(struct il_priv *il)
1953 pos = pci_pcie_cap(il->pci_dev);
1954 pci_read_config_word(il->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
1958 void il_bg_watchdog(unsigned long data);
1959 u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
1960 __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
1961 u32 beacon_interval);
1964 int il_pci_suspend(struct device *device);
1965 int il_pci_resume(struct device *device);
1966 extern const struct dev_pm_ops il_pm_ops;
1968 #define IL_LEGACY_PM_OPS (&il_pm_ops)
1970 #else /* !CONFIG_PM */
1972 #define IL_LEGACY_PM_OPS NULL
1974 #endif /* !CONFIG_PM */
1976 /*****************************************************
1977 * Error Handling Debugging
1978 ******************************************************/
1979 void il4965_dump_nic_error_log(struct il_priv *il);
1980 #ifdef CONFIG_IWLEGACY_DEBUG
1981 void il_print_rx_config_cmd(struct il_priv *il);
1984 il_print_rx_config_cmd(struct il_priv *il)
1989 void il_clear_isr_stats(struct il_priv *il);
1991 /*****************************************************
1993 ******************************************************/
1994 int il_init_geos(struct il_priv *il);
1995 void il_free_geos(struct il_priv *il);
1997 /*************** DRIVER STATUS FUNCTIONS *****/
1999 #define S_HCMD_ACTIVE 0 /* host command in progress */
2000 /* 1 is unused (used to be S_HCMD_SYNC_ACTIVE) */
2001 #define S_INT_ENABLED 2
2002 #define S_RF_KILL_HW 3
2007 #define S_TEMPERATURE 8
2008 #define S_GEO_CONFIGURED 9
2009 #define S_EXIT_PENDING 10
2011 #define S_SCANNING 13
2012 #define S_SCAN_ABORTING 14
2013 #define S_SCAN_HW 15
2014 #define S_POWER_PMI 16
2015 #define S_FW_ERROR 17
2016 #define S_CHANNEL_SWITCH_PENDING 18
2019 il_is_ready(struct il_priv *il)
2021 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
2022 * set but EXIT_PENDING is not */
2023 return test_bit(S_READY, &il->status) &&
2024 test_bit(S_GEO_CONFIGURED, &il->status) &&
2025 !test_bit(S_EXIT_PENDING, &il->status);
2029 il_is_alive(struct il_priv *il)
2031 return test_bit(S_ALIVE, &il->status);
2035 il_is_init(struct il_priv *il)
2037 return test_bit(S_INIT, &il->status);
2041 il_is_rfkill_hw(struct il_priv *il)
2043 return test_bit(S_RF_KILL_HW, &il->status);
2047 il_is_rfkill(struct il_priv *il)
2049 return il_is_rfkill_hw(il);
2053 il_is_ctkill(struct il_priv *il)
2055 return test_bit(S_CT_KILL, &il->status);
2059 il_is_ready_rf(struct il_priv *il)
2062 if (il_is_rfkill(il))
2065 return il_is_ready(il);
2068 extern void il_send_bt_config(struct il_priv *il);
2069 extern int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
2070 void il_apm_stop(struct il_priv *il);
2071 int il_apm_init(struct il_priv *il);
2073 int il_send_rxon_timing(struct il_priv *il);
2076 il_send_rxon_assoc(struct il_priv *il)
2078 return il->ops->hcmd->rxon_assoc(il);
2082 il_commit_rxon(struct il_priv *il)
2084 return il->ops->hcmd->commit_rxon(il);
2087 static inline const struct ieee80211_supported_band *
2088 il_get_hw_mode(struct il_priv *il, enum ieee80211_band band)
2090 return il->hw->wiphy->bands[band];
2093 /* mac80211 handlers */
2094 int il_mac_config(struct ieee80211_hw *hw, u32 changed);
2095 void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
2096 void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2097 struct ieee80211_bss_conf *bss_conf, u32 changes);
2098 void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
2099 __le16 fc, __le32 *tx_flags);
2101 irqreturn_t il_isr(int irq, void *data);
2103 extern void il_set_bit(struct il_priv *p, u32 r, u32 m);
2104 extern void il_clear_bit(struct il_priv *p, u32 r, u32 m);
2105 extern bool _il_grab_nic_access(struct il_priv *il);
2106 extern int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
2107 extern int il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout);
2108 extern u32 il_rd_prph(struct il_priv *il, u32 reg);
2109 extern void il_wr_prph(struct il_priv *il, u32 addr, u32 val);
2110 extern u32 il_read_targ_mem(struct il_priv *il, u32 addr);
2111 extern void il_write_targ_mem(struct il_priv *il, u32 addr, u32 val);
2114 _il_write8(struct il_priv *il, u32 ofs, u8 val)
2116 writeb(val, il->hw_base + ofs);
2118 #define il_write8(il, ofs, val) _il_write8(il, ofs, val)
2121 _il_wr(struct il_priv *il, u32 ofs, u32 val)
2123 writel(val, il->hw_base + ofs);
2127 _il_rd(struct il_priv *il, u32 ofs)
2129 return readl(il->hw_base + ofs);
2133 _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
2135 _il_wr(il, reg, _il_rd(il, reg) & ~mask);
2139 _il_set_bit(struct il_priv *il, u32 reg, u32 mask)
2141 _il_wr(il, reg, _il_rd(il, reg) | mask);
2145 _il_release_nic_access(struct il_priv *il)
2147 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2149 * In above we are reading CSR_GP_CNTRL register, what will flush any
2150 * previous writes, but still want write, which clear MAC_ACCESS_REQ
2151 * bit, be performed on PCI bus before any other writes scheduled on
2152 * different CPUs (after we drop reg_lock).
2158 il_rd(struct il_priv *il, u32 reg)
2161 unsigned long reg_flags;
2163 spin_lock_irqsave(&il->reg_lock, reg_flags);
2164 _il_grab_nic_access(il);
2165 value = _il_rd(il, reg);
2166 _il_release_nic_access(il);
2167 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2172 il_wr(struct il_priv *il, u32 reg, u32 value)
2174 unsigned long reg_flags;
2176 spin_lock_irqsave(&il->reg_lock, reg_flags);
2177 if (likely(_il_grab_nic_access(il))) {
2178 _il_wr(il, reg, value);
2179 _il_release_nic_access(il);
2181 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2185 _il_rd_prph(struct il_priv *il, u32 reg)
2187 _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
2188 return _il_rd(il, HBUS_TARG_PRPH_RDAT);
2192 _il_wr_prph(struct il_priv *il, u32 addr, u32 val)
2194 _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24)));
2195 _il_wr(il, HBUS_TARG_PRPH_WDAT, val);
2199 il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2201 unsigned long reg_flags;
2203 spin_lock_irqsave(&il->reg_lock, reg_flags);
2204 if (likely(_il_grab_nic_access(il))) {
2205 _il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask));
2206 _il_release_nic_access(il);
2208 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2212 il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
2214 unsigned long reg_flags;
2216 spin_lock_irqsave(&il->reg_lock, reg_flags);
2217 if (likely(_il_grab_nic_access(il))) {
2218 _il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits));
2219 _il_release_nic_access(il);
2221 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2225 il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2227 unsigned long reg_flags;
2230 spin_lock_irqsave(&il->reg_lock, reg_flags);
2231 if (likely(_il_grab_nic_access(il))) {
2232 val = _il_rd_prph(il, reg);
2233 _il_wr_prph(il, reg, (val & ~mask));
2234 _il_release_nic_access(il);
2236 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2239 #define HW_KEY_DYNAMIC 0
2240 #define HW_KEY_DEFAULT 1
2242 #define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */
2243 #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
2244 #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
2246 #define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211;
2247 (this is for the IBSS BSSID stations) */
2248 #define IL_STA_BCAST BIT(4) /* this station is the special bcast station */
2250 void il_restore_stations(struct il_priv *il);
2251 void il_clear_ucode_stations(struct il_priv *il);
2252 void il_dealloc_bcast_stations(struct il_priv *il);
2253 int il_get_free_ucode_key_idx(struct il_priv *il);
2254 int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
2255 int il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
2256 struct ieee80211_sta *sta, u8 *sta_id_r);
2257 int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
2258 int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2259 struct ieee80211_sta *sta);
2261 u8 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
2262 struct ieee80211_sta *sta);
2264 int il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2265 u8 flags, bool init);
2268 * il_clear_driver_stations - clear knowledge of all stations from driver
2269 * @il: iwl il struct
2271 * This is called during il_down() to make sure that in the case
2272 * we're coming there from a hardware restart mac80211 will be
2273 * able to reconfigure stations -- if we're getting there in the
2274 * normal down flow then the stations will already be cleared.
2277 il_clear_driver_stations(struct il_priv *il)
2279 unsigned long flags;
2281 spin_lock_irqsave(&il->sta_lock, flags);
2282 memset(il->stations, 0, sizeof(il->stations));
2283 il->num_stations = 0;
2284 il->ucode_key_table = 0;
2285 spin_unlock_irqrestore(&il->sta_lock, flags);
2289 il_sta_id(struct ieee80211_sta *sta)
2292 return IL_INVALID_STATION;
2294 return ((struct il_station_priv_common *)sta->drv_priv)->sta_id;
2298 * il_sta_id_or_broadcast - return sta_id or broadcast sta
2300 * @context: the current context
2301 * @sta: mac80211 station
2303 * In certain circumstances mac80211 passes a station pointer
2304 * that may be %NULL, for example during TX or key setup. In
2305 * that case, we need to use the broadcast station, so this
2306 * inline wraps that pattern.
2309 il_sta_id_or_broadcast(struct il_priv *il, struct ieee80211_sta *sta)
2314 return il->hw_params.bcast_id;
2316 sta_id = il_sta_id(sta);
2319 * mac80211 should not be passing a partially
2320 * initialised station!
2322 WARN_ON(sta_id == IL_INVALID_STATION);
2328 * il_queue_inc_wrap - increment queue idx, wrap back to beginning
2329 * @idx -- current idx
2330 * @n_bd -- total number of entries in queue (must be power of 2)
2333 il_queue_inc_wrap(int idx, int n_bd)
2335 return ++idx & (n_bd - 1);
2339 * il_queue_dec_wrap - decrement queue idx, wrap back to end
2340 * @idx -- current idx
2341 * @n_bd -- total number of entries in queue (must be power of 2)
2344 il_queue_dec_wrap(int idx, int n_bd)
2346 return --idx & (n_bd - 1);
2349 /* TODO: Move fw_desc functions to iwl-pci.ko */
2351 il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2354 dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr,
2356 desc->v_addr = NULL;
2361 il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2364 desc->v_addr = NULL;
2369 dma_alloc_coherent(&pci_dev->dev, desc->len, &desc->p_addr,
2371 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
2375 * we have 8 bits used like this:
2379 * | | | | | | +-+-------- AC queue (0-3)
2381 * | +-+-+-+-+------------ HW queue ID
2383 * +---------------------- unused
2386 il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq)
2388 BUG_ON(ac > 3); /* only have 2 bits */
2389 BUG_ON(hwq > 31); /* only use 5 bits */
2391 txq->swq_id = (hwq << 2) | ac;
2395 il_wake_queue(struct il_priv *il, struct il_tx_queue *txq)
2397 u8 queue = txq->swq_id;
2399 u8 hwq = (queue >> 2) & 0x1f;
2401 if (test_and_clear_bit(hwq, il->queue_stopped))
2402 if (atomic_dec_return(&il->queue_stop_count[ac]) <= 0)
2403 ieee80211_wake_queue(il->hw, ac);
2407 il_stop_queue(struct il_priv *il, struct il_tx_queue *txq)
2409 u8 queue = txq->swq_id;
2411 u8 hwq = (queue >> 2) & 0x1f;
2413 if (!test_and_set_bit(hwq, il->queue_stopped))
2414 if (atomic_inc_return(&il->queue_stop_count[ac]) > 0)
2415 ieee80211_stop_queue(il->hw, ac);
2418 #ifdef ieee80211_stop_queue
2419 #undef ieee80211_stop_queue
2422 #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
2424 #ifdef ieee80211_wake_queue
2425 #undef ieee80211_wake_queue
2428 #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
2431 il_disable_interrupts(struct il_priv *il)
2433 clear_bit(S_INT_ENABLED, &il->status);
2435 /* disable interrupts from uCode/NIC to host */
2436 _il_wr(il, CSR_INT_MASK, 0x00000000);
2438 /* acknowledge/clear/reset any interrupts still pending
2439 * from uCode or flow handler (Rx/Tx DMA) */
2440 _il_wr(il, CSR_INT, 0xffffffff);
2441 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
2445 il_enable_rfkill_int(struct il_priv *il)
2447 _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
2451 il_enable_interrupts(struct il_priv *il)
2453 set_bit(S_INT_ENABLED, &il->status);
2454 _il_wr(il, CSR_INT_MASK, il->inta_mask);
2458 * il_beacon_time_mask_low - mask of lower 32 bit of beacon time
2459 * @il -- pointer to il_priv data structure
2460 * @tsf_bits -- number of bits need to shift for masking)
2463 il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits)
2465 return (1 << tsf_bits) - 1;
2469 * il_beacon_time_mask_high - mask of higher 32 bit of beacon time
2470 * @il -- pointer to il_priv data structure
2471 * @tsf_bits -- number of bits need to shift for masking)
2474 il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits)
2476 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
2480 * struct il_rb_status - reseve buffer status host memory mapped FH registers
2482 * @closed_rb_num [0:11] - Indicates the idx of the RB which was closed
2483 * @closed_fr_num [0:11] - Indicates the idx of the RX Frame which was closed
2484 * @finished_rb_num [0:11] - Indicates the idx of the current RB
2485 * in which the last frame was written to
2486 * @finished_fr_num [0:11] - Indicates the idx of the RX Frame
2487 * which was transferred
2489 struct il_rb_status {
2490 __le16 closed_rb_num;
2491 __le16 closed_fr_num;
2492 __le16 finished_rb_num;
2493 __le16 finished_fr_nam;
2494 __le32 __unused; /* 3945 only */
2497 #define TFD_QUEUE_SIZE_MAX (256)
2498 #define TFD_QUEUE_SIZE_BC_DUP (64)
2499 #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
2500 #define IL_TX_DMA_MASK DMA_BIT_MASK(36)
2501 #define IL_NUM_OF_TBS 20
2504 il_get_dma_hi_addr(dma_addr_t addr)
2506 return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF;
2510 * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor
2512 * This structure contains dma address and length of transmission address
2514 * @lo: low [31:0] portion of the dma address of TX buffer every even is
2515 * unaligned on 16 bit boundary
2516 * @hi_n_len: 0-3 [35:32] portion of dma
2517 * 4-15 length of the tx buffer
2527 * Transmit Frame Descriptor (TFD)
2529 * @ __reserved1[3] reserved
2530 * @ num_tbs 0-4 number of active tbs
2532 * 6-7 padding (not used)
2533 * @ tbs[20] transmit frame buffer descriptors
2536 * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
2537 * Both driver and device share these circular buffers, each of which must be
2538 * contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes
2540 * Driver must indicate the physical address of the base of each
2541 * circular buffer via the FH49_MEM_CBBC_QUEUE registers.
2543 * Each TFD contains pointer/size information for up to 20 data buffers
2544 * in host DRAM. These buffers collectively contain the (one) frame described
2545 * by the TFD. Each buffer must be a single contiguous block of memory within
2546 * itself, but buffers may be scattered in host DRAM. Each buffer has max size
2547 * of (4K - 4). The concatenates all of a TFD's buffers into a single
2548 * Tx frame, up to 8 KBytes in size.
2550 * A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
2555 struct il_tfd_tb tbs[IL_NUM_OF_TBS];
2559 #define PCI_CFG_RETRY_TIMEOUT 0x041
2561 /* PCI register values */
2562 #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
2563 #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
2565 struct il_rate_info {
2566 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
2567 u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */
2568 u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */
2569 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
2570 u8 prev_ieee; /* previous rate in IEEE speeds */
2571 u8 next_ieee; /* next rate in IEEE speeds */
2572 u8 prev_rs; /* previous rate used in rs algo */
2573 u8 next_rs; /* next rate used in rs algo */
2574 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
2575 u8 next_rs_tgg; /* next rate used in TGG rs algo */
2578 struct il3945_rate_info {
2579 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
2580 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
2581 u8 prev_ieee; /* previous rate in IEEE speeds */
2582 u8 next_ieee; /* next rate in IEEE speeds */
2583 u8 prev_rs; /* previous rate used in rs algo */
2584 u8 next_rs; /* next rate used in rs algo */
2585 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
2586 u8 next_rs_tgg; /* next rate used in TGG rs algo */
2587 u8 table_rs_idx; /* idx in rate scale table cmd */
2588 u8 prev_table_rs; /* prev in rate table cmd */
2592 * These serve as idxes into
2593 * struct il_rate_info il_rates[RATE_COUNT];
2610 RATE_COUNT_LEGACY = RATE_COUNT - 1, /* Excluding 60M */
2611 RATE_COUNT_3945 = RATE_COUNT - 1,
2612 RATE_INVM_IDX = RATE_COUNT,
2613 RATE_INVALID = RATE_COUNT,
2617 RATE_6M_IDX_TBL = 0,
2629 RATE_INVM_IDX_TBL = RATE_INVM_IDX - 1,
2633 IL_FIRST_OFDM_RATE = RATE_6M_IDX,
2634 IL39_LAST_OFDM_RATE = RATE_54M_IDX,
2635 IL_LAST_OFDM_RATE = RATE_60M_IDX,
2636 IL_FIRST_CCK_RATE = RATE_1M_IDX,
2637 IL_LAST_CCK_RATE = RATE_11M_IDX,
2640 /* #define vs. enum to keep from defaulting to 'large integer' */
2641 #define RATE_6M_MASK (1 << RATE_6M_IDX)
2642 #define RATE_9M_MASK (1 << RATE_9M_IDX)
2643 #define RATE_12M_MASK (1 << RATE_12M_IDX)
2644 #define RATE_18M_MASK (1 << RATE_18M_IDX)
2645 #define RATE_24M_MASK (1 << RATE_24M_IDX)
2646 #define RATE_36M_MASK (1 << RATE_36M_IDX)
2647 #define RATE_48M_MASK (1 << RATE_48M_IDX)
2648 #define RATE_54M_MASK (1 << RATE_54M_IDX)
2649 #define RATE_60M_MASK (1 << RATE_60M_IDX)
2650 #define RATE_1M_MASK (1 << RATE_1M_IDX)
2651 #define RATE_2M_MASK (1 << RATE_2M_IDX)
2652 #define RATE_5M_MASK (1 << RATE_5M_IDX)
2653 #define RATE_11M_MASK (1 << RATE_11M_IDX)
2655 /* uCode API values for legacy bit rates, both OFDM and CCK */
2665 RATE_60M_PLCP = 3, /*FIXME:RS:should be removed */
2669 RATE_11M_PLCP = 110,
2670 /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */
2673 /* uCode API values for OFDM high-throughput (HT) bit rates */
2675 RATE_SISO_6M_PLCP = 0,
2676 RATE_SISO_12M_PLCP = 1,
2677 RATE_SISO_18M_PLCP = 2,
2678 RATE_SISO_24M_PLCP = 3,
2679 RATE_SISO_36M_PLCP = 4,
2680 RATE_SISO_48M_PLCP = 5,
2681 RATE_SISO_54M_PLCP = 6,
2682 RATE_SISO_60M_PLCP = 7,
2683 RATE_MIMO2_6M_PLCP = 0x8,
2684 RATE_MIMO2_12M_PLCP = 0x9,
2685 RATE_MIMO2_18M_PLCP = 0xa,
2686 RATE_MIMO2_24M_PLCP = 0xb,
2687 RATE_MIMO2_36M_PLCP = 0xc,
2688 RATE_MIMO2_48M_PLCP = 0xd,
2689 RATE_MIMO2_54M_PLCP = 0xe,
2690 RATE_MIMO2_60M_PLCP = 0xf,
2691 RATE_SISO_INVM_PLCP,
2692 RATE_MIMO2_INVM_PLCP = RATE_SISO_INVM_PLCP,
2695 /* MAC header values for bit rates */
2704 RATE_54M_IEEE = 108,
2705 RATE_60M_IEEE = 120,
2712 #define IL_CCK_BASIC_RATES_MASK \
2716 #define IL_CCK_RATES_MASK \
2717 (IL_CCK_BASIC_RATES_MASK | \
2721 #define IL_OFDM_BASIC_RATES_MASK \
2726 #define IL_OFDM_RATES_MASK \
2727 (IL_OFDM_BASIC_RATES_MASK | \
2734 #define IL_BASIC_RATES_MASK \
2735 (IL_OFDM_BASIC_RATES_MASK | \
2736 IL_CCK_BASIC_RATES_MASK)
2738 #define RATES_MASK ((1 << RATE_COUNT) - 1)
2739 #define RATES_MASK_3945 ((1 << RATE_COUNT_3945) - 1)
2741 #define IL_INVALID_VALUE -1
2743 #define IL_MIN_RSSI_VAL -100
2744 #define IL_MAX_RSSI_VAL 0
2746 /* These values specify how many Tx frame attempts before
2747 * searching for a new modulation mode */
2748 #define IL_LEGACY_FAILURE_LIMIT 160
2749 #define IL_LEGACY_SUCCESS_LIMIT 480
2750 #define IL_LEGACY_TBL_COUNT 160
2752 #define IL_NONE_LEGACY_FAILURE_LIMIT 400
2753 #define IL_NONE_LEGACY_SUCCESS_LIMIT 4500
2754 #define IL_NONE_LEGACY_TBL_COUNT 1500
2756 /* Success ratio (ACKed / attempted tx frames) values (perfect is 128 * 100) */
2757 #define IL_RS_GOOD_RATIO 12800 /* 100% */
2758 #define RATE_SCALE_SWITCH 10880 /* 85% */
2759 #define RATE_HIGH_TH 10880 /* 85% */
2760 #define RATE_INCREASE_TH 6400 /* 50% */
2761 #define RATE_DECREASE_TH 1920 /* 15% */
2763 /* possible actions when in legacy mode */
2764 #define IL_LEGACY_SWITCH_ANTENNA1 0
2765 #define IL_LEGACY_SWITCH_ANTENNA2 1
2766 #define IL_LEGACY_SWITCH_SISO 2
2767 #define IL_LEGACY_SWITCH_MIMO2_AB 3
2768 #define IL_LEGACY_SWITCH_MIMO2_AC 4
2769 #define IL_LEGACY_SWITCH_MIMO2_BC 5
2771 /* possible actions when in siso mode */
2772 #define IL_SISO_SWITCH_ANTENNA1 0
2773 #define IL_SISO_SWITCH_ANTENNA2 1
2774 #define IL_SISO_SWITCH_MIMO2_AB 2
2775 #define IL_SISO_SWITCH_MIMO2_AC 3
2776 #define IL_SISO_SWITCH_MIMO2_BC 4
2777 #define IL_SISO_SWITCH_GI 5
2779 /* possible actions when in mimo mode */
2780 #define IL_MIMO2_SWITCH_ANTENNA1 0
2781 #define IL_MIMO2_SWITCH_ANTENNA2 1
2782 #define IL_MIMO2_SWITCH_SISO_A 2
2783 #define IL_MIMO2_SWITCH_SISO_B 3
2784 #define IL_MIMO2_SWITCH_SISO_C 4
2785 #define IL_MIMO2_SWITCH_GI 5
2787 #define IL_MAX_SEARCH IL_MIMO2_SWITCH_GI
2789 #define IL_ACTION_LIMIT 3 /* # possible actions */
2791 #define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */
2793 /* load per tid defines for A-MPDU activation */
2794 #define IL_AGG_TPT_THREHOLD 0
2795 #define IL_AGG_LOAD_THRESHOLD 10
2796 #define IL_AGG_ALL_TID 0xff
2797 #define TID_QUEUE_CELL_SPACING 50 /*mS */
2798 #define TID_QUEUE_MAX_SIZE 20
2799 #define TID_ROUND_VALUE 5 /* mS */
2800 #define TID_MAX_LOAD_COUNT 8
2802 #define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
2803 #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
2805 extern const struct il_rate_info il_rates[RATE_COUNT];
2807 enum il_table_type {
2809 LQ_G, /* legacy types */
2811 LQ_SISO, /* high-throughput types */
2816 #define is_legacy(tbl) ((tbl) == LQ_G || (tbl) == LQ_A)
2817 #define is_siso(tbl) ((tbl) == LQ_SISO)
2818 #define is_mimo2(tbl) ((tbl) == LQ_MIMO2)
2819 #define is_mimo(tbl) (is_mimo2(tbl))
2820 #define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
2821 #define is_a_band(tbl) ((tbl) == LQ_A)
2822 #define is_g_and(tbl) ((tbl) == LQ_G)
2824 #define ANT_NONE 0x0
2825 #define ANT_A BIT(0)
2826 #define ANT_B BIT(1)
2827 #define ANT_AB (ANT_A | ANT_B)
2828 #define ANT_C BIT(2)
2829 #define ANT_AC (ANT_A | ANT_C)
2830 #define ANT_BC (ANT_B | ANT_C)
2831 #define ANT_ABC (ANT_AB | ANT_C)
2833 #define IL_MAX_MCS_DISPLAY_SIZE 12
2835 struct il_rate_mcs_info {
2836 char mbps[IL_MAX_MCS_DISPLAY_SIZE];
2837 char mcs[IL_MAX_MCS_DISPLAY_SIZE];
2841 * struct il_rate_scale_data -- tx success history for one rate
2843 struct il_rate_scale_data {
2844 u64 data; /* bitmap of successful frames */
2845 s32 success_counter; /* number of frames successful */
2846 s32 success_ratio; /* per-cent * 128 */
2847 s32 counter; /* number of frames attempted */
2848 s32 average_tpt; /* success ratio * expected throughput */
2849 unsigned long stamp;
2853 * struct il_scale_tbl_info -- tx params and success history for all rates
2855 * There are two of these in struct il_lq_sta,
2856 * one for "active", and one for "search".
2858 struct il_scale_tbl_info {
2859 enum il_table_type lq_type;
2861 u8 is_SGI; /* 1 = short guard interval */
2862 u8 is_ht40; /* 1 = 40 MHz channel width */
2863 u8 is_dup; /* 1 = duplicated data streams */
2864 u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */
2865 u8 max_search; /* maximun number of tables we can search */
2866 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
2867 u32 current_rate; /* rate_n_flags, uCode API format */
2868 struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */
2871 struct il_traffic_load {
2872 unsigned long time_stamp; /* age of the oldest stats */
2873 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
2875 u32 total; /* total num of packets during the
2876 * last TID_MAX_TIME_DIFF */
2877 u8 queue_count; /* number of queues that has
2878 * been used since the last cleanup */
2879 u8 head; /* start of the circular buffer */
2883 * struct il_lq_sta -- driver's rate scaling ilate structure
2885 * Pointer to this gets passed back and forth between driver and mac80211.
2888 u8 active_tbl; /* idx of active table, range 0-1 */
2889 u8 enable_counter; /* indicates HT mode */
2890 u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
2891 u8 search_better_tbl; /* 1: currently trying alternate mode */
2894 /* The following determine when to search for a new mode */
2895 u32 table_count_limit;
2896 u32 max_failure_limit; /* # failed frames before new search */
2897 u32 max_success_limit; /* # successful frames before new search */
2899 u32 total_failed; /* total failed frames, any/all rates */
2900 u32 total_success; /* total successful frames, any/all rates */
2901 u64 flush_timer; /* time staying in mode before new search */
2903 u8 action_counter; /* # mode-switch actions tried */
2906 enum ieee80211_band band;
2908 /* The following are bitmaps of rates; RATE_6M_MASK, etc. */
2910 u16 active_legacy_rate;
2911 u16 active_siso_rate;
2912 u16 active_mimo2_rate;
2913 s8 max_rate_idx; /* Max rate set by user */
2914 u8 missed_rate_counter;
2916 struct il_link_quality_cmd lq;
2917 struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
2918 struct il_traffic_load load[TID_MAX_LOAD_COUNT];
2920 #ifdef CONFIG_MAC80211_DEBUGFS
2921 struct dentry *rs_sta_dbgfs_scale_table_file;
2922 struct dentry *rs_sta_dbgfs_stats_table_file;
2923 struct dentry *rs_sta_dbgfs_rate_scale_data_file;
2924 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
2927 struct il_priv *drv;
2929 /* used to be in sta_info */
2930 int last_txrate_idx;
2931 /* last tx rate_n_flags */
2932 u32 last_rate_n_flags;
2933 /* packets destined for this STA are aggregated */
2938 * il_station_priv: Driver's ilate station information
2940 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
2941 * in the structure for use by driver. This structure is places in that
2944 * The common struct MUST be first because it is shared between
2947 struct il_station_priv {
2948 struct il_station_priv_common common;
2949 struct il_lq_sta lq_sta;
2950 atomic_t pending_frames;
2956 il4965_num_of_ant(u8 m)
2958 return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C);
2962 il4965_first_antenna(u8 mask)
2972 * il3945_rate_scale_init - Initialize the rate scale table based on assoc info
2974 * The specific throughput table used is based on the type of network
2975 * the associated with, including A, B, G, and G w/ TGG protection
2977 extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
2979 /* Initialize station's rate scaling information after adding station */
2980 extern void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2982 extern void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2986 * il_rate_control_register - Register the rate control algorithm callbacks
2988 * Since the rate control algorithm is hardware specific, there is no need
2989 * or reason to place it as a stand alone module. The driver can call
2990 * il_rate_control_register in order to register the rate control callbacks
2991 * with the mac80211 subsystem. This should be performed prior to calling
2992 * ieee80211_register_hw
2995 extern int il4965_rate_control_register(void);
2996 extern int il3945_rate_control_register(void);
2999 * il_rate_control_unregister - Unregister the rate control callbacks
3001 * This should be called after calling ieee80211_unregister_hw, but before
3002 * the driver is unloaded.
3004 extern void il4965_rate_control_unregister(void);
3005 extern void il3945_rate_control_unregister(void);
3007 extern int il_power_update_mode(struct il_priv *il, bool force);
3008 extern void il_power_initialize(struct il_priv *il);
3010 extern u32 il_debug_level;
3012 #ifdef CONFIG_IWLEGACY_DEBUG
3014 * il_get_debug_level: Return active debug level for device
3016 * Using sysfs it is possible to set per device debug level. This debug
3017 * level will be used if set, otherwise the global debug level which can be
3018 * set via module parameter is used.
3021 il_get_debug_level(struct il_priv *il)
3023 if (il->debug_level)
3024 return il->debug_level;
3026 return il_debug_level;
3030 il_get_debug_level(struct il_priv *il)
3032 return il_debug_level;
3036 #define il_print_hex_error(il, p, len) \
3038 print_hex_dump(KERN_ERR, "iwl data: ", \
3039 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
3042 #ifdef CONFIG_IWLEGACY_DEBUG
3043 #define IL_DBG(level, fmt, args...) \
3045 if (il_get_debug_level(il) & level) \
3046 dev_printk(KERN_ERR, &il->hw->wiphy->dev, \
3047 "%c %s " fmt, in_interrupt() ? 'I' : 'U', \
3048 __func__ , ## args); \
3051 #define il_print_hex_dump(il, level, p, len) \
3053 if (il_get_debug_level(il) & level) \
3054 print_hex_dump(KERN_DEBUG, "iwl data: ", \
3055 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
3059 #define IL_DBG(level, fmt, args...)
3061 il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len)
3064 #endif /* CONFIG_IWLEGACY_DEBUG */
3066 #ifdef CONFIG_IWLEGACY_DEBUGFS
3067 int il_dbgfs_register(struct il_priv *il, const char *name);
3068 void il_dbgfs_unregister(struct il_priv *il);
3071 il_dbgfs_register(struct il_priv *il, const char *name)
3077 il_dbgfs_unregister(struct il_priv *il)
3080 #endif /* CONFIG_IWLEGACY_DEBUGFS */
3083 * To use the debug system:
3085 * If you are defining a new debug classification, simply add it to the #define
3086 * list here in the form of
3088 * #define IL_DL_xxxx VALUE
3090 * where xxxx should be the name of the classification (for example, WEP).
3092 * You then need to either add a IL_xxxx_DEBUG() macro definition for your
3093 * classification, or use IL_DBG(IL_DL_xxxx, ...) whenever you want
3094 * to send output to that classification.
3096 * The active debug levels can be accessed via files
3098 * /sys/module/iwl4965/parameters/debug
3099 * /sys/module/iwl3945/parameters/debug
3100 * /sys/class/net/wlan0/device/debug_level
3102 * when CONFIG_IWLEGACY_DEBUG=y.
3105 /* 0x0000000F - 0x00000001 */
3106 #define IL_DL_INFO (1 << 0)
3107 #define IL_DL_MAC80211 (1 << 1)
3108 #define IL_DL_HCMD (1 << 2)
3109 #define IL_DL_STATE (1 << 3)
3110 /* 0x000000F0 - 0x00000010 */
3111 #define IL_DL_MACDUMP (1 << 4)
3112 #define IL_DL_HCMD_DUMP (1 << 5)
3113 #define IL_DL_EEPROM (1 << 6)
3114 #define IL_DL_RADIO (1 << 7)
3115 /* 0x00000F00 - 0x00000100 */
3116 #define IL_DL_POWER (1 << 8)
3117 #define IL_DL_TEMP (1 << 9)
3118 #define IL_DL_NOTIF (1 << 10)
3119 #define IL_DL_SCAN (1 << 11)
3120 /* 0x0000F000 - 0x00001000 */
3121 #define IL_DL_ASSOC (1 << 12)
3122 #define IL_DL_DROP (1 << 13)
3123 #define IL_DL_TXPOWER (1 << 14)
3124 #define IL_DL_AP (1 << 15)
3125 /* 0x000F0000 - 0x00010000 */
3126 #define IL_DL_FW (1 << 16)
3127 #define IL_DL_RF_KILL (1 << 17)
3128 #define IL_DL_FW_ERRORS (1 << 18)
3129 #define IL_DL_LED (1 << 19)
3130 /* 0x00F00000 - 0x00100000 */
3131 #define IL_DL_RATE (1 << 20)
3132 #define IL_DL_CALIB (1 << 21)
3133 #define IL_DL_WEP (1 << 22)
3134 #define IL_DL_TX (1 << 23)
3135 /* 0x0F000000 - 0x01000000 */
3136 #define IL_DL_RX (1 << 24)
3137 #define IL_DL_ISR (1 << 25)
3138 #define IL_DL_HT (1 << 26)
3139 /* 0xF0000000 - 0x10000000 */
3140 #define IL_DL_11H (1 << 28)
3141 #define IL_DL_STATS (1 << 29)
3142 #define IL_DL_TX_REPLY (1 << 30)
3143 #define IL_DL_QOS (1 << 31)
3145 #define D_INFO(f, a...) IL_DBG(IL_DL_INFO, f, ## a)
3146 #define D_MAC80211(f, a...) IL_DBG(IL_DL_MAC80211, f, ## a)
3147 #define D_MACDUMP(f, a...) IL_DBG(IL_DL_MACDUMP, f, ## a)
3148 #define D_TEMP(f, a...) IL_DBG(IL_DL_TEMP, f, ## a)
3149 #define D_SCAN(f, a...) IL_DBG(IL_DL_SCAN, f, ## a)
3150 #define D_RX(f, a...) IL_DBG(IL_DL_RX, f, ## a)
3151 #define D_TX(f, a...) IL_DBG(IL_DL_TX, f, ## a)
3152 #define D_ISR(f, a...) IL_DBG(IL_DL_ISR, f, ## a)
3153 #define D_LED(f, a...) IL_DBG(IL_DL_LED, f, ## a)
3154 #define D_WEP(f, a...) IL_DBG(IL_DL_WEP, f, ## a)
3155 #define D_HC(f, a...) IL_DBG(IL_DL_HCMD, f, ## a)
3156 #define D_HC_DUMP(f, a...) IL_DBG(IL_DL_HCMD_DUMP, f, ## a)
3157 #define D_EEPROM(f, a...) IL_DBG(IL_DL_EEPROM, f, ## a)
3158 #define D_CALIB(f, a...) IL_DBG(IL_DL_CALIB, f, ## a)
3159 #define D_FW(f, a...) IL_DBG(IL_DL_FW, f, ## a)
3160 #define D_RF_KILL(f, a...) IL_DBG(IL_DL_RF_KILL, f, ## a)
3161 #define D_DROP(f, a...) IL_DBG(IL_DL_DROP, f, ## a)
3162 #define D_AP(f, a...) IL_DBG(IL_DL_AP, f, ## a)
3163 #define D_TXPOWER(f, a...) IL_DBG(IL_DL_TXPOWER, f, ## a)
3164 #define D_RATE(f, a...) IL_DBG(IL_DL_RATE, f, ## a)
3165 #define D_NOTIF(f, a...) IL_DBG(IL_DL_NOTIF, f, ## a)
3166 #define D_ASSOC(f, a...) IL_DBG(IL_DL_ASSOC, f, ## a)
3167 #define D_HT(f, a...) IL_DBG(IL_DL_HT, f, ## a)
3168 #define D_STATS(f, a...) IL_DBG(IL_DL_STATS, f, ## a)
3169 #define D_TX_REPLY(f, a...) IL_DBG(IL_DL_TX_REPLY, f, ## a)
3170 #define D_QOS(f, a...) IL_DBG(IL_DL_QOS, f, ## a)
3171 #define D_RADIO(f, a...) IL_DBG(IL_DL_RADIO, f, ## a)
3172 #define D_POWER(f, a...) IL_DBG(IL_DL_POWER, f, ## a)
3173 #define D_11H(f, a...) IL_DBG(IL_DL_11H, f, ## a)
3175 #endif /* __il_core_h__ */