1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 Intel Corporation
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
27 * The full GNU General Public License is included in this distribution
28 * in the file called COPYING.
30 * Contact Information:
31 * Intel Linux Wireless <linuxwifi@intel.com>
32 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
37 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
38 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
39 * Copyright(c) 2018 Intel Corporation
40 * All rights reserved.
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
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47 * notice, this list of conditions and the following disclaimer.
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49 * notice, this list of conditions and the following disclaimer in
50 * the documentation and/or other materials provided with the
52 * * Neither the name Intel Corporation nor the names of its
53 * contributors may be used to endorse or promote products derived
54 * from this software without specific prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
57 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
58 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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60 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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62 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
66 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 *****************************************************************************/
68 #include <linux/types.h>
69 #include <linux/slab.h>
70 #include <linux/export.h>
71 #include <linux/etherdevice.h>
72 #include <linux/pci.h>
73 #include <linux/firmware.h>
76 #include "iwl-modparams.h"
77 #include "iwl-nvm-parse.h"
82 #include "fw/api/nvm-reg.h"
83 #include "fw/api/commands.h"
84 #include "fw/api/cmdhdr.h"
87 /* NVM offsets (in words) definitions */
89 /* NVM HW-Section offset (in words) definitions */
93 /* NVM SW-Section offset (in words) definitions */
94 NVM_SW_SECTION = 0x1C0,
99 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
101 /* NVM calibration section offset (in words) definitions */
102 NVM_CALIB_SECTION = 0x2B8,
103 XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
105 /* NVM REGULATORY -Section offset (in words) definitions */
106 NVM_CHANNELS_SDP = 0,
109 enum ext_nvm_offsets {
110 /* NVM HW-Section offset (in words) definitions */
111 MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
113 /* NVM SW-Section offset (in words) definitions */
114 NVM_VERSION_EXT_NVM = 0,
115 RADIO_CFG_FAMILY_EXT_NVM = 0,
117 N_HW_ADDRS_FAMILY_8000 = 3,
119 /* NVM REGULATORY -Section offset (in words) definitions */
120 NVM_CHANNELS_EXTENDED = 0,
121 NVM_LAR_OFFSET_OLD = 0x4C7,
122 NVM_LAR_OFFSET = 0x507,
123 NVM_LAR_ENABLED = 0x7,
126 /* SKU Capabilities (actual values from NVM definition) */
128 NVM_SKU_CAP_BAND_24GHZ = BIT(0),
129 NVM_SKU_CAP_BAND_52GHZ = BIT(1),
130 NVM_SKU_CAP_11N_ENABLE = BIT(2),
131 NVM_SKU_CAP_11AC_ENABLE = BIT(3),
132 NVM_SKU_CAP_MIMO_DISABLE = BIT(5),
136 * These are the channel numbers in the order that they are stored in the NVM
138 static const u8 iwl_nvm_channels[] = {
140 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
142 36, 40, 44 , 48, 52, 56, 60, 64,
143 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
144 149, 153, 157, 161, 165
147 static const u8 iwl_ext_nvm_channels[] = {
149 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
151 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
152 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
153 149, 153, 157, 161, 165, 169, 173, 177, 181
156 #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
157 #define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels)
158 #define NUM_2GHZ_CHANNELS 14
159 #define NUM_2GHZ_CHANNELS_EXT 14
160 #define FIRST_2GHZ_HT_MINUS 5
161 #define LAST_2GHZ_HT_PLUS 9
162 #define LAST_5GHZ_HT 165
163 #define LAST_5GHZ_HT_FAMILY_8000 181
164 #define N_HW_ADDR_MASK 0xF
166 /* rate data (static) */
167 static struct ieee80211_rate iwl_cfg80211_rates[] = {
168 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
169 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
170 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
171 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
172 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
173 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
174 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
175 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
176 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
177 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
178 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
179 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
180 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
181 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
182 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
184 #define RATES_24_OFFS 0
185 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
186 #define RATES_52_OFFS 4
187 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
190 * enum iwl_nvm_channel_flags - channel flags in NVM
191 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
192 * @NVM_CHANNEL_IBSS: usable as an IBSS channel
193 * @NVM_CHANNEL_ACTIVE: active scanning allowed
194 * @NVM_CHANNEL_RADAR: radar detection required
195 * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
196 * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
197 * on same channel on 2.4 or same UNII band on 5.2
198 * @NVM_CHANNEL_UNIFORM: uniform spreading required
199 * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
200 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
201 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
202 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
203 * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
205 enum iwl_nvm_channel_flags {
206 NVM_CHANNEL_VALID = BIT(0),
207 NVM_CHANNEL_IBSS = BIT(1),
208 NVM_CHANNEL_ACTIVE = BIT(3),
209 NVM_CHANNEL_RADAR = BIT(4),
210 NVM_CHANNEL_INDOOR_ONLY = BIT(5),
211 NVM_CHANNEL_GO_CONCURRENT = BIT(6),
212 NVM_CHANNEL_UNIFORM = BIT(7),
213 NVM_CHANNEL_20MHZ = BIT(8),
214 NVM_CHANNEL_40MHZ = BIT(9),
215 NVM_CHANNEL_80MHZ = BIT(10),
216 NVM_CHANNEL_160MHZ = BIT(11),
217 NVM_CHANNEL_DC_HIGH = BIT(12),
220 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
223 #define CHECK_AND_PRINT_I(x) \
224 ((flags & NVM_CHANNEL_##x) ? " " #x : "")
226 if (!(flags & NVM_CHANNEL_VALID)) {
227 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
232 /* Note: already can print up to 101 characters, 110 is the limit! */
233 IWL_DEBUG_DEV(dev, level,
234 "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
236 CHECK_AND_PRINT_I(VALID),
237 CHECK_AND_PRINT_I(IBSS),
238 CHECK_AND_PRINT_I(ACTIVE),
239 CHECK_AND_PRINT_I(RADAR),
240 CHECK_AND_PRINT_I(INDOOR_ONLY),
241 CHECK_AND_PRINT_I(GO_CONCURRENT),
242 CHECK_AND_PRINT_I(UNIFORM),
243 CHECK_AND_PRINT_I(20MHZ),
244 CHECK_AND_PRINT_I(40MHZ),
245 CHECK_AND_PRINT_I(80MHZ),
246 CHECK_AND_PRINT_I(160MHZ),
247 CHECK_AND_PRINT_I(DC_HIGH));
248 #undef CHECK_AND_PRINT_I
251 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
252 u16 nvm_flags, const struct iwl_cfg *cfg)
254 u32 flags = IEEE80211_CHAN_NO_HT40;
255 u32 last_5ghz_ht = LAST_5GHZ_HT;
257 if (cfg->nvm_type == IWL_NVM_EXT)
258 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
260 if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
261 if (ch_num <= LAST_2GHZ_HT_PLUS)
262 flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
263 if (ch_num >= FIRST_2GHZ_HT_MINUS)
264 flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
265 } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
266 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
267 flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
269 flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
271 if (!(nvm_flags & NVM_CHANNEL_80MHZ))
272 flags |= IEEE80211_CHAN_NO_80MHZ;
273 if (!(nvm_flags & NVM_CHANNEL_160MHZ))
274 flags |= IEEE80211_CHAN_NO_160MHZ;
276 if (!(nvm_flags & NVM_CHANNEL_IBSS))
277 flags |= IEEE80211_CHAN_NO_IR;
279 if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
280 flags |= IEEE80211_CHAN_NO_IR;
282 if (nvm_flags & NVM_CHANNEL_RADAR)
283 flags |= IEEE80211_CHAN_RADAR;
285 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
286 flags |= IEEE80211_CHAN_INDOOR_ONLY;
288 /* Set the GO concurrent flag only in case that NO_IR is set.
289 * Otherwise it is meaningless
291 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
292 (flags & IEEE80211_CHAN_NO_IR))
293 flags |= IEEE80211_CHAN_IR_CONCURRENT;
298 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
299 struct iwl_nvm_data *data,
300 const __le16 * const nvm_ch_flags,
305 struct ieee80211_channel *channel;
307 int num_of_ch, num_2ghz_channels;
310 if (cfg->nvm_type != IWL_NVM_EXT) {
311 num_of_ch = IWL_NVM_NUM_CHANNELS;
312 nvm_chan = &iwl_nvm_channels[0];
313 num_2ghz_channels = NUM_2GHZ_CHANNELS;
315 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
316 nvm_chan = &iwl_ext_nvm_channels[0];
317 num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT;
320 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
321 bool is_5ghz = (ch_idx >= num_2ghz_channels);
323 ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
325 if (is_5ghz && !data->sku_cap_band_52ghz_enable)
328 /* workaround to disable wide channels in 5GHz */
329 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
331 ch_flags &= ~(NVM_CHANNEL_40MHZ |
336 if (ch_flags & NVM_CHANNEL_160MHZ)
337 data->vht160_supported = true;
339 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
340 !(ch_flags & NVM_CHANNEL_VALID)) {
342 * Channels might become valid later if lar is
343 * supported, hence we still want to add them to
344 * the list of supported channels to cfg80211.
346 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
347 nvm_chan[ch_idx], ch_flags);
351 channel = &data->channels[n_channels];
354 channel->hw_value = nvm_chan[ch_idx];
355 channel->band = is_5ghz ?
356 NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
357 channel->center_freq =
358 ieee80211_channel_to_frequency(
359 channel->hw_value, channel->band);
361 /* Initialize regulatory-based run-time data */
364 * Default value - highest tx power value. max_power
365 * is not used in mvm, and is used for backwards compatibility
367 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
369 /* don't put limitations in case we're using LAR */
370 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
371 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
377 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
378 channel->hw_value, ch_flags);
379 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
380 channel->hw_value, channel->max_power);
386 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
387 struct iwl_nvm_data *data,
388 struct ieee80211_sta_vht_cap *vht_cap,
389 u8 tx_chains, u8 rx_chains)
391 int num_rx_ants = num_of_ant(rx_chains);
392 int num_tx_ants = num_of_ant(tx_chains);
393 unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
394 IEEE80211_VHT_MAX_AMPDU_1024K);
396 vht_cap->vht_supported = true;
398 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
399 IEEE80211_VHT_CAP_RXSTBC_1 |
400 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
401 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
402 max_ampdu_exponent <<
403 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
405 if (data->vht160_supported)
406 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
407 IEEE80211_VHT_CAP_SHORT_GI_160;
409 if (cfg->vht_mu_mimo_supported)
410 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
412 if (cfg->ht_params->ldpc)
413 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
415 if (data->sku_cap_mimo_disabled) {
421 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
423 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
425 switch (iwlwifi_mod_params.amsdu_size) {
427 if (cfg->mq_rx_supported)
429 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
431 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
434 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
437 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
440 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
446 vht_cap->vht_mcs.rx_mcs_map =
447 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
448 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
449 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
450 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
451 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
452 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
453 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
454 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
456 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
457 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
458 /* this works because NOT_SUPPORTED == 3 */
459 vht_cap->vht_mcs.rx_mcs_map |=
460 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
463 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
466 static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
467 struct iwl_nvm_data *data,
468 const __le16 *nvm_ch_flags, u8 tx_chains,
469 u8 rx_chains, u32 sbands_flags)
473 struct ieee80211_supported_band *sband;
475 n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
477 sband = &data->bands[NL80211_BAND_2GHZ];
478 sband->band = NL80211_BAND_2GHZ;
479 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
480 sband->n_bitrates = N_RATES_24;
481 n_used += iwl_init_sband_channels(data, sband, n_channels,
483 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_2GHZ,
484 tx_chains, rx_chains);
486 sband = &data->bands[NL80211_BAND_5GHZ];
487 sband->band = NL80211_BAND_5GHZ;
488 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
489 sband->n_bitrates = N_RATES_52;
490 n_used += iwl_init_sband_channels(data, sband, n_channels,
492 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_5GHZ,
493 tx_chains, rx_chains);
494 if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
495 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
496 tx_chains, rx_chains);
498 if (n_channels != n_used)
499 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
503 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
504 const __le16 *phy_sku)
506 if (cfg->nvm_type != IWL_NVM_EXT)
507 return le16_to_cpup(nvm_sw + SKU);
509 return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
512 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
514 if (cfg->nvm_type != IWL_NVM_EXT)
515 return le16_to_cpup(nvm_sw + NVM_VERSION);
517 return le32_to_cpup((__le32 *)(nvm_sw +
518 NVM_VERSION_EXT_NVM));
521 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
522 const __le16 *phy_sku)
524 if (cfg->nvm_type != IWL_NVM_EXT)
525 return le16_to_cpup(nvm_sw + RADIO_CFG);
527 return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
531 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
535 if (cfg->nvm_type != IWL_NVM_EXT)
536 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
538 n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
540 return n_hw_addr & N_HW_ADDR_MASK;
543 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
544 struct iwl_nvm_data *data,
547 if (cfg->nvm_type != IWL_NVM_EXT) {
548 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
549 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
550 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
551 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
555 /* set the radio configuration for family 8000 */
556 data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
557 data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
558 data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
559 data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
560 data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
561 data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
564 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
568 hw_addr = (const u8 *)&mac_addr0;
569 dest[0] = hw_addr[3];
570 dest[1] = hw_addr[2];
571 dest[2] = hw_addr[1];
572 dest[3] = hw_addr[0];
574 hw_addr = (const u8 *)&mac_addr1;
575 dest[4] = hw_addr[1];
576 dest[5] = hw_addr[0];
579 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
580 struct iwl_nvm_data *data)
582 __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
583 __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
585 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
587 * If the OEM fused a valid address, use it instead of the one in the
590 if (is_valid_ether_addr(data->hw_addr))
593 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
594 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
596 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
599 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
600 const struct iwl_cfg *cfg,
601 struct iwl_nvm_data *data,
602 const __le16 *mac_override,
603 const __be16 *nvm_hw)
608 static const u8 reserved_mac[] = {
609 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
612 hw_addr = (const u8 *)(mac_override +
613 MAC_ADDRESS_OVERRIDE_EXT_NVM);
616 * Store the MAC address from MAO section.
617 * No byte swapping is required in MAO section
619 memcpy(data->hw_addr, hw_addr, ETH_ALEN);
622 * Force the use of the OTP MAC address in case of reserved MAC
623 * address in the NVM, or if address is given but invalid.
625 if (is_valid_ether_addr(data->hw_addr) &&
626 memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
630 "mac address from nvm override section is not valid\n");
634 /* read the mac address from WFMP registers */
635 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
637 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
640 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
645 IWL_ERR(trans, "mac address is not found\n");
648 static int iwl_set_hw_address(struct iwl_trans *trans,
649 const struct iwl_cfg *cfg,
650 struct iwl_nvm_data *data, const __be16 *nvm_hw,
651 const __le16 *mac_override)
653 if (cfg->mac_addr_from_csr) {
654 iwl_set_hw_address_from_csr(trans, data);
655 } else if (cfg->nvm_type != IWL_NVM_EXT) {
656 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
658 /* The byte order is little endian 16 bit, meaning 214365 */
659 data->hw_addr[0] = hw_addr[1];
660 data->hw_addr[1] = hw_addr[0];
661 data->hw_addr[2] = hw_addr[3];
662 data->hw_addr[3] = hw_addr[2];
663 data->hw_addr[4] = hw_addr[5];
664 data->hw_addr[5] = hw_addr[4];
666 iwl_set_hw_address_family_8000(trans, cfg, data,
667 mac_override, nvm_hw);
670 if (!is_valid_ether_addr(data->hw_addr)) {
671 IWL_ERR(trans, "no valid mac address was found\n");
675 IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
681 iwl_nvm_no_wide_in_5ghz(struct device *dev, const struct iwl_cfg *cfg,
682 const __be16 *nvm_hw)
685 * Workaround a bug in Indonesia SKUs where the regulatory in
686 * some 7000-family OTPs erroneously allow wide channels in
687 * 5GHz. To check for Indonesia, we take the SKU value from
688 * bits 1-4 in the subsystem ID and check if it is either 5 or
689 * 9. In those cases, we need to force-disable wide channels
690 * in 5GHz otherwise the FW will throw a sysassert when we try
693 if (cfg->device_family == IWL_DEVICE_FAMILY_7000) {
695 * Unlike the other sections in the NVM, the hw
696 * section uses big-endian.
698 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
699 u8 sku = (subsystem_id & 0x1e) >> 1;
701 if (sku == 5 || sku == 9) {
702 IWL_DEBUG_EEPROM(dev,
703 "disabling wide channels in 5GHz (0x%0x %d)\n",
712 struct iwl_nvm_data *
713 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
714 const __be16 *nvm_hw, const __le16 *nvm_sw,
715 const __le16 *nvm_calib, const __le16 *regulatory,
716 const __le16 *mac_override, const __le16 *phy_sku,
717 u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
719 struct device *dev = trans->dev;
720 struct iwl_nvm_data *data;
723 u32 sbands_flags = 0;
725 const __le16 *ch_section;
727 if (cfg->nvm_type != IWL_NVM_EXT)
728 data = kzalloc(sizeof(*data) +
729 sizeof(struct ieee80211_channel) *
730 IWL_NVM_NUM_CHANNELS,
733 data = kzalloc(sizeof(*data) +
734 sizeof(struct ieee80211_channel) *
735 IWL_NVM_NUM_CHANNELS_EXT,
740 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
742 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
743 iwl_set_radio_cfg(cfg, data, radio_cfg);
744 if (data->valid_tx_ant)
745 tx_chains &= data->valid_tx_ant;
746 if (data->valid_rx_ant)
747 rx_chains &= data->valid_rx_ant;
749 sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
750 data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
751 data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
752 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
753 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
754 data->sku_cap_11n_enable = false;
755 data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
756 (sku & NVM_SKU_CAP_11AC_ENABLE);
757 data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
759 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
761 if (cfg->nvm_type != IWL_NVM_EXT) {
762 /* Checking for required sections */
765 "Can't parse empty Calib NVM sections\n");
770 ch_section = cfg->nvm_type == IWL_NVM_SDP ?
771 ®ulatory[NVM_CHANNELS_SDP] :
772 &nvm_sw[NVM_CHANNELS];
774 /* in family 8000 Xtal calibration values moved to OTP */
775 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
776 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
779 u16 lar_offset = data->nvm_version < 0xE39 ?
783 lar_config = le16_to_cpup(regulatory + lar_offset);
784 data->lar_enabled = !!(lar_config &
786 lar_enabled = data->lar_enabled;
787 ch_section = ®ulatory[NVM_CHANNELS_EXTENDED];
790 /* If no valid mac address was found - bail out */
791 if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
796 if (lar_fw_supported && lar_enabled)
797 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
799 if (iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw))
800 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
802 iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
804 data->calib_version = 255;
808 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
810 static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
811 int ch_idx, u16 nvm_flags,
812 const struct iwl_cfg *cfg)
814 u32 flags = NL80211_RRF_NO_HT40;
815 u32 last_5ghz_ht = LAST_5GHZ_HT;
817 if (cfg->nvm_type == IWL_NVM_EXT)
818 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
820 if (ch_idx < NUM_2GHZ_CHANNELS &&
821 (nvm_flags & NVM_CHANNEL_40MHZ)) {
822 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
823 flags &= ~NL80211_RRF_NO_HT40PLUS;
824 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
825 flags &= ~NL80211_RRF_NO_HT40MINUS;
826 } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
827 (nvm_flags & NVM_CHANNEL_40MHZ)) {
828 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
829 flags &= ~NL80211_RRF_NO_HT40PLUS;
831 flags &= ~NL80211_RRF_NO_HT40MINUS;
834 if (!(nvm_flags & NVM_CHANNEL_80MHZ))
835 flags |= NL80211_RRF_NO_80MHZ;
836 if (!(nvm_flags & NVM_CHANNEL_160MHZ))
837 flags |= NL80211_RRF_NO_160MHZ;
839 if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
840 flags |= NL80211_RRF_NO_IR;
842 if (nvm_flags & NVM_CHANNEL_RADAR)
843 flags |= NL80211_RRF_DFS;
845 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
846 flags |= NL80211_RRF_NO_OUTDOOR;
848 /* Set the GO concurrent flag only in case that NO_IR is set.
849 * Otherwise it is meaningless
851 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
852 (flags & NL80211_RRF_NO_IR))
853 flags |= NL80211_RRF_GO_CONCURRENT;
858 struct ieee80211_regdomain *
859 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
860 int num_of_ch, __le32 *channels, u16 fw_mcc)
864 u32 reg_rule_flags, prev_reg_rule_flags = 0;
865 const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
866 iwl_ext_nvm_channels : iwl_nvm_channels;
867 struct ieee80211_regdomain *regd;
869 struct ieee80211_reg_rule *rule;
870 enum nl80211_band band;
871 int center_freq, prev_center_freq = 0;
874 int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
875 IWL_NVM_NUM_CHANNELS_EXT : IWL_NVM_NUM_CHANNELS;
877 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
878 return ERR_PTR(-EINVAL);
880 if (WARN_ON(num_of_ch > max_num_ch))
881 num_of_ch = max_num_ch;
883 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
886 /* build a regdomain rule for every valid channel */
888 sizeof(struct ieee80211_regdomain) +
889 num_of_ch * sizeof(struct ieee80211_reg_rule);
891 regd = kzalloc(size_of_regd, GFP_KERNEL);
893 return ERR_PTR(-ENOMEM);
895 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
896 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
897 band = (ch_idx < NUM_2GHZ_CHANNELS) ?
898 NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
899 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
903 if (!(ch_flags & NVM_CHANNEL_VALID)) {
904 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
905 nvm_chan[ch_idx], ch_flags);
909 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
912 /* we can't continue the same rule */
913 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
914 center_freq - prev_center_freq > 20) {
919 rule = ®d->reg_rules[valid_rules - 1];
922 rule->freq_range.start_freq_khz =
923 MHZ_TO_KHZ(center_freq - 10);
925 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
927 /* this doesn't matter - not used by FW */
928 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
929 rule->power_rule.max_eirp =
930 DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
932 rule->flags = reg_rule_flags;
934 /* rely on auto-calculation to merge BW of contiguous chans */
935 rule->flags |= NL80211_RRF_AUTO_BW;
936 rule->freq_range.max_bandwidth_khz = 0;
938 prev_center_freq = center_freq;
939 prev_reg_rule_flags = reg_rule_flags;
941 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
942 nvm_chan[ch_idx], ch_flags);
945 regd->n_reg_rules = valid_rules;
947 /* set alpha2 from FW. */
948 regd->alpha2[0] = fw_mcc >> 8;
949 regd->alpha2[1] = fw_mcc & 0xff;
953 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
955 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58
956 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc
957 #define MAX_NVM_FILE_LEN 16384
959 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
962 #define IWL_4165_DEVICE_ID 0x5501
963 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
965 if (section == NVM_SECTION_TYPE_PHY_SKU &&
966 hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
967 (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
968 /* OTP 0x52 bug work around: it's a 1x1 device */
969 data[3] = ANT_B | (ANT_B << 4);
971 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
974 * Reads external NVM from a file into mvm->nvm_sections
976 * HOW TO CREATE THE NVM FILE FORMAT:
977 * ------------------------------
978 * 1. create hex file, format:
983 * rev - 6 bit (word1)
984 * len - 10 bit (word1)
986 * rsv - 12 bit (word2)
988 * 2. flip 8bits with 8 bits per line to get the right NVM file format
990 * 3. create binary file from the hex file
992 * 4. save as "iNVM_xxx.bin" under /lib/firmware
994 int iwl_read_external_nvm(struct iwl_trans *trans,
995 const char *nvm_file_name,
996 struct iwl_nvm_section *nvm_sections)
998 int ret, section_size;
1000 const struct firmware *fw_entry;
1008 int max_section_size;
1009 const __le32 *dword_buff;
1011 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1012 #define NVM_WORD2_ID(x) (x >> 12)
1013 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1014 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1015 #define NVM_HEADER_0 (0x2A504C54)
1016 #define NVM_HEADER_1 (0x4E564D2A)
1017 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1019 IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1021 /* Maximal size depends on NVM version */
1022 if (trans->cfg->nvm_type != IWL_NVM_EXT)
1023 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1025 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1028 * Obtain NVM image via request_firmware. Since we already used
1029 * request_firmware_nowait() for the firmware binary load and only
1030 * get here after that we assume the NVM request can be satisfied
1033 ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1035 IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1036 nvm_file_name, ret);
1040 IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1041 nvm_file_name, fw_entry->size);
1043 if (fw_entry->size > MAX_NVM_FILE_LEN) {
1044 IWL_ERR(trans, "NVM file too large\n");
1049 eof = fw_entry->data + fw_entry->size;
1050 dword_buff = (__le32 *)fw_entry->data;
1052 /* some NVM file will contain a header.
1053 * The header is identified by 2 dwords header as follow:
1054 * dword[0] = 0x2A504C54
1055 * dword[1] = 0x4E564D2A
1057 * This header must be skipped when providing the NVM data to the FW.
1059 if (fw_entry->size > NVM_HEADER_SIZE &&
1060 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1061 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1062 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
1063 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1064 IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1065 le32_to_cpu(dword_buff[3]));
1067 /* nvm file validation, dword_buff[2] holds the file version */
1068 if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1069 CSR_HW_REV_STEP(trans->hw_rev) == SILICON_C_STEP &&
1070 le32_to_cpu(dword_buff[2]) < 0xE4A) {
1075 file_sec = (void *)fw_entry->data;
1079 if (file_sec->data > eof) {
1081 "ERROR - NVM file too short for section header\n");
1086 /* check for EOF marker */
1087 if (!file_sec->word1 && !file_sec->word2) {
1092 if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1094 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1095 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1097 section_size = 2 * EXT_NVM_WORD2_LEN(
1098 le16_to_cpu(file_sec->word2));
1099 section_id = EXT_NVM_WORD1_ID(
1100 le16_to_cpu(file_sec->word1));
1103 if (section_size > max_section_size) {
1104 IWL_ERR(trans, "ERROR - section too large (%d)\n",
1110 if (!section_size) {
1111 IWL_ERR(trans, "ERROR - section empty\n");
1116 if (file_sec->data + section_size > eof) {
1118 "ERROR - NVM file too short for section (%d bytes)\n",
1124 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1125 "Invalid NVM section ID %d\n", section_id)) {
1130 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1136 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1138 kfree(nvm_sections[section_id].data);
1139 nvm_sections[section_id].data = temp;
1140 nvm_sections[section_id].length = section_size;
1142 /* advance to the next section */
1143 file_sec = (void *)(file_sec->data + section_size);
1146 release_firmware(fw_entry);
1149 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
1151 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
1152 const struct iwl_fw *fw)
1154 struct iwl_nvm_get_info cmd = {};
1155 struct iwl_nvm_get_info_rsp *rsp;
1156 struct iwl_nvm_data *nvm;
1157 struct iwl_host_cmd hcmd = {
1158 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
1160 .len = { sizeof(cmd) },
1161 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
1164 bool lar_fw_supported = !iwlwifi_mod_params.lar_disable &&
1165 fw_has_capa(&fw->ucode_capa,
1166 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
1168 u32 sbands_flags = 0;
1170 ret = iwl_trans_send_cmd(trans, &hcmd);
1172 return ERR_PTR(ret);
1174 if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != sizeof(*rsp),
1175 "Invalid payload len in NVM response from FW %d",
1176 iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
1181 rsp = (void *)hcmd.resp_pkt->data;
1182 if (le32_to_cpu(rsp->general.flags) & NVM_GENERAL_FLAGS_EMPTY_OTP)
1183 IWL_INFO(trans, "OTP is empty\n");
1185 nvm = kzalloc(sizeof(*nvm) +
1186 sizeof(struct ieee80211_channel) * IWL_NUM_CHANNELS,
1193 iwl_set_hw_address_from_csr(trans, nvm);
1194 /* TODO: if platform NVM has MAC address - override it here */
1196 if (!is_valid_ether_addr(nvm->hw_addr)) {
1197 IWL_ERR(trans, "no valid mac address was found\n");
1202 IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
1204 /* Initialize general data */
1205 nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
1207 /* Initialize MAC sku data */
1208 mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
1209 nvm->sku_cap_11ac_enable =
1210 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
1211 nvm->sku_cap_11n_enable =
1212 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
1213 nvm->sku_cap_band_24ghz_enable =
1214 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
1215 nvm->sku_cap_band_52ghz_enable =
1216 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
1217 nvm->sku_cap_mimo_disabled =
1218 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
1220 /* Initialize PHY sku data */
1221 nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
1222 nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
1224 if (le32_to_cpu(rsp->regulatory.lar_enabled) && lar_fw_supported) {
1225 nvm->lar_enabled = true;
1226 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1229 iwl_init_sbands(trans->dev, trans->cfg, nvm,
1230 rsp->regulatory.channel_profile,
1231 nvm->valid_tx_ant & fw->valid_tx_ant,
1232 nvm->valid_rx_ant & fw->valid_rx_ant,
1235 iwl_free_resp(&hcmd);
1241 iwl_free_resp(&hcmd);
1242 return ERR_PTR(ret);
1244 IWL_EXPORT_SYMBOL(iwl_get_nvm);