1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2015-2017 Intel Deutschland GmbH
4 * Copyright (C) 2018-2023 Intel Corporation
6 #include <linux/module.h>
7 #include <linux/stringify.h>
8 #include "iwl-config.h"
10 #include "fw/api/txq.h"
12 /* Highest firmware API version supported */
13 #define IWL_BZ_UCODE_API_MAX 82
15 /* Lowest firmware API version supported */
16 #define IWL_BZ_UCODE_API_MIN 80
19 #define IWL_BZ_NVM_VERSION 0x0a1d
21 /* Memory offsets and lengths */
22 #define IWL_BZ_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_BZ_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_BZ_DCCM2_OFFSET 0x880000
25 #define IWL_BZ_DCCM2_LEN 0x8000
26 #define IWL_BZ_SMEM_OFFSET 0x400000
27 #define IWL_BZ_SMEM_LEN 0xD0000
29 #define IWL_BZ_A_HR_A_FW_PRE "iwlwifi-bz-a0-hr-b0-"
30 #define IWL_BZ_A_HR_B_FW_PRE "iwlwifi-bz-a0-hr-b0-"
31 #define IWL_BZ_A_GF_A_FW_PRE "iwlwifi-bz-a0-gf-a0-"
32 #define IWL_BZ_A_GF4_A_FW_PRE "iwlwifi-bz-a0-gf4-a0-"
33 #define IWL_BZ_A_MR_A_FW_PRE "iwlwifi-bz-a0-mr-a0-"
34 #define IWL_BZ_A_FM_A_FW_PRE "iwlwifi-bz-a0-fm-a0-"
35 #define IWL_BZ_A_FM4_A_FW_PRE "iwlwifi-bz-a0-fm4-a0-"
36 #define IWL_BZ_A_FM_B_FW_PRE "iwlwifi-bz-a0-fm-b0-"
37 #define IWL_BZ_A_FM_C_FW_PRE "iwlwifi-bz-a0-fm-c0-"
38 #define IWL_BZ_A_FM4_B_FW_PRE "iwlwifi-bz-a0-fm4-b0-"
39 #define IWL_BZ_B_GF_A_FW_PRE "iwlwifi-bz-b0-gf-a0-"
40 #define IWL_BZ_B_GF4_A_FW_PRE "iwlwifi-bz-b0-gf4-a0-"
41 #define IWL_BZ_B_FM_B_FW_PRE "iwlwifi-bz-b0-fm-b0-"
42 #define IWL_BZ_B_FM4_B_FW_PRE "iwlwifi-bz-b0-fm4-b0-"
43 #define IWL_GL_A_FM_A_FW_PRE "iwlwifi-gl-a0-fm-a0-"
44 #define IWL_GL_B_FM_B_FW_PRE "iwlwifi-gl-b0-fm-b0-"
45 #define IWL_GL_C_FM_C_FW_PRE "iwlwifi-gl-c0-fm-c0-"
46 #define IWL_BZ_Z_GF_A_FW_PRE "iwlwifi-bz-z0-gf-a0-"
47 #define IWL_BNJ_A_FM_A_FW_PRE "iwlwifi-BzBnj-a0-fm-a0-"
48 #define IWL_BNJ_A_FM4_A_FW_PRE "iwlwifi-BzBnj-a0-fm4-a0-"
49 #define IWL_BNJ_B_FM4_B_FW_PRE "iwlwifi-BzBnj-b0-fm4-b0-"
50 #define IWL_BNJ_A_GF_A_FW_PRE "iwlwifi-BzBnj-a0-gf-a0-"
51 #define IWL_BNJ_B_GF_A_FW_PRE "iwlwifi-BzBnj-b0-gf-a0-"
52 #define IWL_BNJ_C_GF_A_FW_PRE "iwlwifi-BzBnj-c0-gf-a0-"
53 #define IWL_BNJ_A_GF4_A_FW_PRE "iwlwifi-BzBnj-a0-gf4-a0-"
54 #define IWL_BNJ_B_GF4_A_FW_PRE "iwlwifi-BzBnj-b0-gf4-a0-"
55 #define IWL_BNJ_C_GF4_A_FW_PRE "iwlwifi-BzBnj-c0-gf4-a0-"
56 #define IWL_BNJ_A_HR_A_FW_PRE "iwlwifi-BzBnj-a0-hr-b0-"
57 #define IWL_BNJ_A_HR_B_FW_PRE "iwlwifi-BzBnj-a0-hr-b0-"
58 #define IWL_BNJ_B_HR_A_FW_PRE "iwlwifi-BzBnj-b0-hr-b0-"
59 #define IWL_BNJ_B_HR_B_FW_PRE "iwlwifi-BzBnj-b0-hr-b0-"
60 #define IWL_BNJ_C_HR_B_FW_PRE "iwlwifi-BzBnj-c0-hr-b0-"
61 #define IWL_BNJ_B_FM_B_FW_PRE "iwlwifi-BzBnj-b0-fm-b0-"
62 #define IWL_BNJ_C_FM_C_FW_PRE "iwlwifi-BzBnj-c0-fm-c0-"
63 #define IWL_BNJ_A_WH_A_FW_PRE "iwlwifi-BzBnj-a0-wh-a0-"
64 #define IWL_BNJ_B_WH_A_FW_PRE "iwlwifi-BzBnj-b0-wh-a0-"
65 #define IWL_BNJ_C_WH_A_FW_PRE "iwlwifi-BzBnj-c0-wh-a0-"
67 #define IWL_BZ_A_HR_A_MODULE_FIRMWARE(api) \
68 IWL_BZ_A_HR_A_FW_PRE __stringify(api) ".ucode"
69 #define IWL_BZ_A_HR_B_MODULE_FIRMWARE(api) \
70 IWL_BZ_A_HR_B_FW_PRE __stringify(api) ".ucode"
71 #define IWL_BZ_A_GF_A_MODULE_FIRMWARE(api) \
72 IWL_BZ_A_GF_A_FW_PRE __stringify(api) ".ucode"
73 #define IWL_BZ_A_GF4_A_MODULE_FIRMWARE(api) \
74 IWL_BZ_A_GF4_A_FW_PRE __stringify(api) ".ucode"
75 #define IWL_BZ_A_MR_A_MODULE_FIRMWARE(api) \
76 IWL_BZ_A_MR_A_FW_PRE __stringify(api) ".ucode"
77 #define IWL_BZ_A_FM_A_MODULE_FIRMWARE(api) \
78 IWL_BZ_A_FM_A_FW_PRE __stringify(api) ".ucode"
79 #define IWL_BZ_A_FM4_A_MODULE_FIRMWARE(api) \
80 IWL_BZ_A_FM4_A_FW_PRE __stringify(api) ".ucode"
81 #define IWL_BZ_A_FM_B_MODULE_FIRMWARE(api) \
82 IWL_BZ_A_FM_B_FW_PRE __stringify(api) ".ucode"
83 #define IWL_BZ_A_FM_C_MODULE_FIRMWARE(api) \
84 IWL_BZ_A_FM_C_FW_PRE __stringify(api) ".ucode"
85 #define IWL_BZ_A_FM4_B_MODULE_FIRMWARE(api) \
86 IWL_BZ_A_FM4_B_FW_PRE __stringify(api) ".ucode"
87 #define IWL_BZ_B_GF_A_MODULE_FIRMWARE(api) \
88 IWL_BZ_B_GF_A_FW_PRE __stringify(api) ".ucode"
89 #define IWL_BZ_B_GF4_A_MODULE_FIRMWARE(api) \
90 IWL_BZ_B_GF4_A_FW_PRE __stringify(api) ".ucode"
91 #define IWL_BZ_B_FM_B_MODULE_FIRMWARE(api) \
92 IWL_BZ_B_FM_B_FW_PRE __stringify(api) ".ucode"
93 #define IWL_BZ_B_FM4_B_MODULE_FIRMWARE(api) \
94 IWL_BZ_B_FM4_B_FW_PRE __stringify(api) ".ucode"
95 #define IWL_GL_A_FM_A_MODULE_FIRMWARE(api) \
96 IWL_GL_A_FM_A_FW_PRE __stringify(api) ".ucode"
97 #define IWL_GL_B_FM_B_MODULE_FIRMWARE(api) \
98 IWL_GL_B_FM_B_FW_PRE __stringify(api) ".ucode"
99 #define IWL_GL_C_FM_C_MODULE_FIRMWARE(api) \
100 IWL_GL_C_FM_C_FW_PRE __stringify(api) ".ucode"
101 #define IWL_BNJ_A_FM_A_MODULE_FIRMWARE(api) \
102 IWL_BNJ_A_FM_A_FW_PRE __stringify(api) ".ucode"
103 #define IWL_BNJ_A_FM4_A_MODULE_FIRMWARE(api) \
104 IWL_BNJ_A_FM4_A_FW_PRE __stringify(api) ".ucode"
105 #define IWL_BNJ_B_FM4_B_MODULE_FIRMWARE(api) \
106 IWL_BNJ_B_FM4_B_FW_PRE __stringify(api) ".ucode"
107 #define IWL_BNJ_A_GF_A_MODULE_FIRMWARE(api) \
108 IWL_BNJ_A_GF_A_FW_PRE __stringify(api) ".ucode"
109 #define IWL_BNJ_B_GF_A_MODULE_FIRMWARE(api) \
110 IWL_BNJ_B_GF_A_FW_PRE __stringify(api) ".ucode"
111 #define IWL_BNJ_C_GF_A_MODULE_FIRMWARE(api) \
112 IWL_BNJ_C_GF_A_FW_PRE __stringify(api) ".ucode"
113 #define IWL_BNJ_A_GF4_A_MODULE_FIRMWARE(api) \
114 IWL_BNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode"
115 #define IWL_BNJ_B_GF4_A_MODULE_FIRMWARE(api) \
116 IWL_BNJ_B_GF4_A_FW_PRE __stringify(api) ".ucode"
117 #define IWL_BNJ_C_GF4_A_MODULE_FIRMWARE(api) \
118 IWL_BNJ_C_GF4_A_FW_PRE __stringify(api) ".ucode"
120 #define IWL_BNJ_A_HR_A_MODULE_FIRMWARE(api) \
121 IWL_BNJ_A_HR_A_FW_PRE __stringify(api) ".ucode"
122 #define IWL_BNJ_A_HR_B_MODULE_FIRMWARE(api) \
123 IWL_BNJ_A_HR_B_FW_PRE __stringify(api) ".ucode"
124 #define IWL_BNJ_B_HR_A_MODULE_FIRMWARE(api) \
125 IWL_BNJ_B_HR_A_FW_PRE __stringify(api) ".ucode"
126 #define IWL_BNJ_B_HR_B_MODULE_FIRMWARE(api) \
127 IWL_BNJ_B_HR_B_FW_PRE __stringify(api) ".ucode"
128 #define IWL_BNJ_C_HR_B_MODULE_FIRMWARE(api) \
129 IWL_BNJ_B_HR_B_FW_PRE __stringify(api) ".ucode"
130 #define IWL_BNJ_B_FM_B_MODULE_FIRMWARE(api) \
131 IWL_BNJ_B_FM_B_FW_PRE __stringify(api) ".ucode"
132 #define IWL_BNJ_C_FM_C_MODULE_FIRMWARE(api) \
133 IWL_BNJ_C_FM_C_FW_PRE __stringify(api) ".ucode"
134 #define IWL_BNJ_A_WH_A_MODULE_FIRMWARE(api) \
135 IWL_BNJ_A_WH_A_FW_PRE __stringify(api) ".ucode"
136 #define IWL_BNJ_B_WH_A_MODULE_FIRMWARE(api) \
137 IWL_BNJ_B_WH_A_FW_PRE __stringify(api) ".ucode"
138 #define IWL_BNJ_C_WH_A_MODULE_FIRMWARE(api) \
139 IWL_BNJ_C_WH_A_FW_PRE __stringify(api) ".ucode"
141 static const struct iwl_base_params iwl_bz_base_params = {
142 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
143 .num_of_queues = 512,
144 .max_tfd_queue_size = 65536,
145 .shadow_ram_support = true,
146 .led_compensation = 57,
147 .wd_timeout = IWL_LONG_WD_TIMEOUT,
148 .max_event_log_size = 512,
149 .shadow_reg_enable = true,
150 .pcie_l1_allowed = true,
153 static const struct iwl_ht_params iwl_gl_a_ht_params = {
154 .stbc = false, /* we explicitly disable STBC for GL step A */
156 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) |
157 BIT(NL80211_BAND_6GHZ),
160 #define IWL_DEVICE_BZ_COMMON \
161 .ucode_api_max = IWL_BZ_UCODE_API_MAX, \
162 .ucode_api_min = IWL_BZ_UCODE_API_MIN, \
163 .led_mode = IWL_LED_RF_STATE, \
164 .nvm_hw_section_num = 10, \
165 .non_shared_ant = ANT_B, \
166 .dccm_offset = IWL_BZ_DCCM_OFFSET, \
167 .dccm_len = IWL_BZ_DCCM_LEN, \
168 .dccm2_offset = IWL_BZ_DCCM2_OFFSET, \
169 .dccm2_len = IWL_BZ_DCCM2_LEN, \
170 .smem_offset = IWL_BZ_SMEM_OFFSET, \
171 .smem_len = IWL_BZ_SMEM_LEN, \
172 .apmg_not_supported = true, \
173 .trans.mq_rx_supported = true, \
174 .vht_mu_mimo_supported = true, \
175 .mac_addr_from_csr = 0x30, \
176 .nvm_ver = IWL_BZ_NVM_VERSION, \
177 .trans.rf_id = true, \
178 .trans.gen2 = true, \
179 .nvm_type = IWL_NVM_EXT, \
180 .dbgc_supported = true, \
181 .min_umac_error_event_table = 0xD0000, \
182 .d3_debug_data_base_addr = 0x401000, \
183 .d3_debug_data_length = 60 * 1024, \
186 .addr = LDBG_M2S_BUF_WPTR, \
187 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \
190 .addr = LDBG_M2S_BUF_WRAP_CNT, \
191 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \
194 .trans.umac_prph_offset = 0x300000, \
195 .trans.device_family = IWL_DEVICE_FAMILY_BZ, \
196 .trans.base_params = &iwl_bz_base_params, \
197 .min_txq_size = 128, \
198 .gp2_reg_addr = 0xd02c68, \
199 .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_EHT, \
202 .addr = DBGC_CUR_DBGBUF_STATUS, \
203 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \
206 .addr = DBGC_DBGBUF_WRAP_AROUND, \
207 .mask = 0xffffffff, \
210 .addr = DBGC_CUR_DBGBUF_STATUS, \
211 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \
216 .addr = DBGI_SRAM_FIFO_POINTERS, \
217 .mask = DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK, \
221 #define IWL_DEVICE_BZ \
222 IWL_DEVICE_BZ_COMMON, \
223 .ht_params = &iwl_22000_ht_params
225 #define IWL_DEVICE_GL_A \
226 IWL_DEVICE_BZ_COMMON, \
227 .ht_params = &iwl_gl_a_ht_params
230 * If the device doesn't support HE, no need to have that many buffers.
231 * These sizes were picked according to 8 MSDUs inside 256 A-MSDUs in an
232 * A-MPDU, with additional overhead to account for processing time.
234 #define IWL_NUM_RBDS_NON_HE 512
235 #define IWL_NUM_RBDS_BZ_HE 4096
237 const struct iwl_cfg_trans_params iwl_bz_trans_cfg = {
238 .device_family = IWL_DEVICE_FAMILY_BZ,
239 .base_params = &iwl_bz_base_params,
240 .mq_rx_supported = true,
244 .umac_prph_offset = 0x300000,
245 .xtal_latency = 12000,
246 .low_latency_xtal = true,
247 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
250 const char iwl_bz_name[] = "Intel(R) TBD Bz device";
252 const struct iwl_cfg iwl_cfg_bz_a0_hr_a0 = {
253 .fw_name_pre = IWL_BZ_A_HR_A_FW_PRE,
254 .uhb_supported = true,
256 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
257 .num_rbds = IWL_NUM_RBDS_BZ_HE,
260 const struct iwl_cfg iwl_cfg_bz_a0_hr_b0 = {
261 .fw_name_pre = IWL_BZ_A_HR_B_FW_PRE,
262 .uhb_supported = true,
264 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
265 .num_rbds = IWL_NUM_RBDS_BZ_HE,
268 const struct iwl_cfg iwl_cfg_bz_a0_gf_a0 = {
269 .fw_name_pre = IWL_BZ_A_GF_A_FW_PRE,
270 .uhb_supported = true,
272 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
273 .num_rbds = IWL_NUM_RBDS_BZ_HE,
276 const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0 = {
277 .fw_name_pre = IWL_BZ_A_GF4_A_FW_PRE,
278 .uhb_supported = true,
280 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
281 .num_rbds = IWL_NUM_RBDS_BZ_HE,
284 const struct iwl_cfg iwl_cfg_bz_b0_gf_a0 = {
285 .fw_name_pre = IWL_BZ_B_GF_A_FW_PRE,
286 .uhb_supported = true,
288 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
289 .num_rbds = IWL_NUM_RBDS_BZ_HE,
292 const struct iwl_cfg iwl_cfg_bz_b0_gf4_a0 = {
293 .fw_name_pre = IWL_BZ_B_GF4_A_FW_PRE,
294 .uhb_supported = true,
296 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
297 .num_rbds = IWL_NUM_RBDS_BZ_HE,
300 const struct iwl_cfg iwl_cfg_bz_a0_mr_a0 = {
301 .fw_name_pre = IWL_BZ_A_MR_A_FW_PRE,
302 .uhb_supported = true,
304 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
305 .num_rbds = IWL_NUM_RBDS_BZ_HE,
308 const struct iwl_cfg iwl_cfg_bz_a0_fm_a0 = {
309 .fw_name_pre = IWL_BZ_A_FM_A_FW_PRE,
310 .uhb_supported = true,
312 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
313 .num_rbds = IWL_NUM_RBDS_BZ_HE,
316 const struct iwl_cfg iwl_cfg_bz_a0_fm4_a0 = {
317 .fw_name_pre = IWL_BZ_A_FM4_A_FW_PRE,
318 .uhb_supported = true,
320 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
321 .num_rbds = IWL_NUM_RBDS_BZ_HE,
324 const struct iwl_cfg iwl_cfg_bz_a0_fm_b0 = {
325 .fw_name_pre = IWL_BZ_A_FM_B_FW_PRE,
326 .uhb_supported = true,
328 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
329 .num_rbds = IWL_NUM_RBDS_BZ_HE,
332 const struct iwl_cfg iwl_cfg_bz_a0_fm_c0 = {
333 .fw_name_pre = IWL_BZ_A_FM_C_FW_PRE,
334 .uhb_supported = true,
336 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
337 .num_rbds = IWL_NUM_RBDS_BZ_HE,
340 const struct iwl_cfg iwl_cfg_bz_a0_fm4_b0 = {
341 .fw_name_pre = IWL_BZ_A_FM4_B_FW_PRE,
342 .uhb_supported = true,
344 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
345 .num_rbds = IWL_NUM_RBDS_BZ_HE,
348 const struct iwl_cfg iwl_cfg_bz_b0_fm_b0 = {
349 .fw_name_pre = IWL_BZ_B_FM_B_FW_PRE,
350 .uhb_supported = true,
352 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
353 .num_rbds = IWL_NUM_RBDS_BZ_HE,
356 const struct iwl_cfg iwl_cfg_bz_b0_fm4_b0 = {
357 .fw_name_pre = IWL_BZ_B_FM4_B_FW_PRE,
358 .uhb_supported = true,
360 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
361 .num_rbds = IWL_NUM_RBDS_BZ_HE,
364 const struct iwl_cfg iwl_cfg_gl_a0_fm_a0 = {
365 .fw_name_pre = IWL_GL_A_FM_A_FW_PRE,
366 .uhb_supported = true,
368 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
369 .num_rbds = IWL_NUM_RBDS_BZ_HE,
372 const struct iwl_cfg iwl_cfg_gl_b0_fm_b0 = {
373 .fw_name_pre = IWL_GL_B_FM_B_FW_PRE,
374 .uhb_supported = true,
376 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
377 .num_rbds = IWL_NUM_RBDS_BZ_HE,
380 const struct iwl_cfg iwl_cfg_gl_c0_fm_c0 = {
381 .fw_name_pre = IWL_GL_C_FM_C_FW_PRE,
382 .uhb_supported = true,
384 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
385 .num_rbds = IWL_NUM_RBDS_BZ_HE,
388 const struct iwl_cfg iwl_cfg_bz_z0_gf_a0 = {
389 .fw_name_pre = IWL_BZ_Z_GF_A_FW_PRE,
390 .uhb_supported = true,
392 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
393 .num_rbds = IWL_NUM_RBDS_BZ_HE,
396 const struct iwl_cfg iwl_cfg_bnj_a0_fm_a0 = {
397 .fw_name_pre = IWL_BNJ_A_FM_A_FW_PRE,
398 .uhb_supported = true,
400 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
401 .num_rbds = IWL_NUM_RBDS_BZ_HE,
404 const struct iwl_cfg iwl_cfg_bnj_a0_fm4_a0 = {
405 .fw_name_pre = IWL_BNJ_A_FM4_A_FW_PRE,
406 .uhb_supported = true,
408 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
409 .num_rbds = IWL_NUM_RBDS_BZ_HE,
412 const struct iwl_cfg iwl_cfg_bnj_b0_fm4_b0 = {
413 .fw_name_pre = IWL_BNJ_B_FM4_B_FW_PRE,
414 .uhb_supported = true,
416 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
417 .num_rbds = IWL_NUM_RBDS_BZ_HE,
420 const struct iwl_cfg iwl_cfg_bnj_a0_gf_a0 = {
421 .fw_name_pre = IWL_BNJ_A_GF_A_FW_PRE,
422 .uhb_supported = true,
424 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
425 .num_rbds = IWL_NUM_RBDS_BZ_HE,
428 const struct iwl_cfg iwl_cfg_bnj_b0_gf_a0 = {
429 .fw_name_pre = IWL_BNJ_B_GF_A_FW_PRE,
430 .uhb_supported = true,
432 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
433 .num_rbds = IWL_NUM_RBDS_BZ_HE,
436 const struct iwl_cfg iwl_cfg_bnj_a0_gf4_a0 = {
437 .fw_name_pre = IWL_BNJ_A_GF4_A_FW_PRE,
438 .uhb_supported = true,
440 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
441 .num_rbds = IWL_NUM_RBDS_BZ_HE,
444 const struct iwl_cfg iwl_cfg_bnj_b0_gf4_a0 = {
445 .fw_name_pre = IWL_BNJ_B_GF4_A_FW_PRE,
446 .uhb_supported = true,
448 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
449 .num_rbds = IWL_NUM_RBDS_BZ_HE,
452 const struct iwl_cfg iwl_cfg_bnj_a0_hr_a0 = {
453 .fw_name_pre = IWL_BNJ_A_HR_A_FW_PRE,
454 .uhb_supported = true,
456 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
457 .num_rbds = IWL_NUM_RBDS_BZ_HE,
460 const struct iwl_cfg iwl_cfg_bnj_a0_hr_b0 = {
461 .fw_name_pre = IWL_BNJ_A_HR_B_FW_PRE,
462 .uhb_supported = true,
464 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
465 .num_rbds = IWL_NUM_RBDS_BZ_HE,
468 const struct iwl_cfg iwl_cfg_bnj_b0_hr_a0 = {
469 .fw_name_pre = IWL_BNJ_B_HR_A_FW_PRE,
470 .uhb_supported = true,
472 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
473 .num_rbds = IWL_NUM_RBDS_BZ_HE,
476 const struct iwl_cfg iwl_cfg_bnj_b0_hr_b0 = {
477 .fw_name_pre = IWL_BNJ_B_HR_B_FW_PRE,
478 .uhb_supported = true,
480 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
481 .num_rbds = IWL_NUM_RBDS_BZ_HE,
484 const struct iwl_cfg iwl_cfg_bnj_b0_fm_b0 = {
485 .fw_name_pre = IWL_BNJ_B_FM_B_FW_PRE,
486 .uhb_supported = true,
488 .features = IWL_TX_CSUM_NETIF_FLAGS_BZ | NETIF_F_RXCSUM,
489 .num_rbds = IWL_NUM_RBDS_BZ_HE,
493 MODULE_FIRMWARE(IWL_BZ_A_HR_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
494 MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
495 MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
496 MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
497 MODULE_FIRMWARE(IWL_BZ_A_MR_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
498 MODULE_FIRMWARE(IWL_BZ_A_FM_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
499 MODULE_FIRMWARE(IWL_BZ_A_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
500 MODULE_FIRMWARE(IWL_BZ_A_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
501 MODULE_FIRMWARE(IWL_GL_A_FM_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
502 MODULE_FIRMWARE(IWL_BNJ_A_FM_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
503 MODULE_FIRMWARE(IWL_BNJ_A_FM4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
504 MODULE_FIRMWARE(IWL_BNJ_B_FM4_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
505 MODULE_FIRMWARE(IWL_BNJ_A_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
506 MODULE_FIRMWARE(IWL_BNJ_B_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
507 MODULE_FIRMWARE(IWL_BNJ_C_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
508 MODULE_FIRMWARE(IWL_BNJ_A_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
509 MODULE_FIRMWARE(IWL_BNJ_B_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
510 MODULE_FIRMWARE(IWL_BNJ_C_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
511 MODULE_FIRMWARE(IWL_BNJ_A_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
512 MODULE_FIRMWARE(IWL_BNJ_B_HR_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
513 MODULE_FIRMWARE(IWL_BNJ_B_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
514 MODULE_FIRMWARE(IWL_BNJ_C_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
515 MODULE_FIRMWARE(IWL_BZ_A_FM4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
516 MODULE_FIRMWARE(IWL_BZ_A_FM4_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
517 MODULE_FIRMWARE(IWL_GL_B_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
518 MODULE_FIRMWARE(IWL_GL_C_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
519 MODULE_FIRMWARE(IWL_BNJ_B_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
520 MODULE_FIRMWARE(IWL_BNJ_C_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
521 MODULE_FIRMWARE(IWL_BNJ_A_WH_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
522 MODULE_FIRMWARE(IWL_BNJ_B_WH_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
523 MODULE_FIRMWARE(IWL_BNJ_C_WH_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));