2 ******************************************************************************
4 * @file ecrnx_platorm.h
6 * Copyright (C) ESWIN 2015-2020
8 ******************************************************************************
11 #ifndef _ECRNX_PLAT_H_
12 #define _ECRNX_PLAT_H_
14 #include <linux/pci.h>
16 #define ECRNX_CONFIG_FW_NAME "wifi_ecr6600u.cfg"
17 #define ECRNX_PHY_CONFIG_TRD_NAME "ecrnx_trident.ini"
18 #define ECRNX_PHY_CONFIG_KARST_NAME "ecrnx_karst.ini"
19 #define ECRNX_AGC_FW_NAME "agcram.bin"
20 #define ECRNX_LDPC_RAM_NAME "ldpcram.bin"
21 #define ECRNX_CATAXIA_FW_NAME "cataxia.fw"
22 #ifdef CONFIG_ECRNX_SOFTMAC
23 #define ECRNX_MAC_FW_BASE_NAME "lmacfw"
24 #elif defined CONFIG_ECRNX_FULLMAC
25 #define ECRNX_MAC_FW_BASE_NAME "fmacfw"
26 #elif defined CONFIG_ECRNX_FHOST
27 #define ECRNX_MAC_FW_BASE_NAME "fhostfw"
28 #endif /* CONFIG_ECRNX_SOFTMAC */
30 #ifdef CONFIG_ECRNX_TL4
31 #define ECRNX_MAC_FW_NAME ECRNX_MAC_FW_BASE_NAME".hex"
33 #define ECRNX_MAC_FW_NAME ECRNX_MAC_FW_BASE_NAME".ihex"
34 #define ECRNX_MAC_FW_NAME2 ECRNX_MAC_FW_BASE_NAME".bin"
37 #define ECRNX_FCU_FW_NAME "fcuram.bin"
40 * Type of memory to access (cf ecrnx_plat.get_address)
42 * @ECRNX_ADDR_CPU To access memory of the embedded CPU
43 * @ECRNX_ADDR_SYSTEM To access memory/registers of one subsystem of the
47 enum ecrnx_platform_addr {
56 * struct ecrnx_plat - Operation pointers for ECRNX PCI platform
58 * @pci_dev: pointer to pci dev
59 * @enabled: Set if embedded platform has been enabled (i.e. fw loaded and
61 * @enable: Configure communication with the fw (i.e. configure the transfers
62 * enable and register interrupt)
63 * @disable: Stop communication with the fw
64 * @deinit: Free all ressources allocated for the embedded platform
65 * @get_address: Return the virtual address to access the requested address on
67 * @ack_irq: Acknowledge the irq at link level.
68 * @get_config_reg: Return the list (size + pointer) of registers to restore in
69 * order to reload the platform while keeping the current configuration.
71 * @priv Private data for the link driver
74 struct pci_dev *pci_dev;
77 int (*enable)(struct ecrnx_hw *ecrnx_hw);
78 int (*disable)(struct ecrnx_hw *ecrnx_hw);
79 void (*deinit)(struct ecrnx_plat *ecrnx_plat);
80 u8* (*get_address)(struct ecrnx_plat *ecrnx_plat, int addr_name,
82 void (*ack_irq)(struct ecrnx_plat *ecrnx_plat);
83 int (*get_config_reg)(struct ecrnx_plat *ecrnx_plat, const u32 **list);
85 u8 priv[0] __aligned(sizeof(void *));
88 #define ECRNX_ADDR(plat, base, offset) \
89 plat->get_address(plat, base, offset)
91 #define ECRNX_REG_READ(plat, base, offset) \
92 readl(plat->get_address(plat, base, offset))
94 #define ECRNX_REG_WRITE(val, plat, base, offset) \
95 writel(val, plat->get_address(plat, base, offset))
97 #ifdef CONFIG_ECRNX_ESWIN
98 int ecrnx_platform_init(void *ecrnx_plat, void **platform_data);
100 int ecrnx_platform_init(struct ecrnx_plat *ecrnx_plat, void **platform_data);
102 void ecrnx_platform_deinit(struct ecrnx_hw *ecrnx_hw);
104 int ecrnx_platform_on(struct ecrnx_hw *ecrnx_hw, void *config);
105 void ecrnx_platform_off(struct ecrnx_hw *ecrnx_hw, void **config);
107 int ecrnx_platform_register_drv(void);
108 void ecrnx_platform_unregister_drv(void);
110 #ifndef CONFIG_ECRNX_ESWIN
111 static inline struct device *ecrnx_platform_get_dev(struct ecrnx_plat *ecrnx_plat)
113 return &(ecrnx_plat->pci_dev->dev);
116 static inline unsigned int ecrnx_platform_get_irq(struct ecrnx_plat *ecrnx_plat)
118 return ecrnx_plat->pci_dev->irq;
123 #ifdef CONFIG_ECRNX_ESWIN_SDIO
124 extern struct device *eswin_sdio_get_dev(void *plat);
125 static inline struct device *ecrnx_platform_get_dev(void *ecrnx_plat)
127 return eswin_sdio_get_dev(ecrnx_plat);
132 #ifdef CONFIG_ECRNX_ESWIN_USB
133 struct device *eswin_usb_get_dev(void *plat);
134 static inline struct device *ecrnx_platform_get_dev(void *ecrnx_plat)
136 return eswin_usb_get_dev(ecrnx_plat);
142 #endif /* _ECRNX_PLAT_H_ */