drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47 #include "bcdc.h"
  48
  49 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  50 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  51
  52 /* watermark expressed in number of words */
  53 #define DEFAULT_F2_WATERMARK    0x8
  54 #define CY_4373_F2_WATERMARK    0x40
  55 #define CY_43012_F2_WATERMARK    0x60
  56
  57 #ifdef DEBUG
  58
  59 #define BRCMF_TRAP_INFO_SIZE    80
  60
  61 #define CBUF_LEN        (128)
  62
  63 /* Device console log buffer state */
  64 #define CONSOLE_BUFFER_MAX      2024
  65
  66 struct rte_log_le {
  67         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  68         __le32 buf_size;
  69         __le32 idx;
  70         char *_buf_compat;      /* Redundant pointer for backward compat. */
  71 };
  72
  73 struct rte_console {
  74         /* Virtual UART
  75          * When there is no UART (e.g. Quickturn),
  76          * the host should write a complete
  77          * input line directly into cbuf and then write
  78          * the length into vcons_in.
  79          * This may also be used when there is a real UART
  80          * (at risk of conflicting with
  81          * the real UART).  vcons_out is currently unused.
  82          */
  83         uint vcons_in;
  84         uint vcons_out;
  85
  86         /* Output (logging) buffer
  87          * Console output is written to a ring buffer log_buf at index log_idx.
  88          * The host may read the output when it sees log_idx advance.
  89          * Output will be lost if the output wraps around faster than the host
  90          * polls.
  91          */
  92         struct rte_log_le log_le;
  93
  94         /* Console input line buffer
  95          * Characters are read one at a time into cbuf
  96          * until <CR> is received, then
  97          * the buffer is processed as a command line.
  98          * Also used for virtual UART.
  99          */
 100         uint cbuf_idx;
 101         char cbuf[CBUF_LEN];
 102 };
 103
 104 #endif                          /* DEBUG */
 105 #include <chipcommon.h>
 106
 107 #include "bus.h"
 108 #include "debug.h"
 109 #include "tracepoint.h"
 110
 111 #define TXQLEN          2048    /* bulk tx queue length */
 112 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 113 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 114 #define PRIOMASK        7
 115
 116 #define TXRETRIES       2       /* # of retries for tx frames */
 117
 118 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 119                                  one scheduling */
 120
 121 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 122                                  one scheduling */
 123
 124 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 125
 126 #define MEMBLOCK        2048    /* Block size used for downloading
 127                                  of dongle image */
 128 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 129                                  biggest possible glom */
 130
 131 #define BRCMF_FIRSTREAD (1 << 6)
 132
 133 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 134
 135 /* SBSDIO_DEVICE_CTL */
 136
 137 /* 1: device will assert busy signal when receiving CMD53 */
 138 #define SBSDIO_DEVCTL_SETBUSY           0x01
 139 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 140 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 141 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 142 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 143 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 144  * sdio bus power cycle to clear (rev 9) */
 145 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 146 /* 1: enable F2 Watermark */
 147 #define SBSDIO_DEVCTL_F2WM_ENAB         0x10
 148 /* Force SD->SB reset mapping (rev 11) */
 149 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 150 /*   Determined by CoreControl bit */
 151 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 152 /*   Force backplane reset */
 153 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 154 /*   Force no backplane reset */
 155 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 156
 157 /* direct(mapped) cis space */
 158
 159 /* MAPPED common CIS address */
 160 #define SBSDIO_CIS_BASE_COMMON          0x1000
 161 /* maximum bytes in one CIS */
 162 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 163 /* cis offset addr is < 17 bits */
 164 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 165
 166 /* manfid tuple length, include tuple, link bytes */
 167 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 168
 169 #define SD_REG(field) \
 170                 (offsetof(struct sdpcmd_regs, field))
 171
 172 /* SDIO function 1 register CHIPCLKCSR */
 173 /* Force ALP request to backplane */
 174 #define SBSDIO_FORCE_ALP                0x01
 175 /* Force HT request to backplane */
 176 #define SBSDIO_FORCE_HT                 0x02
 177 /* Force ILP request to backplane */
 178 #define SBSDIO_FORCE_ILP                0x04
 179 /* Make ALP ready (power up xtal) */
 180 #define SBSDIO_ALP_AVAIL_REQ            0x08
 181 /* Make HT ready (power up PLL) */
 182 #define SBSDIO_HT_AVAIL_REQ             0x10
 183 /* Squelch clock requests from HW */
 184 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 185 /* Status: ALP is ready */
 186 #define SBSDIO_ALP_AVAIL                0x40
 187 /* Status: HT is ready */
 188 #define SBSDIO_HT_AVAIL                 0x80
 189 #define SBSDIO_CSR_MASK                 0x1F
 190 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 191 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 192 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 193 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 194 #define SBSDIO_CLKAV(regval, alponly) \
 195         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 196
 197 /* intstatus */
 198 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 199 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 200 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 201 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 202 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 203 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 204 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 205 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 206 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 207 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 208 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 209 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 210 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 211 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 212 #define I_PC            (1 << 10)       /* descriptor error */
 213 #define I_PD            (1 << 11)       /* data error */
 214 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 215 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 216 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 217 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 218 #define I_RI            (1 << 16)       /* Receive Interrupt */
 219 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 220 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 221 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 222 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 223 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 224 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 225 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 226 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 227 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 228 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 229 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 230 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 231
 232 /* corecontrol */
 233 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 234 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 235 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 236 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 237 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 238 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 239
 240 /* SDA_FRAMECTRL */
 241 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 242 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 243 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 244 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 245
 246 /*
 247  * Software allocation of To SB Mailbox resources
 248  */
 249
 250 /* tosbmailbox bits corresponding to intstatus bits */
 251 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 252 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 253 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 254 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 255
 256 /* tosbmailboxdata */
 257 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 258
 259 /*
 260  * Software allocation of To Host Mailbox resources
 261  */
 262
 263 /* intstatus bits */
 264 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 265 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 266 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 267 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 268
 269 /* tohostmailboxdata */
 270 #define HMB_DATA_NAKHANDLED     0x0001  /* retransmit NAK'd frame */
 271 #define HMB_DATA_DEVREADY       0x0002  /* talk to host after enable */
 272 #define HMB_DATA_FC             0x0004  /* per prio flowcontrol update flag */
 273 #define HMB_DATA_FWREADY        0x0008  /* fw ready for protocol activity */
 274 #define HMB_DATA_FWHALT         0x0010  /* firmware halted */
 275
 276 #define HMB_DATA_FCDATA_MASK    0xff000000
 277 #define HMB_DATA_FCDATA_SHIFT   24
 278
 279 #define HMB_DATA_VERSION_MASK   0x00ff0000
 280 #define HMB_DATA_VERSION_SHIFT  16
 281
 282 /*
 283  * Software-defined protocol header
 284  */
 285
 286 /* Current protocol version */
 287 #define SDPCM_PROT_VERSION      4
 288
 289 /*
 290  * Shared structure between dongle and the host.
 291  * The structure contains pointers to trap or assert information.
 292  */
 293 #define SDPCM_SHARED_VERSION       0x0003
 294 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 295 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 296 #define SDPCM_SHARED_ASSERT        0x0200
 297 #define SDPCM_SHARED_TRAP          0x0400
 298
 299 /* Space for header read, limit for data packets */
 300 #define MAX_HDR_READ    (1 << 6)
 301 #define MAX_RX_DATASZ   2048
 302
 303 /* Bump up limit on waiting for HT to account for first startup;
 304  * if the image is doing a CRC calculation before programming the PMU
 305  * for HT availability, it could take a couple hundred ms more, so
 306  * max out at a 1 second (1000000us).
 307  */
 308 #undef PMU_MAX_TRANSITION_DLY
 309 #define PMU_MAX_TRANSITION_DLY 1000000
 310
 311 /* Value for ChipClockCSR during initial setup */
 312 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 313                                         SBSDIO_ALP_AVAIL_REQ)
 314
 315 /* Flags for SDH calls */
 316 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 317
 318 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 319                                          * when idle
 320                                          */
 321 #define BRCMF_IDLE_INTERVAL     1
 322
 323 #define KSO_WAIT_US 50
 324 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 325 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 326
 327 /*
 328  * Conversion of 802.1D priority to precedence level
 329  */
 330 static uint prio2prec(u32 prio)
 331 {
 332         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 333                (prio^2) : prio;
 334 }
 335
 336 #ifdef DEBUG
 337 /* Device console log buffer state */
 338 struct brcmf_console {
 339         uint count;             /* Poll interval msec counter */
 340         uint log_addr;          /* Log struct address (fixed) */
 341         struct rte_log_le log_le;       /* Log struct (host copy) */
 342         uint bufsize;           /* Size of log buffer */
 343         u8 *buf;                /* Log buffer (host copy) */
 344         uint last;              /* Last buffer read index */
 345 };
 346
 347 struct brcmf_trap_info {
 348         __le32          type;
 349         __le32          epc;
 350         __le32          cpsr;
 351         __le32          spsr;
 352         __le32          r0;     /* a1 */
 353         __le32          r1;     /* a2 */
 354         __le32          r2;     /* a3 */
 355         __le32          r3;     /* a4 */
 356         __le32          r4;     /* v1 */
 357         __le32          r5;     /* v2 */
 358         __le32          r6;     /* v3 */
 359         __le32          r7;     /* v4 */
 360         __le32          r8;     /* v5 */
 361         __le32          r9;     /* sb/v6 */
 362         __le32          r10;    /* sl/v7 */
 363         __le32          r11;    /* fp/v8 */
 364         __le32          r12;    /* ip */
 365         __le32          r13;    /* sp */
 366         __le32          r14;    /* lr */
 367         __le32          pc;     /* r15 */
 368 };
 369 #endif                          /* DEBUG */
 370
 371 struct sdpcm_shared {
 372         u32 flags;
 373         u32 trap_addr;
 374         u32 assert_exp_addr;
 375         u32 assert_file_addr;
 376         u32 assert_line;
 377         u32 console_addr;       /* Address of struct rte_console */
 378         u32 msgtrace_addr;
 379         u8 tag[32];
 380         u32 brpt_addr;
 381 };
 382
 383 struct sdpcm_shared_le {
 384         __le32 flags;
 385         __le32 trap_addr;
 386         __le32 assert_exp_addr;
 387         __le32 assert_file_addr;
 388         __le32 assert_line;
 389         __le32 console_addr;    /* Address of struct rte_console */
 390         __le32 msgtrace_addr;
 391         u8 tag[32];
 392         __le32 brpt_addr;
 393 };
 394
 395 /* dongle SDIO bus specific header info */
 396 struct brcmf_sdio_hdrinfo {
 397         u8 seq_num;
 398         u8 channel;
 399         u16 len;
 400         u16 len_left;
 401         u16 len_nxtfrm;
 402         u8 dat_offset;
 403         bool lastfrm;
 404         u16 tail_pad;
 405 };
 406
 407 /*
 408  * hold counter variables
 409  */
 410 struct brcmf_sdio_count {
 411         uint intrcount;         /* Count of device interrupt callbacks */
 412         uint lastintrs;         /* Count as of last watchdog timer */
 413         uint pollcnt;           /* Count of active polls */
 414         uint regfails;          /* Count of R_REG failures */
 415         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 416         uint fcqueued;          /* Tx packets that got queued */
 417         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 418         uint rx_toolong;        /* Receive frames too long to receive */
 419         uint rxc_errors;        /* SDIO errors when reading control frames */
 420         uint rx_hdrfail;        /* SDIO errors on header reads */
 421         uint rx_badhdr;         /* Bad received headers (roosync?) */
 422         uint rx_badseq;         /* Mismatched rx sequence number */
 423         uint fc_rcvd;           /* Number of flow-control events received */
 424         uint fc_xoff;           /* Number which turned on flow-control */
 425         uint fc_xon;            /* Number which turned off flow-control */
 426         uint rxglomfail;        /* Failed deglom attempts */
 427         uint rxglomframes;      /* Number of glom frames (superframes) */
 428         uint rxglompkts;        /* Number of packets from glom frames */
 429         uint f2rxhdrs;          /* Number of header reads */
 430         uint f2rxdata;          /* Number of frame data reads */
 431         uint f2txdata;          /* Number of f2 frame writes */
 432         uint f1regdata;         /* Number of f1 register accesses */
 433         uint tickcnt;           /* Number of watchdog been schedule */
 434         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 435         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 436         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 437         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 438         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 439 };
 440
 441 /* misc chip info needed by some of the routines */
 442 /* Private data for SDIO bus interaction */
 443 struct brcmf_sdio {
 444         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 445         struct brcmf_chip *ci;  /* Chip info struct */
 446         struct brcmf_core *sdio_core; /* sdio core info struct */
 447
 448         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 449         atomic_t intstatus;     /* Intstatus bits (events) pending */
 450         atomic_t fcstate;       /* State of dongle flow-control */
 451
 452         uint blocksize;         /* Block size of SDIO transfers */
 453         uint roundup;           /* Max roundup limit */
 454
 455         struct pktq txq;        /* Queue length used for flow-control */
 456         u8 flowcontrol; /* per prio flow control bitmask */
 457         u8 tx_seq;              /* Transmit sequence number (next) */
 458         u8 tx_max;              /* Maximum transmit sequence allowed */
 459
 460         u8 *hdrbuf;             /* buffer for handling rx frame */
 461         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 462         u8 rx_seq;              /* Receive sequence number (expected) */
 463         struct brcmf_sdio_hdrinfo cur_read;
 464                                 /* info of current read frame */
 465         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 466         bool rxpending;         /* Data frame pending in dongle */
 467
 468         uint rxbound;           /* Rx frames to read before resched */
 469         uint txbound;           /* Tx frames to send before resched */
 470         uint txminmax;
 471
 472         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 473         struct sk_buff_head glom; /* Packet list for glommed superframe */
 474
 475         u8 *rxbuf;              /* Buffer for receiving control packets */
 476         uint rxblen;            /* Allocated length of rxbuf */
 477         u8 *rxctl;              /* Aligned pointer into rxbuf */
 478         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 479         uint rxlen;             /* Length of valid data in buffer */
 480         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 481
 482         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 483
 484         bool intr;              /* Use interrupts */
 485         bool poll;              /* Use polling */
 486         atomic_t ipend;         /* Device interrupt is pending */
 487         uint spurious;          /* Count of spurious interrupts */
 488         uint pollrate;          /* Ticks between device polls */
 489         uint polltick;          /* Tick counter */
 490
 491 #ifdef DEBUG
 492         uint console_interval;
 493         struct brcmf_console console;   /* Console output polling support */
 494         uint console_addr;      /* Console address from shared struct */
 495 #endif                          /* DEBUG */
 496
 497         uint clkstate;          /* State of sd and backplane clock(s) */
 498         s32 idletime;           /* Control for activity timeout */
 499         s32 idlecount;          /* Activity timeout counter */
 500         s32 idleclock;          /* How to set bus driver when idle */
 501         bool rxflow_mode;       /* Rx flow control mode */
 502         bool rxflow;            /* Is rx flow control on */
 503         bool alp_only;          /* Don't use HT clock (ALP only) */
 504
 505         u8 *ctrl_frame_buf;
 506         u16 ctrl_frame_len;
 507         bool ctrl_frame_stat;
 508         int ctrl_frame_err;
 509
 510         spinlock_t txq_lock;            /* protect bus->txq */
 511         wait_queue_head_t ctrl_wait;
 512         wait_queue_head_t dcmd_resp_wait;
 513
 514         struct timer_list timer;
 515         struct completion watchdog_wait;
 516         struct task_struct *watchdog_tsk;
 517         bool wd_active;
 518
 519         struct workqueue_struct *brcmf_wq;
 520         struct work_struct datawork;
 521         bool dpc_triggered;
 522         bool dpc_running;
 523
 524         bool txoff;             /* Transmit flow-controlled */
 525         struct brcmf_sdio_count sdcnt;
 526         bool sr_enabled; /* SaveRestore enabled */
 527         bool sleeping;
 528
 529         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 530         bool txglom;            /* host tx glomming enable flag */
 531         u16 head_align;         /* buffer pointer alignment */
 532         u16 sgentry_align;      /* scatter-gather buffer alignment */
 533 };
 534
 535 /* clkstate */
 536 #define CLK_NONE        0
 537 #define CLK_SDONLY      1
 538 #define CLK_PENDING     2
 539 #define CLK_AVAIL       3
 540
 541 #ifdef DEBUG
 542 static int qcount[NUMPRIO];
 543 #endif                          /* DEBUG */
 544
 545 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 546
 547 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 548
 549 /* Limit on rounding up frames */
 550 static const uint max_roundup = 512;
 551
 552 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 553 #define ALIGNMENT  8
 554 #else
 555 #define ALIGNMENT  4
 556 #endif
 557
 558 enum brcmf_sdio_frmtype {
 559         BRCMF_SDIO_FT_NORMAL,
 560         BRCMF_SDIO_FT_SUPER,
 561         BRCMF_SDIO_FT_SUB,
 562 };
 563
 564 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 565
 566 /* SDIO Pad drive strength to select value mappings */
 567 struct sdiod_drive_str {
 568         u8 strength;    /* Pad Drive Strength in mA */
 569         u8 sel;         /* Chip-specific select value */
 570 };
 571
 572 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 573 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 574         {32, 0x6},
 575         {26, 0x7},
 576         {22, 0x4},
 577         {16, 0x5},
 578         {12, 0x2},
 579         {8, 0x3},
 580         {4, 0x0},
 581         {0, 0x1}
 582 };
 583
 584 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 585 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 586         {6, 0x7},
 587         {5, 0x6},
 588         {4, 0x5},
 589         {3, 0x4},
 590         {2, 0x2},
 591         {1, 0x1},
 592         {0, 0x0}
 593 };
 594
 595 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 596 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 597         {3, 0x3},
 598         {2, 0x2},
 599         {1, 0x1},
 600         {0, 0x0} };
 601
 602 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 603 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 604         {16, 0x7},
 605         {12, 0x5},
 606         {8,  0x3},
 607         {4,  0x1}
 608 };
 609
 610 BRCMF_FW_DEF(43143, "brcmfmac43143-sdio");
 611 BRCMF_FW_DEF(43241B0, "brcmfmac43241b0-sdio");
 612 BRCMF_FW_DEF(43241B4, "brcmfmac43241b4-sdio");
 613 BRCMF_FW_DEF(43241B5, "brcmfmac43241b5-sdio");
 614 BRCMF_FW_DEF(4329, "brcmfmac4329-sdio");
 615 BRCMF_FW_DEF(4330, "brcmfmac4330-sdio");
 616 BRCMF_FW_DEF(4334, "brcmfmac4334-sdio");
 617 BRCMF_FW_DEF(43340, "brcmfmac43340-sdio");
 618 BRCMF_FW_DEF(4335, "brcmfmac4335-sdio");
 619 BRCMF_FW_DEF(43362, "brcmfmac43362-sdio");
 620 BRCMF_FW_DEF(4339, "brcmfmac4339-sdio");
 621 BRCMF_FW_DEF(43430A0, "brcmfmac43430a0-sdio");
 622 /* Note the names are not postfixed with a1 for backward compatibility */
 623 BRCMF_FW_DEF(43430A1, "brcmfmac43430-sdio");
 624 BRCMF_FW_DEF(43455, "brcmfmac43455-sdio");
 625 BRCMF_FW_DEF(43456, "brcmfmac43456-sdio");
 626 BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
 627 BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
 628 BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
 629 BRCMF_FW_DEF(43012, "brcmfmac43012-sdio");
 630
 631 static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 632         BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 633         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 634         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 635         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 636         BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 637         BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 638         BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 639         BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 640         BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 641         BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 642         BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 643         BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 644         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
 645         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
 646         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0x00000200, 43456),
 647         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFDC0, 43455),
 648         BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 649         BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
 650         BRCMF_FW_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373),
 651         BRCMF_FW_ENTRY(CY_CC_43012_CHIP_ID, 0xFFFFFFFF, 43012)
 652 };
 653
 654 static void pkt_align(struct sk_buff *p, int len, int align)
 655 {
 656         uint datalign;
 657         datalign = (unsigned long)(p->data);
 658         datalign = roundup(datalign, (align)) - datalign;
 659         if (datalign)
 660                 skb_pull(p, datalign);
 661         __skb_trim(p, len);
 662 }
 663
 664 /* To check if there's window offered */
 665 static bool data_ok(struct brcmf_sdio *bus)
 666 {
 667         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 668                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 669 }
 670
 671 static int
 672 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 673 {
 674         u8 wr_val = 0, rd_val, cmp_val, bmask;
 675         int err = 0;
 676         int err_cnt = 0;
 677         int try_cnt = 0;
 678
 679         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 680
 681         sdio_retune_crc_disable(bus->sdiodev->func1);
 682
 683         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 684         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 685         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
 686
 687         /* In case of 43012 chip, the chip could go down immediately after
 688          * KSO bit is cleared. So the further reads of KSO register could
 689          * fail. Thereby just bailing out immediately after clearing KSO
 690          * bit, to avoid polling of KSO bit.
 691          */
 692         if (!on && bus->ci->chip == CY_CC_43012_CHIP_ID)
 693                 return err;
 694
 695         if (on) {
 696                 /* device WAKEUP through KSO:
 697                  * write bit 0 & read back until
 698                  * both bits 0 (kso bit) & 1 (dev on status) are set
 699                  */
 700                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 701                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 702                 bmask = cmp_val;
 703                 usleep_range(2000, 3000);
 704         } else {
 705                 /* Put device to sleep, turn off KSO */
 706                 cmp_val = 0;
 707                 /* only check for bit0, bit1(dev on status) may not
 708                  * get cleared right away
 709                  */
 710                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 711         }
 712
 713         do {
 714                 /* reliable KSO bit set/clr:
 715                  * the sdiod sleep write access is synced to PMU 32khz clk
 716                  * just one write attempt may fail,
 717                  * read it back until it matches written value
 718                  */
 719                 rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 720                                            &err);
 721                 if (!err) {
 722                         if ((rd_val & bmask) == cmp_val)
 723                                 break;
 724                         err_cnt = 0;
 725                 }
 726                 /* bail out upon subsequent access errors */
 727                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 728                         break;
 729
 730                 udelay(KSO_WAIT_US);
 731                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
 732                                    &err);
 733
 734         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 735
 736         if (try_cnt > 2)
 737                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 738                           rd_val, err);
 739
 740         if (try_cnt > MAX_KSO_ATTEMPTS)
 741                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 742
 743         sdio_retune_crc_enable(bus->sdiodev->func1);
 744
 745         return err;
 746 }
 747
 748 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 749
 750 /* Turn backplane clock on or off */
 751 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 752 {
 753         int err;
 754         u8 clkctl, clkreq, devctl;
 755         unsigned long timeout;
 756
 757         brcmf_dbg(SDIO, "Enter\n");
 758
 759         clkctl = 0;
 760
 761         if (bus->sr_enabled) {
 762                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 763                 return 0;
 764         }
 765
 766         if (on) {
 767                 /* Request HT Avail */
 768                 clkreq =
 769                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 770
 771                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 772                                    clkreq, &err);
 773                 if (err) {
 774                         brcmf_err("HT Avail request error: %d\n", err);
 775                         return -EBADE;
 776                 }
 777
 778                 /* Check current status */
 779                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
 780                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 781                 if (err) {
 782                         brcmf_err("HT Avail read error: %d\n", err);
 783                         return -EBADE;
 784                 }
 785
 786                 /* Go to pending and await interrupt if appropriate */
 787                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 788                         /* Allow only clock-available interrupt */
 789                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 790                                                    SBSDIO_DEVICE_CTL, &err);
 791                         if (err) {
 792                                 brcmf_err("Devctl error setting CA: %d\n", err);
 793                                 return -EBADE;
 794                         }
 795
 796                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 797                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 798                                            devctl, &err);
 799                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 800                         bus->clkstate = CLK_PENDING;
 801
 802                         return 0;
 803                 } else if (bus->clkstate == CLK_PENDING) {
 804                         /* Cancel CA-only interrupt filter */
 805                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 806                                                    SBSDIO_DEVICE_CTL, &err);
 807                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 808                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 809                                            devctl, &err);
 810                 }
 811
 812                 /* Otherwise, wait here (polling) for HT Avail */
 813                 timeout = jiffies +
 814                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 815                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 816                         clkctl = brcmf_sdiod_readb(bus->sdiodev,
 817                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 818                                                    &err);
 819                         if (time_after(jiffies, timeout))
 820                                 break;
 821                         else
 822                                 usleep_range(5000, 10000);
 823                 }
 824                 if (err) {
 825                         brcmf_err("HT Avail request error: %d\n", err);
 826                         return -EBADE;
 827                 }
 828                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 829                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 830                                   PMU_MAX_TRANSITION_DLY, clkctl);
 831                         return -EBADE;
 832                 }
 833
 834                 /* Mark clock available */
 835                 bus->clkstate = CLK_AVAIL;
 836                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 837
 838 #if defined(DEBUG)
 839                 if (!bus->alp_only) {
 840                         if (SBSDIO_ALPONLY(clkctl))
 841                                 brcmf_err("HT Clock should be on\n");
 842                 }
 843 #endif                          /* defined (DEBUG) */
 844
 845         } else {
 846                 clkreq = 0;
 847
 848                 if (bus->clkstate == CLK_PENDING) {
 849                         /* Cancel CA-only interrupt filter */
 850                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 851                                                    SBSDIO_DEVICE_CTL, &err);
 852                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 853                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 854                                            devctl, &err);
 855                 }
 856
 857                 bus->clkstate = CLK_SDONLY;
 858                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 859                                    clkreq, &err);
 860                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 861                 if (err) {
 862                         brcmf_err("Failed access turning clock off: %d\n",
 863                                   err);
 864                         return -EBADE;
 865                 }
 866         }
 867         return 0;
 868 }
 869
 870 /* Change idle/active SD state */
 871 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 872 {
 873         brcmf_dbg(SDIO, "Enter\n");
 874
 875         if (on)
 876                 bus->clkstate = CLK_SDONLY;
 877         else
 878                 bus->clkstate = CLK_NONE;
 879
 880         return 0;
 881 }
 882
 883 /* Transition SD and backplane clock readiness */
 884 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 885 {
 886 #ifdef DEBUG
 887         uint oldstate = bus->clkstate;
 888 #endif                          /* DEBUG */
 889
 890         brcmf_dbg(SDIO, "Enter\n");
 891
 892         /* Early exit if we're already there */
 893         if (bus->clkstate == target)
 894                 return 0;
 895
 896         switch (target) {
 897         case CLK_AVAIL:
 898                 /* Make sure SD clock is available */
 899                 if (bus->clkstate == CLK_NONE)
 900                         brcmf_sdio_sdclk(bus, true);
 901                 /* Now request HT Avail on the backplane */
 902                 brcmf_sdio_htclk(bus, true, pendok);
 903                 break;
 904
 905         case CLK_SDONLY:
 906                 /* Remove HT request, or bring up SD clock */
 907                 if (bus->clkstate == CLK_NONE)
 908                         brcmf_sdio_sdclk(bus, true);
 909                 else if (bus->clkstate == CLK_AVAIL)
 910                         brcmf_sdio_htclk(bus, false, false);
 911                 else
 912                         brcmf_err("request for %d -> %d\n",
 913                                   bus->clkstate, target);
 914                 break;
 915
 916         case CLK_NONE:
 917                 /* Make sure to remove HT request */
 918                 if (bus->clkstate == CLK_AVAIL)
 919                         brcmf_sdio_htclk(bus, false, false);
 920                 /* Now remove the SD clock */
 921                 brcmf_sdio_sdclk(bus, false);
 922                 break;
 923         }
 924 #ifdef DEBUG
 925         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 926 #endif                          /* DEBUG */
 927
 928         return 0;
 929 }
 930
 931 static int
 932 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 933 {
 934         int err = 0;
 935         u8 clkcsr;
 936
 937         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 938                   (sleep ? "SLEEP" : "WAKE"),
 939                   (bus->sleeping ? "SLEEP" : "WAKE"));
 940
 941         /* If SR is enabled control bus state with KSO */
 942         if (bus->sr_enabled) {
 943                 /* Done if we're already in the requested state */
 944                 if (sleep == bus->sleeping)
 945                         goto end;
 946
 947                 /* Going to sleep */
 948                 if (sleep) {
 949                         clkcsr = brcmf_sdiod_readb(bus->sdiodev,
 950                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 951                                                    &err);
 952                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 953                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 954                                 brcmf_sdiod_writeb(bus->sdiodev,
 955                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 956                                                    SBSDIO_ALP_AVAIL_REQ, &err);
 957                         }
 958                         err = brcmf_sdio_kso_control(bus, false);
 959                 } else {
 960                         err = brcmf_sdio_kso_control(bus, true);
 961                 }
 962                 if (err) {
 963                         brcmf_err("error while changing bus sleep state %d\n",
 964                                   err);
 965                         goto done;
 966                 }
 967         }
 968
 969 end:
 970         /* control clocks */
 971         if (sleep) {
 972                 if (!bus->sr_enabled)
 973                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 974         } else {
 975                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 976                 brcmf_sdio_wd_timer(bus, true);
 977         }
 978         bus->sleeping = sleep;
 979         brcmf_dbg(SDIO, "new state %s\n",
 980                   (sleep ? "SLEEP" : "WAKE"));
 981 done:
 982         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 983         return err;
 984
 985 }
 986
 987 #ifdef DEBUG
 988 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 989 {
 990         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 991 }
 992
 993 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 994                                  struct sdpcm_shared *sh)
 995 {
 996         u32 addr = 0;
 997         int rv;
 998         u32 shaddr = 0;
 999         struct sdpcm_shared_le sh_le;
1000         __le32 addr_le;
1001
1002         sdio_claim_host(bus->sdiodev->func1);
1003         brcmf_sdio_bus_sleep(bus, false, false);
1004
1005         /*
1006          * Read last word in socram to determine
1007          * address of sdpcm_shared structure
1008          */
1009         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1010         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1011                 shaddr -= bus->ci->srsize;
1012         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1013                                (u8 *)&addr_le, 4);
1014         if (rv < 0)
1015                 goto fail;
1016
1017         /*
1018          * Check if addr is valid.
1019          * NVRAM length at the end of memory should have been overwritten.
1020          */
1021         addr = le32_to_cpu(addr_le);
1022         if (!brcmf_sdio_valid_shared_address(addr)) {
1023                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1024                 rv = -EINVAL;
1025                 goto fail;
1026         }
1027
1028         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1029
1030         /* Read hndrte_shared structure */
1031         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1032                                sizeof(struct sdpcm_shared_le));
1033         if (rv < 0)
1034                 goto fail;
1035
1036         sdio_release_host(bus->sdiodev->func1);
1037
1038         /* Endianness */
1039         sh->flags = le32_to_cpu(sh_le.flags);
1040         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1041         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1042         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1043         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1044         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1045         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1046
1047         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1048                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1049                           SDPCM_SHARED_VERSION,
1050                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1051                 return -EPROTO;
1052         }
1053         return 0;
1054
1055 fail:
1056         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1057                   rv, addr);
1058         sdio_release_host(bus->sdiodev->func1);
1059         return rv;
1060 }
1061
1062 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1063 {
1064         struct sdpcm_shared sh;
1065
1066         if (brcmf_sdio_readshared(bus, &sh) == 0)
1067                 bus->console_addr = sh.console_addr;
1068 }
1069 #else
1070 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1071 {
1072 }
1073 #endif /* DEBUG */
1074
1075 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1076 {
1077         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1078         struct brcmf_core *core = bus->sdio_core;
1079         u32 intstatus = 0;
1080         u32 hmb_data;
1081         u8 fcbits;
1082         int ret;
1083
1084         brcmf_dbg(SDIO, "Enter\n");
1085
1086         /* Read mailbox data and ack that we did so */
1087         hmb_data = brcmf_sdiod_readl(sdiod,
1088                                      core->base + SD_REG(tohostmailboxdata),
1089                                      &ret);
1090
1091         if (!ret)
1092                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1093                                    SMB_INT_ACK, &ret);
1094
1095         bus->sdcnt.f1regdata += 2;
1096
1097         /* dongle indicates the firmware has halted/crashed */
1098         if (hmb_data & HMB_DATA_FWHALT) {
1099                 brcmf_dbg(SDIO, "mailbox indicates firmware halted\n");
1100                 brcmf_fw_crashed(&sdiod->func1->dev);
1101         }
1102
1103         /* Dongle recomposed rx frames, accept them again */
1104         if (hmb_data & HMB_DATA_NAKHANDLED) {
1105                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1106                           bus->rx_seq);
1107                 if (!bus->rxskip)
1108                         brcmf_err("unexpected NAKHANDLED!\n");
1109
1110                 bus->rxskip = false;
1111                 intstatus |= I_HMB_FRAME_IND;
1112         }
1113
1114         /*
1115          * DEVREADY does not occur with gSPI.
1116          */
1117         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1118                 bus->sdpcm_ver =
1119                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1120                     HMB_DATA_VERSION_SHIFT;
1121                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1122                         brcmf_err("Version mismatch, dongle reports %d, "
1123                                   "expecting %d\n",
1124                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1125                 else
1126                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1127                                   bus->sdpcm_ver);
1128
1129                 /*
1130                  * Retrieve console state address now that firmware should have
1131                  * updated it.
1132                  */
1133                 brcmf_sdio_get_console_addr(bus);
1134         }
1135
1136         /*
1137          * Flow Control has been moved into the RX headers and this out of band
1138          * method isn't used any more.
1139          * remaining backward compatible with older dongles.
1140          */
1141         if (hmb_data & HMB_DATA_FC) {
1142                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1143                                                         HMB_DATA_FCDATA_SHIFT;
1144
1145                 if (fcbits & ~bus->flowcontrol)
1146                         bus->sdcnt.fc_xoff++;
1147
1148                 if (bus->flowcontrol & ~fcbits)
1149                         bus->sdcnt.fc_xon++;
1150
1151                 bus->sdcnt.fc_rcvd++;
1152                 bus->flowcontrol = fcbits;
1153         }
1154
1155         /* Shouldn't be any others */
1156         if (hmb_data & ~(HMB_DATA_DEVREADY |
1157                          HMB_DATA_NAKHANDLED |
1158                          HMB_DATA_FC |
1159                          HMB_DATA_FWREADY |
1160                          HMB_DATA_FWHALT |
1161                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1162                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1163                           hmb_data);
1164
1165         return intstatus;
1166 }
1167
1168 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1169 {
1170         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1171         struct brcmf_core *core = bus->sdio_core;
1172         uint retries = 0;
1173         u16 lastrbc;
1174         u8 hi, lo;
1175         int err;
1176
1177         brcmf_err("%sterminate frame%s\n",
1178                   abort ? "abort command, " : "",
1179                   rtx ? ", send NAK" : "");
1180
1181         if (abort)
1182                 brcmf_sdiod_abort(bus->sdiodev, bus->sdiodev->func2);
1183
1184         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
1185                            &err);
1186         bus->sdcnt.f1regdata++;
1187
1188         /* Wait until the packet has been flushed (device/FIFO stable) */
1189         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1190                 hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
1191                                        &err);
1192                 lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
1193                                        &err);
1194                 bus->sdcnt.f1regdata += 2;
1195
1196                 if ((hi == 0) && (lo == 0))
1197                         break;
1198
1199                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1200                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1201                                   lastrbc, (hi << 8) + lo);
1202                 }
1203                 lastrbc = (hi << 8) + lo;
1204         }
1205
1206         if (!retries)
1207                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1208         else
1209                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1210
1211         if (rtx) {
1212                 bus->sdcnt.rxrtx++;
1213                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1214                                    SMB_NAK, &err);
1215
1216                 bus->sdcnt.f1regdata++;
1217                 if (err == 0)
1218                         bus->rxskip = true;
1219         }
1220
1221         /* Clear partial in any case */
1222         bus->cur_read.len = 0;
1223 }
1224
1225 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1226 {
1227         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1228         u8 i, hi, lo;
1229
1230         /* On failure, abort the command and terminate the frame */
1231         brcmf_err("sdio error, abort command and terminate frame\n");
1232         bus->sdcnt.tx_sderrs++;
1233
1234         brcmf_sdiod_abort(sdiodev, sdiodev->func2);
1235         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1236         bus->sdcnt.f1regdata++;
1237
1238         for (i = 0; i < 3; i++) {
1239                 hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1240                 lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1241                 bus->sdcnt.f1regdata += 2;
1242                 if ((hi == 0) && (lo == 0))
1243                         break;
1244         }
1245 }
1246
1247 /* return total length of buffer chain */
1248 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1249 {
1250         struct sk_buff *p;
1251         uint total;
1252
1253         total = 0;
1254         skb_queue_walk(&bus->glom, p)
1255                 total += p->len;
1256         return total;
1257 }
1258
1259 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1260 {
1261         struct sk_buff *cur, *next;
1262
1263         skb_queue_walk_safe(&bus->glom, cur, next) {
1264                 skb_unlink(cur, &bus->glom);
1265                 brcmu_pkt_buf_free_skb(cur);
1266         }
1267 }
1268
1269 /**
1270  * brcmfmac sdio bus specific header
1271  * This is the lowest layer header wrapped on the packets transmitted between
1272  * host and WiFi dongle which contains information needed for SDIO core and
1273  * firmware
1274  *
1275  * It consists of 3 parts: hardware header, hardware extension header and
1276  * software header
1277  * hardware header (frame tag) - 4 bytes
1278  * Byte 0~1: Frame length
1279  * Byte 2~3: Checksum, bit-wise inverse of frame length
1280  * hardware extension header - 8 bytes
1281  * Tx glom mode only, N/A for Rx or normal Tx
1282  * Byte 0~1: Packet length excluding hw frame tag
1283  * Byte 2: Reserved
1284  * Byte 3: Frame flags, bit 0: last frame indication
1285  * Byte 4~5: Reserved
1286  * Byte 6~7: Tail padding length
1287  * software header - 8 bytes
1288  * Byte 0: Rx/Tx sequence number
1289  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1290  * Byte 2: Length of next data frame, reserved for Tx
1291  * Byte 3: Data offset
1292  * Byte 4: Flow control bits, reserved for Tx
1293  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1294  * Byte 6~7: Reserved
1295  */
1296 #define SDPCM_HWHDR_LEN                 4
1297 #define SDPCM_HWEXT_LEN                 8
1298 #define SDPCM_SWHDR_LEN                 8
1299 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1300 /* software header */
1301 #define SDPCM_SEQ_MASK                  0x000000ff
1302 #define SDPCM_SEQ_WRAP                  256
1303 #define SDPCM_CHANNEL_MASK              0x00000f00
1304 #define SDPCM_CHANNEL_SHIFT             8
1305 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1306 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1307 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1308 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1309 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1310 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1311 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1312 #define SDPCM_NEXTLEN_SHIFT             16
1313 #define SDPCM_DOFFSET_MASK              0xff000000
1314 #define SDPCM_DOFFSET_SHIFT             24
1315 #define SDPCM_FCMASK_MASK               0x000000ff
1316 #define SDPCM_WINDOW_MASK               0x0000ff00
1317 #define SDPCM_WINDOW_SHIFT              8
1318
1319 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1320 {
1321         u32 hdrvalue;
1322         hdrvalue = *(u32 *)swheader;
1323         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1324 }
1325
1326 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1327 {
1328         u32 hdrvalue;
1329         u8 ret;
1330
1331         hdrvalue = *(u32 *)swheader;
1332         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1333
1334         return (ret == SDPCM_EVENT_CHANNEL);
1335 }
1336
1337 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1338                               struct brcmf_sdio_hdrinfo *rd,
1339                               enum brcmf_sdio_frmtype type)
1340 {
1341         u16 len, checksum;
1342         u8 rx_seq, fc, tx_seq_max;
1343         u32 swheader;
1344
1345         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1346
1347         /* hw header */
1348         len = get_unaligned_le16(header);
1349         checksum = get_unaligned_le16(header + sizeof(u16));
1350         /* All zero means no more to read */
1351         if (!(len | checksum)) {
1352                 bus->rxpending = false;
1353                 return -ENODATA;
1354         }
1355         if ((u16)(~(len ^ checksum))) {
1356                 brcmf_err("HW header checksum error\n");
1357                 bus->sdcnt.rx_badhdr++;
1358                 brcmf_sdio_rxfail(bus, false, false);
1359                 return -EIO;
1360         }
1361         if (len < SDPCM_HDRLEN) {
1362                 brcmf_err("HW header length error\n");
1363                 return -EPROTO;
1364         }
1365         if (type == BRCMF_SDIO_FT_SUPER &&
1366             (roundup(len, bus->blocksize) != rd->len)) {
1367                 brcmf_err("HW superframe header length error\n");
1368                 return -EPROTO;
1369         }
1370         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1371                 brcmf_err("HW subframe header length error\n");
1372                 return -EPROTO;
1373         }
1374         rd->len = len;
1375
1376         /* software header */
1377         header += SDPCM_HWHDR_LEN;
1378         swheader = le32_to_cpu(*(__le32 *)header);
1379         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1380                 brcmf_err("Glom descriptor found in superframe head\n");
1381                 rd->len = 0;
1382                 return -EINVAL;
1383         }
1384         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1385         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1386         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1387             type != BRCMF_SDIO_FT_SUPER) {
1388                 brcmf_err("HW header length too long\n");
1389                 bus->sdcnt.rx_toolong++;
1390                 brcmf_sdio_rxfail(bus, false, false);
1391                 rd->len = 0;
1392                 return -EPROTO;
1393         }
1394         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1395                 brcmf_err("Wrong channel for superframe\n");
1396                 rd->len = 0;
1397                 return -EINVAL;
1398         }
1399         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1400             rd->channel != SDPCM_EVENT_CHANNEL) {
1401                 brcmf_err("Wrong channel for subframe\n");
1402                 rd->len = 0;
1403                 return -EINVAL;
1404         }
1405         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1406         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1407                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1408                 bus->sdcnt.rx_badhdr++;
1409                 brcmf_sdio_rxfail(bus, false, false);
1410                 rd->len = 0;
1411                 return -ENXIO;
1412         }
1413         if (rd->seq_num != rx_seq) {
1414                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1415                 bus->sdcnt.rx_badseq++;
1416                 rd->seq_num = rx_seq;
1417         }
1418         /* no need to check the reset for subframe */
1419         if (type == BRCMF_SDIO_FT_SUB)
1420                 return 0;
1421         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1422         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1423                 /* only warm for NON glom packet */
1424                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1425                         brcmf_err("seq %d: next length error\n", rx_seq);
1426                 rd->len_nxtfrm = 0;
1427         }
1428         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1429         fc = swheader & SDPCM_FCMASK_MASK;
1430         if (bus->flowcontrol != fc) {
1431                 if (~bus->flowcontrol & fc)
1432                         bus->sdcnt.fc_xoff++;
1433                 if (bus->flowcontrol & ~fc)
1434                         bus->sdcnt.fc_xon++;
1435                 bus->sdcnt.fc_rcvd++;
1436                 bus->flowcontrol = fc;
1437         }
1438         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1439         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1440                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1441                 tx_seq_max = bus->tx_seq + 2;
1442         }
1443         bus->tx_max = tx_seq_max;
1444
1445         return 0;
1446 }
1447
1448 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1449 {
1450         *(__le16 *)header = cpu_to_le16(frm_length);
1451         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1452 }
1453
1454 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1455                               struct brcmf_sdio_hdrinfo *hd_info)
1456 {
1457         u32 hdrval;
1458         u8 hdr_offset;
1459
1460         brcmf_sdio_update_hwhdr(header, hd_info->len);
1461         hdr_offset = SDPCM_HWHDR_LEN;
1462
1463         if (bus->txglom) {
1464                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1465                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1466                 hdrval = (u16)hd_info->tail_pad << 16;
1467                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1468                 hdr_offset += SDPCM_HWEXT_LEN;
1469         }
1470
1471         hdrval = hd_info->seq_num;
1472         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1473                   SDPCM_CHANNEL_MASK;
1474         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1475                   SDPCM_DOFFSET_MASK;
1476         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1477         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1478         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1479 }
1480
1481 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1482 {
1483         u16 dlen, totlen;
1484         u8 *dptr, num = 0;
1485         u16 sublen;
1486         struct sk_buff *pfirst, *pnext;
1487
1488         int errcode;
1489         u8 doff;
1490
1491         struct brcmf_sdio_hdrinfo rd_new;
1492
1493         /* If packets, issue read(s) and send up packet chain */
1494         /* Return sequence numbers consumed? */
1495
1496         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1497                   bus->glomd, skb_peek(&bus->glom));
1498
1499         /* If there's a descriptor, generate the packet chain */
1500         if (bus->glomd) {
1501                 pfirst = pnext = NULL;
1502                 dlen = (u16) (bus->glomd->len);
1503                 dptr = bus->glomd->data;
1504                 if (!dlen || (dlen & 1)) {
1505                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1506                                   dlen);
1507                         dlen = 0;
1508                 }
1509
1510                 for (totlen = num = 0; dlen; num++) {
1511                         /* Get (and move past) next length */
1512                         sublen = get_unaligned_le16(dptr);
1513                         dlen -= sizeof(u16);
1514                         dptr += sizeof(u16);
1515                         if ((sublen < SDPCM_HDRLEN) ||
1516                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1517                                 brcmf_err("descriptor len %d bad: %d\n",
1518                                           num, sublen);
1519                                 pnext = NULL;
1520                                 break;
1521                         }
1522                         if (sublen % bus->sgentry_align) {
1523                                 brcmf_err("sublen %d not multiple of %d\n",
1524                                           sublen, bus->sgentry_align);
1525                         }
1526                         totlen += sublen;
1527
1528                         /* For last frame, adjust read len so total
1529                                  is a block multiple */
1530                         if (!dlen) {
1531                                 sublen +=
1532                                     (roundup(totlen, bus->blocksize) - totlen);
1533                                 totlen = roundup(totlen, bus->blocksize);
1534                         }
1535
1536                         /* Allocate/chain packet for next subframe */
1537                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1538                         if (pnext == NULL) {
1539                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1540                                           num, sublen);
1541                                 break;
1542                         }
1543                         skb_queue_tail(&bus->glom, pnext);
1544
1545                         /* Adhere to start alignment requirements */
1546                         pkt_align(pnext, sublen, bus->sgentry_align);
1547                 }
1548
1549                 /* If all allocations succeeded, save packet chain
1550                          in bus structure */
1551                 if (pnext) {
1552                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1553                                   totlen, num);
1554                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1555                             totlen != bus->cur_read.len) {
1556                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1557                                           bus->cur_read.len, totlen, rxseq);
1558                         }
1559                         pfirst = pnext = NULL;
1560                 } else {
1561                         brcmf_sdio_free_glom(bus);
1562                         num = 0;
1563                 }
1564
1565                 /* Done with descriptor packet */
1566                 brcmu_pkt_buf_free_skb(bus->glomd);
1567                 bus->glomd = NULL;
1568                 bus->cur_read.len = 0;
1569         }
1570
1571         /* Ok -- either we just generated a packet chain,
1572                  or had one from before */
1573         if (!skb_queue_empty(&bus->glom)) {
1574                 if (BRCMF_GLOM_ON()) {
1575                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1576                         skb_queue_walk(&bus->glom, pnext) {
1577                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1578                                           pnext, (u8 *) (pnext->data),
1579                                           pnext->len, pnext->len);
1580                         }
1581                 }
1582
1583                 pfirst = skb_peek(&bus->glom);
1584                 dlen = (u16) brcmf_sdio_glom_len(bus);
1585
1586                 /* Do an SDIO read for the superframe.  Configurable iovar to
1587                  * read directly into the chained packet, or allocate a large
1588                  * packet and and copy into the chain.
1589                  */
1590                 sdio_claim_host(bus->sdiodev->func1);
1591                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1592                                                  &bus->glom, dlen);
1593                 sdio_release_host(bus->sdiodev->func1);
1594                 bus->sdcnt.f2rxdata++;
1595
1596                 /* On failure, kill the superframe */
1597                 if (errcode < 0) {
1598                         brcmf_err("glom read of %d bytes failed: %d\n",
1599                                   dlen, errcode);
1600
1601                         sdio_claim_host(bus->sdiodev->func1);
1602                         brcmf_sdio_rxfail(bus, true, false);
1603                         bus->sdcnt.rxglomfail++;
1604                         brcmf_sdio_free_glom(bus);
1605                         sdio_release_host(bus->sdiodev->func1);
1606                         return 0;
1607                 }
1608
1609                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1610                                    pfirst->data, min_t(int, pfirst->len, 48),
1611                                    "SUPERFRAME:\n");
1612
1613                 rd_new.seq_num = rxseq;
1614                 rd_new.len = dlen;
1615                 sdio_claim_host(bus->sdiodev->func1);
1616                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1617                                              BRCMF_SDIO_FT_SUPER);
1618                 sdio_release_host(bus->sdiodev->func1);
1619                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1620
1621                 /* Remove superframe header, remember offset */
1622                 skb_pull(pfirst, rd_new.dat_offset);
1623                 num = 0;
1624
1625                 /* Validate all the subframe headers */
1626                 skb_queue_walk(&bus->glom, pnext) {
1627                         /* leave when invalid subframe is found */
1628                         if (errcode)
1629                                 break;
1630
1631                         rd_new.len = pnext->len;
1632                         rd_new.seq_num = rxseq++;
1633                         sdio_claim_host(bus->sdiodev->func1);
1634                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1635                                                      BRCMF_SDIO_FT_SUB);
1636                         sdio_release_host(bus->sdiodev->func1);
1637                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1638                                            pnext->data, 32, "subframe:\n");
1639
1640                         num++;
1641                 }
1642
1643                 if (errcode) {
1644                         /* Terminate frame on error */
1645                         sdio_claim_host(bus->sdiodev->func1);
1646                         brcmf_sdio_rxfail(bus, true, false);
1647                         bus->sdcnt.rxglomfail++;
1648                         brcmf_sdio_free_glom(bus);
1649                         sdio_release_host(bus->sdiodev->func1);
1650                         bus->cur_read.len = 0;
1651                         return 0;
1652                 }
1653
1654                 /* Basic SD framing looks ok - process each packet (header) */
1655
1656                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1657                         dptr = (u8 *) (pfirst->data);
1658                         sublen = get_unaligned_le16(dptr);
1659                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1660
1661                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1662                                            dptr, pfirst->len,
1663                                            "Rx Subframe Data:\n");
1664
1665                         __skb_trim(pfirst, sublen);
1666                         skb_pull(pfirst, doff);
1667
1668                         if (pfirst->len == 0) {
1669                                 skb_unlink(pfirst, &bus->glom);
1670                                 brcmu_pkt_buf_free_skb(pfirst);
1671                                 continue;
1672                         }
1673
1674                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1675                                            pfirst->data,
1676                                            min_t(int, pfirst->len, 32),
1677                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1678                                            bus->glom.qlen, pfirst, pfirst->data,
1679                                            pfirst->len, pfirst->next,
1680                                            pfirst->prev);
1681                         skb_unlink(pfirst, &bus->glom);
1682                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1683                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1684                         else
1685                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1686                                                false);
1687                         bus->sdcnt.rxglompkts++;
1688                 }
1689
1690                 bus->sdcnt.rxglomframes++;
1691         }
1692         return num;
1693 }
1694
1695 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1696                                      bool *pending)
1697 {
1698         DECLARE_WAITQUEUE(wait, current);
1699         int timeout = DCMD_RESP_TIMEOUT;
1700
1701         /* Wait until control frame is available */
1702         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1703         set_current_state(TASK_INTERRUPTIBLE);
1704
1705         while (!(*condition) && (!signal_pending(current) && timeout))
1706                 timeout = schedule_timeout(timeout);
1707
1708         if (signal_pending(current))
1709                 *pending = true;
1710
1711         set_current_state(TASK_RUNNING);
1712         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1713
1714         return timeout;
1715 }
1716
1717 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1718 {
1719         wake_up_interruptible(&bus->dcmd_resp_wait);
1720
1721         return 0;
1722 }
1723 static void
1724 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1725 {
1726         uint rdlen, pad;
1727         u8 *buf = NULL, *rbuf;
1728         int sdret;
1729
1730         brcmf_dbg(SDIO, "Enter\n");
1731         if (bus->rxblen)
1732                 buf = vzalloc(bus->rxblen);
1733         if (!buf)
1734                 goto done;
1735
1736         rbuf = bus->rxbuf;
1737         pad = ((unsigned long)rbuf % bus->head_align);
1738         if (pad)
1739                 rbuf += (bus->head_align - pad);
1740
1741         /* Copy the already-read portion over */
1742         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1743         if (len <= BRCMF_FIRSTREAD)
1744                 goto gotpkt;
1745
1746         /* Raise rdlen to next SDIO block to avoid tail command */
1747         rdlen = len - BRCMF_FIRSTREAD;
1748         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1749                 pad = bus->blocksize - (rdlen % bus->blocksize);
1750                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1751                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1752                         rdlen += pad;
1753         } else if (rdlen % bus->head_align) {
1754                 rdlen += bus->head_align - (rdlen % bus->head_align);
1755         }
1756
1757         /* Drop if the read is too big or it exceeds our maximum */
1758         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1759                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1760                           rdlen, bus->sdiodev->bus_if->maxctl);
1761                 brcmf_sdio_rxfail(bus, false, false);
1762                 goto done;
1763         }
1764
1765         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1766                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1767                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1768                 bus->sdcnt.rx_toolong++;
1769                 brcmf_sdio_rxfail(bus, false, false);
1770                 goto done;
1771         }
1772
1773         /* Read remain of frame body */
1774         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1775         bus->sdcnt.f2rxdata++;
1776
1777         /* Control frame failures need retransmission */
1778         if (sdret < 0) {
1779                 brcmf_err("read %d control bytes failed: %d\n",
1780                           rdlen, sdret);
1781                 bus->sdcnt.rxc_errors++;
1782                 brcmf_sdio_rxfail(bus, true, true);
1783                 goto done;
1784         } else
1785                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1786
1787 gotpkt:
1788
1789         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1790                            buf, len, "RxCtrl:\n");
1791
1792         /* Point to valid data and indicate its length */
1793         spin_lock_bh(&bus->rxctl_lock);
1794         if (bus->rxctl) {
1795                 brcmf_err("last control frame is being processed.\n");
1796                 spin_unlock_bh(&bus->rxctl_lock);
1797                 vfree(buf);
1798                 goto done;
1799         }
1800         bus->rxctl = buf + doff;
1801         bus->rxctl_orig = buf;
1802         bus->rxlen = len - doff;
1803         spin_unlock_bh(&bus->rxctl_lock);
1804
1805 done:
1806         /* Awake any waiters */
1807         brcmf_sdio_dcmd_resp_wake(bus);
1808 }
1809
1810 /* Pad read to blocksize for efficiency */
1811 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1812 {
1813         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1814                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1815                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1816                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1817                         *rdlen += *pad;
1818         } else if (*rdlen % bus->head_align) {
1819                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1820         }
1821 }
1822
1823 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1824 {
1825         struct sk_buff *pkt;            /* Packet for event or data frames */
1826         u16 pad;                /* Number of pad bytes to read */
1827         uint rxleft = 0;        /* Remaining number of frames allowed */
1828         int ret;                /* Return code from calls */
1829         uint rxcount = 0;       /* Total frames read */
1830         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1831         u8 head_read = 0;
1832
1833         brcmf_dbg(SDIO, "Enter\n");
1834
1835         /* Not finished unless we encounter no more frames indication */
1836         bus->rxpending = true;
1837
1838         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1839              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1840              rd->seq_num++, rxleft--) {
1841
1842                 /* Handle glomming separately */
1843                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1844                         u8 cnt;
1845                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1846                                   bus->glomd, skb_peek(&bus->glom));
1847                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1848                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1849                         rd->seq_num += cnt - 1;
1850                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1851                         continue;
1852                 }
1853
1854                 rd->len_left = rd->len;
1855                 /* read header first for unknow frame length */
1856                 sdio_claim_host(bus->sdiodev->func1);
1857                 if (!rd->len) {
1858                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1859                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1860                         bus->sdcnt.f2rxhdrs++;
1861                         if (ret < 0) {
1862                                 brcmf_err("RXHEADER FAILED: %d\n",
1863                                           ret);
1864                                 bus->sdcnt.rx_hdrfail++;
1865                                 brcmf_sdio_rxfail(bus, true, true);
1866                                 sdio_release_host(bus->sdiodev->func1);
1867                                 continue;
1868                         }
1869
1870                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1871                                            bus->rxhdr, SDPCM_HDRLEN,
1872                                            "RxHdr:\n");
1873
1874                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1875                                                BRCMF_SDIO_FT_NORMAL)) {
1876                                 sdio_release_host(bus->sdiodev->func1);
1877                                 if (!bus->rxpending)
1878                                         break;
1879                                 else
1880                                         continue;
1881                         }
1882
1883                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1884                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1885                                                         rd->len,
1886                                                         rd->dat_offset);
1887                                 /* prepare the descriptor for the next read */
1888                                 rd->len = rd->len_nxtfrm << 4;
1889                                 rd->len_nxtfrm = 0;
1890                                 /* treat all packet as event if we don't know */
1891                                 rd->channel = SDPCM_EVENT_CHANNEL;
1892                                 sdio_release_host(bus->sdiodev->func1);
1893                                 continue;
1894                         }
1895                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1896                                        rd->len - BRCMF_FIRSTREAD : 0;
1897                         head_read = BRCMF_FIRSTREAD;
1898                 }
1899
1900                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1901
1902                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1903                                             bus->head_align);
1904                 if (!pkt) {
1905                         /* Give up on data, request rtx of events */
1906                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1907                         brcmf_sdio_rxfail(bus, false,
1908                                             RETRYCHAN(rd->channel));
1909                         sdio_release_host(bus->sdiodev->func1);
1910                         continue;
1911                 }
1912                 skb_pull(pkt, head_read);
1913                 pkt_align(pkt, rd->len_left, bus->head_align);
1914
1915                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1916                 bus->sdcnt.f2rxdata++;
1917                 sdio_release_host(bus->sdiodev->func1);
1918
1919                 if (ret < 0) {
1920                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1921                                   rd->len, rd->channel, ret);
1922                         brcmu_pkt_buf_free_skb(pkt);
1923                         sdio_claim_host(bus->sdiodev->func1);
1924                         brcmf_sdio_rxfail(bus, true,
1925                                             RETRYCHAN(rd->channel));
1926                         sdio_release_host(bus->sdiodev->func1);
1927                         continue;
1928                 }
1929
1930                 if (head_read) {
1931                         skb_push(pkt, head_read);
1932                         memcpy(pkt->data, bus->rxhdr, head_read);
1933                         head_read = 0;
1934                 } else {
1935                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1936                         rd_new.seq_num = rd->seq_num;
1937                         sdio_claim_host(bus->sdiodev->func1);
1938                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1939                                                BRCMF_SDIO_FT_NORMAL)) {
1940                                 rd->len = 0;
1941                                 brcmu_pkt_buf_free_skb(pkt);
1942                         }
1943                         bus->sdcnt.rx_readahead_cnt++;
1944                         if (rd->len != roundup(rd_new.len, 16)) {
1945                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1946                                           rd->len,
1947                                           roundup(rd_new.len, 16) >> 4);
1948                                 rd->len = 0;
1949                                 brcmf_sdio_rxfail(bus, true, true);
1950                                 sdio_release_host(bus->sdiodev->func1);
1951                                 brcmu_pkt_buf_free_skb(pkt);
1952                                 continue;
1953                         }
1954                         sdio_release_host(bus->sdiodev->func1);
1955                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1956                         rd->channel = rd_new.channel;
1957                         rd->dat_offset = rd_new.dat_offset;
1958
1959                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1960                                              BRCMF_DATA_ON()) &&
1961                                            BRCMF_HDRS_ON(),
1962                                            bus->rxhdr, SDPCM_HDRLEN,
1963                                            "RxHdr:\n");
1964
1965                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1966                                 brcmf_err("readahead on control packet %d?\n",
1967                                           rd_new.seq_num);
1968                                 /* Force retry w/normal header read */
1969                                 rd->len = 0;
1970                                 sdio_claim_host(bus->sdiodev->func1);
1971                                 brcmf_sdio_rxfail(bus, false, true);
1972                                 sdio_release_host(bus->sdiodev->func1);
1973                                 brcmu_pkt_buf_free_skb(pkt);
1974                                 continue;
1975                         }
1976                 }
1977
1978                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1979                                    pkt->data, rd->len, "Rx Data:\n");
1980
1981                 /* Save superframe descriptor and allocate packet frame */
1982                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1983                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1984                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1985                                           rd->len);
1986                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1987                                                    pkt->data, rd->len,
1988                                                    "Glom Data:\n");
1989                                 __skb_trim(pkt, rd->len);
1990                                 skb_pull(pkt, SDPCM_HDRLEN);
1991                                 bus->glomd = pkt;
1992                         } else {
1993                                 brcmf_err("%s: glom superframe w/o "
1994                                           "descriptor!\n", __func__);
1995                                 sdio_claim_host(bus->sdiodev->func1);
1996                                 brcmf_sdio_rxfail(bus, false, false);
1997                                 sdio_release_host(bus->sdiodev->func1);
1998                         }
1999                         /* prepare the descriptor for the next read */
2000                         rd->len = rd->len_nxtfrm << 4;
2001                         rd->len_nxtfrm = 0;
2002                         /* treat all packet as event if we don't know */
2003                         rd->channel = SDPCM_EVENT_CHANNEL;
2004                         continue;
2005                 }
2006
2007                 /* Fill in packet len and prio, deliver upward */
2008                 __skb_trim(pkt, rd->len);
2009                 skb_pull(pkt, rd->dat_offset);
2010
2011                 if (pkt->len == 0)
2012                         brcmu_pkt_buf_free_skb(pkt);
2013                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2014                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2015                 else
2016                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2017                                        false);
2018
2019                 /* prepare the descriptor for the next read */
2020                 rd->len = rd->len_nxtfrm << 4;
2021                 rd->len_nxtfrm = 0;
2022                 /* treat all packet as event if we don't know */
2023                 rd->channel = SDPCM_EVENT_CHANNEL;
2024         }
2025
2026         rxcount = maxframes - rxleft;
2027         /* Message if we hit the limit */
2028         if (!rxleft)
2029                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2030         else
2031                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2032         /* Back off rxseq if awaiting rtx, update rx_seq */
2033         if (bus->rxskip)
2034                 rd->seq_num--;
2035         bus->rx_seq = rd->seq_num;
2036
2037         return rxcount;
2038 }
2039
2040 static void
2041 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2042 {
2043         wake_up_interruptible(&bus->ctrl_wait);
2044         return;
2045 }
2046
2047 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2048 {
2049         struct brcmf_bus_stats *stats;
2050         u16 head_pad;
2051         u8 *dat_buf;
2052
2053         dat_buf = (u8 *)(pkt->data);
2054
2055         /* Check head padding */
2056         head_pad = ((unsigned long)dat_buf % bus->head_align);
2057         if (head_pad) {
2058                 if (skb_headroom(pkt) < head_pad) {
2059                         stats = &bus->sdiodev->bus_if->stats;
2060                         atomic_inc(&stats->pktcowed);
2061                         if (skb_cow_head(pkt, head_pad)) {
2062                                 atomic_inc(&stats->pktcow_failed);
2063                                 return -ENOMEM;
2064                         }
2065                         head_pad = 0;
2066                 }
2067                 skb_push(pkt, head_pad);
2068                 dat_buf = (u8 *)(pkt->data);
2069         }
2070         memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2071         return head_pad;
2072 }
2073
2074 /*
2075  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2076  * bus layer usage.
2077  */
2078 /* flag marking a dummy skb added for DMA alignment requirement */
2079 #define ALIGN_SKB_FLAG          0x8000
2080 /* bit mask of data length chopped from the previous packet */
2081 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2082
2083 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2084                                     struct sk_buff_head *pktq,
2085                                     struct sk_buff *pkt, u16 total_len)
2086 {
2087         struct brcmf_sdio_dev *sdiodev;
2088         struct sk_buff *pkt_pad;
2089         u16 tail_pad, tail_chop, chain_pad;
2090         unsigned int blksize;
2091         bool lastfrm;
2092         int ntail, ret;
2093
2094         sdiodev = bus->sdiodev;
2095         blksize = sdiodev->func2->cur_blksize;
2096         /* sg entry alignment should be a divisor of block size */
2097         WARN_ON(blksize % bus->sgentry_align);
2098
2099         /* Check tail padding */
2100         lastfrm = skb_queue_is_last(pktq, pkt);
2101         tail_pad = 0;
2102         tail_chop = pkt->len % bus->sgentry_align;
2103         if (tail_chop)
2104                 tail_pad = bus->sgentry_align - tail_chop;
2105         chain_pad = (total_len + tail_pad) % blksize;
2106         if (lastfrm && chain_pad)
2107                 tail_pad += blksize - chain_pad;
2108         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2109                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2110                                                 bus->head_align);
2111                 if (pkt_pad == NULL)
2112                         return -ENOMEM;
2113                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2114                 if (unlikely(ret < 0)) {
2115                         kfree_skb(pkt_pad);
2116                         return ret;
2117                 }
2118                 memcpy(pkt_pad->data,
2119                        pkt->data + pkt->len - tail_chop,
2120                        tail_chop);
2121                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2122                 skb_trim(pkt, pkt->len - tail_chop);
2123                 skb_trim(pkt_pad, tail_pad + tail_chop);
2124                 __skb_queue_after(pktq, pkt, pkt_pad);
2125         } else {
2126                 ntail = pkt->data_len + tail_pad -
2127                         (pkt->end - pkt->tail);
2128                 if (skb_cloned(pkt) || ntail > 0)
2129                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2130                                 return -ENOMEM;
2131                 if (skb_linearize(pkt))
2132                         return -ENOMEM;
2133                 __skb_put(pkt, tail_pad);
2134         }
2135
2136         return tail_pad;
2137 }
2138
2139 /**
2140  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2141  * @bus: brcmf_sdio structure pointer
2142  * @pktq: packet list pointer
2143  * @chan: virtual channel to transmit the packet
2144  *
2145  * Processes to be applied to the packet
2146  *      - Align data buffer pointer
2147  *      - Align data buffer length
2148  *      - Prepare header
2149  * Return: negative value if there is error
2150  */
2151 static int
2152 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2153                       uint chan)
2154 {
2155         u16 head_pad, total_len;
2156         struct sk_buff *pkt_next;
2157         u8 txseq;
2158         int ret;
2159         struct brcmf_sdio_hdrinfo hd_info = {0};
2160
2161         txseq = bus->tx_seq;
2162         total_len = 0;
2163         skb_queue_walk(pktq, pkt_next) {
2164                 /* alignment packet inserted in previous
2165                  * loop cycle can be skipped as it is
2166                  * already properly aligned and does not
2167                  * need an sdpcm header.
2168                  */
2169                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2170                         continue;
2171
2172                 /* align packet data pointer */
2173                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2174                 if (ret < 0)
2175                         return ret;
2176                 head_pad = (u16)ret;
2177                 if (head_pad)
2178                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2179
2180                 total_len += pkt_next->len;
2181
2182                 hd_info.len = pkt_next->len;
2183                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2184                 if (bus->txglom && pktq->qlen > 1) {
2185                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2186                                                        pkt_next, total_len);
2187                         if (ret < 0)
2188                                 return ret;
2189                         hd_info.tail_pad = (u16)ret;
2190                         total_len += (u16)ret;
2191                 }
2192
2193                 hd_info.channel = chan;
2194                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2195                 hd_info.seq_num = txseq++;
2196
2197                 /* Now fill the header */
2198                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2199
2200                 if (BRCMF_BYTES_ON() &&
2201                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2202                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2203                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2204                                            "Tx Frame:\n");
2205                 else if (BRCMF_HDRS_ON())
2206                         brcmf_dbg_hex_dump(true, pkt_next->data,
2207                                            head_pad + bus->tx_hdrlen,
2208                                            "Tx Header:\n");
2209         }
2210         /* Hardware length tag of the first packet should be total
2211          * length of the chain (including padding)
2212          */
2213         if (bus->txglom)
2214                 brcmf_sdio_update_hwhdr(__skb_peek(pktq)->data, total_len);
2215         return 0;
2216 }
2217
2218 /**
2219  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2220  * @bus: brcmf_sdio structure pointer
2221  * @pktq: packet list pointer
2222  *
2223  * Processes to be applied to the packet
2224  *      - Remove head padding
2225  *      - Remove tail padding
2226  */
2227 static void
2228 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2229 {
2230         u8 *hdr;
2231         u32 dat_offset;
2232         u16 tail_pad;
2233         u16 dummy_flags, chop_len;
2234         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2235
2236         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2237                 dummy_flags = *(u16 *)(pkt_next->cb);
2238                 if (dummy_flags & ALIGN_SKB_FLAG) {
2239                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2240                         if (chop_len) {
2241                                 pkt_prev = pkt_next->prev;
2242                                 skb_put(pkt_prev, chop_len);
2243                         }
2244                         __skb_unlink(pkt_next, pktq);
2245                         brcmu_pkt_buf_free_skb(pkt_next);
2246                 } else {
2247                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2248                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2249                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2250                                      SDPCM_DOFFSET_SHIFT;
2251                         skb_pull(pkt_next, dat_offset);
2252                         if (bus->txglom) {
2253                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2254                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2255                         }
2256                 }
2257         }
2258 }
2259
2260 /* Writes a HW/SW header into the packet and sends it. */
2261 /* Assumes: (a) header space already there, (b) caller holds lock */
2262 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2263                             uint chan)
2264 {
2265         int ret;
2266         struct sk_buff *pkt_next, *tmp;
2267
2268         brcmf_dbg(TRACE, "Enter\n");
2269
2270         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2271         if (ret)
2272                 goto done;
2273
2274         sdio_claim_host(bus->sdiodev->func1);
2275         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2276         bus->sdcnt.f2txdata++;
2277
2278         if (ret < 0)
2279                 brcmf_sdio_txfail(bus);
2280
2281         sdio_release_host(bus->sdiodev->func1);
2282
2283 done:
2284         brcmf_sdio_txpkt_postp(bus, pktq);
2285         if (ret == 0)
2286                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2287         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2288                 __skb_unlink(pkt_next, pktq);
2289                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2290                                             ret == 0);
2291         }
2292         return ret;
2293 }
2294
2295 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2296 {
2297         struct sk_buff *pkt;
2298         struct sk_buff_head pktq;
2299         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2300         u32 intstatus = 0;
2301         int ret = 0, prec_out, i;
2302         uint cnt = 0;
2303         u8 tx_prec_map, pkt_num;
2304
2305         brcmf_dbg(TRACE, "Enter\n");
2306
2307         tx_prec_map = ~bus->flowcontrol;
2308
2309         /* Send frames until the limit or some other event */
2310         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2311                 pkt_num = 1;
2312                 if (bus->txglom)
2313                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2314                                         bus->sdiodev->txglomsz);
2315                 pkt_num = min_t(u32, pkt_num,
2316                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2317                 __skb_queue_head_init(&pktq);
2318                 spin_lock_bh(&bus->txq_lock);
2319                 for (i = 0; i < pkt_num; i++) {
2320                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2321                                               &prec_out);
2322                         if (pkt == NULL)
2323                                 break;
2324                         __skb_queue_tail(&pktq, pkt);
2325                 }
2326                 spin_unlock_bh(&bus->txq_lock);
2327                 if (i == 0)
2328                         break;
2329
2330                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2331
2332                 cnt += i;
2333
2334                 /* In poll mode, need to check for other events */
2335                 if (!bus->intr) {
2336                         /* Check device status, signal pending interrupt */
2337                         sdio_claim_host(bus->sdiodev->func1);
2338                         intstatus = brcmf_sdiod_readl(bus->sdiodev,
2339                                                       intstat_addr, &ret);
2340                         sdio_release_host(bus->sdiodev->func1);
2341
2342                         bus->sdcnt.f2txdata++;
2343                         if (ret != 0)
2344                                 break;
2345                         if (intstatus & bus->hostintmask)
2346                                 atomic_set(&bus->ipend, 1);
2347                 }
2348         }
2349
2350         /* Deflow-control stack if needed */
2351         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2352             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2353                 bus->txoff = false;
2354                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2355         }
2356
2357         return cnt;
2358 }
2359
2360 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2361 {
2362         u8 doff;
2363         u16 pad;
2364         uint retries = 0;
2365         struct brcmf_sdio_hdrinfo hd_info = {0};
2366         int ret;
2367
2368         brcmf_dbg(SDIO, "Enter\n");
2369
2370         /* Back the pointer to make room for bus header */
2371         frame -= bus->tx_hdrlen;
2372         len += bus->tx_hdrlen;
2373
2374         /* Add alignment padding (optional for ctl frames) */
2375         doff = ((unsigned long)frame % bus->head_align);
2376         if (doff) {
2377                 frame -= doff;
2378                 len += doff;
2379                 memset(frame + bus->tx_hdrlen, 0, doff);
2380         }
2381
2382         /* Round send length to next SDIO block */
2383         pad = 0;
2384         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2385                 pad = bus->blocksize - (len % bus->blocksize);
2386                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2387                         pad = 0;
2388         } else if (len % bus->head_align) {
2389                 pad = bus->head_align - (len % bus->head_align);
2390         }
2391         len += pad;
2392
2393         hd_info.len = len - pad;
2394         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2395         hd_info.dat_offset = doff + bus->tx_hdrlen;
2396         hd_info.seq_num = bus->tx_seq;
2397         hd_info.lastfrm = true;
2398         hd_info.tail_pad = pad;
2399         brcmf_sdio_hdpack(bus, frame, &hd_info);
2400
2401         if (bus->txglom)
2402                 brcmf_sdio_update_hwhdr(frame, len);
2403
2404         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2405                            frame, len, "Tx Frame:\n");
2406         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2407                            BRCMF_HDRS_ON(),
2408                            frame, min_t(u16, len, 16), "TxHdr:\n");
2409
2410         do {
2411                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2412
2413                 if (ret < 0)
2414                         brcmf_sdio_txfail(bus);
2415                 else
2416                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2417         } while (ret < 0 && retries++ < TXRETRIES);
2418
2419         return ret;
2420 }
2421
2422 static bool brcmf_chip_is_ulp(struct brcmf_chip *ci)
2423 {
2424         if (ci->chip == CY_CC_43012_CHIP_ID)
2425                 return true;
2426         else
2427                 return false;
2428 }
2429
2430 static void brcmf_sdio_bus_stop(struct device *dev)
2431 {
2432         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2433         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2434         struct brcmf_sdio *bus = sdiodev->bus;
2435         struct brcmf_core *core = bus->sdio_core;
2436         u32 local_hostintmask;
2437         u8 saveclk, bpreq;
2438         int err;
2439
2440         brcmf_dbg(TRACE, "Enter\n");
2441
2442         if (bus->watchdog_tsk) {
2443                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2444                 kthread_stop(bus->watchdog_tsk);
2445                 bus->watchdog_tsk = NULL;
2446         }
2447
2448         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2449                 sdio_claim_host(sdiodev->func1);
2450
2451                 /* Enable clock for device interrupts */
2452                 brcmf_sdio_bus_sleep(bus, false, false);
2453
2454                 /* Disable and clear interrupts at the chip level also */
2455                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(hostintmask),
2456                                    0, NULL);
2457
2458                 local_hostintmask = bus->hostintmask;
2459                 bus->hostintmask = 0;
2460
2461                 /* Force backplane clocks to assure F2 interrupt propagates */
2462                 saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2463                                             &err);
2464                 if (!err) {
2465                         bpreq = saveclk;
2466                         bpreq |= brcmf_chip_is_ulp(bus->ci) ?
2467                                 SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
2468                         brcmf_sdiod_writeb(sdiodev,
2469                                            SBSDIO_FUNC1_CHIPCLKCSR,
2470                                            bpreq, &err);
2471                 }
2472                 if (err)
2473                         brcmf_err("Failed to force clock for F2: err %d\n",
2474                                   err);
2475
2476                 /* Turn off the bus (F2), free any pending packets */
2477                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2478                 sdio_disable_func(sdiodev->func2);
2479
2480                 /* Clear any pending interrupts now that F2 is disabled */
2481                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(intstatus),
2482                                    local_hostintmask, NULL);
2483
2484                 sdio_release_host(sdiodev->func1);
2485         }
2486         /* Clear the data packet queues */
2487         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2488
2489         /* Clear any held glomming stuff */
2490         brcmu_pkt_buf_free_skb(bus->glomd);
2491         brcmf_sdio_free_glom(bus);
2492
2493         /* Clear rx control and wake any waiters */
2494         spin_lock_bh(&bus->rxctl_lock);
2495         bus->rxlen = 0;
2496         spin_unlock_bh(&bus->rxctl_lock);
2497         brcmf_sdio_dcmd_resp_wake(bus);
2498
2499         /* Reset some F2 state stuff */
2500         bus->rxskip = false;
2501         bus->tx_seq = bus->rx_seq = 0;
2502 }
2503
2504 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2505 {
2506         struct brcmf_sdio_dev *sdiodev;
2507         unsigned long flags;
2508
2509         sdiodev = bus->sdiodev;
2510         if (sdiodev->oob_irq_requested) {
2511                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2512                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2513                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2514                         sdiodev->irq_en = true;
2515                 }
2516                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2517         }
2518 }
2519
2520 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2521 {
2522         struct brcmf_core *core = bus->sdio_core;
2523         u32 addr;
2524         unsigned long val;
2525         int ret;
2526
2527         addr = core->base + SD_REG(intstatus);
2528
2529         val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
2530         bus->sdcnt.f1regdata++;
2531         if (ret != 0)
2532                 return ret;
2533
2534         val &= bus->hostintmask;
2535         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2536
2537         /* Clear interrupts */
2538         if (val) {
2539                 brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
2540                 bus->sdcnt.f1regdata++;
2541                 atomic_or(val, &bus->intstatus);
2542         }
2543
2544         return ret;
2545 }
2546
2547 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2548 {
2549         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
2550         u32 newstatus = 0;
2551         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2552         unsigned long intstatus;
2553         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2554         uint framecnt;                  /* Temporary counter of tx/rx frames */
2555         int err = 0;
2556
2557         brcmf_dbg(SDIO, "Enter\n");
2558
2559         sdio_claim_host(bus->sdiodev->func1);
2560
2561         /* If waiting for HTAVAIL, check status */
2562         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2563                 u8 clkctl, devctl = 0;
2564
2565 #ifdef DEBUG
2566                 /* Check for inconsistent device control */
2567                 devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2568                                            &err);
2569 #endif                          /* DEBUG */
2570
2571                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2572                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
2573                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2574
2575                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2576                           devctl, clkctl);
2577
2578                 if (SBSDIO_HTAV(clkctl)) {
2579                         devctl = brcmf_sdiod_readb(bus->sdiodev,
2580                                                    SBSDIO_DEVICE_CTL, &err);
2581                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2582                         brcmf_sdiod_writeb(bus->sdiodev,
2583                                            SBSDIO_DEVICE_CTL, devctl, &err);
2584                         bus->clkstate = CLK_AVAIL;
2585                 }
2586         }
2587
2588         /* Make sure backplane clock is on */
2589         brcmf_sdio_bus_sleep(bus, false, true);
2590
2591         /* Pending interrupt indicates new device status */
2592         if (atomic_read(&bus->ipend) > 0) {
2593                 atomic_set(&bus->ipend, 0);
2594                 err = brcmf_sdio_intr_rstatus(bus);
2595         }
2596
2597         /* Start with leftover status bits */
2598         intstatus = atomic_xchg(&bus->intstatus, 0);
2599
2600         /* Handle flow-control change: read new state in case our ack
2601          * crossed another change interrupt.  If change still set, assume
2602          * FC ON for safety, let next loop through do the debounce.
2603          */
2604         if (intstatus & I_HMB_FC_CHANGE) {
2605                 intstatus &= ~I_HMB_FC_CHANGE;
2606                 brcmf_sdiod_writel(sdiod, intstat_addr, I_HMB_FC_CHANGE, &err);
2607
2608                 newstatus = brcmf_sdiod_readl(sdiod, intstat_addr, &err);
2609
2610                 bus->sdcnt.f1regdata += 2;
2611                 atomic_set(&bus->fcstate,
2612                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2613                 intstatus |= (newstatus & bus->hostintmask);
2614         }
2615
2616         /* Handle host mailbox indication */
2617         if (intstatus & I_HMB_HOST_INT) {
2618                 intstatus &= ~I_HMB_HOST_INT;
2619                 intstatus |= brcmf_sdio_hostmail(bus);
2620         }
2621
2622         sdio_release_host(bus->sdiodev->func1);
2623
2624         /* Generally don't ask for these, can get CRC errors... */
2625         if (intstatus & I_WR_OOSYNC) {
2626                 brcmf_err("Dongle reports WR_OOSYNC\n");
2627                 intstatus &= ~I_WR_OOSYNC;
2628         }
2629
2630         if (intstatus & I_RD_OOSYNC) {
2631                 brcmf_err("Dongle reports RD_OOSYNC\n");
2632                 intstatus &= ~I_RD_OOSYNC;
2633         }
2634
2635         if (intstatus & I_SBINT) {
2636                 brcmf_err("Dongle reports SBINT\n");
2637                 intstatus &= ~I_SBINT;
2638         }
2639
2640         /* Would be active due to wake-wlan in gSPI */
2641         if (intstatus & I_CHIPACTIVE) {
2642                 brcmf_dbg(SDIO, "Dongle reports CHIPACTIVE\n");
2643                 intstatus &= ~I_CHIPACTIVE;
2644         }
2645
2646         /* Ignore frame indications if rxskip is set */
2647         if (bus->rxskip)
2648                 intstatus &= ~I_HMB_FRAME_IND;
2649
2650         /* On frame indication, read available frames */
2651         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2652                 brcmf_sdio_readframes(bus, bus->rxbound);
2653                 if (!bus->rxpending)
2654                         intstatus &= ~I_HMB_FRAME_IND;
2655         }
2656
2657         /* Keep still-pending events for next scheduling */
2658         if (intstatus)
2659                 atomic_or(intstatus, &bus->intstatus);
2660
2661         brcmf_sdio_clrintr(bus);
2662
2663         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2664             data_ok(bus)) {
2665                 sdio_claim_host(bus->sdiodev->func1);
2666                 if (bus->ctrl_frame_stat) {
2667                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2668                                                       bus->ctrl_frame_len);
2669                         bus->ctrl_frame_err = err;
2670                         wmb();
2671                         bus->ctrl_frame_stat = false;
2672                 }
2673                 sdio_release_host(bus->sdiodev->func1);
2674                 brcmf_sdio_wait_event_wakeup(bus);
2675         }
2676         /* Send queued frames (limit 1 if rx may still be pending) */
2677         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2678             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2679             data_ok(bus)) {
2680                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2681                                             txlimit;
2682                 brcmf_sdio_sendfromq(bus, framecnt);
2683         }
2684
2685         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2686                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2687                 atomic_set(&bus->intstatus, 0);
2688                 if (bus->ctrl_frame_stat) {
2689                         sdio_claim_host(bus->sdiodev->func1);
2690                         if (bus->ctrl_frame_stat) {
2691                                 bus->ctrl_frame_err = -ENODEV;
2692                                 wmb();
2693                                 bus->ctrl_frame_stat = false;
2694                                 brcmf_sdio_wait_event_wakeup(bus);
2695                         }
2696                         sdio_release_host(bus->sdiodev->func1);
2697                 }
2698         } else if (atomic_read(&bus->intstatus) ||
2699                    atomic_read(&bus->ipend) > 0 ||
2700                    (!atomic_read(&bus->fcstate) &&
2701                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2702                     data_ok(bus))) {
2703                 bus->dpc_triggered = true;
2704         }
2705 }
2706
2707 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2708 {
2709         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2710         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2711         struct brcmf_sdio *bus = sdiodev->bus;
2712
2713         return &bus->txq;
2714 }
2715
2716 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2717 {
2718         struct sk_buff *p;
2719         int eprec = -1;         /* precedence to evict from */
2720
2721         /* Fast case, precedence queue is not full and we are also not
2722          * exceeding total queue length
2723          */
2724         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2725                 brcmu_pktq_penq(q, prec, pkt);
2726                 return true;
2727         }
2728
2729         /* Determine precedence from which to evict packet, if any */
2730         if (pktq_pfull(q, prec)) {
2731                 eprec = prec;
2732         } else if (pktq_full(q)) {
2733                 p = brcmu_pktq_peek_tail(q, &eprec);
2734                 if (eprec > prec)
2735                         return false;
2736         }
2737
2738         /* Evict if needed */
2739         if (eprec >= 0) {
2740                 /* Detect queueing to unconfigured precedence */
2741                 if (eprec == prec)
2742                         return false;   /* refuse newer (incoming) packet */
2743                 /* Evict packet according to discard policy */
2744                 p = brcmu_pktq_pdeq_tail(q, eprec);
2745                 if (p == NULL)
2746                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2747                 brcmu_pkt_buf_free_skb(p);
2748         }
2749
2750         /* Enqueue */
2751         p = brcmu_pktq_penq(q, prec, pkt);
2752         if (p == NULL)
2753                 brcmf_err("brcmu_pktq_penq() failed\n");
2754
2755         return p != NULL;
2756 }
2757
2758 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2759 {
2760         int ret = -EBADE;
2761         uint prec;
2762         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2763         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2764         struct brcmf_sdio *bus = sdiodev->bus;
2765
2766         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2767         if (sdiodev->state != BRCMF_SDIOD_DATA)
2768                 return -EIO;
2769
2770         /* Add space for the header */
2771         skb_push(pkt, bus->tx_hdrlen);
2772         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2773
2774         prec = prio2prec((pkt->priority & PRIOMASK));
2775
2776         /* Check for existing queue, current flow-control,
2777                          pending event, or pending clock */
2778         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2779         bus->sdcnt.fcqueued++;
2780
2781         /* Priority based enq */
2782         spin_lock_bh(&bus->txq_lock);
2783         /* reset bus_flags in packet cb */
2784         *(u16 *)(pkt->cb) = 0;
2785         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2786                 skb_pull(pkt, bus->tx_hdrlen);
2787                 brcmf_err("out of bus->txq !!!\n");
2788                 ret = -ENOSR;
2789         } else {
2790                 ret = 0;
2791         }
2792
2793         if (pktq_len(&bus->txq) >= TXHI) {
2794                 bus->txoff = true;
2795                 brcmf_proto_bcdc_txflowblock(dev, true);
2796         }
2797         spin_unlock_bh(&bus->txq_lock);
2798
2799 #ifdef DEBUG
2800         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2801                 qcount[prec] = pktq_plen(&bus->txq, prec);
2802 #endif
2803
2804         brcmf_sdio_trigger_dpc(bus);
2805         return ret;
2806 }
2807
2808 #ifdef DEBUG
2809 #define CONSOLE_LINE_MAX        192
2810
2811 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2812 {
2813         struct brcmf_console *c = &bus->console;
2814         u8 line[CONSOLE_LINE_MAX], ch;
2815         u32 n, idx, addr;
2816         int rv;
2817
2818         /* Don't do anything until FWREADY updates console address */
2819         if (bus->console_addr == 0)
2820                 return 0;
2821
2822         /* Read console log struct */
2823         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2824         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2825                                sizeof(c->log_le));
2826         if (rv < 0)
2827                 return rv;
2828
2829         /* Allocate console buffer (one time only) */
2830         if (c->buf == NULL) {
2831                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2832                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2833                 if (c->buf == NULL)
2834                         return -ENOMEM;
2835         }
2836
2837         idx = le32_to_cpu(c->log_le.idx);
2838
2839         /* Protect against corrupt value */
2840         if (idx > c->bufsize)
2841                 return -EBADE;
2842
2843         /* Skip reading the console buffer if the index pointer
2844          has not moved */
2845         if (idx == c->last)
2846                 return 0;
2847
2848         /* Read the console buffer */
2849         addr = le32_to_cpu(c->log_le.buf);
2850         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2851         if (rv < 0)
2852                 return rv;
2853
2854         while (c->last != idx) {
2855                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2856                         if (c->last == idx) {
2857                                 /* This would output a partial line.
2858                                  * Instead, back up
2859                                  * the buffer pointer and output this
2860                                  * line next time around.
2861                                  */
2862                                 if (c->last >= n)
2863                                         c->last -= n;
2864                                 else
2865                                         c->last = c->bufsize - n;
2866                                 goto break2;
2867                         }
2868                         ch = c->buf[c->last];
2869                         c->last = (c->last + 1) % c->bufsize;
2870                         if (ch == '\n')
2871                                 break;
2872                         line[n] = ch;
2873                 }
2874
2875                 if (n > 0) {
2876                         if (line[n - 1] == '\r')
2877                                 n--;
2878                         line[n] = 0;
2879                         pr_debug("CONSOLE: %s\n", line);
2880                 }
2881         }
2882 break2:
2883
2884         return 0;
2885 }
2886 #endif                          /* DEBUG */
2887
2888 static int
2889 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2890 {
2891         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2892         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2893         struct brcmf_sdio *bus = sdiodev->bus;
2894         int ret;
2895
2896         brcmf_dbg(TRACE, "Enter\n");
2897         if (sdiodev->state != BRCMF_SDIOD_DATA)
2898                 return -EIO;
2899
2900         /* Send from dpc */
2901         bus->ctrl_frame_buf = msg;
2902         bus->ctrl_frame_len = msglen;
2903         wmb();
2904         bus->ctrl_frame_stat = true;
2905
2906         brcmf_sdio_trigger_dpc(bus);
2907         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2908                                          CTL_DONE_TIMEOUT);
2909         ret = 0;
2910         if (bus->ctrl_frame_stat) {
2911                 sdio_claim_host(bus->sdiodev->func1);
2912                 if (bus->ctrl_frame_stat) {
2913                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2914                         bus->ctrl_frame_stat = false;
2915                         ret = -ETIMEDOUT;
2916                 }
2917                 sdio_release_host(bus->sdiodev->func1);
2918         }
2919         if (!ret) {
2920                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2921                           bus->ctrl_frame_err);
2922                 rmb();
2923                 ret = bus->ctrl_frame_err;
2924         }
2925
2926         if (ret)
2927                 bus->sdcnt.tx_ctlerrs++;
2928         else
2929                 bus->sdcnt.tx_ctlpkts++;
2930
2931         return ret;
2932 }
2933
2934 #ifdef DEBUG
2935 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2936                                    struct sdpcm_shared *sh)
2937 {
2938         u32 addr, console_ptr, console_size, console_index;
2939         char *conbuf = NULL;
2940         __le32 sh_val;
2941         int rv;
2942
2943         /* obtain console information from device memory */
2944         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2945         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2946                                (u8 *)&sh_val, sizeof(u32));
2947         if (rv < 0)
2948                 return rv;
2949         console_ptr = le32_to_cpu(sh_val);
2950
2951         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2952         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2953                                (u8 *)&sh_val, sizeof(u32));
2954         if (rv < 0)
2955                 return rv;
2956         console_size = le32_to_cpu(sh_val);
2957
2958         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2959         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2960                                (u8 *)&sh_val, sizeof(u32));
2961         if (rv < 0)
2962                 return rv;
2963         console_index = le32_to_cpu(sh_val);
2964
2965         /* allocate buffer for console data */
2966         if (console_size <= CONSOLE_BUFFER_MAX)
2967                 conbuf = vzalloc(console_size+1);
2968
2969         if (!conbuf)
2970                 return -ENOMEM;
2971
2972         /* obtain the console data from device */
2973         conbuf[console_size] = '\0';
2974         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2975                                console_size);
2976         if (rv < 0)
2977                 goto done;
2978
2979         rv = seq_write(seq, conbuf + console_index,
2980                        console_size - console_index);
2981         if (rv < 0)
2982                 goto done;
2983
2984         if (console_index > 0)
2985                 rv = seq_write(seq, conbuf, console_index - 1);
2986
2987 done:
2988         vfree(conbuf);
2989         return rv;
2990 }
2991
2992 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2993                                 struct sdpcm_shared *sh)
2994 {
2995         int error;
2996         struct brcmf_trap_info tr;
2997
2998         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2999                 brcmf_dbg(INFO, "no trap in firmware\n");
3000                 return 0;
3001         }
3002
3003         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3004                                   sizeof(struct brcmf_trap_info));
3005         if (error < 0)
3006                 return error;
3007
3008         if (seq)
3009                 seq_printf(seq,
3010                            "dongle trap info: type 0x%x @ epc 0x%08x\n"
3011                            "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3012                            "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3013                            "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3014                            "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3015                            le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3016                            le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3017                            le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3018                            le32_to_cpu(tr.pc), sh->trap_addr,
3019                            le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3020                            le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3021                            le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3022                            le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3023         else
3024                 pr_debug("dongle trap info: type 0x%x @ epc 0x%08x\n"
3025                          "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3026                          "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3027                          "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3028                          "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3029                          le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3030                          le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3031                          le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3032                          le32_to_cpu(tr.pc), sh->trap_addr,
3033                          le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3034                          le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3035                          le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3036                          le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3037         return 0;
3038 }
3039
3040 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3041                                   struct sdpcm_shared *sh)
3042 {
3043         int error = 0;
3044         char file[80] = "?";
3045         char expr[80] = "<???>";
3046
3047         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3048                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3049                 return 0;
3050         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3051                 brcmf_dbg(INFO, "no assert in dongle\n");
3052                 return 0;
3053         }
3054
3055         sdio_claim_host(bus->sdiodev->func1);
3056         if (sh->assert_file_addr != 0) {
3057                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3058                                           sh->assert_file_addr, (u8 *)file, 80);
3059                 if (error < 0)
3060                         return error;
3061         }
3062         if (sh->assert_exp_addr != 0) {
3063                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3064                                           sh->assert_exp_addr, (u8 *)expr, 80);
3065                 if (error < 0)
3066                         return error;
3067         }
3068         sdio_release_host(bus->sdiodev->func1);
3069
3070         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3071                    file, sh->assert_line, expr);
3072         return 0;
3073 }
3074
3075 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3076 {
3077         int error;
3078         struct sdpcm_shared sh;
3079
3080         error = brcmf_sdio_readshared(bus, &sh);
3081
3082         if (error < 0)
3083                 return error;
3084
3085         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3086                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3087         else if (sh.flags & SDPCM_SHARED_ASSERT)
3088                 brcmf_err("assertion in dongle\n");
3089
3090         if (sh.flags & SDPCM_SHARED_TRAP) {
3091                 brcmf_err("firmware trap in dongle\n");
3092                 brcmf_sdio_trap_info(NULL, bus, &sh);
3093         }
3094
3095         return 0;
3096 }
3097
3098 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3099 {
3100         int error = 0;
3101         struct sdpcm_shared sh;
3102
3103         error = brcmf_sdio_readshared(bus, &sh);
3104         if (error < 0)
3105                 goto done;
3106
3107         error = brcmf_sdio_assert_info(seq, bus, &sh);
3108         if (error < 0)
3109                 goto done;
3110
3111         error = brcmf_sdio_trap_info(seq, bus, &sh);
3112         if (error < 0)
3113                 goto done;
3114
3115         error = brcmf_sdio_dump_console(seq, bus, &sh);
3116
3117 done:
3118         return error;
3119 }
3120
3121 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3122 {
3123         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3124         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3125
3126         return brcmf_sdio_died_dump(seq, bus);
3127 }
3128
3129 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3130 {
3131         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3132         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3133         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3134
3135         seq_printf(seq,
3136                    "intrcount:    %u\nlastintrs:    %u\n"
3137                    "pollcnt:      %u\nregfails:     %u\n"
3138                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3139                    "rxrtx:        %u\nrx_toolong:   %u\n"
3140                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3141                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3142                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3143                    "fc_xon:       %u\nrxglomfail:   %u\n"
3144                    "rxglomframes: %u\nrxglompkts:   %u\n"
3145                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3146                    "f2txdata:     %u\nf1regdata:    %u\n"
3147                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3148                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3149                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3150                    sdcnt->intrcount, sdcnt->lastintrs,
3151                    sdcnt->pollcnt, sdcnt->regfails,
3152                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3153                    sdcnt->rxrtx, sdcnt->rx_toolong,
3154                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3155                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3156                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3157                    sdcnt->fc_xon, sdcnt->rxglomfail,
3158                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3159                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3160                    sdcnt->f2txdata, sdcnt->f1regdata,
3161                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3162                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3163                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3164
3165         return 0;
3166 }
3167
3168 static void brcmf_sdio_debugfs_create(struct device *dev)
3169 {
3170         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3171         struct brcmf_pub *drvr = bus_if->drvr;
3172         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3173         struct brcmf_sdio *bus = sdiodev->bus;
3174         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3175
3176         if (IS_ERR_OR_NULL(dentry))
3177                 return;
3178
3179         bus->console_interval = BRCMF_CONSOLE;
3180
3181         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3182         brcmf_debugfs_add_entry(drvr, "counters",
3183                                 brcmf_debugfs_sdio_count_read);
3184         debugfs_create_u32("console_interval", 0644, dentry,
3185                            &bus->console_interval);
3186 }
3187 #else
3188 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3189 {
3190         return 0;
3191 }
3192
3193 static void brcmf_sdio_debugfs_create(struct device *dev)
3194 {
3195 }
3196 #endif /* DEBUG */
3197
3198 static int
3199 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3200 {
3201         int timeleft;
3202         uint rxlen = 0;
3203         bool pending;
3204         u8 *buf;
3205         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3206         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3207         struct brcmf_sdio *bus = sdiodev->bus;
3208
3209         brcmf_dbg(TRACE, "Enter\n");
3210         if (sdiodev->state != BRCMF_SDIOD_DATA)
3211                 return -EIO;
3212
3213         /* Wait until control frame is available */
3214         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3215
3216         spin_lock_bh(&bus->rxctl_lock);
3217         rxlen = bus->rxlen;
3218         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3219         bus->rxctl = NULL;
3220         buf = bus->rxctl_orig;
3221         bus->rxctl_orig = NULL;
3222         bus->rxlen = 0;
3223         spin_unlock_bh(&bus->rxctl_lock);
3224         vfree(buf);
3225
3226         if (rxlen) {
3227                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3228                           rxlen, msglen);
3229         } else if (timeleft == 0) {
3230                 brcmf_err("resumed on timeout\n");
3231                 brcmf_sdio_checkdied(bus);
3232         } else if (pending) {
3233                 brcmf_dbg(CTL, "cancelled\n");
3234                 return -ERESTARTSYS;
3235         } else {
3236                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3237                 brcmf_sdio_checkdied(bus);
3238         }
3239
3240         if (rxlen)
3241                 bus->sdcnt.rx_ctlpkts++;
3242         else
3243                 bus->sdcnt.rx_ctlerrs++;
3244
3245         return rxlen ? (int)rxlen : -ETIMEDOUT;
3246 }
3247
3248 #ifdef DEBUG
3249 static bool
3250 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3251                         u8 *ram_data, uint ram_sz)
3252 {
3253         char *ram_cmp;
3254         int err;
3255         bool ret = true;
3256         int address;
3257         int offset;
3258         int len;
3259
3260         /* read back and verify */
3261         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3262                   ram_sz);
3263         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3264         /* do not proceed while no memory but  */
3265         if (!ram_cmp)
3266                 return true;
3267
3268         address = ram_addr;
3269         offset = 0;
3270         while (offset < ram_sz) {
3271                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3272                       ram_sz - offset;
3273                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3274                 if (err) {
3275                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3276                                   err, len, address);
3277                         ret = false;
3278                         break;
3279                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3280                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3281                                   offset, len);
3282                         ret = false;
3283                         break;
3284                 }
3285                 offset += len;
3286                 address += len;
3287         }
3288
3289         kfree(ram_cmp);
3290
3291         return ret;
3292 }
3293 #else   /* DEBUG */
3294 static bool
3295 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3296                         u8 *ram_data, uint ram_sz)
3297 {
3298         return true;
3299 }
3300 #endif  /* DEBUG */
3301
3302 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3303                                          const struct firmware *fw)
3304 {
3305         int err;
3306
3307         brcmf_dbg(TRACE, "Enter\n");
3308
3309         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3310                                 (u8 *)fw->data, fw->size);
3311         if (err)
3312                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3313                           err, (int)fw->size, bus->ci->rambase);
3314         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3315                                           (u8 *)fw->data, fw->size))
3316                 err = -EIO;
3317
3318         return err;
3319 }
3320
3321 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3322                                      void *vars, u32 varsz)
3323 {
3324         int address;
3325         int err;
3326
3327         brcmf_dbg(TRACE, "Enter\n");
3328
3329         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3330         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3331         if (err)
3332                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3333                           err, varsz, address);
3334         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3335                 err = -EIO;
3336
3337         return err;
3338 }
3339
3340 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3341                                         const struct firmware *fw,
3342                                         void *nvram, u32 nvlen)
3343 {
3344         int bcmerror;
3345         u32 rstvec;
3346
3347         sdio_claim_host(bus->sdiodev->func1);
3348         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3349
3350         rstvec = get_unaligned_le32(fw->data);
3351         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3352
3353         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3354         release_firmware(fw);
3355         if (bcmerror) {
3356                 brcmf_err("dongle image file download failed\n");
3357                 brcmf_fw_nvram_free(nvram);
3358                 goto err;
3359         }
3360
3361         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3362         brcmf_fw_nvram_free(nvram);
3363         if (bcmerror) {
3364                 brcmf_err("dongle nvram file download failed\n");
3365                 goto err;
3366         }
3367
3368         /* Take arm out of reset */
3369         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3370                 brcmf_err("error getting out of ARM core reset\n");
3371                 goto err;
3372         }
3373
3374 err:
3375         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3376         sdio_release_host(bus->sdiodev->func1);
3377         return bcmerror;
3378 }
3379
3380 static bool brcmf_sdio_aos_no_decode(struct brcmf_sdio *bus)
3381 {
3382         if (bus->ci->chip == CY_CC_43012_CHIP_ID)
3383                 return true;
3384         else
3385                 return false;
3386 }
3387
3388 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3389 {
3390         int err = 0;
3391         u8 val;
3392         u8 wakeupctrl;
3393         u8 cardcap;
3394         u8 chipclkcsr;
3395
3396         brcmf_dbg(TRACE, "Enter\n");
3397
3398         if (brcmf_chip_is_ulp(bus->ci)) {
3399                 wakeupctrl = SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT;
3400                 chipclkcsr = SBSDIO_HT_AVAIL_REQ;
3401         } else {
3402                 wakeupctrl = SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3403                 chipclkcsr = SBSDIO_FORCE_HT;
3404         }
3405
3406         if (brcmf_sdio_aos_no_decode(bus)) {
3407                 cardcap = SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC;
3408         } else {
3409                 cardcap = (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3410                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT);
3411         }
3412
3413         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3414         if (err) {
3415                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3416                 return;
3417         }
3418         val |= 1 << wakeupctrl;
3419         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3420         if (err) {
3421                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3422                 return;
3423         }
3424
3425         /* Add CMD14 Support */
3426         brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3427                              cardcap,
3428                              &err);
3429         if (err) {
3430                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3431                 return;
3432         }
3433
3434         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3435                            chipclkcsr, &err);
3436         if (err) {
3437                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3438                 return;
3439         }
3440
3441         /* set flag */
3442         bus->sr_enabled = true;
3443         brcmf_dbg(INFO, "SR enabled\n");
3444 }
3445
3446 /* enable KSO bit */
3447 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3448 {
3449         struct brcmf_core *core = bus->sdio_core;
3450         u8 val;
3451         int err = 0;
3452
3453         brcmf_dbg(TRACE, "Enter\n");
3454
3455         /* KSO bit added in SDIO core rev 12 */
3456         if (core->rev < 12)
3457                 return 0;
3458
3459         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3460         if (err) {
3461                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3462                 return err;
3463         }
3464
3465         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3466                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3467                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3468                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3469                                    val, &err);
3470                 if (err) {
3471                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3472                         return err;
3473                 }
3474         }
3475
3476         return 0;
3477 }
3478
3479
3480 static int brcmf_sdio_bus_preinit(struct device *dev)
3481 {
3482         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3483         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3484         struct brcmf_sdio *bus = sdiodev->bus;
3485         struct brcmf_core *core = bus->sdio_core;
3486         u32 value;
3487         int err;
3488
3489         /* maxctl provided by common layer */
3490         if (WARN_ON(!bus_if->maxctl))
3491                 return -EINVAL;
3492
3493         /* Allocate control receive buffer */
3494         bus_if->maxctl += bus->roundup;
3495         value = roundup((bus_if->maxctl + SDPCM_HDRLEN), ALIGNMENT);
3496         value += bus->head_align;
3497         bus->rxbuf = kmalloc(value, GFP_ATOMIC);
3498         if (bus->rxbuf)
3499                 bus->rxblen = value;
3500
3501         /* the commands below use the terms tx and rx from
3502          * a device perspective, ie. bus:txglom affects the
3503          * bus transfers from device to host.
3504          */
3505         if (core->rev < 12) {
3506                 /* for sdio core rev < 12, disable txgloming */
3507                 value = 0;
3508                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3509                                            sizeof(u32));
3510         } else {
3511                 /* otherwise, set txglomalign */
3512                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3513                 /* SDIO ADMA requires at least 32 bit alignment */
3514                 value = max_t(u32, value, ALIGNMENT);
3515                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3516                                            sizeof(u32));
3517         }
3518
3519         if (err < 0)
3520                 goto done;
3521
3522         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3523         if (sdiodev->sg_support) {
3524                 bus->txglom = false;
3525                 value = 1;
3526                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3527                                            &value, sizeof(u32));
3528                 if (err < 0) {
3529                         /* bus:rxglom is allowed to fail */
3530                         err = 0;
3531                 } else {
3532                         bus->txglom = true;
3533                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3534                 }
3535         }
3536         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3537
3538 done:
3539         return err;
3540 }
3541
3542 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3543 {
3544         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3545         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3546         struct brcmf_sdio *bus = sdiodev->bus;
3547
3548         return bus->ci->ramsize - bus->ci->srsize;
3549 }
3550
3551 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3552                                       size_t mem_size)
3553 {
3554         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3555         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3556         struct brcmf_sdio *bus = sdiodev->bus;
3557         int err;
3558         int address;
3559         int offset;
3560         int len;
3561
3562         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3563                   mem_size);
3564
3565         address = bus->ci->rambase;
3566         offset = err = 0;
3567         sdio_claim_host(sdiodev->func1);
3568         while (offset < mem_size) {
3569                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3570                       mem_size - offset;
3571                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3572                 if (err) {
3573                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3574                                   err, len, address);
3575                         goto done;
3576                 }
3577                 data += len;
3578                 offset += len;
3579                 address += len;
3580         }
3581
3582 done:
3583         sdio_release_host(sdiodev->func1);
3584         return err;
3585 }
3586
3587 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3588 {
3589         if (!bus->dpc_triggered) {
3590                 bus->dpc_triggered = true;
3591                 queue_work(bus->brcmf_wq, &bus->datawork);
3592         }
3593 }
3594
3595 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3596 {
3597         brcmf_dbg(TRACE, "Enter\n");
3598
3599         if (!bus) {
3600                 brcmf_err("bus is null pointer, exiting\n");
3601                 return;
3602         }
3603
3604         /* Count the interrupt call */
3605         bus->sdcnt.intrcount++;
3606         if (in_interrupt())
3607                 atomic_set(&bus->ipend, 1);
3608         else
3609                 if (brcmf_sdio_intr_rstatus(bus)) {
3610                         brcmf_err("failed backplane access\n");
3611                 }
3612
3613         /* Disable additional interrupts (is this needed now)? */
3614         if (!bus->intr)
3615                 brcmf_err("isr w/o interrupt configured!\n");
3616
3617         bus->dpc_triggered = true;
3618         queue_work(bus->brcmf_wq, &bus->datawork);
3619 }
3620
3621 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3622 {
3623         brcmf_dbg(TIMER, "Enter\n");
3624
3625         /* Poll period: check device if appropriate. */
3626         if (!bus->sr_enabled &&
3627             bus->poll && (++bus->polltick >= bus->pollrate)) {
3628                 u32 intstatus = 0;
3629
3630                 /* Reset poll tick */
3631                 bus->polltick = 0;
3632
3633                 /* Check device if no interrupts */
3634                 if (!bus->intr ||
3635                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3636
3637                         if (!bus->dpc_triggered) {
3638                                 u8 devpend;
3639
3640                                 sdio_claim_host(bus->sdiodev->func1);
3641                                 devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
3642                                                   SDIO_CCCR_INTx, NULL);
3643                                 sdio_release_host(bus->sdiodev->func1);
3644                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3645                                                        INTR_STATUS_FUNC2);
3646                         }
3647
3648                         /* If there is something, make like the ISR and
3649                                  schedule the DPC */
3650                         if (intstatus) {
3651                                 bus->sdcnt.pollcnt++;
3652                                 atomic_set(&bus->ipend, 1);
3653
3654                                 bus->dpc_triggered = true;
3655                                 queue_work(bus->brcmf_wq, &bus->datawork);
3656                         }
3657                 }
3658
3659                 /* Update interrupt tracking */
3660                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3661         }
3662 #ifdef DEBUG
3663         /* Poll for console output periodically */
3664         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3665             bus->console_interval != 0) {
3666                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3667                 if (bus->console.count >= bus->console_interval) {
3668                         bus->console.count -= bus->console_interval;
3669                         sdio_claim_host(bus->sdiodev->func1);
3670                         /* Make sure backplane clock is on */
3671                         brcmf_sdio_bus_sleep(bus, false, false);
3672                         if (brcmf_sdio_readconsole(bus) < 0)
3673                                 /* stop on error */
3674                                 bus->console_interval = 0;
3675                         sdio_release_host(bus->sdiodev->func1);
3676                 }
3677         }
3678 #endif                          /* DEBUG */
3679
3680         /* On idle timeout clear activity flag and/or turn off clock */
3681         if (!bus->dpc_triggered) {
3682                 rmb();
3683                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3684                     (bus->clkstate == CLK_AVAIL)) {
3685                         bus->idlecount++;
3686                         if (bus->idlecount > bus->idletime) {
3687                                 brcmf_dbg(SDIO, "idle\n");
3688                                 sdio_claim_host(bus->sdiodev->func1);
3689                                 brcmf_sdio_wd_timer(bus, false);
3690                                 bus->idlecount = 0;
3691                                 brcmf_sdio_bus_sleep(bus, true, false);
3692                                 sdio_release_host(bus->sdiodev->func1);
3693                         }
3694                 } else {
3695                         bus->idlecount = 0;
3696                 }
3697         } else {
3698                 bus->idlecount = 0;
3699         }
3700 }
3701
3702 static void brcmf_sdio_dataworker(struct work_struct *work)
3703 {
3704         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3705                                               datawork);
3706
3707         bus->dpc_running = true;
3708         wmb();
3709         while (READ_ONCE(bus->dpc_triggered)) {
3710                 bus->dpc_triggered = false;
3711                 brcmf_sdio_dpc(bus);
3712                 bus->idlecount = 0;
3713         }
3714         bus->dpc_running = false;
3715         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3716                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3717                 brcmf_sdiod_try_freeze(bus->sdiodev);
3718                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3719         }
3720 }
3721
3722 static void
3723 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3724                              struct brcmf_chip *ci, u32 drivestrength)
3725 {
3726         const struct sdiod_drive_str *str_tab = NULL;
3727         u32 str_mask;
3728         u32 str_shift;
3729         u32 i;
3730         u32 drivestrength_sel = 0;
3731         u32 cc_data_temp;
3732         u32 addr;
3733
3734         if (!(ci->cc_caps & CC_CAP_PMU))
3735                 return;
3736
3737         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3738         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3739                 str_tab = sdiod_drvstr_tab1_1v8;
3740                 str_mask = 0x00003800;
3741                 str_shift = 11;
3742                 break;
3743         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3744                 str_tab = sdiod_drvstr_tab6_1v8;
3745                 str_mask = 0x00001800;
3746                 str_shift = 11;
3747                 break;
3748         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3749                 /* note: 43143 does not support tristate */
3750                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3751                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3752                         str_tab = sdiod_drvstr_tab2_3v3;
3753                         str_mask = 0x00000007;
3754                         str_shift = 0;
3755                 } else
3756                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3757                                   ci->name, drivestrength);
3758                 break;
3759         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3760                 str_tab = sdiod_drive_strength_tab5_1v8;
3761                 str_mask = 0x00003800;
3762                 str_shift = 11;
3763                 break;
3764         default:
3765                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3766                           ci->name, ci->chiprev, ci->pmurev);
3767                 break;
3768         }
3769
3770         if (str_tab != NULL) {
3771                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3772
3773                 for (i = 0; str_tab[i].strength != 0; i++) {
3774                         if (drivestrength >= str_tab[i].strength) {
3775                                 drivestrength_sel = str_tab[i].sel;
3776                                 break;
3777                         }
3778                 }
3779                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3780                 brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
3781                 cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
3782                 cc_data_temp &= ~str_mask;
3783                 drivestrength_sel <<= str_shift;
3784                 cc_data_temp |= drivestrength_sel;
3785                 brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
3786
3787                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3788                           str_tab[i].strength, drivestrength, cc_data_temp);
3789         }
3790 }
3791
3792 static int brcmf_sdio_buscoreprep(void *ctx)
3793 {
3794         struct brcmf_sdio_dev *sdiodev = ctx;
3795         int err = 0;
3796         u8 clkval, clkset;
3797
3798         /* Try forcing SDIO core to do ALPAvail request only */
3799         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3800         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3801         if (err) {
3802                 brcmf_err("error writing for HT off\n");
3803                 return err;
3804         }
3805
3806         /* If register supported, wait for ALPAvail and then force ALP */
3807         /* This may take up to 15 milliseconds */
3808         clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3809
3810         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3811                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3812                           clkset, clkval);
3813                 return -EACCES;
3814         }
3815
3816         SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3817                                               NULL)),
3818                  !SBSDIO_ALPAV(clkval)),
3819                  PMU_MAX_TRANSITION_DLY);
3820
3821         if (!SBSDIO_ALPAV(clkval)) {
3822                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3823                           clkval);
3824                 return -EBUSY;
3825         }
3826
3827         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3828         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3829         udelay(65);
3830
3831         /* Also, disable the extra SDIO pull-ups */
3832         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3833
3834         return 0;
3835 }
3836
3837 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3838                                         u32 rstvec)
3839 {
3840         struct brcmf_sdio_dev *sdiodev = ctx;
3841         struct brcmf_core *core = sdiodev->bus->sdio_core;
3842         u32 reg_addr;
3843
3844         /* clear all interrupts */
3845         reg_addr = core->base + SD_REG(intstatus);
3846         brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3847
3848         if (rstvec)
3849                 /* Write reset vector to address 0 */
3850                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3851                                   sizeof(rstvec));
3852 }
3853
3854 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3855 {
3856         struct brcmf_sdio_dev *sdiodev = ctx;
3857         u32 val, rev;
3858
3859         val = brcmf_sdiod_readl(sdiodev, addr, NULL);
3860
3861         /*
3862          * this is a bit of special handling if reading the chipcommon chipid
3863          * register. The 4339 is a next-gen of the 4335. It uses the same
3864          * SDIO device id as 4335 and the chipid register returns 4335 as well.
3865          * It can be identified as 4339 by looking at the chip revision. It
3866          * is corrected here so the chip.c module has the right info.
3867          */
3868         if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
3869             (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
3870              sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
3871                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3872                 if (rev >= 2) {
3873                         val &= ~CID_ID_MASK;
3874                         val |= BRCM_CC_4339_CHIP_ID;
3875                 }
3876         }
3877
3878         return val;
3879 }
3880
3881 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3882 {
3883         struct brcmf_sdio_dev *sdiodev = ctx;
3884
3885         brcmf_sdiod_writel(sdiodev, addr, val, NULL);
3886 }
3887
3888 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3889         .prepare = brcmf_sdio_buscoreprep,
3890         .activate = brcmf_sdio_buscore_activate,
3891         .read32 = brcmf_sdio_buscore_read32,
3892         .write32 = brcmf_sdio_buscore_write32,
3893 };
3894
3895 static bool
3896 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3897 {
3898         struct brcmf_sdio_dev *sdiodev;
3899         u8 clkctl = 0;
3900         int err = 0;
3901         int reg_addr;
3902         u32 reg_val;
3903         u32 drivestrength;
3904
3905         sdiodev = bus->sdiodev;
3906         sdio_claim_host(sdiodev->func1);
3907
3908         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3909                  brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
3910
3911         /*
3912          * Force PLL off until brcmf_chip_attach()
3913          * programs PLL control regs
3914          */
3915
3916         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
3917                            &err);
3918         if (!err)
3919                 clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3920                                            &err);
3921
3922         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3923                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3924                           err, BRCMF_INIT_CLKCTL1, clkctl);
3925                 goto fail;
3926         }
3927
3928         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3929         if (IS_ERR(bus->ci)) {
3930                 brcmf_err("brcmf_chip_attach failed!\n");
3931                 bus->ci = NULL;
3932                 goto fail;
3933         }
3934
3935         /* Pick up the SDIO core info struct from chip.c */
3936         bus->sdio_core   = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
3937         if (!bus->sdio_core)
3938                 goto fail;
3939
3940         /* Pick up the CHIPCOMMON core info struct, for bulk IO in bcmsdh.c */
3941         sdiodev->cc_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_CHIPCOMMON);
3942         if (!sdiodev->cc_core)
3943                 goto fail;
3944
3945         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3946                                                    BRCMF_BUSTYPE_SDIO,
3947                                                    bus->ci->chip,
3948                                                    bus->ci->chiprev);
3949         if (!sdiodev->settings) {
3950                 brcmf_err("Failed to get device parameters\n");
3951                 goto fail;
3952         }
3953         /* platform specific configuration:
3954          *   alignments must be at least 4 bytes for ADMA
3955          */
3956         bus->head_align = ALIGNMENT;
3957         bus->sgentry_align = ALIGNMENT;
3958         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3959                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3960         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3961                 bus->sgentry_align =
3962                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3963
3964         /* allocate scatter-gather table. sg support
3965          * will be disabled upon allocation failure.
3966          */
3967         brcmf_sdiod_sgtable_alloc(sdiodev);
3968
3969 #ifdef CONFIG_PM_SLEEP
3970         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3971          * is true or when platform data OOB irq is true).
3972          */
3973         if ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_KEEP_POWER) &&
3974             ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_WAKE_SDIO_IRQ) ||
3975              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3976                 sdiodev->bus_if->wowl_supported = true;
3977 #endif
3978
3979         if (brcmf_sdio_kso_init(bus)) {
3980                 brcmf_err("error enabling KSO\n");
3981                 goto fail;
3982         }
3983
3984         if (sdiodev->settings->bus.sdio.drive_strength)
3985                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3986         else
3987                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3988         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3989
3990         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3991         reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3992         if (err)
3993                 goto fail;
3994
3995         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3996
3997         brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3998         if (err)
3999                 goto fail;
4000
4001         /* set PMUControl so a backplane reset does PMU state reload */
4002         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
4003         reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
4004         if (err)
4005                 goto fail;
4006
4007         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
4008
4009         brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
4010         if (err)
4011                 goto fail;
4012
4013         sdio_release_host(sdiodev->func1);
4014
4015         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
4016
4017         /* allocate header buffer */
4018         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
4019         if (!bus->hdrbuf)
4020                 return false;
4021         /* Locate an appropriately-aligned portion of hdrbuf */
4022         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
4023                                     bus->head_align);
4024
4025         /* Set the poll and/or interrupt flags */
4026         bus->intr = true;
4027         bus->poll = false;
4028         if (bus->poll)
4029                 bus->pollrate = 1;
4030
4031         return true;
4032
4033 fail:
4034         sdio_release_host(sdiodev->func1);
4035         return false;
4036 }
4037
4038 static int
4039 brcmf_sdio_watchdog_thread(void *data)
4040 {
4041         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4042         int wait;
4043
4044         allow_signal(SIGTERM);
4045         /* Run until signal received */
4046         brcmf_sdiod_freezer_count(bus->sdiodev);
4047         while (1) {
4048                 if (kthread_should_stop())
4049                         break;
4050                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
4051                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
4052                 brcmf_sdiod_freezer_count(bus->sdiodev);
4053                 brcmf_sdiod_try_freeze(bus->sdiodev);
4054                 if (!wait) {
4055                         brcmf_sdio_bus_watchdog(bus);
4056                         /* Count the tick for reference */
4057                         bus->sdcnt.tickcnt++;
4058                         reinit_completion(&bus->watchdog_wait);
4059                 } else
4060                         break;
4061         }
4062         return 0;
4063 }
4064
4065 static void
4066 brcmf_sdio_watchdog(struct timer_list *t)
4067 {
4068         struct brcmf_sdio *bus = from_timer(bus, t, timer);
4069
4070         if (bus->watchdog_tsk) {
4071                 complete(&bus->watchdog_wait);
4072                 /* Reschedule the watchdog */
4073                 if (bus->wd_active)
4074                         mod_timer(&bus->timer,
4075                                   jiffies + BRCMF_WD_POLL);
4076         }
4077 }
4078
4079 static
4080 int brcmf_sdio_get_fwname(struct device *dev, const char *ext, u8 *fw_name)
4081 {
4082         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4083         struct brcmf_fw_request *fwreq;
4084         struct brcmf_fw_name fwnames[] = {
4085                 { ext, fw_name },
4086         };
4087
4088         fwreq = brcmf_fw_alloc_request(bus_if->chip, bus_if->chiprev,
4089                                        brcmf_sdio_fwnames,
4090                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4091                                        fwnames, ARRAY_SIZE(fwnames));
4092         if (!fwreq)
4093                 return -ENOMEM;
4094
4095         kfree(fwreq);
4096         return 0;
4097 }
4098
4099 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4100         .stop = brcmf_sdio_bus_stop,
4101         .preinit = brcmf_sdio_bus_preinit,
4102         .txdata = brcmf_sdio_bus_txdata,
4103         .txctl = brcmf_sdio_bus_txctl,
4104         .rxctl = brcmf_sdio_bus_rxctl,
4105         .gettxq = brcmf_sdio_bus_gettxq,
4106         .wowl_config = brcmf_sdio_wowl_config,
4107         .get_ramsize = brcmf_sdio_bus_get_ramsize,
4108         .get_memdump = brcmf_sdio_bus_get_memdump,
4109         .get_fwname = brcmf_sdio_get_fwname,
4110         .debugfs_create = brcmf_sdio_debugfs_create
4111 };
4112
4113 #define BRCMF_SDIO_FW_CODE      0
4114 #define BRCMF_SDIO_FW_NVRAM     1
4115
4116 static void brcmf_sdio_firmware_callback(struct device *dev, int err,
4117                                          struct brcmf_fw_request *fwreq)
4118 {
4119         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4120         struct brcmf_sdio_dev *sdiod = bus_if->bus_priv.sdio;
4121         struct brcmf_sdio *bus = sdiod->bus;
4122         struct brcmf_core *core = bus->sdio_core;
4123         const struct firmware *code;
4124         void *nvram;
4125         u32 nvram_len;
4126         u8 saveclk, bpreq;
4127         u8 devctl;
4128
4129         brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4130
4131         if (err)
4132                 goto fail;
4133
4134         code = fwreq->items[BRCMF_SDIO_FW_CODE].binary;
4135         nvram = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.data;
4136         nvram_len = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.len;
4137         kfree(fwreq);
4138
4139         /* try to download image and nvram to the dongle */
4140         bus->alp_only = true;
4141         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4142         if (err)
4143                 goto fail;
4144         bus->alp_only = false;
4145
4146         /* Start the watchdog timer */
4147         bus->sdcnt.tickcnt = 0;
4148         brcmf_sdio_wd_timer(bus, true);
4149
4150         sdio_claim_host(sdiod->func1);
4151
4152         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4153         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4154         if (bus->clkstate != CLK_AVAIL)
4155                 goto release;
4156
4157         /* Force clocks on backplane to be sure F2 interrupt propagates */
4158         saveclk = brcmf_sdiod_readb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4159         if (!err) {
4160                 bpreq = saveclk;
4161                 bpreq |= brcmf_chip_is_ulp(bus->ci) ?
4162                         SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
4163                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4164                                    bpreq, &err);
4165         }
4166         if (err) {
4167                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4168                 goto release;
4169         }
4170
4171         /* Enable function 2 (frame transfers) */
4172         brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailboxdata),
4173                            SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, NULL);
4174
4175         err = sdio_enable_func(sdiod->func2);
4176
4177         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4178
4179         /* If F2 successfully enabled, set core and enable interrupts */
4180         if (!err) {
4181                 /* Set up the interrupt mask and enable interrupts */
4182                 bus->hostintmask = HOSTINTMASK;
4183                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(hostintmask),
4184                                    bus->hostintmask, NULL);
4185
4186                 switch (sdiod->func1->device) {
4187                 case SDIO_DEVICE_ID_CYPRESS_4373:
4188                         brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4189                                   CY_4373_F2_WATERMARK);
4190                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4191                                            CY_4373_F2_WATERMARK, &err);
4192                         devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4193                                                    &err);
4194                         devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4195                         brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4196                                            &err);
4197                         brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_MESBUSYCTRL,
4198                                            CY_4373_F2_WATERMARK |
4199                                            SBSDIO_MESBUSYCTRL_ENAB, &err);
4200                         break;
4201                 case SDIO_DEVICE_ID_CYPRESS_43012:
4202                         brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4203                                   CY_43012_F2_WATERMARK);
4204                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4205                                            CY_43012_F2_WATERMARK, &err);
4206                         devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4207                                                    &err);
4208                         devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4209                         brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4210                                            &err);
4211                         break;
4212                 default:
4213                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4214                                            DEFAULT_F2_WATERMARK, &err);
4215                         break;
4216                 }
4217         } else {
4218                 /* Disable F2 again */
4219                 sdio_disable_func(sdiod->func2);
4220                 goto checkdied;
4221         }
4222
4223         if (brcmf_chip_sr_capable(bus->ci)) {
4224                 brcmf_sdio_sr_init(bus);
4225         } else {
4226                 /* Restore previous clock setting */
4227                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4228                                    saveclk, &err);
4229         }
4230
4231         if (err == 0) {
4232                 /* Allow full data communication using DPC from now on. */
4233                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4234
4235                 err = brcmf_sdiod_intr_register(sdiod);
4236                 if (err != 0)
4237                         brcmf_err("intr register failed:%d\n", err);
4238         }
4239
4240         /* If we didn't come up, turn off backplane clock */
4241         if (err != 0) {
4242                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4243                 goto checkdied;
4244         }
4245
4246         sdio_release_host(sdiod->func1);
4247
4248         /* Assign bus interface call back */
4249         sdiod->bus_if->dev = sdiod->dev;
4250         sdiod->bus_if->ops = &brcmf_sdio_bus_ops;
4251         sdiod->bus_if->chip = bus->ci->chip;
4252         sdiod->bus_if->chiprev = bus->ci->chiprev;
4253
4254         /* Attach to the common layer, reserve hdr space */
4255         err = brcmf_attach(sdiod->dev, sdiod->settings);
4256         if (err != 0) {
4257                 brcmf_err("brcmf_attach failed\n");
4258                 sdio_claim_host(sdiod->func1);
4259                 goto checkdied;
4260         }
4261
4262         /* ready */
4263         return;
4264
4265 checkdied:
4266         brcmf_sdio_checkdied(bus);
4267 release:
4268         sdio_release_host(sdiod->func1);
4269 fail:
4270         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4271         device_release_driver(&sdiod->func2->dev);
4272         device_release_driver(dev);
4273 }
4274
4275 static struct brcmf_fw_request *
4276 brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus)
4277 {
4278         struct brcmf_fw_request *fwreq;
4279         struct brcmf_fw_name fwnames[] = {
4280                 { ".bin", bus->sdiodev->fw_name },
4281                 { ".txt", bus->sdiodev->nvram_name },
4282         };
4283
4284         fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
4285                                        brcmf_sdio_fwnames,
4286                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4287                                        fwnames, ARRAY_SIZE(fwnames));
4288         if (!fwreq)
4289                 return NULL;
4290
4291         fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY;
4292         fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM;
4293         fwreq->board_type = bus->sdiodev->settings->board_type;
4294
4295         return fwreq;
4296 }
4297
4298 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4299 {
4300         int ret;
4301         struct brcmf_sdio *bus;
4302         struct workqueue_struct *wq;
4303         struct brcmf_fw_request *fwreq;
4304
4305         brcmf_dbg(TRACE, "Enter\n");
4306
4307         /* Allocate private bus interface state */
4308         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4309         if (!bus)
4310                 goto fail;
4311
4312         bus->sdiodev = sdiodev;
4313         sdiodev->bus = bus;
4314         skb_queue_head_init(&bus->glom);
4315         bus->txbound = BRCMF_TXBOUND;
4316         bus->rxbound = BRCMF_RXBOUND;
4317         bus->txminmax = BRCMF_TXMINMAX;
4318         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4319
4320         /* single-threaded workqueue */
4321         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4322                                      dev_name(&sdiodev->func1->dev));
4323         if (!wq) {
4324                 brcmf_err("insufficient memory to create txworkqueue\n");
4325                 goto fail;
4326         }
4327         brcmf_sdiod_freezer_count(sdiodev);
4328         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4329         bus->brcmf_wq = wq;
4330
4331         /* attempt to attach to the dongle */
4332         if (!(brcmf_sdio_probe_attach(bus))) {
4333                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4334                 goto fail;
4335         }
4336
4337         spin_lock_init(&bus->rxctl_lock);
4338         spin_lock_init(&bus->txq_lock);
4339         init_waitqueue_head(&bus->ctrl_wait);
4340         init_waitqueue_head(&bus->dcmd_resp_wait);
4341
4342         /* Set up the watchdog timer */
4343         timer_setup(&bus->timer, brcmf_sdio_watchdog, 0);
4344         /* Initialize watchdog thread */
4345         init_completion(&bus->watchdog_wait);
4346         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4347                                         bus, "brcmf_wdog/%s",
4348                                         dev_name(&sdiodev->func1->dev));
4349         if (IS_ERR(bus->watchdog_tsk)) {
4350                 pr_warn("brcmf_watchdog thread failed to start\n");
4351                 bus->watchdog_tsk = NULL;
4352         }
4353         /* Initialize DPC thread */
4354         bus->dpc_triggered = false;
4355         bus->dpc_running = false;
4356
4357         /* default sdio bus header length for tx packet */
4358         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4359
4360         /* Query the F2 block size, set roundup accordingly */
4361         bus->blocksize = bus->sdiodev->func2->cur_blksize;
4362         bus->roundup = min(max_roundup, bus->blocksize);
4363
4364         sdio_claim_host(bus->sdiodev->func1);
4365
4366         /* Disable F2 to clear any intermediate frame state on the dongle */
4367         sdio_disable_func(bus->sdiodev->func2);
4368
4369         bus->rxflow = false;
4370
4371         /* Done with backplane-dependent accesses, can drop clock... */
4372         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4373
4374         sdio_release_host(bus->sdiodev->func1);
4375
4376         /* ...and initialize clock/power states */
4377         bus->clkstate = CLK_SDONLY;
4378         bus->idletime = BRCMF_IDLE_INTERVAL;
4379         bus->idleclock = BRCMF_IDLE_ACTIVE;
4380
4381         /* SR state */
4382         bus->sr_enabled = false;
4383
4384         brcmf_dbg(INFO, "completed!!\n");
4385
4386         fwreq = brcmf_sdio_prepare_fw_request(bus);
4387         if (!fwreq) {
4388                 ret = -ENOMEM;
4389                 goto fail;
4390         }
4391
4392         ret = brcmf_fw_get_firmwares(sdiodev->dev, fwreq,
4393                                      brcmf_sdio_firmware_callback);
4394         if (ret != 0) {
4395                 brcmf_err("async firmware request failed: %d\n", ret);
4396                 kfree(fwreq);
4397                 goto fail;
4398         }
4399
4400         return bus;
4401
4402 fail:
4403         brcmf_sdio_remove(bus);
4404         return NULL;
4405 }
4406
4407 /* Detach and free everything */
4408 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4409 {
4410         brcmf_dbg(TRACE, "Enter\n");
4411
4412         if (bus) {
4413                 /* Stop watchdog task */
4414                 if (bus->watchdog_tsk) {
4415                         send_sig(SIGTERM, bus->watchdog_tsk, 1);
4416                         kthread_stop(bus->watchdog_tsk);
4417                         bus->watchdog_tsk = NULL;
4418                 }
4419
4420                 /* De-register interrupt handler */
4421                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4422
4423                 brcmf_detach(bus->sdiodev->dev);
4424
4425                 cancel_work_sync(&bus->datawork);
4426                 if (bus->brcmf_wq)
4427                         destroy_workqueue(bus->brcmf_wq);
4428
4429                 if (bus->ci) {
4430                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4431                                 sdio_claim_host(bus->sdiodev->func1);
4432                                 brcmf_sdio_wd_timer(bus, false);
4433                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4434                                 /* Leave the device in state where it is
4435                                  * 'passive'. This is done by resetting all
4436                                  * necessary cores.
4437                                  */
4438                                 msleep(20);
4439                                 brcmf_chip_set_passive(bus->ci);
4440                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4441                                 sdio_release_host(bus->sdiodev->func1);
4442                         }
4443                         brcmf_chip_detach(bus->ci);
4444                 }
4445                 if (bus->sdiodev->settings)
4446                         brcmf_release_module_param(bus->sdiodev->settings);
4447
4448                 kfree(bus->rxbuf);
4449                 kfree(bus->hdrbuf);
4450                 kfree(bus);
4451         }
4452
4453         brcmf_dbg(TRACE, "Disconnected\n");
4454 }
4455
4456 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4457 {
4458         /* Totally stop the timer */
4459         if (!active && bus->wd_active) {
4460                 del_timer_sync(&bus->timer);
4461                 bus->wd_active = false;
4462                 return;
4463         }
4464
4465         /* don't start the wd until fw is loaded */
4466         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4467                 return;
4468
4469         if (active) {
4470                 if (!bus->wd_active) {
4471                         /* Create timer again when watchdog period is
4472                            dynamically changed or in the first instance
4473                          */
4474                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4475                         add_timer(&bus->timer);
4476                         bus->wd_active = true;
4477                 } else {
4478                         /* Re arm the timer, at last watchdog period */
4479                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4480                 }
4481         }
4482 }
4483
4484 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4485 {
4486         int ret;
4487
4488         sdio_claim_host(bus->sdiodev->func1);
4489         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4490         sdio_release_host(bus->sdiodev->func1);
4491
4492         return ret;
4493 }
4494