2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/pci_ids.h>
20 #include <linux/if_ether.h>
21 #include <net/cfg80211.h>
22 #include <net/mac80211.h>
23 #include <brcm_hw_ids.h>
25 #include <chipcommon.h>
28 #include "phy/phy_hal.h"
33 #include "mac80211_if.h"
34 #include "ucode_loader.h"
38 /* watchdog timer, in unit of ms */
39 #define TIMER_INTERVAL_WATCHDOG 1000
40 /* radio monitor timer, in unit of ms */
41 #define TIMER_INTERVAL_RADIOCHK 800
43 /* beacon interval, in unit of 1024TU */
44 #define BEACON_INTERVAL_DEFAULT 100
46 /* n-mode support capability */
47 /* 2x2 includes both 1x1 & 2x2 devices
48 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
49 * control it independently
55 #define EDCF_ACI_MASK 0x60
56 #define EDCF_ACI_SHIFT 5
57 #define EDCF_ECWMIN_MASK 0x0f
58 #define EDCF_ECWMAX_SHIFT 4
59 #define EDCF_AIFSN_MASK 0x0f
60 #define EDCF_AIFSN_MAX 15
61 #define EDCF_ECWMAX_MASK 0xf0
63 #define EDCF_AC_BE_TXOP_STA 0x0000
64 #define EDCF_AC_BK_TXOP_STA 0x0000
65 #define EDCF_AC_VO_ACI_STA 0x62
66 #define EDCF_AC_VO_ECW_STA 0x32
67 #define EDCF_AC_VI_ACI_STA 0x42
68 #define EDCF_AC_VI_ECW_STA 0x43
69 #define EDCF_AC_BK_ECW_STA 0xA4
70 #define EDCF_AC_VI_TXOP_STA 0x005e
71 #define EDCF_AC_VO_TXOP_STA 0x002f
72 #define EDCF_AC_BE_ACI_STA 0x03
73 #define EDCF_AC_BE_ECW_STA 0xA4
74 #define EDCF_AC_BK_ACI_STA 0x27
75 #define EDCF_AC_VO_TXOP_AP 0x002f
77 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
78 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
80 #define APHY_SYMBOL_TIME 4
81 #define APHY_PREAMBLE_TIME 16
82 #define APHY_SIGNAL_TIME 4
83 #define APHY_SIFS_TIME 16
84 #define APHY_SERVICE_NBITS 16
85 #define APHY_TAIL_NBITS 6
86 #define BPHY_SIFS_TIME 10
87 #define BPHY_PLCP_SHORT_TIME 96
89 #define PREN_PREAMBLE 24
90 #define PREN_MM_EXT 12
91 #define PREN_PREAMBLE_EXT 4
93 #define DOT11_MAC_HDR_LEN 24
94 #define DOT11_ACK_LEN 10
95 #define DOT11_BA_LEN 4
96 #define DOT11_OFDM_SIGNAL_EXTENSION 6
97 #define DOT11_MIN_FRAG_LEN 256
98 #define DOT11_RTS_LEN 16
99 #define DOT11_CTS_LEN 10
100 #define DOT11_BA_BITMAP_LEN 128
101 #define DOT11_MIN_BEACON_PERIOD 1
102 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
103 #define DOT11_MAXNUMFRAGS 16
104 #define DOT11_MAX_FRAG_LEN 2346
106 #define BPHY_PLCP_TIME 192
107 #define RIFS_11N_TIME 2
109 /* length of the BCN template area */
110 #define BCN_TMPL_LEN 512
112 /* brcms_bss_info flag bit values */
113 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
115 /* chip rx buffer offset */
116 #define BRCMS_HWRXOFF 38
118 /* rfdisable delay timer 500 ms, runs of ALP clock */
119 #define RFDISABLE_DEFAULT 10000000
121 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
123 /* precedences numbers for wlc queues. These are twice as may levels as
125 * Odd numbers are used for HI priority traffic at same precedence levels
126 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
129 #define _BRCMS_PREC_NONE 0 /* None = - */
130 #define _BRCMS_PREC_BK 2 /* BK - Background */
131 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
132 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
133 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
134 #define _BRCMS_PREC_VI 10 /* Vi - Video */
135 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
136 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
138 /* synthpu_dly times in us */
139 #define SYNTHPU_DLY_APHY_US 3700
140 #define SYNTHPU_DLY_BPHY_US 1050
141 #define SYNTHPU_DLY_NPHY_US 2048
142 #define SYNTHPU_DLY_LPPHY_US 300
144 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */
146 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
147 #define EDCF_SHORT_S 0
149 #define EDCF_LONG_S 8
150 #define EDCF_LFB_S 12
151 #define EDCF_SHORT_M BITFIELD_MASK(4)
152 #define EDCF_SFB_M BITFIELD_MASK(4)
153 #define EDCF_LONG_M BITFIELD_MASK(4)
154 #define EDCF_LFB_M BITFIELD_MASK(4)
156 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
157 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
158 #define RETRY_LONG_DEF 4 /* Default Long retry count */
159 #define RETRY_SHORT_FB 3 /* Short count for fb rate */
160 #define RETRY_LONG_FB 2 /* Long count for fb rate */
162 #define APHY_CWMIN 15
163 #define PHY_CWMAX 1023
165 #define EDCF_AIFSN_MIN 1
167 #define FRAGNUM_MASK 0xF
169 #define APHY_SLOT_TIME 9
170 #define BPHY_SLOT_TIME 20
172 #define WL_SPURAVOID_OFF 0
173 #define WL_SPURAVOID_ON1 1
174 #define WL_SPURAVOID_ON2 2
176 /* invalid core flags, use the saved coreflags */
177 #define BRCMS_USE_COREFLAGS 0xffffffff
179 /* values for PLCPHdr_override */
180 #define BRCMS_PLCP_AUTO -1
181 #define BRCMS_PLCP_SHORT 0
182 #define BRCMS_PLCP_LONG 1
184 /* values for g_protection_override and n_protection_override */
185 #define BRCMS_PROTECTION_AUTO -1
186 #define BRCMS_PROTECTION_OFF 0
187 #define BRCMS_PROTECTION_ON 1
188 #define BRCMS_PROTECTION_MMHDR_ONLY 2
189 #define BRCMS_PROTECTION_CTS_ONLY 3
191 /* values for g_protection_control and n_protection_control */
192 #define BRCMS_PROTECTION_CTL_OFF 0
193 #define BRCMS_PROTECTION_CTL_LOCAL 1
194 #define BRCMS_PROTECTION_CTL_OVERLAP 2
196 /* values for n_protection */
197 #define BRCMS_N_PROTECTION_OFF 0
198 #define BRCMS_N_PROTECTION_OPTIONAL 1
199 #define BRCMS_N_PROTECTION_20IN40 2
200 #define BRCMS_N_PROTECTION_MIXEDMODE 3
202 /* values for band specific 40MHz capabilities */
203 #define BRCMS_N_BW_20ALL 0
204 #define BRCMS_N_BW_40ALL 1
205 #define BRCMS_N_BW_20IN2G_40IN5G 2
207 /* bitflags for SGI support (sgi_rx iovar) */
208 #define BRCMS_N_SGI_20 0x01
209 #define BRCMS_N_SGI_40 0x02
211 /* defines used by the nrate iovar */
212 /* MSC in use,indicates b0-6 holds an mcs */
213 #define NRATE_MCS_INUSE 0x00000080
215 #define NRATE_RATE_MASK 0x0000007f
216 /* stf mode mask: siso, cdd, stbc, sdm */
217 #define NRATE_STF_MASK 0x0000ff00
219 #define NRATE_STF_SHIFT 8
220 /* bit indicate to override mcs only */
221 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
222 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
223 #define NRATE_SGI_SHIFT 23 /* sgi mode */
224 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
225 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
227 #define NRATE_STF_SISO 0 /* stf mode SISO */
228 #define NRATE_STF_CDD 1 /* stf mode CDD */
229 #define NRATE_STF_STBC 2 /* stf mode STBC */
230 #define NRATE_STF_SDM 3 /* stf mode SDM */
232 #define MAX_DMA_SEGS 4
234 /* Max # of entries in Tx FIFO based on 4kb page size */
236 /* Max # of entries in Rx FIFO based on 4kb page size */
239 /* try to keep this # rbufs posted to the chip */
240 #define NRXBUFPOST 32
242 /* data msg txq hiwat mark */
243 #define BRCMS_DATAHIWAT 50
245 /* max # frames to process in brcms_c_recv() */
247 /* max # tx status to process in wlc_txstatus() */
250 /* brcmu_format_flags() bit description structure */
251 struct brcms_c_bit_desc {
257 * The following table lists the buffer memory allocated to xmt fifos in HW.
258 * the size is in units of 256bytes(one block), total size is HW dependent
259 * ucode has default fifo partition, sw can overwrite if necessary
261 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
262 * the twiki is updated before making changes.
265 /* Starting corerev for the fifo size table */
266 #define XMTFIFOTBL_STARTREV 17
274 struct edcf_acparam {
280 const u8 prio2fifo[NUMPRIO] = {
281 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
282 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
283 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
284 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
285 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
286 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
287 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
288 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
292 uint brcm_msg_level =
299 /* TX FIFO number to WME/802.1E Access Category */
300 static const u8 wme_fifo2ac[] = {
309 /* ieee80211 Access Category to TX FIFO number */
310 static const u8 wme_ac2fifo[] = {
317 /* 802.1D Priority to precedence queue mapping */
318 const u8 wlc_prio2prec_map[] = {
319 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
320 _BRCMS_PREC_BK, /* 1 BK - Background */
321 _BRCMS_PREC_NONE, /* 2 None = - */
322 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
323 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
324 _BRCMS_PREC_VI, /* 5 Vi - Video */
325 _BRCMS_PREC_VO, /* 6 Vo - Voice */
326 _BRCMS_PREC_NC, /* 7 NC - Network Control */
329 static const u16 xmtfifo_sz[][NFIFO] = {
330 /* corerev 17: 5120, 49152, 49152, 5376, 4352, 1280 */
331 {20, 192, 192, 21, 17, 5},
336 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
337 {20, 192, 192, 21, 17, 5},
338 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
339 {9, 58, 22, 14, 14, 5},
340 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
341 {20, 192, 192, 21, 17, 5},
342 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
343 {20, 192, 192, 21, 17, 5},
344 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
345 {9, 58, 22, 14, 14, 5},
352 /* corerev 28: 2304, 14848, 5632, 3584, 3584, 1280 */
353 {9, 58, 22, 14, 14, 5},
357 static const char * const fifo_names[] = {
358 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
360 static const char fifo_names[6][0];
364 /* pointer to most recently allocated wl/wlc */
365 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
368 /* Find basic rate for a given rate */
369 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
371 if (is_mcs_rate(rspec))
372 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
374 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
377 static u16 frametype(u32 rspec, u8 mimoframe)
379 if (is_mcs_rate(rspec))
381 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
384 /* currently the best mechanism for determining SIFS is the band in use */
385 static u16 get_sifs(struct brcms_band *band)
387 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
392 * Detect Card removed.
393 * Even checking an sbconfig register read will not false trigger when the core
394 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
395 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
396 * reg with fixed 0/1 pattern (some platforms return all 0).
397 * If clocks are present, call the sb routine which will figure out if the
400 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
405 return ai_deviceremoved(wlc->hw->sih);
406 macctrl = bcma_read32(wlc->hw->d11core,
407 D11REGOFFS(maccontrol));
408 return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
411 /* sum the individual fifo tx pending packet counts */
412 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
414 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
415 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
418 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
420 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
423 static int brcms_chspec_bw(u16 chanspec)
425 if (CHSPEC_IS40(chanspec))
427 if (CHSPEC_IS20(chanspec))
433 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
438 kfree(cfg->current_bss);
442 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
447 brcms_c_bsscfg_mfree(wlc->bsscfg);
449 kfree(wlc->modulecb);
450 kfree(wlc->default_bss);
451 kfree(wlc->protection);
453 kfree(wlc->bandstate[0]);
454 kfree(wlc->corestate->macstat_snapshot);
455 kfree(wlc->corestate);
456 kfree(wlc->hw->bandstate[0]);
464 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
466 struct brcms_bss_cfg *cfg;
468 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
472 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
473 if (cfg->current_bss == NULL)
479 brcms_c_bsscfg_mfree(cfg);
483 static struct brcms_c_info *
484 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
486 struct brcms_c_info *wlc;
488 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
494 /* allocate struct brcms_c_pub state structure */
495 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
496 if (wlc->pub == NULL) {
502 /* allocate struct brcms_hardware state structure */
504 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
505 if (wlc->hw == NULL) {
511 wlc->hw->bandstate[0] =
512 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
513 if (wlc->hw->bandstate[0] == NULL) {
519 for (i = 1; i < MAXBANDS; i++)
520 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
521 ((unsigned long)wlc->hw->bandstate[0] +
522 (sizeof(struct brcms_hw_band) * i));
526 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
527 if (wlc->modulecb == NULL) {
532 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
533 if (wlc->default_bss == NULL) {
538 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
539 if (wlc->bsscfg == NULL) {
544 wlc->protection = kzalloc(sizeof(struct brcms_protection),
546 if (wlc->protection == NULL) {
551 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
552 if (wlc->stf == NULL) {
558 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
559 if (wlc->bandstate[0] == NULL) {
565 for (i = 1; i < MAXBANDS; i++)
566 wlc->bandstate[i] = (struct brcms_band *)
567 ((unsigned long)wlc->bandstate[0]
568 + (sizeof(struct brcms_band)*i));
571 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
572 if (wlc->corestate == NULL) {
577 wlc->corestate->macstat_snapshot =
578 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
579 if (wlc->corestate->macstat_snapshot == NULL) {
587 brcms_c_detach_mfree(wlc);
592 * Update the slot timing for standard 11b/g (20us slots)
593 * or shortslot 11g (9us slots)
594 * The PSM needs to be suspended for this call.
596 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
599 struct bcma_device *core = wlc_hw->d11core;
602 /* 11g short slot: 11a timing */
603 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
604 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
606 /* 11g long slot: 11b timing */
607 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
608 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
613 * calculate frame duration of a given rate and length, return
616 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
617 u8 preamble_type, uint mac_len)
619 uint nsyms, dur = 0, Ndps, kNdps;
620 uint rate = rspec2rate(ratespec);
623 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
628 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
629 wlc->pub->unit, ratespec, preamble_type, mac_len);
631 if (is_mcs_rate(ratespec)) {
632 uint mcs = ratespec & RSPEC_RATE_MASK;
633 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
635 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
636 if (preamble_type == BRCMS_MM_PREAMBLE)
638 /* 1000Ndbps = kbps * 4 */
639 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
640 rspec_issgi(ratespec)) * 4;
642 if (rspec_stc(ratespec) == 0)
644 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
645 APHY_TAIL_NBITS) * 1000, kNdps);
647 /* STBC needs to have even number of symbols */
650 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
651 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
653 dur += APHY_SYMBOL_TIME * nsyms;
654 if (wlc->band->bandtype == BRCM_BAND_2G)
655 dur += DOT11_OFDM_SIGNAL_EXTENSION;
656 } else if (is_ofdm_rate(rate)) {
657 dur = APHY_PREAMBLE_TIME;
658 dur += APHY_SIGNAL_TIME;
659 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
661 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
663 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
665 dur += APHY_SYMBOL_TIME * nsyms;
666 if (wlc->band->bandtype == BRCM_BAND_2G)
667 dur += DOT11_OFDM_SIGNAL_EXTENSION;
670 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
673 mac_len = mac_len * 8 * 2;
674 /* calc ceiling of bits/rate = microseconds of air time */
675 dur = (mac_len + rate - 1) / rate;
676 if (preamble_type & BRCMS_SHORT_PREAMBLE)
677 dur += BPHY_PLCP_SHORT_TIME;
679 dur += BPHY_PLCP_TIME;
684 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
685 const struct d11init *inits)
687 struct bcma_device *core = wlc_hw->d11core;
693 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
695 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
696 size = le16_to_cpu(inits[i].size);
697 offset = le16_to_cpu(inits[i].addr);
698 value = le32_to_cpu(inits[i].value);
700 bcma_write16(core, offset, value);
702 bcma_write32(core, offset, value);
708 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
712 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
716 for (idx = 0; idx < MHFMAX; idx++)
717 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
720 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
722 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
723 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
725 /* init microcode host flags */
726 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
728 /* do band-specific ucode IHR, SHM, and SCR inits */
729 if (D11REV_IS(wlc_hw->corerev, 23)) {
730 if (BRCMS_ISNPHY(wlc_hw->band))
731 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
733 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
734 " %d\n", __func__, wlc_hw->unit,
737 if (D11REV_IS(wlc_hw->corerev, 24)) {
738 if (BRCMS_ISLCNPHY(wlc_hw->band))
739 brcms_c_write_inits(wlc_hw,
740 ucode->d11lcn0bsinitvals24);
742 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
743 " core rev %d\n", __func__,
744 wlc_hw->unit, wlc_hw->corerev);
746 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
747 __func__, wlc_hw->unit, wlc_hw->corerev);
752 static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
754 struct bcma_device *core = wlc_hw->d11core;
755 u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
757 bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
760 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
762 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
764 wlc_hw->phyclk = clk;
766 if (OFF == clk) { /* clear gmode bit, put phy into reset */
768 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
769 (SICF_PRST | SICF_FGC));
771 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
774 } else { /* take phy out of reset */
776 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
778 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
784 /* low-level band switch utility routine */
785 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
787 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
790 wlc_hw->band = wlc_hw->bandstate[bandunit];
794 * until we eliminate need for wlc->band refs in low level code
796 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
798 /* set gmode core flag */
799 if (wlc_hw->sbclk && !wlc_hw->noreset) {
805 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
809 /* switch to new band but leave it inactive */
810 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
812 struct brcms_hardware *wlc_hw = wlc->hw;
816 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
817 macctrl = bcma_read32(wlc_hw->d11core,
818 D11REGOFFS(maccontrol));
819 WARN_ON((macctrl & MCTL_EN_MAC) != 0);
821 /* disable interrupts */
822 macintmask = brcms_intrsoff(wlc->wl);
825 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
827 brcms_b_core_phy_clk(wlc_hw, OFF);
829 brcms_c_setxband(wlc_hw, bandunit);
834 /* process an individual struct tx_status */
836 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
841 struct scb *scb = NULL;
843 int tx_rts, tx_frame_count, tx_rts_count;
844 uint totlen, supr_status;
846 struct ieee80211_hdr *h;
848 struct ieee80211_tx_info *tx_info;
849 struct ieee80211_tx_rate *txrate;
852 /* discard intermediate indications for ucode with one legitimate case:
853 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
854 * but the subsequent tx of DATA failed. so it will start rts/cts
855 * from the beginning (resetting the rts transmission count)
857 if (!(txs->status & TX_STATUS_AMPDU)
858 && (txs->status & TX_STATUS_INTERMEDIATE)) {
859 BCMMSG(wlc->wiphy, "INTERMEDIATE but not AMPDU\n");
863 queue = txs->frameid & TXFID_QUEUE_MASK;
864 if (queue >= NFIFO) {
869 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
873 txh = (struct d11txh *) (p->data);
874 mcl = le16_to_cpu(txh->MacTxControlLow);
877 if (brcm_msg_level & LOG_ERROR_VAL) {
878 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
879 txs->phyerr, txh->MainRates);
880 brcms_c_print_txdesc(txh);
882 brcms_c_print_txstatus(txs);
885 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
887 tx_info = IEEE80211_SKB_CB(p);
888 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
890 if (tx_info->rate_driver_data[0])
893 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
894 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
898 supr_status = txs->status & TX_STATUS_SUPR_MASK;
899 if (supr_status == TX_STATUS_SUPR_BADCH)
901 "%s: Pkt tx suppressed, possibly channel %d\n",
902 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
904 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
906 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
908 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
910 lastframe = !ieee80211_has_morefrags(h->frame_control);
913 wiphy_err(wlc->wiphy, "Not last frame!\n");
916 * Set information to be consumed by Minstrel ht.
918 * The "fallback limit" is the number of tx attempts a given
919 * MPDU is sent at the "primary" rate. Tx attempts beyond that
920 * limit are sent at the "secondary" rate.
921 * A 'short frame' does not exceed RTS treshold.
923 u16 sfbl, /* Short Frame Rate Fallback Limit */
924 lfbl, /* Long Frame Rate Fallback Limit */
927 if (queue < IEEE80211_NUM_ACS) {
928 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
930 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
937 txrate = tx_info->status.rates;
938 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
943 ieee80211_tx_info_clear_status(tx_info);
945 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
947 * rate selection requested a fallback rate
950 txrate[0].count = fbl;
951 txrate[1].count = tx_frame_count - fbl;
954 * rate selection did not request fallback rate, or
957 txrate[0].count = tx_frame_count;
959 * rc80211_minstrel.c:minstrel_tx_status() expects
960 * unused rates to be marked with idx = -1
966 /* clear the rest of the rates */
967 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
972 if (txs->status & TX_STATUS_ACK_RCV)
973 tx_info->flags |= IEEE80211_TX_STAT_ACK;
979 brcms_c_txfifo_complete(wlc, queue);
982 /* remove PLCP & Broadcom tx descriptor header */
983 skb_pull(p, D11_PHY_HDR_LEN);
984 skb_pull(p, D11_TXH_LEN);
985 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
987 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
988 "tx_status\n", __func__);
995 brcmu_pkt_buf_free_skb(p);
1001 /* process tx completion events in BMAC
1002 * Return true if more tx status need to be processed. false otherwise.
1005 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1007 bool morepending = false;
1008 struct brcms_c_info *wlc = wlc_hw->wlc;
1009 struct bcma_device *core;
1010 struct tx_status txstatus, *txs;
1014 * Param 'max_tx_num' indicates max. # tx status to process before
1017 uint max_tx_num = bound ? TXSBND : -1;
1019 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1022 core = wlc_hw->d11core;
1024 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1028 if (s1 == 0xffffffff) {
1029 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1030 wlc_hw->unit, __func__);
1033 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1035 txs->status = s1 & TXS_STATUS_MASK;
1036 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1037 txs->sequence = s2 & TXS_SEQ_MASK;
1038 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1039 txs->lasttxtime = 0;
1041 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1043 /* !give others some time to run! */
1044 if (++n >= max_tx_num)
1046 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1052 if (n >= max_tx_num)
1055 if (!pktq_empty(&wlc->pkt_queue->q))
1056 brcms_c_send_q(wlc);
1061 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1063 if (!wlc->bsscfg->BSS)
1065 * DirFrmQ is now valid...defer setting until end
1068 wlc->qvalid |= MCMD_DIRFRMQVAL;
1071 /* set initial host flags value */
1073 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1075 struct brcms_hardware *wlc_hw = wlc->hw;
1077 memset(mhfs, 0, MHFMAX * sizeof(u16));
1079 mhfs[MHF2] |= mhf2_init;
1081 /* prohibit use of slowclock on multifunction boards */
1082 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1083 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1085 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1086 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1087 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1092 dmareg(uint direction, uint fifonum)
1094 if (direction == DMA_TX)
1095 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1096 return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1099 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1104 * ucode host flag 2 needed for pio mode, independent of band and fifo
1107 struct brcms_hardware *wlc_hw = wlc->hw;
1108 uint unit = wlc_hw->unit;
1109 struct wiphy *wiphy = wlc->wiphy;
1111 /* name and offsets for dma_attach */
1112 snprintf(name, sizeof(name), "wl%d", unit);
1114 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1115 int dma_attach_err = 0;
1119 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1120 * RX: RX_FIFO (RX data packets)
1122 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1123 (wme ? dmareg(DMA_TX, 0) : 0),
1125 (wme ? NTXD : 0), NRXD,
1126 RXBUFSZ, -1, NRXBUFPOST,
1127 BRCMS_HWRXOFF, &brcm_msg_level);
1128 dma_attach_err |= (NULL == wlc_hw->di[0]);
1132 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1133 * (legacy) TX_DATA_FIFO (TX data packets)
1136 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1137 dmareg(DMA_TX, 1), 0,
1138 NTXD, 0, 0, -1, 0, 0,
1140 dma_attach_err |= (NULL == wlc_hw->di[1]);
1144 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1147 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1148 dmareg(DMA_TX, 2), 0,
1149 NTXD, 0, 0, -1, 0, 0,
1151 dma_attach_err |= (NULL == wlc_hw->di[2]);
1154 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1155 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1157 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1160 0, 0, &brcm_msg_level);
1161 dma_attach_err |= (NULL == wlc_hw->di[3]);
1162 /* Cleaner to leave this as if with AP defined */
1164 if (dma_attach_err) {
1165 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1170 /* get pointer to dma engine tx flow control variable */
1171 for (i = 0; i < NFIFO; i++)
1173 wlc_hw->txavail[i] =
1174 (uint *) dma_getvar(wlc_hw->di[i],
1178 /* initial ucode host flags */
1179 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1184 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1188 for (j = 0; j < NFIFO; j++) {
1189 if (wlc_hw->di[j]) {
1190 dma_detach(wlc_hw->di[j]);
1191 wlc_hw->di[j] = NULL;
1197 * Initialize brcms_c_info default values ...
1198 * may get overrides later in this function
1199 * BMAC_NOTES, move low out and resolve the dangling ones
1201 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1203 struct brcms_c_info *wlc = wlc_hw->wlc;
1205 /* set default sw macintmask value */
1206 wlc->defmacintmask = DEF_MACINTMASK;
1208 /* various 802.11g modes */
1209 wlc_hw->shortslot = false;
1211 wlc_hw->SFBL = RETRY_SHORT_FB;
1212 wlc_hw->LFBL = RETRY_LONG_FB;
1214 /* default mac retry limits */
1215 wlc_hw->SRL = RETRY_SHORT_DEF;
1216 wlc_hw->LRL = RETRY_LONG_DEF;
1217 wlc_hw->chanspec = ch20mhz_chspec(1);
1220 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1222 /* delay before first read of ucode state */
1225 /* wait until ucode is no longer asleep */
1226 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1227 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1230 /* control chip clock to save power, enable dynamic clock or force fast clock */
1231 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, enum bcma_clkmode mode)
1233 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1234 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1235 * on backplane, but mac core will still run on ALP(not HT) when
1236 * it enters powersave mode, which means the FCA bit may not be
1237 * set. Should wakeup mac if driver wants it to run on HT.
1241 if (mode == BCMA_CLKMODE_FAST) {
1242 bcma_set32(wlc_hw->d11core,
1243 D11REGOFFS(clk_ctl_st),
1249 ((bcma_read32(wlc_hw->d11core,
1250 D11REGOFFS(clk_ctl_st)) &
1252 PMU_MAX_TRANSITION_DLY);
1253 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1254 D11REGOFFS(clk_ctl_st)) &
1257 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1258 (bcma_read32(wlc_hw->d11core,
1259 D11REGOFFS(clk_ctl_st)) &
1260 (CCS_FORCEHT | CCS_HTAREQ)))
1262 ((bcma_read32(wlc_hw->d11core,
1263 offsetof(struct d11regs,
1266 PMU_MAX_TRANSITION_DLY);
1267 bcma_mask32(wlc_hw->d11core,
1268 D11REGOFFS(clk_ctl_st),
1272 wlc_hw->forcefastclk = (mode == BCMA_CLKMODE_FAST);
1275 /* old chips w/o PMU, force HT through cc,
1276 * then use FCA to verify mac is running fast clock
1279 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1281 /* check fast clock is available (if core is not in reset) */
1282 if (wlc_hw->forcefastclk && wlc_hw->clk)
1283 WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1287 * keep the ucode wake bit on if forcefastclk is on since we
1288 * do not want ucode to put us back to slow clock when it dozes
1289 * for PM mode. Code below matches the wake override bit with
1290 * current forcefastclk state. Only setting bit in wake_override
1291 * instead of waking ucode immediately since old code had this
1292 * behavior. Older code set wlc->forcefastclk but only had the
1293 * wake happen if the wakup_ucode work (protected by an up
1294 * check) was executed just below.
1296 if (wlc_hw->forcefastclk)
1297 mboolset(wlc_hw->wake_override,
1298 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1300 mboolclr(wlc_hw->wake_override,
1301 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1305 /* set or clear ucode host flag bits
1306 * it has an optimization for no-change write
1307 * it only writes through shared memory when the core has clock;
1308 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1311 * bands values are: BRCM_BAND_AUTO <--- Current band only
1312 * BRCM_BAND_5G <--- 5G band only
1313 * BRCM_BAND_2G <--- 2G band only
1314 * BRCM_BAND_ALL <--- All bands
1317 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1321 u16 addr[MHFMAX] = {
1322 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1325 struct brcms_hw_band *band;
1327 if ((val & ~mask) || idx >= MHFMAX)
1328 return; /* error condition */
1331 /* Current band only or all bands,
1332 * then set the band to current band
1334 case BRCM_BAND_AUTO:
1336 band = wlc_hw->band;
1339 band = wlc_hw->bandstate[BAND_5G_INDEX];
1342 band = wlc_hw->bandstate[BAND_2G_INDEX];
1345 band = NULL; /* error condition */
1349 save = band->mhfs[idx];
1350 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1352 /* optimization: only write through if changed, and
1353 * changed band is the current band
1355 if (wlc_hw->clk && (band->mhfs[idx] != save)
1356 && (band == wlc_hw->band))
1357 brcms_b_write_shm(wlc_hw, addr[idx],
1358 (u16) band->mhfs[idx]);
1361 if (bands == BRCM_BAND_ALL) {
1362 wlc_hw->bandstate[0]->mhfs[idx] =
1363 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1364 wlc_hw->bandstate[1]->mhfs[idx] =
1365 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1369 /* set the maccontrol register to desired reset state and
1370 * initialize the sw cache of the register
1372 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1374 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1375 wlc_hw->maccontrol = 0;
1376 wlc_hw->suspended_fifos = 0;
1377 wlc_hw->wake_override = 0;
1378 wlc_hw->mute_override = 0;
1379 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1383 * write the software state of maccontrol and
1384 * overrides to the maccontrol register
1386 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1388 u32 maccontrol = wlc_hw->maccontrol;
1390 /* OR in the wake bit if overridden */
1391 if (wlc_hw->wake_override)
1392 maccontrol |= MCTL_WAKE;
1394 /* set AP and INFRA bits for mute if needed */
1395 if (wlc_hw->mute_override) {
1396 maccontrol &= ~(MCTL_AP);
1397 maccontrol |= MCTL_INFRA;
1400 bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1404 /* set or clear maccontrol bits */
1405 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1411 return; /* error condition */
1412 maccontrol = wlc_hw->maccontrol;
1413 new_maccontrol = (maccontrol & ~mask) | val;
1415 /* if the new maccontrol value is the same as the old, nothing to do */
1416 if (new_maccontrol == maccontrol)
1419 /* something changed, cache the new value */
1420 wlc_hw->maccontrol = new_maccontrol;
1422 /* write the new values with overrides applied */
1423 brcms_c_mctrl_write(wlc_hw);
1426 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1429 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1430 mboolset(wlc_hw->wake_override, override_bit);
1434 mboolset(wlc_hw->wake_override, override_bit);
1436 brcms_c_mctrl_write(wlc_hw);
1437 brcms_b_wait_for_wake(wlc_hw);
1440 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1443 mboolclr(wlc_hw->wake_override, override_bit);
1445 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1448 brcms_c_mctrl_write(wlc_hw);
1451 /* When driver needs ucode to stop beaconing, it has to make sure that
1452 * MCTL_AP is clear and MCTL_INFRA is set
1453 * Mode MCTL_AP MCTL_INFRA
1455 * STA 0 1 <--- This will ensure no beacons
1458 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1460 wlc_hw->mute_override = 1;
1462 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1463 * override, then there is no change to write
1465 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1468 brcms_c_mctrl_write(wlc_hw);
1471 /* Clear the override on AP and INFRA bits */
1472 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1474 if (wlc_hw->mute_override == 0)
1477 wlc_hw->mute_override = 0;
1479 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1480 * override, then there is no change to write
1482 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1485 brcms_c_mctrl_write(wlc_hw);
1489 * Write a MAC address to the given match reg offset in the RXE match engine.
1492 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1495 struct bcma_device *core = wlc_hw->d11core;
1500 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1503 mac_l = addr[0] | (addr[1] << 8);
1504 mac_m = addr[2] | (addr[3] << 8);
1505 mac_h = addr[4] | (addr[5] << 8);
1507 /* enter the MAC addr into the RXE match registers */
1508 bcma_write16(core, D11REGOFFS(rcm_ctl),
1509 RCM_INC_DATA | match_reg_offset);
1510 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1511 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1512 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1516 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1519 struct bcma_device *core = wlc_hw->d11core;
1524 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1526 bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1528 /* if MCTL_BIGEND bit set in mac control register,
1529 * the chip swaps data in fifo, as well as data in
1532 be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1535 memcpy(&word, buf, sizeof(u32));
1538 word_be = cpu_to_be32(word);
1539 word = *(u32 *)&word_be;
1541 word_le = cpu_to_le32(word);
1542 word = *(u32 *)&word_le;
1545 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1547 buf = (u8 *) buf + sizeof(u32);
1552 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1554 wlc_hw->band->CWmin = newmin;
1556 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1557 OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1558 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1559 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1562 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1564 wlc_hw->band->CWmax = newmax;
1566 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1567 OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1568 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1569 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1572 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1576 /* request FAST clock if not on */
1577 fastclk = wlc_hw->forcefastclk;
1579 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
1581 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1583 brcms_b_phy_reset(wlc_hw);
1584 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1586 /* restore the clk */
1588 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
1591 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1594 struct brcms_c_info *wlc = wlc_hw->wlc;
1595 /* update SYNTHPU_DLY */
1597 if (BRCMS_ISLCNPHY(wlc->band))
1598 v = SYNTHPU_DLY_LPPHY_US;
1599 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1600 v = SYNTHPU_DLY_NPHY_US;
1602 v = SYNTHPU_DLY_BPHY_US;
1604 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1607 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1610 u16 phytxant = wlc_hw->bmac_phytxant;
1611 u16 mask = PHY_TXC_ANT_MASK;
1613 /* set the Probe Response frame phy control word */
1614 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1615 phyctl = (phyctl & ~mask) | phytxant;
1616 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1618 /* set the Response (ACK/CTS) frame phy control word */
1619 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1620 phyctl = (phyctl & ~mask) | phytxant;
1621 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1624 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1629 struct plcp_signal_rate_lookup {
1633 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1634 const struct plcp_signal_rate_lookup rate_lookup[] = {
1635 {BRCM_RATE_6M, 0xB},
1636 {BRCM_RATE_9M, 0xF},
1637 {BRCM_RATE_12M, 0xA},
1638 {BRCM_RATE_18M, 0xE},
1639 {BRCM_RATE_24M, 0x9},
1640 {BRCM_RATE_36M, 0xD},
1641 {BRCM_RATE_48M, 0x8},
1642 {BRCM_RATE_54M, 0xC}
1645 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1646 if (rate == rate_lookup[i].rate) {
1647 plcp_rate = rate_lookup[i].signal_rate;
1652 /* Find the SHM pointer to the rate table entry by looking in the
1655 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1658 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1662 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1663 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1669 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1672 /* walk the phy rate table and update the entries */
1673 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1676 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1678 /* read the SHM Rate Table entry OFDM PCTL1 values */
1680 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1682 /* modify the value */
1683 pctl1 &= ~PHY_TXC1_MODE_MASK;
1684 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1686 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1687 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1692 /* band-specific init */
1693 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1695 struct brcms_hardware *wlc_hw = wlc->hw;
1697 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1698 wlc_hw->band->bandunit);
1700 brcms_c_ucode_bsinit(wlc_hw);
1702 wlc_phy_init(wlc_hw->band->pi, chanspec);
1704 brcms_c_ucode_txant_set(wlc_hw);
1707 * cwmin is band-specific, update hardware
1708 * with value for current band
1710 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1711 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1713 brcms_b_update_slot_timing(wlc_hw,
1714 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1715 true : wlc_hw->shortslot);
1717 /* write phytype and phyvers */
1718 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1719 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1722 * initialize the txphyctl1 rate table since
1723 * shmem is shared between bands
1725 brcms_upd_ofdm_pctl1_table(wlc_hw);
1727 brcms_b_upd_synthpu(wlc_hw);
1730 /* Perform a soft reset of the PHY PLL */
1731 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1733 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1735 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1738 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1741 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1744 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1749 /* light way to turn on phy clock without reset for NPHY only
1750 * refer to brcms_b_core_phy_clk for full version
1752 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1754 /* support(necessary for NPHY and HYPHY) only */
1755 if (!BRCMS_ISNPHY(wlc_hw->band))
1759 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1761 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1765 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1768 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1770 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1773 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1775 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1777 bool phy_in_reset = false;
1779 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1784 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1786 /* Specific reset sequence required for NPHY rev 3 and 4 */
1787 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1788 NREV_LE(wlc_hw->band->phyrev, 4)) {
1789 /* Set the PHY bandwidth */
1790 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1794 /* Perform a soft reset of the PHY PLL */
1795 brcms_b_core_phypll_reset(wlc_hw);
1798 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1799 (SICF_PRST | SICF_PCLKE));
1800 phy_in_reset = true;
1802 brcms_b_core_ioctl(wlc_hw,
1803 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1804 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1808 brcms_b_core_phy_clk(wlc_hw, ON);
1811 wlc_phy_anacore(pih, ON);
1814 /* switch to and initialize new band */
1815 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1817 struct brcms_c_info *wlc = wlc_hw->wlc;
1820 /* Enable the d11 core before accessing it */
1821 if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1822 bcma_core_enable(wlc_hw->d11core, 0);
1823 brcms_c_mctrl_reset(wlc_hw);
1826 macintmask = brcms_c_setband_inact(wlc, bandunit);
1831 brcms_b_core_phy_clk(wlc_hw, ON);
1833 /* band-specific initializations */
1834 brcms_b_bsinit(wlc, chanspec);
1837 * If there are any pending software interrupt bits,
1838 * then replace these with a harmless nonzero value
1839 * so brcms_c_dpc() will re-enable interrupts when done.
1841 if (wlc->macintstatus)
1842 wlc->macintstatus = MI_DMAINT;
1844 /* restore macintmask */
1845 brcms_intrsrestore(wlc->wl, macintmask);
1847 /* ucode should still be suspended.. */
1848 WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1852 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1855 /* reject unsupported corerev */
1856 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1857 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1865 /* Validate some board info parameters */
1866 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1868 uint boardrev = wlc_hw->boardrev;
1870 /* 4 bits each for board type, major, minor, and tiny version */
1871 uint brt = (boardrev & 0xf000) >> 12;
1872 uint b0 = (boardrev & 0xf00) >> 8;
1873 uint b1 = (boardrev & 0xf0) >> 4;
1874 uint b2 = boardrev & 0xf;
1876 /* voards from other vendors are always considered valid */
1877 if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1880 /* do some boardrev sanity checks when boardvendor is Broadcom */
1884 if (boardrev <= 0xff)
1887 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1894 static void brcms_c_get_macaddr(struct brcms_hardware *wlc_hw, u8 etheraddr[ETH_ALEN])
1896 struct ssb_sprom *sprom = &wlc_hw->d11core->bus->sprom;
1898 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1899 if (!is_zero_ether_addr(sprom->il0mac)) {
1900 memcpy(etheraddr, sprom->il0mac, 6);
1904 if (wlc_hw->_nbands > 1)
1905 memcpy(etheraddr, sprom->et1mac, 6);
1907 memcpy(etheraddr, sprom->il0mac, 6);
1910 /* power both the pll and external oscillator on/off */
1911 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1913 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1916 * dont power down if plldown is false or
1917 * we must poll hw radio disable
1919 if (!want && wlc_hw->pllreq)
1922 wlc_hw->sbclk = want;
1923 if (!wlc_hw->sbclk) {
1924 wlc_hw->clk = false;
1925 if (wlc_hw->band && wlc_hw->band->pi)
1926 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1931 * Return true if radio is disabled, otherwise false.
1932 * hw radio disable signal is an external pin, users activate it asynchronously
1933 * this function could be called when driver is down and w/o clock
1934 * it operates on different registers depending on corerev and boardflag.
1936 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1941 xtal = wlc_hw->sbclk;
1943 brcms_b_xtal(wlc_hw, ON);
1945 /* may need to take core out of reset first */
1949 * mac no longer enables phyclk automatically when driver
1950 * accesses phyreg throughput mac. This can be skipped since
1951 * only mac reg is accessed below
1953 if (D11REV_GE(wlc_hw->corerev, 18))
1954 flags |= SICF_PCLKE;
1957 * TODO: test suspend/resume
1959 * AI chip doesn't restore bar0win2 on
1960 * hibernation/resume, need sw fixup
1963 bcma_core_enable(wlc_hw->d11core, flags);
1964 brcms_c_mctrl_reset(wlc_hw);
1967 v = ((bcma_read32(wlc_hw->d11core,
1968 D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1970 /* put core back into reset */
1972 bcma_core_disable(wlc_hw->d11core, 0);
1975 brcms_b_xtal(wlc_hw, OFF);
1980 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1982 struct dma_pub *di = wlc_hw->di[fifo];
1983 return dma_rxreset(di);
1987 * ensure fask clock during reset
1989 * reset d11(out of reset)
1990 * reset phy(out of reset)
1991 * clear software macintstatus for fresh new start
1992 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1994 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1999 if (flags == BRCMS_USE_COREFLAGS)
2000 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2002 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2004 /* request FAST clock if not on */
2005 fastclk = wlc_hw->forcefastclk;
2007 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
2009 /* reset the dma engines except first time thru */
2010 if (bcma_core_is_enabled(wlc_hw->d11core)) {
2011 for (i = 0; i < NFIFO; i++)
2012 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2013 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2014 "dma_txreset[%d]: cannot stop dma\n",
2015 wlc_hw->unit, __func__, i);
2017 if ((wlc_hw->di[RX_FIFO])
2018 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2019 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2020 "[%d]: cannot stop dma\n",
2021 wlc_hw->unit, __func__, RX_FIFO);
2023 /* if noreset, just stop the psm and return */
2024 if (wlc_hw->noreset) {
2025 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2026 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2031 * mac no longer enables phyclk automatically when driver accesses
2032 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2033 * band->pi is invalid. need to enable PHY CLK
2035 if (D11REV_GE(wlc_hw->corerev, 18))
2036 flags |= SICF_PCLKE;
2040 * In chips with PMU, the fastclk request goes through d11 core
2041 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2043 * This adds some delay and we can optimize it by also requesting
2044 * fastclk through chipcommon during this period if necessary. But
2045 * that has to work coordinate with other driver like mips/arm since
2046 * they may touch chipcommon as well.
2048 wlc_hw->clk = false;
2049 bcma_core_enable(wlc_hw->d11core, flags);
2051 if (wlc_hw->band && wlc_hw->band->pi)
2052 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2054 brcms_c_mctrl_reset(wlc_hw);
2056 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2057 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
2059 brcms_b_phy_reset(wlc_hw);
2061 /* turn on PHY_PLL */
2062 brcms_b_core_phypll_ctl(wlc_hw, true);
2064 /* clear sw intstatus */
2065 wlc_hw->wlc->macintstatus = 0;
2067 /* restore the clk setting */
2069 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
2072 /* txfifo sizes needs to be modified(increased) since the newer cores
2075 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2077 struct bcma_device *core = wlc_hw->d11core;
2079 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2080 u16 txfifo_def, txfifo_def1;
2083 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2084 txfifo_startblk = TXFIFO_START_BLK;
2086 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2087 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2089 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2090 txfifo_def = (txfifo_startblk & 0xff) |
2091 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2092 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2094 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2096 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2098 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2099 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2100 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2102 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2104 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2107 * need to propagate to shm location to be in sync since ucode/hw won't
2110 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2111 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2112 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2113 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2114 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2115 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2116 xmtfifo_sz[TX_AC_BK_FIFO]));
2117 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2118 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2119 xmtfifo_sz[TX_BCMC_FIFO]));
2122 /* This function is used for changing the tsf frac register
2123 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2124 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2125 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2126 * HTPHY Formula is 2^26/freq(MHz) e.g.
2127 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2128 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2129 * For spuron: 123MHz -> 2^26/123 = 545600.5
2130 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2131 * For spur off: 120MHz -> 2^26/120 = 559240.5
2132 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2135 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2137 struct bcma_device *core = wlc_hw->d11core;
2139 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43224) ||
2140 (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225)) {
2141 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2142 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2143 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2144 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2145 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2146 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2147 } else { /* 120Mhz */
2148 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2149 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2151 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2152 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2153 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2154 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2155 } else { /* 80Mhz */
2156 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2157 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2162 /* Initialize GPIOs that are controlled by D11 core */
2163 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2165 struct brcms_hardware *wlc_hw = wlc->hw;
2168 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2169 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2172 * Common GPIO setup:
2173 * G0 = LED 0 = WLAN Activity
2174 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2175 * G2 = LED 2 = WLAN 5 GHz Radio State
2176 * G4 = radio disable input (HI enabled, LO disabled)
2181 /* Allocate GPIOs for mimo antenna diversity feature */
2182 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2183 /* Enable antenna diversity, use 2x3 mode */
2184 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2185 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2186 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2187 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2189 /* init superswitch control */
2190 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2192 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2193 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2195 * The board itself is powered by these GPIOs
2196 * (when not sending pattern) so set them high
2198 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2199 (BOARD_GPIO_12 | BOARD_GPIO_13));
2200 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2201 (BOARD_GPIO_12 | BOARD_GPIO_13));
2203 /* Enable antenna diversity, use 2x4 mode */
2204 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2205 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2206 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2209 /* Configure the desired clock to be 4Mhz */
2210 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2211 ANTSEL_CLKDIV_4MHZ);
2215 * gpio 9 controls the PA. ucode is responsible
2216 * for wiggling out and oe
2218 if (wlc_hw->boardflags & BFL_PACTRL)
2219 gm |= gc |= BOARD_GPIO_PACTRL;
2221 /* apply to gpiocontrol register */
2222 bcma_chipco_gpio_control(&wlc_hw->d11core->bus->drv_cc, gm, gc);
2225 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2226 const __le32 ucode[], const size_t nbytes)
2228 struct bcma_device *core = wlc_hw->d11core;
2232 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2234 count = (nbytes / sizeof(u32));
2236 bcma_write32(core, D11REGOFFS(objaddr),
2237 OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2238 (void)bcma_read32(core, D11REGOFFS(objaddr));
2239 for (i = 0; i < count; i++)
2240 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2244 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2246 struct brcms_c_info *wlc;
2247 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2251 if (wlc_hw->ucode_loaded)
2254 if (D11REV_IS(wlc_hw->corerev, 23)) {
2255 if (BRCMS_ISNPHY(wlc_hw->band)) {
2256 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2257 ucode->bcm43xx_16_mimosz);
2258 wlc_hw->ucode_loaded = true;
2260 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2262 __func__, wlc_hw->unit, wlc_hw->corerev);
2263 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2264 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2265 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2266 ucode->bcm43xx_24_lcnsz);
2267 wlc_hw->ucode_loaded = true;
2269 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2271 __func__, wlc_hw->unit, wlc_hw->corerev);
2276 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2278 /* update sw state */
2279 wlc_hw->bmac_phytxant = phytxant;
2281 /* push to ucode if up */
2284 brcms_c_ucode_txant_set(wlc_hw);
2288 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2290 return (u16) wlc_hw->wlc->stf->txant;
2293 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2295 wlc_hw->antsel_type = antsel_type;
2297 /* Update the antsel type for phy module to use */
2298 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2301 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2305 uint intstatus, idx;
2306 struct bcma_device *core = wlc_hw->d11core;
2307 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2309 unit = wlc_hw->unit;
2311 for (idx = 0; idx < NFIFO; idx++) {
2312 /* read intstatus register and ignore any non-error bits */
2315 D11REGOFFS(intctrlregs[idx].intstatus)) &
2320 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2321 unit, idx, intstatus);
2323 if (intstatus & I_RO) {
2324 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2325 "overflow\n", unit, idx);
2329 if (intstatus & I_PC) {
2330 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2335 if (intstatus & I_PD) {
2336 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2341 if (intstatus & I_DE) {
2342 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2343 "error\n", unit, idx);
2347 if (intstatus & I_RU)
2348 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2349 "underflow\n", idx, unit);
2351 if (intstatus & I_XU) {
2352 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2353 "underflow\n", idx, unit);
2358 brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2362 D11REGOFFS(intctrlregs[idx].intstatus),
2367 void brcms_c_intrson(struct brcms_c_info *wlc)
2369 struct brcms_hardware *wlc_hw = wlc->hw;
2370 wlc->macintmask = wlc->defmacintmask;
2371 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2374 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2376 struct brcms_hardware *wlc_hw = wlc->hw;
2382 macintmask = wlc->macintmask; /* isr can still happen */
2384 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2385 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2386 udelay(1); /* ensure int line is no longer driven */
2387 wlc->macintmask = 0;
2389 /* return previous macintmask; resolve race between us and our isr */
2390 return wlc->macintstatus ? 0 : macintmask;
2393 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2395 struct brcms_hardware *wlc_hw = wlc->hw;
2399 wlc->macintmask = macintmask;
2400 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2403 /* assumes that the d11 MAC is enabled */
2404 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2407 u8 fifo = 1 << tx_fifo;
2409 /* Two clients of this code, 11h Quiet period and scanning. */
2411 /* only suspend if not already suspended */
2412 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2415 /* force the core awake only if not already */
2416 if (wlc_hw->suspended_fifos == 0)
2417 brcms_c_ucode_wake_override_set(wlc_hw,
2418 BRCMS_WAKE_OVERRIDE_TXFIFO);
2420 wlc_hw->suspended_fifos |= fifo;
2422 if (wlc_hw->di[tx_fifo]) {
2424 * Suspending AMPDU transmissions in the middle can cause
2425 * underflow which may result in mismatch between ucode and
2426 * driver so suspend the mac before suspending the FIFO
2428 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2429 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2431 dma_txsuspend(wlc_hw->di[tx_fifo]);
2433 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2434 brcms_c_enable_mac(wlc_hw->wlc);
2438 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2441 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2442 * but need to be done here for PIO otherwise the watchdog will catch
2443 * the inconsistency and fire
2445 /* Two clients of this code, 11h Quiet period and scanning. */
2446 if (wlc_hw->di[tx_fifo])
2447 dma_txresume(wlc_hw->di[tx_fifo]);
2449 /* allow core to sleep again */
2450 if (wlc_hw->suspended_fifos == 0)
2453 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2454 if (wlc_hw->suspended_fifos == 0)
2455 brcms_c_ucode_wake_override_clear(wlc_hw,
2456 BRCMS_WAKE_OVERRIDE_TXFIFO);
2460 /* precondition: requires the mac core to be enabled */
2461 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2463 static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2466 /* suspend tx fifos */
2467 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2468 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2469 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2470 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2472 /* zero the address match register so we do not send ACKs */
2473 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2476 /* resume tx fifos */
2477 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2478 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2479 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2480 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2482 /* Restore address */
2483 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2487 wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2490 brcms_c_ucode_mute_override_set(wlc_hw);
2492 brcms_c_ucode_mute_override_clear(wlc_hw);
2496 brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2498 brcms_b_mute(wlc->hw, mute_tx);
2502 * Read and clear macintmask and macintstatus and intstatus registers.
2503 * This routine should be called with interrupts off
2505 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2506 * 0 if the interrupt is not for us, or we are in some special cases;
2507 * device interrupt status bits otherwise.
2509 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2511 struct brcms_hardware *wlc_hw = wlc->hw;
2512 struct bcma_device *core = wlc_hw->d11core;
2515 /* macintstatus includes a DMA interrupt summary bit */
2516 macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2518 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2521 /* detect cardbus removed, in power down(suspend) and in reset */
2522 if (brcms_deviceremoved(wlc))
2525 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2526 * handle that case here.
2528 if (macintstatus == 0xffffffff)
2531 /* defer unsolicited interrupts */
2532 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2535 if (macintstatus == 0)
2538 /* interrupts are already turned off for CFE build
2539 * Caution: For CFE Turning off the interrupts again has some undesired
2542 /* turn off the interrupts */
2543 bcma_write32(core, D11REGOFFS(macintmask), 0);
2544 (void)bcma_read32(core, D11REGOFFS(macintmask));
2545 wlc->macintmask = 0;
2547 /* clear device interrupts */
2548 bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2550 /* MI_DMAINT is indication of non-zero intstatus */
2551 if (macintstatus & MI_DMAINT)
2553 * only fifo interrupt enabled is I_RI in
2554 * RX_FIFO. If MI_DMAINT is set, assume it
2555 * is set and clear the interrupt.
2557 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2560 return macintstatus;
2563 /* Update wlc->macintstatus and wlc->intstatus[]. */
2564 /* Return true if they are updated successfully. false otherwise */
2565 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2569 /* read and clear macintstatus and intstatus registers */
2570 macintstatus = wlc_intstatus(wlc, false);
2572 /* device is removed */
2573 if (macintstatus == 0xffffffff)
2576 /* update interrupt status in software */
2577 wlc->macintstatus |= macintstatus;
2583 * First-level interrupt processing.
2584 * Return true if this was our interrupt, false otherwise.
2585 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2588 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2590 struct brcms_hardware *wlc_hw = wlc->hw;
2595 if (!wlc_hw->up || !wlc->macintmask)
2598 /* read and clear macintstatus and intstatus registers */
2599 macintstatus = wlc_intstatus(wlc, true);
2601 if (macintstatus == 0xffffffff)
2602 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2605 /* it is not for us */
2606 if (macintstatus == 0)
2611 /* save interrupt status bits */
2612 wlc->macintstatus = macintstatus;
2618 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2620 struct brcms_hardware *wlc_hw = wlc->hw;
2621 struct bcma_device *core = wlc_hw->d11core;
2623 struct wiphy *wiphy = wlc->wiphy;
2625 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2626 wlc_hw->band->bandunit);
2629 * Track overlapping suspend requests
2631 wlc_hw->mac_suspend_depth++;
2632 if (wlc_hw->mac_suspend_depth > 1)
2635 /* force the core awake */
2636 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2638 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2640 if (mc == 0xffffffff) {
2641 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2643 brcms_down(wlc->wl);
2646 WARN_ON(mc & MCTL_PSM_JMP_0);
2647 WARN_ON(!(mc & MCTL_PSM_RUN));
2648 WARN_ON(!(mc & MCTL_EN_MAC));
2650 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2651 if (mi == 0xffffffff) {
2652 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2654 brcms_down(wlc->wl);
2657 WARN_ON(mi & MI_MACSSPNDD);
2659 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2661 SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2662 BRCMS_MAX_MAC_SUSPEND);
2664 if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2665 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2666 " and MI_MACSSPNDD is still not on.\n",
2667 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2668 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2669 "psm_brc 0x%04x\n", wlc_hw->unit,
2670 bcma_read32(core, D11REGOFFS(psmdebug)),
2671 bcma_read32(core, D11REGOFFS(phydebug)),
2672 bcma_read16(core, D11REGOFFS(psm_brc)));
2675 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2676 if (mc == 0xffffffff) {
2677 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2679 brcms_down(wlc->wl);
2682 WARN_ON(mc & MCTL_PSM_JMP_0);
2683 WARN_ON(!(mc & MCTL_PSM_RUN));
2684 WARN_ON(mc & MCTL_EN_MAC);
2687 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2689 struct brcms_hardware *wlc_hw = wlc->hw;
2690 struct bcma_device *core = wlc_hw->d11core;
2693 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2694 wlc->band->bandunit);
2697 * Track overlapping suspend requests
2699 wlc_hw->mac_suspend_depth--;
2700 if (wlc_hw->mac_suspend_depth > 0)
2703 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2704 WARN_ON(mc & MCTL_PSM_JMP_0);
2705 WARN_ON(mc & MCTL_EN_MAC);
2706 WARN_ON(!(mc & MCTL_PSM_RUN));
2708 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2709 bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2711 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2712 WARN_ON(mc & MCTL_PSM_JMP_0);
2713 WARN_ON(!(mc & MCTL_EN_MAC));
2714 WARN_ON(!(mc & MCTL_PSM_RUN));
2716 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2717 WARN_ON(mi & MI_MACSSPNDD);
2719 brcms_c_ucode_wake_override_clear(wlc_hw,
2720 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2723 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2725 wlc_hw->hw_stf_ss_opmode = stf_mode;
2728 brcms_upd_ofdm_pctl1_table(wlc_hw);
2731 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2733 struct bcma_device *core = wlc_hw->d11core;
2735 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2737 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2739 /* Validate dchip register access */
2741 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2742 (void)bcma_read32(core, D11REGOFFS(objaddr));
2743 w = bcma_read32(core, D11REGOFFS(objdata));
2745 /* Can we write and read back a 32bit register? */
2746 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2747 (void)bcma_read32(core, D11REGOFFS(objaddr));
2748 bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2750 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2751 (void)bcma_read32(core, D11REGOFFS(objaddr));
2752 val = bcma_read32(core, D11REGOFFS(objdata));
2753 if (val != (u32) 0xaa5555aa) {
2754 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2755 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2759 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2760 (void)bcma_read32(core, D11REGOFFS(objaddr));
2761 bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2763 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2764 (void)bcma_read32(core, D11REGOFFS(objaddr));
2765 val = bcma_read32(core, D11REGOFFS(objdata));
2766 if (val != (u32) 0x55aaaa55) {
2767 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2768 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2772 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2773 (void)bcma_read32(core, D11REGOFFS(objaddr));
2774 bcma_write32(core, D11REGOFFS(objdata), w);
2776 /* clear CFPStart */
2777 bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2779 w = bcma_read32(core, D11REGOFFS(maccontrol));
2780 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2781 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2782 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2783 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2784 (MCTL_IHR_EN | MCTL_WAKE),
2785 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2792 #define PHYPLL_WAIT_US 100000
2794 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2796 struct bcma_device *core = wlc_hw->d11core;
2799 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2804 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
2805 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2807 CCS_ERSRC_REQ_D11PLL |
2808 CCS_ERSRC_REQ_PHYPLL);
2809 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2810 CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2813 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2814 if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2815 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2816 " PLL failed\n", __func__);
2818 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2819 tmp | CCS_ERSRC_REQ_D11PLL |
2820 CCS_ERSRC_REQ_PHYPLL);
2821 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2822 (CCS_ERSRC_AVAIL_D11PLL |
2823 CCS_ERSRC_AVAIL_PHYPLL)) !=
2824 (CCS_ERSRC_AVAIL_D11PLL |
2825 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2827 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2829 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2831 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2832 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2833 "PHY PLL failed\n", __func__);
2837 * Since the PLL may be shared, other cores can still
2838 * be requesting it; so we'll deassert the request but
2839 * not wait for status to comply.
2841 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2842 ~CCS_ERSRC_REQ_PHYPLL);
2843 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2847 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2851 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2853 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2858 if (wlc_hw->noreset)
2862 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2864 /* turn off analog core */
2865 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2867 /* turn off PHYPLL to save power */
2868 brcms_b_core_phypll_ctl(wlc_hw, false);
2870 wlc_hw->clk = false;
2871 bcma_core_disable(wlc_hw->d11core, 0);
2872 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2875 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2877 struct brcms_hardware *wlc_hw = wlc->hw;
2880 /* free any posted tx packets */
2881 for (i = 0; i < NFIFO; i++)
2882 if (wlc_hw->di[i]) {
2883 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2884 wlc->core->txpktpend[i] = 0;
2885 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2888 /* free any posted rx packets */
2889 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2893 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2895 struct bcma_device *core = wlc_hw->d11core;
2896 u16 objoff = D11REGOFFS(objdata);
2898 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2899 (void)bcma_read32(core, D11REGOFFS(objaddr));
2903 return bcma_read16(core, objoff);
2907 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2910 struct bcma_device *core = wlc_hw->d11core;
2911 u16 objoff = D11REGOFFS(objdata);
2913 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2914 (void)bcma_read32(core, D11REGOFFS(objaddr));
2918 bcma_write16(core, objoff, v);
2922 * Read a single u16 from shared memory.
2923 * SHM 'offset' needs to be an even address
2925 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2927 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2931 * Write a single u16 to shared memory.
2932 * SHM 'offset' needs to be an even address
2934 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2936 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2940 * Copy a buffer to shared memory of specified type .
2941 * SHM 'offset' needs to be an even address and
2942 * Buffer length 'len' must be an even number of bytes
2943 * 'sel' selects the type of memory
2946 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2947 const void *buf, int len, u32 sel)
2950 const u8 *p = (const u8 *)buf;
2953 if (len <= 0 || (offset & 1) || (len & 1))
2956 for (i = 0; i < len; i += 2) {
2957 v = p[i] | (p[i + 1] << 8);
2958 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2963 * Copy a piece of shared memory of specified type to a buffer .
2964 * SHM 'offset' needs to be an even address and
2965 * Buffer length 'len' must be an even number of bytes
2966 * 'sel' selects the type of memory
2969 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2976 if (len <= 0 || (offset & 1) || (len & 1))
2979 for (i = 0; i < len; i += 2) {
2980 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2982 p[i + 1] = (v >> 8) & 0xFF;
2986 /* Copy a buffer to shared memory.
2987 * SHM 'offset' needs to be an even address and
2988 * Buffer length 'len' must be an even number of bytes
2990 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2991 const void *buf, int len)
2993 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2996 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3002 /* write retry limit to SCR, shouldn't need to suspend */
3004 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3005 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3006 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3007 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3008 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3009 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3010 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3011 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3015 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3018 if (mboolisset(wlc_hw->pllreq, req_bit))
3021 mboolset(wlc_hw->pllreq, req_bit);
3023 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3025 brcms_b_xtal(wlc_hw, ON);
3028 if (!mboolisset(wlc_hw->pllreq, req_bit))
3031 mboolclr(wlc_hw->pllreq, req_bit);
3033 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3035 brcms_b_xtal(wlc_hw, OFF);
3040 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3042 wlc_hw->antsel_avail = antsel_avail;
3046 * conditions under which the PM bit should be set in outgoing frames
3047 * and STAY_AWAKE is meaningful
3049 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3051 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3053 /* disallow PS when one of the following global conditions meets */
3054 if (!wlc->pub->associated)
3057 /* disallow PS when one of these meets when not scanning */
3058 if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3061 if (cfg->associated) {
3063 * disallow PS when one of the following
3064 * bsscfg specific conditions meets
3075 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3078 struct macstat macstats;
3085 /* if driver down, make no sense to update stats */
3090 /* save last rx fifo 0 overflow count */
3091 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3093 /* save last tx fifo underflow count */
3094 for (i = 0; i < NFIFO; i++)
3095 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3098 /* Read mac stats from contiguous shared memory */
3099 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3100 sizeof(struct macstat), OBJADDR_SHM_SEL);
3103 /* check for rx fifo 0 overflow */
3104 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3106 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3107 wlc->pub->unit, delta);
3109 /* check for tx fifo underflows */
3110 for (i = 0; i < NFIFO; i++) {
3112 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3115 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3116 "\n", wlc->pub->unit, delta, i);
3120 /* merge counters from dma module */
3121 for (i = 0; i < NFIFO; i++) {
3123 dma_counterreset(wlc->hw->di[i]);
3127 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3129 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3131 /* reset the core */
3132 if (!brcms_deviceremoved(wlc_hw->wlc))
3133 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3135 /* purge the dma rings */
3136 brcms_c_flushqueues(wlc_hw->wlc);
3139 void brcms_c_reset(struct brcms_c_info *wlc)
3141 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3143 /* slurp up hw mac counters before core reset */
3144 brcms_c_statsupd(wlc);
3146 /* reset our snapshot of macstat counters */
3147 memset((char *)wlc->core->macstat_snapshot, 0,
3148 sizeof(struct macstat));
3150 brcms_b_reset(wlc->hw);
3153 void brcms_c_init_scb(struct scb *scb)
3157 memset(scb, 0, sizeof(struct scb));
3158 scb->flags = SCB_WMECAP | SCB_HTCAP;
3159 for (i = 0; i < NUMPRIO; i++) {
3161 scb->seqctl[i] = 0xFFFF;
3164 scb->seqctl_nonqos = 0xFFFF;
3165 scb->magic = SCB_MAGIC;
3170 * download ucode/PCM
3171 * let ucode run to suspended
3172 * download ucode inits
3173 * config other core registers
3176 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3178 struct brcms_hardware *wlc_hw = wlc->hw;
3179 struct bcma_device *core = wlc_hw->d11core;
3183 bool fifosz_fixup = false;
3186 struct wiphy *wiphy = wlc->wiphy;
3187 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3189 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3192 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3194 brcms_ucode_download(wlc_hw);
3196 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3198 fifosz_fixup = true;
3200 /* let the PSM run to the suspended state, set mode to BSS STA */
3201 bcma_write32(core, D11REGOFFS(macintstatus), -1);
3202 brcms_b_mctrl(wlc_hw, ~0,
3203 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3205 /* wait for ucode to self-suspend after auto-init */
3206 SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3207 MI_MACSSPNDD) == 0), 1000 * 1000);
3208 if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3209 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3210 "suspend!\n", wlc_hw->unit);
3212 brcms_c_gpio_init(wlc);
3214 sflags = bcma_aread32(core, BCMA_IOST);
3216 if (D11REV_IS(wlc_hw->corerev, 23)) {
3217 if (BRCMS_ISNPHY(wlc_hw->band))
3218 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3220 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3221 " %d\n", __func__, wlc_hw->unit,
3223 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3224 if (BRCMS_ISLCNPHY(wlc_hw->band))
3225 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3227 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3228 " %d\n", __func__, wlc_hw->unit,
3231 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3232 __func__, wlc_hw->unit, wlc_hw->corerev);
3235 /* For old ucode, txfifo sizes needs to be modified(increased) */
3237 brcms_b_corerev_fifofixup(wlc_hw);
3239 /* check txfifo allocations match between ucode and driver */
3240 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3241 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3245 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3246 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3250 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3251 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3252 buf[TX_AC_BK_FIFO] &= 0xff;
3253 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3257 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3261 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3262 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3263 buf[TX_BCMC_FIFO] &= 0xff;
3264 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3268 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3273 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3274 " driver size %d index %d\n", buf[i],
3275 wlc_hw->xmtfifo_sz[i], i);
3277 /* make sure we can still talk to the mac */
3278 WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3280 /* band-specific inits done by wlc_bsinit() */
3282 /* Set up frame burst size and antenna swap threshold init values */
3283 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3284 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3286 /* enable one rx interrupt per received frame */
3287 bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3289 /* set the station mode (BSS STA) */
3290 brcms_b_mctrl(wlc_hw,
3291 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3292 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3294 /* set up Beacon interval */
3295 bcnint_us = 0x8000 << 10;
3296 bcma_write32(core, D11REGOFFS(tsf_cfprep),
3297 (bcnint_us << CFPREP_CBI_SHIFT));
3298 bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3299 bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3301 /* write interrupt mask */
3302 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3305 /* allow the MAC to control the PHY clock (dynamic on/off) */
3306 brcms_b_macphyclk_set(wlc_hw, ON);
3308 /* program dynamic clock control fast powerup delay register */
3309 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3310 bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3312 /* tell the ucode the corerev */
3313 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3315 /* tell the ucode MAC capabilities */
3316 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3317 (u16) (wlc_hw->machwcap & 0xffff));
3318 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3320 machwcap >> 16) & 0xffff));
3322 /* write retry limits to SCR, this done after PSM init */
3323 bcma_write32(core, D11REGOFFS(objaddr),
3324 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3325 (void)bcma_read32(core, D11REGOFFS(objaddr));
3326 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3327 bcma_write32(core, D11REGOFFS(objaddr),
3328 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3329 (void)bcma_read32(core, D11REGOFFS(objaddr));
3330 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3332 /* write rate fallback retry limits */
3333 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3334 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3336 bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3337 bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3339 /* init the tx dma engines */
3340 for (i = 0; i < NFIFO; i++) {
3342 dma_txinit(wlc_hw->di[i]);
3345 /* init the rx dma engine(s) and post receive buffers */
3346 dma_rxinit(wlc_hw->di[RX_FIFO]);
3347 dma_rxfill(wlc_hw->di[RX_FIFO]);
3351 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3354 struct brcms_c_info *wlc = wlc_hw->wlc;
3356 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3358 /* request FAST clock if not on */
3359 fastclk = wlc_hw->forcefastclk;
3361 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
3363 /* disable interrupts */
3364 macintmask = brcms_intrsoff(wlc->wl);
3366 /* set up the specified band and chanspec */
3367 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3368 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3370 /* do one-time phy inits and calibration */
3371 wlc_phy_cal_init(wlc_hw->band->pi);
3373 /* core-specific initialization */
3374 brcms_b_coreinit(wlc);
3376 /* band-specific inits */
3377 brcms_b_bsinit(wlc, chanspec);
3379 /* restore macintmask */
3380 brcms_intrsrestore(wlc->wl, macintmask);
3382 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3383 * is suspended and brcms_c_enable_mac() will clear this override bit.
3385 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3388 * initialize mac_suspend_depth to 1 to match ucode
3389 * initial suspended state
3391 wlc_hw->mac_suspend_depth = 1;
3393 /* restore the clk */
3395 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
3398 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3401 /* Save our copy of the chanspec */
3402 wlc->chanspec = chanspec;
3404 /* Set the chanspec and power limits for this locale */
3405 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3407 if (wlc->stf->ss_algosel_auto)
3408 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3411 brcms_c_stf_ss_update(wlc, wlc->band);
3415 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3417 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3418 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3419 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3420 brcms_chspec_bw(wlc->default_bss->chanspec),
3421 wlc->stf->txstreams);
3424 /* derive wlc->band->basic_rate[] table from 'rateset' */
3425 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3426 struct brcms_c_rateset *rateset)
3432 u8 *br = wlc->band->basic_rate;
3435 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3436 memset(br, 0, BRCM_MAXRATE + 1);
3438 /* For each basic rate in the rates list, make an entry in the
3439 * best basic lookup.
3441 for (i = 0; i < rateset->count; i++) {
3442 /* only make an entry for a basic rate */
3443 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3446 /* mask off basic bit */
3447 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3449 if (rate > BRCM_MAXRATE) {
3450 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3451 "invalid rate 0x%X in rate set\n",
3459 /* The rate lookup table now has non-zero entries for each
3460 * basic rate, equal to the basic rate: br[basicN] = basicN
3462 * To look up the best basic rate corresponding to any
3463 * particular rate, code can use the basic_rate table
3466 * basic_rate = wlc->band->basic_rate[tx_rate]
3468 * Make sure there is a best basic rate entry for
3469 * every rate by walking up the table from low rates
3470 * to high, filling in holes in the lookup table
3473 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3474 rate = wlc->band->hw_rateset.rates[i];
3476 if (br[rate] != 0) {
3477 /* This rate is a basic rate.
3478 * Keep track of the best basic rate so far by
3481 if (is_ofdm_rate(rate))
3489 /* This rate is not a basic rate so figure out the
3490 * best basic rate less than this rate and fill in
3491 * the hole in the table
3494 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3499 if (is_ofdm_rate(rate)) {
3501 * In 11g and 11a, the OFDM mandatory rates
3502 * are 6, 12, and 24 Mbps
3504 if (rate >= BRCM_RATE_24M)
3505 mandatory = BRCM_RATE_24M;
3506 else if (rate >= BRCM_RATE_12M)
3507 mandatory = BRCM_RATE_12M;
3509 mandatory = BRCM_RATE_6M;
3511 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3515 br[rate] = mandatory;
3519 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3522 struct brcms_c_rateset default_rateset;
3524 uint i, band_order[2];
3526 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3528 * We might have been bandlocked during down and the chip
3529 * power-cycled (hibernate). Figure out the right band to park on
3531 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3532 /* updated in brcms_c_bandlock() */
3533 parkband = wlc->band->bandunit;
3534 band_order[0] = band_order[1] = parkband;
3536 /* park on the band of the specified chanspec */
3537 parkband = chspec_bandunit(chanspec);
3539 /* order so that parkband initialize last */
3540 band_order[0] = parkband ^ 1;
3541 band_order[1] = parkband;
3544 /* make each band operational, software state init */
3545 for (i = 0; i < wlc->pub->_nbands; i++) {
3546 uint j = band_order[i];
3548 wlc->band = wlc->bandstate[j];
3550 brcms_default_rateset(wlc, &default_rateset);
3552 /* fill in hw_rate */
3553 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3554 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3555 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3557 /* init basic rate lookup */
3558 brcms_c_rate_lookup_init(wlc, &default_rateset);
3561 /* sync up phy/radio chanspec */
3562 brcms_c_set_phy_chanspec(wlc, chanspec);
3566 * Set or clear filtering related maccontrol bits based on
3567 * specified filter flags
3569 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3571 u32 promisc_bits = 0;
3573 wlc->filter_flags = filter_flags;
3575 if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3576 promisc_bits |= MCTL_PROMISC;
3578 if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3579 promisc_bits |= MCTL_BCNS_PROMISC;
3581 if (filter_flags & FIF_FCSFAIL)
3582 promisc_bits |= MCTL_KEEPBADFCS;
3584 if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3585 promisc_bits |= MCTL_KEEPCONTROL;
3587 brcms_b_mctrl(wlc->hw,
3588 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3589 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3594 * ucode, hwmac update
3595 * Channel dependent updates for ucode and hw
3597 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3599 /* enable or disable any active IBSSs depending on whether or not
3600 * we are on the home channel
3602 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3603 if (wlc->pub->associated) {
3605 * BMAC_NOTE: This is something that should be fixed
3606 * in ucode inits. I think that the ucode inits set
3607 * up the bcn templates and shm values with a bogus
3608 * beacon. This should not be done in the inits. If
3609 * ucode needs to set up a beacon for testing, the
3610 * test routines should write it down, not expect the
3611 * inits to populate a bogus beacon.
3613 if (BRCMS_PHY_11N_CAP(wlc->band))
3614 brcms_b_write_shm(wlc->hw,
3615 M_BCN_TXTSF_OFFSET, 0);
3618 /* disable an active IBSS if we are not on the home channel */
3622 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3626 u8 basic_phy_rate, basic_index;
3627 u16 dir_table, basic_table;
3630 /* Shared memory address for the table we are reading */
3631 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3633 /* Shared memory address for the table we are writing */
3634 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3637 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3638 * the index into the rate table.
3640 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3641 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3642 index = phy_rate & 0xf;
3643 basic_index = basic_phy_rate & 0xf;
3645 /* Find the SHM pointer to the ACK rate entry by looking in the
3648 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3650 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3651 * to the correct basic rate for the given incoming rate
3653 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3656 static const struct brcms_c_rateset *
3657 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3659 const struct brcms_c_rateset *rs_dflt;
3661 if (BRCMS_PHY_11N_CAP(wlc->band)) {
3662 if (wlc->band->bandtype == BRCM_BAND_5G)
3663 rs_dflt = &ofdm_mimo_rates;
3665 rs_dflt = &cck_ofdm_mimo_rates;
3666 } else if (wlc->band->gmode)
3667 rs_dflt = &cck_ofdm_rates;
3669 rs_dflt = &cck_rates;
3674 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3676 const struct brcms_c_rateset *rs_dflt;
3677 struct brcms_c_rateset rs;
3678 u8 rate, basic_rate;
3681 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3683 brcms_c_rateset_copy(rs_dflt, &rs);
3684 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3686 /* walk the phy rate table and update SHM basic rate lookup table */
3687 for (i = 0; i < rs.count; i++) {
3688 rate = rs.rates[i] & BRCMS_RATE_MASK;
3690 /* for a given rate brcms_basic_rate returns the rate at
3691 * which a response ACK/CTS should be sent.
3693 basic_rate = brcms_basic_rate(wlc, rate);
3694 if (basic_rate == 0)
3695 /* This should only happen if we are using a
3696 * restricted rateset.
3698 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3700 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3704 /* band-specific init */
3705 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3707 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3708 wlc->pub->unit, wlc->band->bandunit);
3710 /* write ucode ACK/CTS rate table */
3711 brcms_c_set_ratetable(wlc);
3713 /* update some band specific mac configuration */
3714 brcms_c_ucode_mac_upd(wlc);
3716 /* init antenna selection */
3717 brcms_c_antsel_init(wlc->asi);
3721 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3723 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3726 int idle_busy_ratio_x_16 = 0;
3728 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3729 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3730 if (duty_cycle > 100 || duty_cycle < 0) {
3731 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3736 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3737 /* Only write to shared memory when wl is up */
3739 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3742 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3744 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3750 * Initialize the base precedence map for dequeueing
3751 * from txq based on WME settings
3753 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3755 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3756 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3758 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3759 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3760 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3761 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3764 /* push sw hps and wake state through hardware */
3765 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3771 hps = brcms_c_ps_allowed(wlc);
3773 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3775 v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3780 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3782 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3785 brcms_b_wait_for_wake(wlc->hw);
3789 * Write this BSS config's MAC address to core.
3790 * Updates RXE match engine.
3792 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3795 struct brcms_c_info *wlc = bsscfg->wlc;
3797 /* enter the MAC addr into the RXE match registers */
3798 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3800 brcms_c_ampdu_macaddr_upd(wlc);
3805 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3806 * Updates RXE match engine.
3808 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3810 /* we need to update BSSID in RXE match registers */
3811 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3814 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3816 wlc_hw->shortslot = shortslot;
3818 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3819 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3820 brcms_b_update_slot_timing(wlc_hw, shortslot);
3821 brcms_c_enable_mac(wlc_hw->wlc);
3826 * Suspend the the MAC and update the slot timing
3827 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3829 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3831 /* use the override if it is set */
3832 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3833 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3835 if (wlc->shortslot == shortslot)
3838 wlc->shortslot = shortslot;
3840 brcms_b_set_shortslot(wlc->hw, shortslot);
3843 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3845 if (wlc->home_chanspec != chanspec) {
3846 wlc->home_chanspec = chanspec;
3848 if (wlc->bsscfg->associated)
3849 wlc->bsscfg->current_bss->chanspec = chanspec;
3854 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3855 bool mute_tx, struct txpwr_limits *txpwr)
3859 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3861 wlc_hw->chanspec = chanspec;
3863 /* Switch bands if necessary */
3864 if (wlc_hw->_nbands > 1) {
3865 bandunit = chspec_bandunit(chanspec);
3866 if (wlc_hw->band->bandunit != bandunit) {
3867 /* brcms_b_setband disables other bandunit,
3868 * use light band switch if not up yet
3871 wlc_phy_chanspec_radio_set(wlc_hw->
3872 bandstate[bandunit]->
3874 brcms_b_setband(wlc_hw, bandunit, chanspec);
3876 brcms_c_setxband(wlc_hw, bandunit);
3881 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3885 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3887 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3889 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3890 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3892 /* Update muting of the channel */
3893 brcms_b_mute(wlc_hw, mute_tx);
3897 /* switch to and initialize new band */
3898 static void brcms_c_setband(struct brcms_c_info *wlc,
3901 wlc->band = wlc->bandstate[bandunit];
3906 /* wait for at least one beacon before entering sleeping state */
3907 brcms_c_set_ps_ctrl(wlc);
3909 /* band-specific initializations */
3910 brcms_c_bsinit(wlc);
3913 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3916 bool switchband = false;
3917 u16 old_chanspec = wlc->chanspec;
3919 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3920 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3921 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3925 /* Switch bands if necessary */
3926 if (wlc->pub->_nbands > 1) {
3927 bandunit = chspec_bandunit(chanspec);
3928 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3930 if (wlc->bandlocked) {
3931 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3932 "band is locked!\n",
3933 wlc->pub->unit, __func__,
3934 CHSPEC_CHANNEL(chanspec));
3938 * should the setband call come after the
3939 * brcms_b_chanspec() ? if the setband updates
3940 * (brcms_c_bsinit) use low level calls to inspect and
3941 * set state, the state inspected may be from the wrong
3942 * band, or the following brcms_b_set_chanspec() may
3945 brcms_c_setband(wlc, bandunit);
3949 /* sync up phy/radio chanspec */
3950 brcms_c_set_phy_chanspec(wlc, chanspec);
3952 /* init antenna selection */
3953 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3954 brcms_c_antsel_init(wlc->asi);
3956 /* Fix the hardware rateset based on bw.
3957 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3959 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3960 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3963 /* update some mac configuration since chanspec changed */
3964 brcms_c_ucode_mac_upd(wlc);
3968 * This function changes the phytxctl for beacon based on current
3969 * beacon ratespec AND txant setting as per this table:
3970 * ratespec CCK ant = wlc->stf->txant
3973 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
3977 u16 phytxant = wlc->stf->phytxant;
3978 u16 mask = PHY_TXC_ANT_MASK;
3980 /* for non-siso rates or default setting, use the available chains */
3981 if (BRCMS_PHY_11N_CAP(wlc->band))
3982 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
3984 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
3985 phyctl = (phyctl & ~mask) | phytxant;
3986 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
3990 * centralized protection config change function to simplify debugging, no
3991 * consistency checking this should be called only on changes to avoid overhead
3992 * in periodic function
3994 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
3996 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
3999 case BRCMS_PROT_G_SPEC:
4000 wlc->protection->_g = (bool) val;
4002 case BRCMS_PROT_G_OVR:
4003 wlc->protection->g_override = (s8) val;
4005 case BRCMS_PROT_G_USER:
4006 wlc->protection->gmode_user = (u8) val;
4008 case BRCMS_PROT_OVERLAP:
4009 wlc->protection->overlap = (s8) val;
4011 case BRCMS_PROT_N_USER:
4012 wlc->protection->nmode_user = (s8) val;
4014 case BRCMS_PROT_N_CFG:
4015 wlc->protection->n_cfg = (s8) val;
4017 case BRCMS_PROT_N_CFG_OVR:
4018 wlc->protection->n_cfg_override = (s8) val;
4020 case BRCMS_PROT_N_NONGF:
4021 wlc->protection->nongf = (bool) val;
4023 case BRCMS_PROT_N_NONGF_OVR:
4024 wlc->protection->nongf_override = (s8) val;
4026 case BRCMS_PROT_N_PAM_OVR:
4027 wlc->protection->n_pam_override = (s8) val;
4029 case BRCMS_PROT_N_OBSS:
4030 wlc->protection->n_obss = (bool) val;
4039 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4042 brcms_c_update_beacon(wlc);
4043 brcms_c_update_probe_resp(wlc, true);
4047 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4049 wlc->stf->ldpc = val;
4052 brcms_c_update_beacon(wlc);
4053 brcms_c_update_probe_resp(wlc, true);
4054 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4058 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4059 const struct ieee80211_tx_queue_params *params,
4063 struct shm_acparams acp_shm;
4066 /* Only apply params if the core is out of reset and has clocks */
4068 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4073 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4074 /* fill in shm ac params struct */
4075 acp_shm.txop = params->txop;
4076 /* convert from units of 32us to us for ucode */
4077 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4078 EDCF_TXOP2USEC(acp_shm.txop);
4079 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4081 if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4082 && acp_shm.aifs < EDCF_AIFSN_MAX)
4085 if (acp_shm.aifs < EDCF_AIFSN_MIN
4086 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4087 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4088 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4090 acp_shm.cwmin = params->cw_min;
4091 acp_shm.cwmax = params->cw_max;
4092 acp_shm.cwcur = acp_shm.cwmin;
4094 bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4096 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4097 /* Indicate the new params to the ucode */
4098 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4101 M_EDCF_STATUS_OFF));
4102 acp_shm.status |= WME_STATUS_NEWAC;
4104 /* Fill in shm acparam table */
4105 shm_entry = (u16 *) &acp_shm;
4106 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4107 brcms_b_write_shm(wlc->hw,
4109 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4114 brcms_c_suspend_mac_and_wait(wlc);
4115 brcms_c_enable_mac(wlc);
4119 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4123 struct ieee80211_tx_queue_params txq_pars;
4124 static const struct edcf_acparam default_edcf_acparams[] = {
4125 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4126 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4127 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4128 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4129 }; /* ucode needs these parameters during its initialization */
4130 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4132 for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4133 /* find out which ac this set of params applies to */
4134 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4136 /* fill in shm ac params struct */
4137 txq_pars.txop = edcf_acp->TXOP;
4138 txq_pars.aifs = edcf_acp->ACI;
4140 /* CWmin = 2^(ECWmin) - 1 */
4141 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4142 /* CWmax = 2^(ECWmax) - 1 */
4143 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4144 >> EDCF_ECWMAX_SHIFT);
4145 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4149 brcms_c_suspend_mac_and_wait(wlc);
4150 brcms_c_enable_mac(wlc);
4154 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4156 /* Don't start the timer if HWRADIO feature is disabled */
4157 if (wlc->radio_monitor)
4160 wlc->radio_monitor = true;
4161 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4162 brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4165 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4167 if (!wlc->radio_monitor)
4170 wlc->radio_monitor = false;
4171 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4172 return brcms_del_timer(wlc->radio_timer);
4175 /* read hwdisable state and propagate to wlc flag */
4176 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4178 if (wlc->pub->hw_off)
4181 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4182 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4184 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4187 /* update hwradio status and return it */
4188 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4190 brcms_c_radio_hwdisable_upd(wlc);
4192 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4196 /* periodical query hw radio button while driver is "down" */
4197 static void brcms_c_radio_timer(void *arg)
4199 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4201 if (brcms_deviceremoved(wlc)) {
4202 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4204 brcms_down(wlc->wl);
4208 brcms_c_radio_hwdisable_upd(wlc);
4211 /* common low-level watchdog code */
4212 static void brcms_b_watchdog(struct brcms_c_info *wlc)
4214 struct brcms_hardware *wlc_hw = wlc->hw;
4216 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4221 /* increment second count */
4224 /* Check for FIFO error interrupts */
4225 brcms_b_fifoerrors(wlc_hw);
4227 /* make sure RX dma has buffers */
4228 dma_rxfill(wlc->hw->di[RX_FIFO]);
4230 wlc_phy_watchdog(wlc_hw->band->pi);
4233 /* common watchdog code */
4234 static void brcms_c_watchdog(struct brcms_c_info *wlc)
4236 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4241 if (brcms_deviceremoved(wlc)) {
4242 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4244 brcms_down(wlc->wl);
4248 /* increment second count */
4251 brcms_c_radio_hwdisable_upd(wlc);
4252 /* if radio is disable, driver may be down, quit here */
4253 if (wlc->pub->radio_disabled)
4256 brcms_b_watchdog(wlc);
4259 * occasionally sample mac stat counters to
4260 * detect 16-bit counter wrap
4262 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4263 brcms_c_statsupd(wlc);
4265 if (BRCMS_ISNPHY(wlc->band) &&
4266 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4267 BRCMS_TEMPSENSE_PERIOD)) {
4268 wlc->tempsense_lasttime = wlc->pub->now;
4269 brcms_c_tempsense_upd(wlc);
4273 static void brcms_c_watchdog_by_timer(void *arg)
4275 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4277 brcms_c_watchdog(wlc);
4280 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4282 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4284 if (!wlc->wdtimer) {
4285 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4290 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4292 if (!wlc->radio_timer) {
4293 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4305 * Initialize brcms_c_info default values ...
4306 * may get overrides later in this function
4308 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4312 /* Save our copy of the chanspec */
4313 wlc->chanspec = ch20mhz_chspec(1);
4315 /* various 802.11g modes */
4316 wlc->shortslot = false;
4317 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4319 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4320 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4322 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4323 BRCMS_PROTECTION_AUTO);
4324 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4325 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4326 BRCMS_PROTECTION_AUTO);
4327 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4328 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4330 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4331 BRCMS_PROTECTION_CTL_OVERLAP);
4333 /* 802.11g draft 4.0 NonERP elt advertisement */
4334 wlc->include_legacy_erp = true;
4336 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4337 wlc->stf->txant = ANT_TX_DEF;
4339 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4341 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4342 for (i = 0; i < NFIFO; i++)
4343 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4344 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4346 /* default rate fallback retry limits */
4347 wlc->SFBL = RETRY_SHORT_FB;
4348 wlc->LFBL = RETRY_LONG_FB;
4350 /* default mac retry limits */
4351 wlc->SRL = RETRY_SHORT_DEF;
4352 wlc->LRL = RETRY_LONG_DEF;
4354 /* WME QoS mode is Auto by default */
4355 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4356 wlc->pub->bcmerror = 0;
4359 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4363 unit = wlc->pub->unit;
4365 wlc->asi = brcms_c_antsel_attach(wlc);
4366 if (wlc->asi == NULL) {
4367 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4373 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4374 if (wlc->ampdu == NULL) {
4375 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4381 if ((brcms_c_stf_attach(wlc) != 0)) {
4382 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4391 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4397 * run backplane attach, init nvram
4399 * initialize software state for each core and band
4400 * put the whole chip in reset(driver down state), no clock
4402 static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4403 uint unit, bool piomode)
4405 struct brcms_hardware *wlc_hw;
4409 struct shared_phy_params sha_params;
4410 struct wiphy *wiphy = wlc->wiphy;
4411 struct pci_dev *pcidev = core->bus->host_pci;
4412 struct ssb_sprom *sprom = &core->bus->sprom;
4414 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI)
4415 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4419 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4420 core->bus->boardinfo.vendor,
4421 core->bus->boardinfo.type);
4427 wlc_hw->unit = unit;
4428 wlc_hw->band = wlc_hw->bandstate[0];
4429 wlc_hw->_piomode = piomode;
4431 /* populate struct brcms_hardware with default values */
4432 brcms_b_info_init(wlc_hw);
4435 * Do the hardware portion of the attach. Also initialize software
4436 * state that depends on the particular hardware we are running.
4438 wlc_hw->sih = ai_attach(core->bus);
4439 if (wlc_hw->sih == NULL) {
4440 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4446 /* verify again the device is supported */
4447 if (!brcms_c_chipmatch(core)) {
4448 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported device\n",
4454 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
4455 wlc_hw->vendorid = pcidev->vendor;
4456 wlc_hw->deviceid = pcidev->device;
4458 wlc_hw->vendorid = core->bus->boardinfo.vendor;
4459 wlc_hw->deviceid = core->bus->boardinfo.type;
4462 wlc_hw->d11core = core;
4463 wlc_hw->corerev = core->id.rev;
4465 /* validate chip, chiprev and corerev */
4466 if (!brcms_c_isgoodchip(wlc_hw)) {
4471 /* initialize power control registers */
4472 ai_clkctl_init(wlc_hw->sih);
4474 /* request fastclock and force fastclock for the rest of attach
4475 * bring the d11 core out of reset.
4476 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4477 * is still false; But it will be called again inside wlc_corereset,
4478 * after d11 is out of reset.
4480 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
4481 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4483 if (!brcms_b_validate_chip_access(wlc_hw)) {
4484 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4490 /* get the board rev, used just below */
4491 j = sprom->board_rev;
4492 /* promote srom boardrev of 0xFF to 1 */
4493 if (j == BOARDREV_PROMOTABLE)
4494 j = BOARDREV_PROMOTED;
4495 wlc_hw->boardrev = (u16) j;
4496 if (!brcms_c_validboardtype(wlc_hw)) {
4497 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4498 "board type (0x%x)" " or revision level (0x%x)\n",
4499 unit, ai_get_boardtype(wlc_hw->sih),
4504 wlc_hw->sromrev = sprom->revision;
4505 wlc_hw->boardflags = sprom->boardflags_lo + (sprom->boardflags_hi << 16);
4506 wlc_hw->boardflags2 = sprom->boardflags2_lo + (sprom->boardflags2_hi << 16);
4508 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4509 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4511 /* check device id(srom, nvram etc.) to set bands */
4512 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4513 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4514 /* Dualband boards */
4515 wlc_hw->_nbands = 2;
4517 wlc_hw->_nbands = 1;
4519 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225))
4520 wlc_hw->_nbands = 1;
4522 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4523 * unconditionally does the init of these values
4525 wlc->vendorid = wlc_hw->vendorid;
4526 wlc->deviceid = wlc_hw->deviceid;
4527 wlc->pub->sih = wlc_hw->sih;
4528 wlc->pub->corerev = wlc_hw->corerev;
4529 wlc->pub->sromrev = wlc_hw->sromrev;
4530 wlc->pub->boardrev = wlc_hw->boardrev;
4531 wlc->pub->boardflags = wlc_hw->boardflags;
4532 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4533 wlc->pub->_nbands = wlc_hw->_nbands;
4535 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4537 if (wlc_hw->physhim == NULL) {
4538 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4544 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4545 sha_params.sih = wlc_hw->sih;
4546 sha_params.physhim = wlc_hw->physhim;
4547 sha_params.unit = unit;
4548 sha_params.corerev = wlc_hw->corerev;
4549 sha_params.vid = wlc_hw->vendorid;
4550 sha_params.did = wlc_hw->deviceid;
4551 sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4552 sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4553 sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4554 sha_params.sromrev = wlc_hw->sromrev;
4555 sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4556 sha_params.boardrev = wlc_hw->boardrev;
4557 sha_params.boardflags = wlc_hw->boardflags;
4558 sha_params.boardflags2 = wlc_hw->boardflags2;
4560 /* alloc and save pointer to shared phy state area */
4561 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4562 if (!wlc_hw->phy_sh) {
4567 /* initialize software state for each core and band */
4568 for (j = 0; j < wlc_hw->_nbands; j++) {
4570 * band0 is always 2.4Ghz
4571 * band1, if present, is 5Ghz
4574 brcms_c_setxband(wlc_hw, j);
4576 wlc_hw->band->bandunit = j;
4577 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4578 wlc->band->bandunit = j;
4579 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4580 wlc->core->coreidx = core->core_index;
4582 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4583 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4585 /* init tx fifo size */
4586 WARN_ON((wlc_hw->corerev - XMTFIFOTBL_STARTREV) < 0 ||
4587 (wlc_hw->corerev - XMTFIFOTBL_STARTREV) >
4588 ARRAY_SIZE(xmtfifo_sz));
4589 wlc_hw->xmtfifo_sz =
4590 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4591 WARN_ON(!wlc_hw->xmtfifo_sz[0]);
4593 /* Get a phy for this band */
4595 wlc_phy_attach(wlc_hw->phy_sh, core,
4596 wlc_hw->band->bandtype,
4598 if (wlc_hw->band->pi == NULL) {
4599 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4600 "attach failed\n", unit);
4605 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4607 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4608 &wlc_hw->band->phyrev,
4609 &wlc_hw->band->radioid,
4610 &wlc_hw->band->radiorev);
4611 wlc_hw->band->abgphy_encore =
4612 wlc_phy_get_encore(wlc_hw->band->pi);
4613 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4614 wlc_hw->band->core_flags =
4615 wlc_phy_get_coreflags(wlc_hw->band->pi);
4617 /* verify good phy_type & supported phy revision */
4618 if (BRCMS_ISNPHY(wlc_hw->band)) {
4619 if (NCONF_HAS(wlc_hw->band->phyrev))
4623 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4624 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4630 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4631 "phy type/rev (%d/%d)\n", unit,
4632 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4639 * BMAC_NOTE: wlc->band->pi should not be set below and should
4640 * be done in the high level attach. However we can not make
4641 * that change until all low level access is changed to
4642 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4643 * keeping wlc_hw->band->pi as well for incremental update of
4644 * low level fns, and cut over low only init when all fns
4647 wlc->band->pi = wlc_hw->band->pi;
4648 wlc->band->phytype = wlc_hw->band->phytype;
4649 wlc->band->phyrev = wlc_hw->band->phyrev;
4650 wlc->band->radioid = wlc_hw->band->radioid;
4651 wlc->band->radiorev = wlc_hw->band->radiorev;
4653 /* default contention windows size limits */
4654 wlc_hw->band->CWmin = APHY_CWMIN;
4655 wlc_hw->band->CWmax = PHY_CWMAX;
4657 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4663 /* disable core to match driver "down" state */
4664 brcms_c_coredisable(wlc_hw);
4666 /* Match driver "down" state */
4667 ai_pci_down(wlc_hw->sih);
4669 /* turn off pll and xtal to match driver "down" state */
4670 brcms_b_xtal(wlc_hw, OFF);
4672 /* *******************************************************************
4673 * The hardware is in the DOWN state at this point. D11 core
4674 * or cores are in reset with clocks off, and the board PLLs
4675 * are off if possible.
4677 * Beyond this point, wlc->sbclk == false and chip registers
4678 * should not be touched.
4679 *********************************************************************
4682 /* init etheraddr state variables */
4683 brcms_c_get_macaddr(wlc_hw, wlc_hw->etheraddr);
4685 if (is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4686 is_zero_ether_addr(wlc_hw->etheraddr)) {
4687 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr\n",
4693 BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x\n",
4694 wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih));
4699 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4704 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4707 unit = wlc->pub->unit;
4709 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4710 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4711 wlc->band->antgain = 8;
4712 } else if (wlc->band->antgain == -1) {
4713 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4714 " srom, using 2dB\n", unit, __func__);
4715 wlc->band->antgain = 8;
4718 /* Older sroms specified gain in whole dbm only. In order
4719 * be able to specify qdbm granularity and remain backward
4720 * compatible the whole dbms are now encoded in only
4721 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4722 * 6 bit signed number ranges from -32 - 31.
4726 * 0xc1 = 1.75 db (1 + 3 quarters),
4727 * 0x3f = -1 (-1 + 0 quarters),
4728 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4729 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4731 gain = wlc->band->antgain & 0x3f;
4732 gain <<= 2; /* Sign extend */
4734 fract = (wlc->band->antgain & 0xc0) >> 6;
4735 wlc->band->antgain = 4 * gain + fract;
4739 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4744 struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom;
4746 unit = wlc->pub->unit;
4747 bandtype = wlc->band->bandtype;
4749 /* get antennas available */
4750 if (bandtype == BRCM_BAND_5G)
4751 aa = sprom->ant_available_a;
4753 aa = sprom->ant_available_bg;
4755 if ((aa < 1) || (aa > 15)) {
4756 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4757 " srom (0x%x), using 3\n", unit, __func__, aa);
4761 /* reset the defaults if we have a single antenna */
4763 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4764 wlc->stf->txant = ANT_TX_FORCE_0;
4765 } else if (aa == 2) {
4766 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4767 wlc->stf->txant = ANT_TX_FORCE_1;
4771 /* Compute Antenna Gain */
4772 if (bandtype == BRCM_BAND_5G)
4773 wlc->band->antgain = sprom->antenna_gain.a1;
4775 wlc->band->antgain = sprom->antenna_gain.a0;
4777 brcms_c_attach_antgain_init(wlc);
4782 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4785 struct brcms_band *band;
4786 struct brcms_bss_info *bi = wlc->default_bss;
4788 /* init default and target BSS with some sane initial values */
4789 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4790 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4792 /* fill the default channel as the first valid channel
4793 * starting from the 2G channels
4795 chanspec = ch20mhz_chspec(1);
4796 wlc->home_chanspec = bi->chanspec = chanspec;
4798 /* find the band of our default channel */
4800 if (wlc->pub->_nbands > 1 &&
4801 band->bandunit != chspec_bandunit(chanspec))
4802 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4804 /* init bss rates to the band specific default rate set */
4805 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4806 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4807 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4808 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4810 if (wlc->pub->_n_enab & SUPPORT_11N)
4811 bi->flags |= BRCMS_BSS_HT;
4814 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4816 struct brcms_txq_info *qi, *p;
4818 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4821 * Have enough room for control packets along with HI watermark
4822 * Also, add room to txq for total psq packets if all the SCBs
4823 * leave PS mode. The watermark for flowcontrol to OS packets
4824 * will remain the same
4826 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4827 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4829 /* add this queue to the the global list */
4832 wlc->tx_queues = qi;
4834 while (p->next != NULL)
4842 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4843 struct brcms_txq_info *qi)
4845 struct brcms_txq_info *p;
4850 /* remove the queue from the linked list */
4853 wlc->tx_queues = p->next;
4855 while (p != NULL && p->next != qi)
4858 p->next = p->next->next;
4864 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4867 struct brcms_band *band;
4869 for (i = 0; i < wlc->pub->_nbands; i++) {
4870 band = wlc->bandstate[i];
4871 if (band->bandtype == BRCM_BAND_5G) {
4872 if ((bwcap == BRCMS_N_BW_40ALL)
4873 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4874 band->mimo_cap_40 = true;
4876 band->mimo_cap_40 = false;
4878 if (bwcap == BRCMS_N_BW_40ALL)
4879 band->mimo_cap_40 = true;
4881 band->mimo_cap_40 = false;
4886 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4888 /* free timer state */
4890 brcms_free_timer(wlc->wdtimer);
4891 wlc->wdtimer = NULL;
4893 if (wlc->radio_timer) {
4894 brcms_free_timer(wlc->radio_timer);
4895 wlc->radio_timer = NULL;
4899 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4902 brcms_c_antsel_detach(wlc->asi);
4907 brcms_c_ampdu_detach(wlc->ampdu);
4911 brcms_c_stf_detach(wlc);
4917 static int brcms_b_detach(struct brcms_c_info *wlc)
4920 struct brcms_hw_band *band;
4921 struct brcms_hardware *wlc_hw = wlc->hw;
4926 brcms_b_detach_dmapio(wlc_hw);
4928 band = wlc_hw->band;
4929 for (i = 0; i < wlc_hw->_nbands; i++) {
4931 /* Detach this band's phy */
4932 wlc_phy_detach(band->pi);
4935 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4938 /* Free shared phy state */
4939 kfree(wlc_hw->phy_sh);
4941 wlc_phy_shim_detach(wlc_hw->physhim);
4944 ai_detach(wlc_hw->sih);
4953 * Return a count of the number of driver callbacks still pending.
4955 * General policy is that brcms_c_detach can only dealloc/free software states.
4956 * It can NOT touch hardware registers since the d11core may be in reset and
4957 * clock may not be available.
4958 * One exception is sb register access, which is possible if crystal is turned
4959 * on after "down" state, driver should avoid software timer with the exception
4962 uint brcms_c_detach(struct brcms_c_info *wlc)
4969 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4971 callbacks += brcms_b_detach(wlc);
4973 /* delete software timers */
4974 if (!brcms_c_radio_monitor_stop(wlc))
4977 brcms_c_channel_mgr_detach(wlc->cmi);
4979 brcms_c_timers_deinit(wlc);
4981 brcms_c_detach_module(wlc);
4984 while (wlc->tx_queues != NULL)
4985 brcms_c_txq_free(wlc, wlc->tx_queues);
4987 brcms_c_detach_mfree(wlc);
4991 /* update state that depends on the current value of "ap" */
4992 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
4994 /* STA-BSS; short capable */
4995 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
4998 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
4999 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5001 if (wlc_hw->wlc->pub->hw_up)
5004 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5007 * Enable pll and xtal, initialize the power control registers,
5008 * and force fastclock for the remainder of brcms_c_up().
5010 brcms_b_xtal(wlc_hw, ON);
5011 ai_clkctl_init(wlc_hw->sih);
5012 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
5015 * TODO: test suspend/resume
5017 * AI chip doesn't restore bar0win2 on
5018 * hibernation/resume, need sw fixup
5022 * Inform phy that a POR reset has occurred so
5023 * it does a complete phy init
5025 wlc_phy_por_inform(wlc_hw->band->pi);
5027 wlc_hw->ucode_loaded = false;
5028 wlc_hw->wlc->pub->hw_up = true;
5030 if ((wlc_hw->boardflags & BFL_FEM)
5031 && (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
5033 (wlc_hw->boardrev >= 0x1250
5034 && (wlc_hw->boardflags & BFL_FEM_BT)))
5035 ai_epa_4313war(wlc_hw->sih);
5039 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5041 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5044 * Enable pll and xtal, initialize the power control registers,
5045 * and force fastclock for the remainder of brcms_c_up().
5047 brcms_b_xtal(wlc_hw, ON);
5048 ai_clkctl_init(wlc_hw->sih);
5049 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
5052 * Configure pci/pcmcia here instead of in brcms_c_attach()
5053 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5055 bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci[0], wlc_hw->d11core,
5059 * Need to read the hwradio status here to cover the case where the
5060 * system is loaded with the hw radio disabled. We do not want to
5061 * bring the driver up in this case.
5063 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5064 /* put SB PCI in down state again */
5065 ai_pci_down(wlc_hw->sih);
5066 brcms_b_xtal(wlc_hw, OFF);
5070 ai_pci_up(wlc_hw->sih);
5072 /* reset the d11 core */
5073 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5078 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5080 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5083 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5085 /* FULLY enable dynamic power control and d11 core interrupt */
5086 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
5087 brcms_intrson(wlc_hw->wlc->wl);
5092 * Write WME tunable parameters for retransmit/max rate
5093 * from wlc struct to ucode
5095 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5099 /* Need clock to do this */
5103 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5104 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5105 wlc->wme_retries[ac]);
5108 /* make interface operational */
5109 int brcms_c_up(struct brcms_c_info *wlc)
5111 struct ieee80211_channel *ch;
5113 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5115 /* HW is turned off so don't try to access it */
5116 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5119 if (!wlc->pub->hw_up) {
5120 brcms_b_hw_up(wlc->hw);
5121 wlc->pub->hw_up = true;
5124 if ((wlc->pub->boardflags & BFL_FEM)
5125 && (ai_get_chip_id(wlc->hw->sih) == BCMA_CHIP_ID_BCM4313)) {
5126 if (wlc->pub->boardrev >= 0x1250
5127 && (wlc->pub->boardflags & BFL_FEM_BT))
5128 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5129 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5131 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5132 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5136 * Need to read the hwradio status here to cover the case where the
5137 * system is loaded with the hw radio disabled. We do not want to bring
5138 * the driver up in this case. If radio is disabled, abort up, lower
5139 * power, start radio timer and return 0(for NDIS) don't call
5140 * radio_update to avoid looping brcms_c_up.
5142 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5144 if (!wlc->pub->radio_disabled) {
5145 int status = brcms_b_up_prep(wlc->hw);
5146 if (status == -ENOMEDIUM) {
5148 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5149 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5150 mboolset(wlc->pub->radio_disabled,
5151 WL_RADIO_HW_DISABLE);
5153 if (bsscfg->enable && bsscfg->BSS)
5154 wiphy_err(wlc->wiphy, "wl%d: up"
5156 "bsscfg_disable()\n",
5162 if (wlc->pub->radio_disabled) {
5163 brcms_c_radio_monitor_start(wlc);
5167 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5170 brcms_c_radio_monitor_stop(wlc);
5172 /* Set EDCF hostflags */
5173 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5175 brcms_init(wlc->wl);
5176 wlc->pub->up = true;
5178 if (wlc->bandinit_pending) {
5179 ch = wlc->pub->ieee_hw->conf.channel;
5180 brcms_c_suspend_mac_and_wait(wlc);
5181 brcms_c_set_chanspec(wlc, ch20mhz_chspec(ch->hw_value));
5182 wlc->bandinit_pending = false;
5183 brcms_c_enable_mac(wlc);
5186 brcms_b_up_finish(wlc->hw);
5188 /* Program the TX wme params with the current settings */
5189 brcms_c_wme_retries_write(wlc);
5191 /* start one second watchdog timer */
5192 brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5193 wlc->WDarmed = true;
5195 /* ensure antenna config is up to date */
5196 brcms_c_stf_phy_txant_upd(wlc);
5197 /* ensure LDPC config is in sync */
5198 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5203 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5210 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5215 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5220 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5222 /* disable interrupts */
5224 wlc_hw->wlc->macintmask = 0;
5226 /* now disable interrupts */
5227 brcms_intrsoff(wlc_hw->wlc->wl);
5229 /* ensure we're running on the pll clock again */
5230 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
5232 /* down phy at the last of this stage */
5233 callbacks += wlc_phy_down(wlc_hw->band->pi);
5238 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5243 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5249 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5251 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5254 wlc_hw->sbclk = false;
5255 wlc_hw->clk = false;
5256 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5258 /* reclaim any posted packets */
5259 brcms_c_flushqueues(wlc_hw->wlc);
5262 /* Reset and disable the core */
5263 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5264 if (bcma_read32(wlc_hw->d11core,
5265 D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5266 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5267 callbacks += brcms_reset(wlc_hw->wlc->wl);
5268 brcms_c_coredisable(wlc_hw);
5271 /* turn off primary xtal and pll */
5272 if (!wlc_hw->noreset) {
5273 ai_pci_down(wlc_hw->sih);
5274 brcms_b_xtal(wlc_hw, OFF);
5282 * Mark the interface nonoperational, stop the software mechanisms,
5283 * disable the hardware, free any transient buffer state.
5284 * Return a count of the number of driver callbacks still pending.
5286 uint brcms_c_down(struct brcms_c_info *wlc)
5291 bool dev_gone = false;
5292 struct brcms_txq_info *qi;
5294 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5296 /* check if we are already in the going down path */
5297 if (wlc->going_down) {
5298 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5299 "\n", wlc->pub->unit, __func__);
5305 wlc->going_down = true;
5307 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5309 dev_gone = brcms_deviceremoved(wlc);
5311 /* Call any registered down handlers */
5312 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5313 if (wlc->modulecb[i].down_fn)
5315 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5318 /* cancel the watchdog timer */
5320 if (!brcms_del_timer(wlc->wdtimer))
5322 wlc->WDarmed = false;
5324 /* cancel all other timers */
5325 callbacks += brcms_c_down_del_timer(wlc);
5327 wlc->pub->up = false;
5329 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5331 /* flush tx queues */
5332 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5333 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5335 callbacks += brcms_b_down_finish(wlc->hw);
5337 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5340 wlc->going_down = false;
5344 /* Set the current gmode configuration */
5345 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5349 struct brcms_c_rateset rs;
5350 /* Default to 54g Auto */
5351 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5352 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5353 bool shortslot_restrict = false; /* Restrict association to stations
5354 * that support shortslot
5356 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5357 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5358 int preamble = BRCMS_PLCP_LONG;
5359 bool preamble_restrict = false; /* Restrict association to stations
5360 * that support short preambles
5362 struct brcms_band *band;
5364 /* if N-support is enabled, allow Gmode set as long as requested
5365 * Gmode is not GMODE_LEGACY_B
5367 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5370 /* verify that we are dealing with 2G band and grab the band pointer */
5371 if (wlc->band->bandtype == BRCM_BAND_2G)
5373 else if ((wlc->pub->_nbands > 1) &&
5374 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5375 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5379 /* update configuration value */
5381 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5383 /* Clear rateset override */
5384 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5387 case GMODE_LEGACY_B:
5388 shortslot = BRCMS_SHORTSLOT_OFF;
5389 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5397 /* Accept defaults */
5402 preamble = BRCMS_PLCP_SHORT;
5403 preamble_restrict = true;
5406 case GMODE_PERFORMANCE:
5407 shortslot = BRCMS_SHORTSLOT_ON;
5408 shortslot_restrict = true;
5410 preamble = BRCMS_PLCP_SHORT;
5411 preamble_restrict = true;
5416 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5417 wlc->pub->unit, __func__, gmode);
5421 band->gmode = gmode;
5423 wlc->shortslot_override = shortslot;
5425 /* Use the default 11g rateset */
5427 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5430 for (i = 0; i < rs.count; i++) {
5431 if (rs.rates[i] == BRCM_RATE_6M
5432 || rs.rates[i] == BRCM_RATE_12M
5433 || rs.rates[i] == BRCM_RATE_24M)
5434 rs.rates[i] |= BRCMS_RATE_FLAG;
5438 /* Set default bss rateset */
5439 wlc->default_bss->rateset.count = rs.count;
5440 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5441 sizeof(wlc->default_bss->rateset.rates));
5446 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5451 if (wlc->stf->txstreams == WL_11N_3x3)
5456 /* force GMODE_AUTO if NMODE is ON */
5457 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5458 if (nmode == WL_11N_3x3)
5459 wlc->pub->_n_enab = SUPPORT_HT;
5461 wlc->pub->_n_enab = SUPPORT_11N;
5462 wlc->default_bss->flags |= BRCMS_BSS_HT;
5463 /* add the mcs rates to the default and hw ratesets */
5464 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5465 wlc->stf->txstreams);
5466 for (i = 0; i < wlc->pub->_nbands; i++)
5467 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5468 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5474 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5475 struct brcms_c_rateset *rs_arg)
5477 struct brcms_c_rateset rs, new;
5480 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5482 /* check for bad count value */
5483 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5486 /* try the current band */
5487 bandunit = wlc->band->bandunit;
5488 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5489 if (brcms_c_rate_hwrs_filter_sort_validate
5490 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5491 wlc->stf->txstreams))
5494 /* try the other band */
5495 if (brcms_is_mband_unlocked(wlc)) {
5496 bandunit = OTHERBANDUNIT(wlc);
5497 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5498 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5500 bandstate[bandunit]->
5502 wlc->stf->txstreams))
5509 /* apply new rateset */
5510 memcpy(&wlc->default_bss->rateset, &new,
5511 sizeof(struct brcms_c_rateset));
5512 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5513 sizeof(struct brcms_c_rateset));
5517 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5522 if (wlc->bsscfg->associated)
5523 r = wlc->bsscfg->current_bss->rateset.rates[0];
5525 r = wlc->default_bss->rateset.rates[0];
5527 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5530 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5532 u16 chspec = ch20mhz_chspec(channel);
5534 if (channel < 0 || channel > MAXCHANNEL)
5537 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5541 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5542 if (wlc->band->bandunit != chspec_bandunit(chspec))
5543 wlc->bandinit_pending = true;
5545 wlc->bandinit_pending = false;
5548 wlc->default_bss->chanspec = chspec;
5549 /* brcms_c_BSSinit() will sanitize the rateset before
5551 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5552 brcms_c_set_home_chanspec(wlc, chspec);
5553 brcms_c_suspend_mac_and_wait(wlc);
5554 brcms_c_set_chanspec(wlc, chspec);
5555 brcms_c_enable_mac(wlc);
5560 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5564 if (srl < 1 || srl > RETRY_SHORT_MAX ||
5565 lrl < 1 || lrl > RETRY_SHORT_MAX)
5571 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5573 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5574 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5575 EDCF_SHORT, wlc->SRL);
5576 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5577 EDCF_LONG, wlc->LRL);
5579 brcms_c_wme_retries_write(wlc);
5584 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5585 struct brcm_rateset *currs)
5587 struct brcms_c_rateset *rs;
5589 if (wlc->pub->associated)
5590 rs = &wlc->bsscfg->current_bss->rateset;
5592 rs = &wlc->default_bss->rateset;
5594 /* Copy only legacy rateset section */
5595 currs->count = rs->count;
5596 memcpy(&currs->rates, &rs->rates, rs->count);
5599 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5601 struct brcms_c_rateset internal_rs;
5604 if (rs->count > BRCMS_NUMRATES)
5607 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5609 /* Copy only legacy rateset section */
5610 internal_rs.count = rs->count;
5611 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5613 /* merge rateset coming in with the current mcsset */
5614 if (wlc->pub->_n_enab & SUPPORT_11N) {
5615 struct brcms_bss_info *mcsset_bss;
5616 if (wlc->bsscfg->associated)
5617 mcsset_bss = wlc->bsscfg->current_bss;
5619 mcsset_bss = wlc->default_bss;
5620 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5624 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5626 brcms_c_ofdm_rateset_war(wlc);
5631 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5633 if (period < DOT11_MIN_BEACON_PERIOD ||
5634 period > DOT11_MAX_BEACON_PERIOD)
5637 wlc->default_bss->beacon_period = period;
5641 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5643 return wlc->band->phytype;
5646 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5648 wlc->shortslot_override = sslot_override;
5651 * shortslot is an 11g feature, so no more work if we are
5652 * currently on the 5G band
5654 if (wlc->band->bandtype == BRCM_BAND_5G)
5657 if (wlc->pub->up && wlc->pub->associated) {
5658 /* let watchdog or beacon processing update shortslot */
5659 } else if (wlc->pub->up) {
5660 /* unassociated shortslot is off */
5661 brcms_c_switch_shortslot(wlc, false);
5663 /* driver is down, so just update the brcms_c_info
5665 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5666 wlc->shortslot = false;
5669 (wlc->shortslot_override ==
5670 BRCMS_SHORTSLOT_ON);
5675 * register watchdog and down handlers.
5677 int brcms_c_module_register(struct brcms_pub *pub,
5678 const char *name, struct brcms_info *hdl,
5679 int (*d_fn)(void *handle))
5681 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5684 /* find an empty entry and just add, no duplication check! */
5685 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5686 if (wlc->modulecb[i].name[0] == '\0') {
5687 strncpy(wlc->modulecb[i].name, name,
5688 sizeof(wlc->modulecb[i].name) - 1);
5689 wlc->modulecb[i].hdl = hdl;
5690 wlc->modulecb[i].down_fn = d_fn;
5698 /* unregister module callbacks */
5699 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5700 struct brcms_info *hdl)
5702 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5708 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5709 if (!strcmp(wlc->modulecb[i].name, name) &&
5710 (wlc->modulecb[i].hdl == hdl)) {
5711 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5716 /* table not found! */
5720 void brcms_c_print_txstatus(struct tx_status *txs)
5722 pr_debug("\ntxpkt (MPDU) Complete\n");
5724 pr_debug("FrameID: %04x TxStatus: %04x\n", txs->frameid, txs->status);
5726 pr_debug("[15:12] %d frame attempts\n",
5727 (txs->status & TX_STATUS_FRM_RTX_MASK) >>
5728 TX_STATUS_FRM_RTX_SHIFT);
5729 pr_debug(" [11:8] %d rts attempts\n",
5730 (txs->status & TX_STATUS_RTS_RTX_MASK) >>
5731 TX_STATUS_RTS_RTX_SHIFT);
5732 pr_debug(" [7] %d PM mode indicated\n",
5733 txs->status & TX_STATUS_PMINDCTD ? 1 : 0);
5734 pr_debug(" [6] %d intermediate status\n",
5735 txs->status & TX_STATUS_INTERMEDIATE ? 1 : 0);
5736 pr_debug(" [5] %d AMPDU\n",
5737 txs->status & TX_STATUS_AMPDU ? 1 : 0);
5738 pr_debug(" [4:2] %d Frame Suppressed Reason (%s)\n",
5739 (txs->status & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT,
5744 "Previous frag failure",
5748 } [(txs->status & TX_STATUS_SUPR_MASK) >>
5749 TX_STATUS_SUPR_SHIFT]);
5750 pr_debug(" [1] %d acked\n",
5751 txs->status & TX_STATUS_ACK_RCV ? 1 : 0);
5753 pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5754 txs->lasttxtime, txs->sequence, txs->phyerr,
5755 (txs->ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT,
5756 (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5759 static bool brcms_c_chipmatch_pci(struct bcma_device *core)
5761 struct pci_dev *pcidev = core->bus->host_pci;
5762 u16 vendor = pcidev->vendor;
5763 u16 device = pcidev->device;
5765 if (vendor != PCI_VENDOR_ID_BROADCOM) {
5766 pr_err("unknown vendor id %04x\n", vendor);
5770 if (device == BCM43224_D11N_ID_VEN1)
5772 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5774 if (device == BCM4313_D11N2G_ID)
5776 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5779 pr_err("unknown device id %04x\n", device);
5783 static bool brcms_c_chipmatch_soc(struct bcma_device *core)
5785 struct bcma_chipinfo *chipinfo = &core->bus->chipinfo;
5787 if (chipinfo->id == BCMA_CHIP_ID_BCM4716)
5790 pr_err("unknown chip id %04x\n", chipinfo->id);
5794 bool brcms_c_chipmatch(struct bcma_device *core)
5796 switch (core->bus->hosttype) {
5797 case BCMA_HOSTTYPE_PCI:
5798 return brcms_c_chipmatch_pci(core);
5799 case BCMA_HOSTTYPE_SOC:
5800 return brcms_c_chipmatch_soc(core);
5802 pr_err("unknown host type: %i\n", core->bus->hosttype);
5808 void brcms_c_print_txdesc(struct d11txh *txh)
5810 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5811 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5812 u16 mfc = le16_to_cpu(txh->MacFrameControl);
5813 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5814 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5815 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5816 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5817 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5818 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5819 u16 mainrates = le16_to_cpu(txh->MainRates);
5820 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5822 u8 *ra = txh->TxFrameRA;
5823 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5824 u8 *rtspfb = txh->RTSPLCPFallback;
5825 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5826 u8 *fragpfb = txh->FragPLCPFallback;
5827 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5828 u16 mmodelen = le16_to_cpu(txh->MModeLen);
5829 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5830 u16 tfid = le16_to_cpu(txh->TxFrameID);
5831 u16 txs = le16_to_cpu(txh->TxStatus);
5832 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5833 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5834 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5835 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5837 u8 *rtsph = txh->RTSPhyHeader;
5838 struct ieee80211_rts rts = txh->rts_frame;
5840 /* add plcp header along with txh descriptor */
5841 brcmu_dbg_hex_dump(txh, sizeof(struct d11txh) + 48,
5842 "Raw TxDesc + plcp header:\n");
5844 pr_debug("TxCtlLow: %04x ", mtcl);
5845 pr_debug("TxCtlHigh: %04x ", mtch);
5846 pr_debug("FC: %04x ", mfc);
5847 pr_debug("FES Time: %04x\n", tfest);
5848 pr_debug("PhyCtl: %04x%s ", ptcw,
5849 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5850 pr_debug("PhyCtl_1: %04x ", ptcw_1);
5851 pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5852 pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5853 pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5854 pr_debug("MainRates: %04x ", mainrates);
5855 pr_debug("XtraFrameTypes: %04x ", xtraft);
5858 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5859 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5860 ra, sizeof(txh->TxFrameRA));
5862 pr_debug("Fb FES Time: %04x ", tfestfb);
5863 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5864 rtspfb, sizeof(txh->RTSPLCPFallback));
5865 pr_debug("RTS DUR: %04x ", rtsdfb);
5866 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5867 fragpfb, sizeof(txh->FragPLCPFallback));
5868 pr_debug("DUR: %04x", fragdfb);
5871 pr_debug("MModeLen: %04x ", mmodelen);
5872 pr_debug("MModeFbrLen: %04x\n", mmodefbrlen);
5874 pr_debug("FrameID: %04x\n", tfid);
5875 pr_debug("TxStatus: %04x\n", txs);
5877 pr_debug("MaxNumMpdu: %04x\n", mnmpdu);
5878 pr_debug("MaxAggbyte: %04x\n", mabyte);
5879 pr_debug("MaxAggbyte_fb: %04x\n", mabyte_f);
5880 pr_debug("MinByte: %04x\n", mmbyte);
5882 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5883 rtsph, sizeof(txh->RTSPhyHeader));
5884 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5885 (u8 *)&rts, sizeof(txh->rts_frame));
5888 #endif /* defined(DEBUG) */
5892 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5898 int slen = 0, nlen = 0;
5902 if (len < 2 || !buf)
5907 for (i = 0; flags != 0; i++) {
5910 if (bit == 0 && flags != 0) {
5911 /* print any unnamed bits */
5912 snprintf(hexstr, 16, "0x%X", flags);
5914 flags = 0; /* exit loop */
5915 } else if ((flags & bit) == 0)
5918 nlen = strlen(name);
5920 /* count btwn flag space */
5923 /* need NULL char as well */
5926 /* copy NULL char but don't count it */
5927 strncpy(p, name, nlen + 1);
5929 /* copy btwn flag space and NULL char */
5931 p += snprintf(p, 2, " ");
5935 /* indicate the str was too short */
5938 p -= 2 - len; /* overwrite last char */
5939 p += snprintf(p, 2, ">");
5942 return (int)(p - buf);
5944 #endif /* defined(DEBUG) */
5947 void brcms_c_print_rxh(struct d11rxhdr *rxh)
5949 u16 len = rxh->RxFrameSize;
5950 u16 phystatus_0 = rxh->PhyRxStatus_0;
5951 u16 phystatus_1 = rxh->PhyRxStatus_1;
5952 u16 phystatus_2 = rxh->PhyRxStatus_2;
5953 u16 phystatus_3 = rxh->PhyRxStatus_3;
5954 u16 macstatus1 = rxh->RxStatus1;
5955 u16 macstatus2 = rxh->RxStatus2;
5958 static const struct brcms_c_bit_desc macstat_flags[] = {
5959 {RXS_FCSERR, "FCSErr"},
5960 {RXS_RESPFRAMETX, "Reply"},
5961 {RXS_PBPRES, "PADDING"},
5962 {RXS_DECATMPT, "DeCr"},
5963 {RXS_DECERR, "DeCrErr"},
5964 {RXS_BCNSENT, "Bcn"},
5968 brcmu_dbg_hex_dump(rxh, sizeof(struct d11rxhdr), "Raw RxDesc:\n");
5970 brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
5972 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
5974 pr_debug("RxFrameSize: %6s (%d)%s\n", lenbuf, len,
5975 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
5976 pr_debug("RxPHYStatus: %04x %04x %04x %04x\n",
5977 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
5978 pr_debug("RxMACStatus: %x %s\n", macstatus1, flagstr);
5979 pr_debug("RXMACaggtype: %x\n",
5980 (macstatus2 & RXS_AGGTYPE_MASK));
5981 pr_debug("RxTSFTime: %04x\n", rxh->RxTSFTime);
5983 #endif /* defined(DEBUG) */
5985 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
5990 /* get the phy specific rate encoding for the PLCP SIGNAL field */
5991 if (is_ofdm_rate(rate))
5992 table_ptr = M_RT_DIRMAP_A;
5994 table_ptr = M_RT_DIRMAP_B;
5996 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
5997 * the index into the rate table.
5999 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6000 index = phy_rate & 0xf;
6002 /* Find the SHM pointer to the rate table entry by looking in the
6005 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6009 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6010 struct sk_buff *pkt, int prec, bool head)
6013 int eprec = -1; /* precedence to evict from */
6015 /* Determine precedence from which to evict packet, if any */
6016 if (pktq_pfull(q, prec))
6018 else if (pktq_full(q)) {
6019 p = brcmu_pktq_peek_tail(q, &eprec);
6021 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6022 "\n", __func__, eprec, prec);
6027 /* Evict if needed */
6029 bool discard_oldest;
6031 discard_oldest = ac_bitmap_tst(0, eprec);
6033 /* Refuse newer packet unless configured to discard oldest */
6034 if (eprec == prec && !discard_oldest) {
6035 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6036 "\n", __func__, prec);
6040 /* Evict packet according to discard policy */
6041 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6042 brcmu_pktq_pdeq_tail(q, eprec);
6043 brcmu_pkt_buf_free_skb(p);
6048 p = brcmu_pktq_penq_head(q, prec, pkt);
6050 p = brcmu_pktq_penq(q, prec, pkt);
6056 * Attempts to queue a packet onto a multiple-precedence queue,
6057 * if necessary evicting a lower precedence packet from the queue.
6059 * 'prec' is the precedence number that has already been mapped
6060 * from the packet priority.
6062 * Returns true if packet consumed (queued), false if not.
6064 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6065 struct sk_buff *pkt, int prec)
6067 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6070 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6071 struct sk_buff *sdu, uint prec)
6073 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6074 struct pktq *q = &qi->q;
6077 prio = sdu->priority;
6079 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6081 * we might hit this condtion in case
6082 * packet flooding from mac80211 stack
6084 brcmu_pkt_buf_free_skb(sdu);
6089 * bcmc_fid_generate:
6090 * Generate frame ID for a BCMC packet. The frag field is not used
6091 * for MC frames so is used as part of the sequence number.
6094 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6099 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6103 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6110 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6115 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6116 wlc->pub->unit, rspec, preamble_type);
6118 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6119 * is less than or equal to the rate of the immediately previous
6122 rspec = brcms_basic_rate(wlc, rspec);
6123 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6125 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6126 (DOT11_ACK_LEN + FCS_LEN));
6131 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6134 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6135 wlc->pub->unit, rspec, preamble_type);
6136 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6140 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6143 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6144 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6146 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6147 * is less than or equal to the rate of the immediately previous
6150 rspec = brcms_basic_rate(wlc, rspec);
6151 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6152 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6153 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6157 /* brcms_c_compute_frame_dur()
6159 * Calculate the 802.11 MAC header DUR field for MPDU
6160 * DUR for a single frame = 1 SIFS + 1 ACK
6161 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6163 * rate MPDU rate in unit of 500kbps
6164 * next_frag_len next MPDU length in bytes
6165 * preamble_type use short/GF or long/MM PLCP header
6168 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6169 u8 preamble_type, uint next_frag_len)
6173 sifs = get_sifs(wlc->band);
6176 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6178 if (next_frag_len) {
6179 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6181 /* add another SIFS and the frag time */
6184 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6190 /* The opposite of brcms_c_calc_frame_time */
6192 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6193 u8 preamble_type, uint dur)
6195 uint nsyms, mac_len, Ndps, kNdps;
6196 uint rate = rspec2rate(ratespec);
6198 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6199 wlc->pub->unit, ratespec, preamble_type, dur);
6201 if (is_mcs_rate(ratespec)) {
6202 uint mcs = ratespec & RSPEC_RATE_MASK;
6203 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6204 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6205 /* payload calculation matches that of regular ofdm */
6206 if (wlc->band->bandtype == BRCM_BAND_2G)
6207 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6208 /* kNdbps = kbps * 4 */
6209 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6210 rspec_issgi(ratespec)) * 4;
6211 nsyms = dur / APHY_SYMBOL_TIME;
6214 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6215 } else if (is_ofdm_rate(ratespec)) {
6216 dur -= APHY_PREAMBLE_TIME;
6217 dur -= APHY_SIGNAL_TIME;
6218 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6220 nsyms = dur / APHY_SYMBOL_TIME;
6223 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6225 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6226 dur -= BPHY_PLCP_SHORT_TIME;
6228 dur -= BPHY_PLCP_TIME;
6229 mac_len = dur * rate;
6230 /* divide out factor of 2 in rate (1/2 mbps) */
6231 mac_len = mac_len / 8 / 2;
6237 * Return true if the specified rate is supported by the specified band.
6238 * BRCM_BAND_AUTO indicates the current band.
6240 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6243 struct brcms_c_rateset *hw_rateset;
6246 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6247 hw_rateset = &wlc->band->hw_rateset;
6248 else if (wlc->pub->_nbands > 1)
6249 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6251 /* other band specified and we are a single band device */
6254 /* check if this is a mimo rate */
6255 if (is_mcs_rate(rspec)) {
6256 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6259 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6262 for (i = 0; i < hw_rateset->count; i++)
6263 if (hw_rateset->rates[i] == rspec2rate(rspec))
6267 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6268 "not in hw_rateset\n", wlc->pub->unit, rspec);
6274 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6277 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6278 u8 rate = int_val & NRATE_RATE_MASK;
6280 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6281 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6282 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6283 == NRATE_OVERRIDE_MCS_ONLY);
6289 /* validate the combination of rate/mcs/stf is allowed */
6290 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6291 /* mcs only allowed when nmode */
6292 if (stf > PHY_TXC1_MODE_SDM) {
6293 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6294 wlc->pub->unit, __func__);
6299 /* mcs 32 is a special case, DUP mode 40 only */
6301 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6302 ((stf != PHY_TXC1_MODE_SISO)
6303 && (stf != PHY_TXC1_MODE_CDD))) {
6304 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6305 "32\n", wlc->pub->unit, __func__);
6309 /* mcs > 7 must use stf SDM */
6310 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6311 /* mcs > 7 must use stf SDM */
6312 if (stf != PHY_TXC1_MODE_SDM) {
6313 BCMMSG(wlc->wiphy, "wl%d: enabling "
6314 "SDM mode for mcs %d\n",
6315 wlc->pub->unit, rate);
6316 stf = PHY_TXC1_MODE_SDM;
6320 * MCS 0-7 may use SISO, CDD, and for
6323 if ((stf > PHY_TXC1_MODE_STBC) ||
6324 (!BRCMS_STBC_CAP_PHY(wlc)
6325 && (stf == PHY_TXC1_MODE_STBC))) {
6326 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6327 "\n", wlc->pub->unit, __func__);
6332 } else if (is_ofdm_rate(rate)) {
6333 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6334 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6335 wlc->pub->unit, __func__);
6339 } else if (is_cck_rate(rate)) {
6340 if ((cur_band->bandtype != BRCM_BAND_2G)
6341 || (stf != PHY_TXC1_MODE_SISO)) {
6342 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6343 wlc->pub->unit, __func__);
6348 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6349 wlc->pub->unit, __func__);
6353 /* make sure multiple antennae are available for non-siso rates */
6354 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6355 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6356 "request\n", wlc->pub->unit, __func__);
6363 rspec |= RSPEC_MIMORATE;
6364 /* For STBC populate the STC field of the ratespec */
6365 if (stf == PHY_TXC1_MODE_STBC) {
6367 stc = 1; /* Nss for single stream is always 1 */
6368 rspec |= (stc << RSPEC_STC_SHIFT);
6372 rspec |= (stf << RSPEC_STF_SHIFT);
6374 if (override_mcs_only)
6375 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6378 rspec |= RSPEC_SHORT_GI;
6381 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6390 * Compute PLCP, but only requires actual rate and length of pkt.
6391 * Rate is given in the driver standard multiple of 500 kbps.
6392 * le is set for 11 Mbps rate if necessary.
6393 * Broken out for PRQ.
6396 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6397 uint length, u8 *plcp)
6410 usec = (length << 4) / 11;
6411 if ((length << 4) - (usec * 11) > 0)
6415 usec = (length << 3) / 11;
6416 if ((length << 3) - (usec * 11) > 0) {
6418 if ((usec * 11) - (length << 3) >= 8)
6419 le = D11B_PLCP_SIGNAL_LE;
6424 wiphy_err(wlc->wiphy,
6425 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6427 rate_500 = BRCM_RATE_1M;
6431 /* PLCP signal byte */
6432 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6433 /* PLCP service byte */
6434 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6435 /* PLCP length u16, little endian */
6436 plcp[2] = usec & 0xff;
6437 plcp[3] = (usec >> 8) & 0xff;
6443 /* Rate: 802.11 rate code, length: PSDU length in octets */
6444 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6446 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6448 if (rspec_is40mhz(rspec) || (mcs == 32))
6449 plcp[0] |= MIMO_PLCP_40MHZ;
6450 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6451 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6452 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6453 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6457 /* Rate: 802.11 rate code, length: PSDU length in octets */
6459 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6463 int rate = rspec2rate(rspec);
6466 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6469 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6470 memset(plcp, 0, D11_PHY_HDR_LEN);
6471 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6473 tmp = (length & 0xfff) << 5;
6474 plcp[2] |= (tmp >> 16) & 0xff;
6475 plcp[1] |= (tmp >> 8) & 0xff;
6476 plcp[0] |= tmp & 0xff;
6479 /* Rate: 802.11 rate code, length: PSDU length in octets */
6480 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6481 uint length, u8 *plcp)
6483 int rate = rspec2rate(rspec);
6485 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6489 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6490 uint length, u8 *plcp)
6492 if (is_mcs_rate(rspec))
6493 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6494 else if (is_ofdm_rate(rspec))
6495 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6497 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6500 /* brcms_c_compute_rtscts_dur()
6502 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6503 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6504 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6506 * cts cts-to-self or rts/cts
6507 * rts_rate rts or cts rate in unit of 500kbps
6508 * rate next MPDU rate in unit of 500kbps
6509 * frame_len next MPDU frame length in bytes
6512 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6514 u32 frame_rate, u8 rts_preamble_type,
6515 u8 frame_preamble_type, uint frame_len, bool ba)
6519 sifs = get_sifs(wlc->band);
6525 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6533 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6537 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6538 BRCMS_SHORT_PREAMBLE);
6541 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6542 frame_preamble_type);
6546 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6551 if (BRCMS_ISLCNPHY(wlc->band)) {
6552 bw = PHY_TXC1_BW_20MHZ;
6554 bw = rspec_get_bw(rspec);
6555 /* 10Mhz is not supported yet */
6556 if (bw < PHY_TXC1_BW_20MHZ) {
6557 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6558 "not supported yet, set to 20L\n", bw);
6559 bw = PHY_TXC1_BW_20MHZ;
6563 if (is_mcs_rate(rspec)) {
6564 uint mcs = rspec & RSPEC_RATE_MASK;
6566 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6567 phyctl1 = rspec_phytxbyte2(rspec);
6568 /* set the upper byte of phyctl1 */
6569 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6570 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6571 && !BRCMS_ISSSLPNPHY(wlc->band)) {
6573 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6574 * Data Rate. Eventually MIMOPHY would also be converted to
6577 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6578 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6579 } else { /* legacy OFDM/CCK */
6581 /* get the phyctl byte from rate phycfg table */
6582 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6584 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6585 "legacy OFDM/CCK rate\n");
6588 /* set the upper byte of phyctl1 */
6590 (bw | (phycfg << 8) |
6591 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6597 * Add struct d11txh, struct cck_phy_hdr.
6599 * 'p' data must start with 802.11 MAC header
6600 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6602 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6606 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6607 struct sk_buff *p, struct scb *scb, uint frag,
6608 uint nfrags, uint queue, uint next_frag_len)
6610 struct ieee80211_hdr *h;
6612 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6613 int len, phylen, rts_phylen;
6614 u16 mch, phyctl, xfts, mainrates;
6615 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6616 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6617 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6618 bool use_rts = false;
6619 bool use_cts = false;
6620 bool use_rifs = false;
6621 bool short_preamble[2] = { false, false };
6622 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6623 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6624 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6625 struct ieee80211_rts *rts = NULL;
6628 bool hwtkmic = false;
6629 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6630 #define ANTCFG_NONE 0xFF
6631 u8 antcfg = ANTCFG_NONE;
6632 u8 fbantcfg = ANTCFG_NONE;
6633 uint phyctl1_stf = 0;
6635 struct ieee80211_tx_rate *txrate[2];
6637 struct ieee80211_tx_info *tx_info;
6640 u8 mimo_preamble_type;
6642 /* locate 802.11 MAC header */
6643 h = (struct ieee80211_hdr *)(p->data);
6644 qos = ieee80211_is_data_qos(h->frame_control);
6646 /* compute length of frame in bytes for use in PLCP computations */
6648 phylen = len + FCS_LEN;
6651 tx_info = IEEE80211_SKB_CB(p);
6654 plcp = skb_push(p, D11_PHY_HDR_LEN);
6656 /* add Broadcom tx descriptor header */
6657 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6658 memset(txh, 0, D11_TXH_LEN);
6661 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6662 /* non-AP STA should never use BCMC queue */
6663 if (queue == TX_BCMC_FIFO) {
6664 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6665 "TX_BCMC!\n", wlc->pub->unit, __func__);
6666 frameid = bcmc_fid_generate(wlc, NULL, txh);
6668 /* Increment the counter for first fragment */
6669 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6670 scb->seqnum[p->priority]++;
6672 /* extract fragment number from frame first */
6673 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6674 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6675 h->seq_ctrl = cpu_to_le16(seq);
6677 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6678 (queue & TXFID_QUEUE_MASK);
6681 frameid |= queue & TXFID_QUEUE_MASK;
6683 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6684 if (ieee80211_is_beacon(h->frame_control))
6685 mcl |= TXC_IGNOREPMQ;
6687 txrate[0] = tx_info->control.rates;
6688 txrate[1] = txrate[0] + 1;
6691 * if rate control algorithm didn't give us a fallback
6692 * rate, use the primary rate
6694 if (txrate[1]->idx < 0)
6695 txrate[1] = txrate[0];
6697 for (k = 0; k < hw->max_rates; k++) {
6698 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6700 if ((txrate[k]->idx >= 0)
6701 && (txrate[k]->idx <
6702 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6704 hw->wiphy->bands[tx_info->band]->
6705 bitrates[txrate[k]->idx].hw_value;
6708 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6711 rspec[k] = BRCM_RATE_1M;
6714 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6715 NRATE_MCS_INUSE | txrate[k]->idx);
6719 * Currently only support same setting for primay and
6720 * fallback rates. Unify flags for each rate into a
6721 * single value for the frame
6725 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6728 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6733 * determine and validate primary rate
6734 * and fallback rates
6736 if (!rspec_active(rspec[k])) {
6737 rspec[k] = BRCM_RATE_1M;
6739 if (!is_multicast_ether_addr(h->addr1)) {
6740 /* set tx antenna config */
6741 brcms_c_antsel_antcfg_get(wlc->asi, false,
6742 false, 0, 0, &antcfg, &fbantcfg);
6747 phyctl1_stf = wlc->stf->ss_opmode;
6749 if (wlc->pub->_n_enab & SUPPORT_11N) {
6750 for (k = 0; k < hw->max_rates; k++) {
6752 * apply siso/cdd to single stream mcs's or ofdm
6753 * if rspec is auto selected
6755 if (((is_mcs_rate(rspec[k]) &&
6756 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6757 is_ofdm_rate(rspec[k]))
6758 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6759 || !(rspec[k] & RSPEC_OVERRIDE))) {
6760 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6762 /* For SISO MCS use STBC if possible */
6763 if (is_mcs_rate(rspec[k])
6764 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6767 /* Nss for single stream is always 1 */
6769 rspec[k] |= (PHY_TXC1_MODE_STBC <<
6771 (stc << RSPEC_STC_SHIFT);
6774 (phyctl1_stf << RSPEC_STF_SHIFT);
6778 * Is the phy configured to use 40MHZ frames? If
6779 * so then pick the desired txbw
6781 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6782 /* default txbw is 20in40 SB */
6783 mimo_ctlchbw = mimo_txbw =
6784 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6786 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6788 if (is_mcs_rate(rspec[k])) {
6789 /* mcs 32 must be 40b/w DUP */
6790 if ((rspec[k] & RSPEC_RATE_MASK)
6793 PHY_TXC1_BW_40MHZ_DUP;
6795 } else if (wlc->mimo_40txbw != AUTO)
6796 mimo_txbw = wlc->mimo_40txbw;
6797 /* else check if dst is using 40 Mhz */
6798 else if (scb->flags & SCB_IS40)
6799 mimo_txbw = PHY_TXC1_BW_40MHZ;
6800 } else if (is_ofdm_rate(rspec[k])) {
6801 if (wlc->ofdm_40txbw != AUTO)
6802 mimo_txbw = wlc->ofdm_40txbw;
6803 } else if (wlc->cck_40txbw != AUTO) {
6804 mimo_txbw = wlc->cck_40txbw;
6808 * mcs32 is 40 b/w only.
6809 * This is possible for probe packets on
6812 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6814 rspec[k] = RSPEC_MIMORATE;
6816 mimo_txbw = PHY_TXC1_BW_20MHZ;
6819 /* Set channel width */
6820 rspec[k] &= ~RSPEC_BW_MASK;
6821 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6822 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6824 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6826 /* Disable short GI, not supported yet */
6827 rspec[k] &= ~RSPEC_SHORT_GI;
6829 mimo_preamble_type = BRCMS_MM_PREAMBLE;
6830 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6831 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6833 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6834 && (!is_mcs_rate(rspec[k]))) {
6835 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6836 "RC_MCS != is_mcs_rate(rspec)\n",
6837 wlc->pub->unit, __func__);
6840 if (is_mcs_rate(rspec[k])) {
6841 preamble_type[k] = mimo_preamble_type;
6844 * if SGI is selected, then forced mm
6847 if ((rspec[k] & RSPEC_SHORT_GI)
6848 && is_single_stream(rspec[k] &
6850 preamble_type[k] = BRCMS_MM_PREAMBLE;
6853 /* should be better conditionalized */
6854 if (!is_mcs_rate(rspec[0])
6855 && (tx_info->control.rates[0].
6856 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6857 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6860 for (k = 0; k < hw->max_rates; k++) {
6861 /* Set ctrlchbw as 20Mhz */
6862 rspec[k] &= ~RSPEC_BW_MASK;
6863 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6865 /* for nphy, stf of ofdm frames must follow policies */
6866 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6867 rspec[k] &= ~RSPEC_STF_MASK;
6868 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6873 /* Reset these for use with AMPDU's */
6874 txrate[0]->count = 0;
6875 txrate[1]->count = 0;
6877 /* (2) PROTECTION, may change rspec */
6878 if ((ieee80211_is_data(h->frame_control) ||
6879 ieee80211_is_mgmt(h->frame_control)) &&
6880 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6883 /* (3) PLCP: determine PLCP header and MAC duration,
6884 * fill struct d11txh */
6885 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6886 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6887 memcpy(&txh->FragPLCPFallback,
6888 plcp_fallback, sizeof(txh->FragPLCPFallback));
6890 /* Length field now put in CCK FBR CRC field */
6891 if (is_cck_rate(rspec[1])) {
6892 txh->FragPLCPFallback[4] = phylen & 0xff;
6893 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6896 /* MIMO-RATE: need validation ?? */
6897 mainrates = is_ofdm_rate(rspec[0]) ?
6898 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6901 /* DUR field for main rate */
6902 if (!ieee80211_is_pspoll(h->frame_control) &&
6903 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6905 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6907 h->duration_id = cpu_to_le16(durid);
6908 } else if (use_rifs) {
6909 /* NAV protect to end of next max packet size */
6911 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6913 DOT11_MAX_FRAG_LEN);
6914 durid += RIFS_11N_TIME;
6915 h->duration_id = cpu_to_le16(durid);
6918 /* DUR field for fallback rate */
6919 if (ieee80211_is_pspoll(h->frame_control))
6920 txh->FragDurFallback = h->duration_id;
6921 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6922 txh->FragDurFallback = 0;
6924 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6925 preamble_type[1], next_frag_len);
6926 txh->FragDurFallback = cpu_to_le16(durid);
6929 /* (4) MAC-HDR: MacTxControlLow */
6931 mcl |= TXC_STARTMSDU;
6933 if (!is_multicast_ether_addr(h->addr1))
6934 mcl |= TXC_IMMEDACK;
6936 if (wlc->band->bandtype == BRCM_BAND_5G)
6937 mcl |= TXC_FREQBAND_5G;
6939 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6942 /* set AMIC bit if using hardware TKIP MIC */
6946 txh->MacTxControlLow = cpu_to_le16(mcl);
6948 /* MacTxControlHigh */
6951 /* Set fallback rate preamble type */
6952 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6953 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6954 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6955 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6958 /* MacFrameControl */
6959 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6960 txh->TxFesTimeNormal = cpu_to_le16(0);
6962 txh->TxFesTimeFallback = cpu_to_le16(0);
6965 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6968 txh->TxFrameID = cpu_to_le16(frameid);
6971 * TxStatus, Note the case of recreating the first frag of a suppressed
6972 * frame then we may need to reset the retry cnt's via the status reg
6974 txh->TxStatus = cpu_to_le16(status);
6977 * extra fields for ucode AMPDU aggregation, the new fields are added to
6978 * the END of previous structure so that it's compatible in driver.
6980 txh->MaxNMpdus = cpu_to_le16(0);
6981 txh->MaxABytes_MRT = cpu_to_le16(0);
6982 txh->MaxABytes_FBR = cpu_to_le16(0);
6983 txh->MinMBytes = cpu_to_le16(0);
6985 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
6986 * furnish struct d11txh */
6987 /* RTS PLCP header and RTS frame */
6988 if (use_rts || use_cts) {
6989 if (use_rts && use_cts)
6992 for (k = 0; k < 2; k++) {
6993 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
6998 if (!is_ofdm_rate(rts_rspec[0]) &&
6999 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7000 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7001 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7002 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7005 if (!is_ofdm_rate(rts_rspec[1]) &&
7006 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7007 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7008 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7009 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7012 /* RTS/CTS additions to MacTxControlLow */
7014 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7016 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7017 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7020 /* RTS PLCP header */
7021 rts_plcp = txh->RTSPhyHeader;
7023 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7025 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7027 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7029 /* fallback rate version of RTS PLCP header */
7030 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7032 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7033 sizeof(txh->RTSPLCPFallback));
7035 /* RTS frame fields... */
7036 rts = (struct ieee80211_rts *)&txh->rts_frame;
7038 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7039 rspec[0], rts_preamble_type[0],
7040 preamble_type[0], phylen, false);
7041 rts->duration = cpu_to_le16(durid);
7042 /* fallback rate version of RTS DUR field */
7043 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7044 rts_rspec[1], rspec[1],
7045 rts_preamble_type[1],
7046 preamble_type[1], phylen, false);
7047 txh->RTSDurFallback = cpu_to_le16(durid);
7050 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7051 IEEE80211_STYPE_CTS);
7053 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7055 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7056 IEEE80211_STYPE_RTS);
7058 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7062 * low 8 bits: main frag rate/mcs,
7063 * high 8 bits: rts/cts rate/mcs
7065 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7067 (struct ofdm_phy_hdr *) rts_plcp) :
7070 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7071 memset((char *)&txh->rts_frame, 0,
7072 sizeof(struct ieee80211_rts));
7073 memset((char *)txh->RTSPLCPFallback, 0,
7074 sizeof(txh->RTSPLCPFallback));
7075 txh->RTSDurFallback = 0;
7078 #ifdef SUPPORT_40MHZ
7079 /* add null delimiter count */
7080 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7081 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7082 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7087 * Now that RTS/RTS FB preamble types are updated, write
7090 txh->MacTxControlHigh = cpu_to_le16(mch);
7093 * MainRates (both the rts and frag plcp rates have
7094 * been calculated now)
7096 txh->MainRates = cpu_to_le16(mainrates);
7098 /* XtraFrameTypes */
7099 xfts = frametype(rspec[1], wlc->mimoft);
7100 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7101 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7102 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7104 txh->XtraFrameTypes = cpu_to_le16(xfts);
7106 /* PhyTxControlWord */
7107 phyctl = frametype(rspec[0], wlc->mimoft);
7108 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7109 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7110 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7111 phyctl |= PHY_TXC_SHORT_HDR;
7114 /* phytxant is properly bit shifted */
7115 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7116 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7118 /* PhyTxControlWord_1 */
7119 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7122 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7123 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7124 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7125 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7127 if (use_rts || use_cts) {
7128 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7129 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7130 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7131 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7135 * For mcs frames, if mixedmode(overloaded with long preamble)
7136 * is going to be set, fill in non-zero MModeLen and/or
7137 * MModeFbrLen it will be unnecessary if they are separated
7139 if (is_mcs_rate(rspec[0]) &&
7140 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7142 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7143 txh->MModeLen = cpu_to_le16(mmodelen);
7146 if (is_mcs_rate(rspec[1]) &&
7147 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7149 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7150 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7154 ac = skb_get_queue_mapping(p);
7155 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7156 uint frag_dur, dur, dur_fallback;
7158 /* WME: Update TXOP threshold */
7159 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7161 brcms_c_calc_frame_time(wlc, rspec[0],
7162 preamble_type[0], phylen);
7165 /* 1 RTS or CTS-to-self frame */
7167 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7168 rts_preamble_type[0]);
7170 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7171 rts_preamble_type[1]);
7172 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7173 dur += le16_to_cpu(rts->duration);
7175 le16_to_cpu(txh->RTSDurFallback);
7176 } else if (use_rifs) {
7180 /* frame + SIFS + ACK */
7183 brcms_c_compute_frame_dur(wlc, rspec[0],
7184 preamble_type[0], 0);
7187 brcms_c_calc_frame_time(wlc, rspec[1],
7191 brcms_c_compute_frame_dur(wlc, rspec[1],
7192 preamble_type[1], 0);
7194 /* NEED to set TxFesTimeNormal (hard) */
7195 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7197 * NEED to set fallback rate version of
7198 * TxFesTimeNormal (hard)
7200 txh->TxFesTimeFallback =
7201 cpu_to_le16((u16) dur_fallback);
7204 * update txop byte threshold (txop minus intraframe
7207 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7211 brcms_c_calc_frame_len(wlc,
7212 rspec[0], preamble_type[0],
7213 (wlc->edcf_txop[ac] -
7215 /* range bound the fragthreshold */
7216 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7219 else if (newfragthresh >
7220 wlc->usr_fragthresh)
7222 wlc->usr_fragthresh;
7223 /* update the fragthresh and do txc update */
7224 if (wlc->fragthresh[queue] !=
7225 (u16) newfragthresh)
7226 wlc->fragthresh[queue] =
7227 (u16) newfragthresh;
7229 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7231 wlc->pub->unit, fifo_names[queue],
7232 rspec2rate(rspec[0]));
7235 if (dur > wlc->edcf_txop[ac])
7236 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7237 "exceeded phylen %d/%d dur %d/%d\n",
7238 wlc->pub->unit, __func__,
7240 phylen, wlc->fragthresh[queue],
7241 dur, wlc->edcf_txop[ac]);
7248 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7249 struct ieee80211_hw *hw)
7253 struct scb *scb = &wlc->pri_scb;
7254 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7257 * 802.11 standard requires management traffic
7258 * to go at highest priority
7260 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7262 fifo = prio2fifo[prio];
7263 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7265 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7266 brcms_c_send_q(wlc);
7269 void brcms_c_send_q(struct brcms_c_info *wlc)
7271 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7274 int err = 0, i, count;
7276 struct brcms_txq_info *qi = wlc->pkt_queue;
7277 struct pktq *q = &qi->q;
7278 struct ieee80211_tx_info *tx_info;
7280 prec_map = wlc->tx_prec_map;
7282 /* Send all the enq'd pkts that we can.
7283 * Dequeue packets with precedence with empty HW fifo only
7285 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7286 tx_info = IEEE80211_SKB_CB(pkt[0]);
7287 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7288 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7291 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7293 for (i = 0; i < count; i++)
7294 brcms_c_txfifo(wlc, fifo, pkt[i], true);
7298 if (err == -EBUSY) {
7299 brcmu_pktq_penq_head(q, prec, pkt[0]);
7301 * If send failed due to any other reason than a
7302 * change in HW FIFO condition, quit. Otherwise,
7303 * read the new prec_map!
7305 if (prec_map == wlc->tx_prec_map)
7307 prec_map = wlc->tx_prec_map;
7313 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7316 u16 frameid = INVALIDFID;
7319 txh = (struct d11txh *) (p->data);
7321 /* When a BC/MC frame is being committed to the BCMC fifo
7322 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7324 if (fifo == TX_BCMC_FIFO)
7325 frameid = le16_to_cpu(txh->TxFrameID);
7328 * Bump up pending count for if not using rpc. If rpc is
7329 * used, this will be handled in brcms_b_txfifo()
7332 wlc->core->txpktpend[fifo] += 1;
7333 BCMMSG(wlc->wiphy, "pktpend inc 1 to %d\n",
7334 wlc->core->txpktpend[fifo]);
7337 /* Commit BCMC sequence number in the SHM frame ID location */
7338 if (frameid != INVALIDFID) {
7340 * To inform the ucode of the last mcast frame posted
7341 * so that it can clear moredata bit
7343 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7346 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7347 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7351 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7352 bool use_rspec, u16 mimo_ctlchbw)
7357 /* use frame rate as rts rate */
7359 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7360 /* Use 11Mbps as the g protection RTS target rate and fallback.
7361 * Use the brcms_basic_rate() lookup to find the best basic rate
7362 * under the target in case 11 Mbps is not Basic.
7363 * 6 and 9 Mbps are not usually selected by rate selection, but
7364 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7367 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7369 /* calculate RTS rate and fallback rate based on the frame rate
7370 * RTS must be sent at a basic rate since it is a
7371 * control frame, sec 9.6 of 802.11 spec
7373 rts_rspec = brcms_basic_rate(wlc, rspec);
7375 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7376 /* set rts txbw to correct side band */
7377 rts_rspec &= ~RSPEC_BW_MASK;
7380 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7381 * 20MHz channel (DUP), otherwise send RTS on control channel
7383 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7384 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7386 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7388 /* pick siso/cdd as default for ofdm */
7389 if (is_ofdm_rate(rts_rspec)) {
7390 rts_rspec &= ~RSPEC_STF_MASK;
7391 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7398 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo)
7400 wlc->core->txpktpend[fifo] -= 1;
7401 BCMMSG(wlc->wiphy, "pktpend dec 1 to %d\n",
7402 wlc->core->txpktpend[fifo]);
7404 /* There is more room; mark precedences related to this FIFO sendable */
7405 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7407 /* figure out which bsscfg is being worked on... */
7410 /* Update beacon listen interval in shared memory */
7411 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7413 /* wake up every DTIM is the default */
7414 if (wlc->bcn_li_dtim == 1)
7415 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7417 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7418 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7422 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7425 struct bcma_device *core = wlc_hw->d11core;
7427 /* read the tsf timer low, then high to get an atomic read */
7428 *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7429 *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7433 * recover 64bit TSF value from the 16bit TSF value in the rx header
7434 * given the assumption that the TSF passed in header is within 65ms
7435 * of the current tsf.
7438 * 3.......6.......8.......0.......2.......4.......6.......8......0
7439 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7441 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7442 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7443 * receive call sequence after rx interrupt. Only the higher 16 bits
7444 * are used. Finally, the tsf_h is read from the tsf register.
7446 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7447 struct d11rxhdr *rxh)
7450 u16 rx_tsf_0_15, rx_tsf_16_31;
7452 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7454 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7455 rx_tsf_0_15 = rxh->RxTSFTime;
7458 * a greater tsf time indicates the low 16 bits of
7459 * tsf_l wrapped, so decrement the high 16 bits.
7461 if ((u16)tsf_l < rx_tsf_0_15) {
7463 if (rx_tsf_16_31 == 0xffff)
7467 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7471 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7473 struct ieee80211_rx_status *rx_status)
7478 unsigned char *plcp;
7480 /* fill in TSF and flag its presence */
7481 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7482 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7484 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7487 channel > 14 ? IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
7489 ieee80211_channel_to_frequency(channel, rx_status->band);
7491 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7495 rx_status->antenna =
7496 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7500 rspec = brcms_c_compute_rspec(rxh, plcp);
7501 if (is_mcs_rate(rspec)) {
7502 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7503 rx_status->flag |= RX_FLAG_HT;
7504 if (rspec_is40mhz(rspec))
7505 rx_status->flag |= RX_FLAG_40MHZ;
7507 switch (rspec2rate(rspec)) {
7509 rx_status->rate_idx = 0;
7512 rx_status->rate_idx = 1;
7515 rx_status->rate_idx = 2;
7518 rx_status->rate_idx = 3;
7521 rx_status->rate_idx = 4;
7524 rx_status->rate_idx = 5;
7527 rx_status->rate_idx = 6;
7530 rx_status->rate_idx = 7;
7533 rx_status->rate_idx = 8;
7536 rx_status->rate_idx = 9;
7539 rx_status->rate_idx = 10;
7542 rx_status->rate_idx = 11;
7545 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7549 * For 5GHz, we should decrease the index as it is
7550 * a subset of the 2.4G rates. See bitrates field
7551 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7553 if (rx_status->band == IEEE80211_BAND_5GHZ)
7554 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7556 /* Determine short preamble and rate_idx */
7558 if (is_cck_rate(rspec)) {
7559 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7560 rx_status->flag |= RX_FLAG_SHORTPRE;
7561 } else if (is_ofdm_rate(rspec)) {
7562 rx_status->flag |= RX_FLAG_SHORTPRE;
7564 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7569 if (plcp3_issgi(plcp[3]))
7570 rx_status->flag |= RX_FLAG_SHORT_GI;
7572 if (rxh->RxStatus1 & RXS_DECERR) {
7573 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7574 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7577 if (rxh->RxStatus1 & RXS_FCSERR) {
7578 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7579 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7585 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7589 struct ieee80211_rx_status rx_status;
7590 struct ieee80211_hdr *hdr;
7592 memset(&rx_status, 0, sizeof(rx_status));
7593 prep_mac80211_status(wlc, rxh, p, &rx_status);
7595 /* mac header+body length, exclude CRC and plcp header */
7596 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7597 skb_pull(p, D11_PHY_HDR_LEN);
7598 __skb_trim(p, len_mpdu);
7600 /* unmute transmit */
7601 if (wlc->hw->suspended_fifos) {
7602 hdr = (struct ieee80211_hdr *)p->data;
7603 if (ieee80211_is_beacon(hdr->frame_control))
7604 brcms_b_mute(wlc->hw, false);
7607 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7608 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7611 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7612 * number of bytes goes in the length field
7614 * Formula given by HT PHY Spec v 1.13
7615 * len = 3(nsyms + nstream + 3) - 3
7618 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7621 uint nsyms, len = 0, kNdps;
7623 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7624 wlc->pub->unit, rspec2rate(ratespec), mac_len);
7626 if (is_mcs_rate(ratespec)) {
7627 uint mcs = ratespec & RSPEC_RATE_MASK;
7628 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7629 rspec_stc(ratespec);
7632 * the payload duration calculation matches that
7635 /* 1000Ndbps = kbps * 4 */
7636 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7637 rspec_issgi(ratespec)) * 4;
7639 if (rspec_stc(ratespec) == 0)
7641 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7642 APHY_TAIL_NBITS) * 1000, kNdps);
7644 /* STBC needs to have even number of symbols */
7647 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7648 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7650 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7651 nsyms += (tot_streams + 3);
7653 * 3 bytes/symbol @ legacy 6Mbps rate
7654 * (-3) excluding service bits and tail bits
7656 len = (3 * nsyms) - 3;
7663 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7665 const struct brcms_c_rateset *rs_dflt;
7666 struct brcms_c_rateset rs;
7669 u8 plcp[D11_PHY_HDR_LEN];
7673 sifs = get_sifs(wlc->band);
7675 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7677 brcms_c_rateset_copy(rs_dflt, &rs);
7678 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7681 * walk the phy rate table and update MAC core SHM
7682 * basic rate table entries
7684 for (i = 0; i < rs.count; i++) {
7685 rate = rs.rates[i] & BRCMS_RATE_MASK;
7687 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7689 /* Calculate the Probe Response PLCP for the given rate */
7690 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7693 * Calculate the duration of the Probe Response
7694 * frame plus SIFS for the MAC
7696 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7697 BRCMS_LONG_PREAMBLE, frame_len);
7700 /* Update the SHM Rate Table entry Probe Response values */
7701 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7702 (u16) (plcp[0] + (plcp[1] << 8)));
7703 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7704 (u16) (plcp[2] + (plcp[3] << 8)));
7705 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7709 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
7711 * PLCP header is 6 bytes.
7712 * 802.11 A3 header is 24 bytes.
7713 * Max beacon frame body template length is 112 bytes.
7714 * Max probe resp frame body template length is 110 bytes.
7716 * *len on input contains the max length of the packet available.
7718 * The *len value is set to the number of bytes in buf used, and starts
7719 * with the PLCP and included up to, but not including, the 4 byte FCS.
7722 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7724 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7726 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7727 struct cck_phy_hdr *plcp;
7728 struct ieee80211_mgmt *h;
7729 int hdr_len, body_len;
7731 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7733 /* calc buffer size provided for frame body */
7734 body_len = *len - hdr_len;
7735 /* return actual size */
7736 *len = hdr_len + body_len;
7738 /* format PHY and MAC headers */
7739 memset((char *)buf, 0, hdr_len);
7741 plcp = (struct cck_phy_hdr *) buf;
7744 * PLCP for Probe Response frames are filled in from
7747 if (type == IEEE80211_STYPE_BEACON)
7749 brcms_c_compute_plcp(wlc, bcn_rspec,
7750 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7753 /* "Regular" and 16 MBSS but not for 4 MBSS */
7754 /* Update the phytxctl for the beacon based on the rspec */
7755 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7757 h = (struct ieee80211_mgmt *)&plcp[1];
7759 /* fill in 802.11 header */
7760 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7762 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7763 /* A1 filled in by MAC for prb resp, broadcast for bcn */
7764 if (type == IEEE80211_STYPE_BEACON)
7765 memcpy(&h->da, ðer_bcast, ETH_ALEN);
7766 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7767 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7769 /* SEQ filled in by MAC */
7772 int brcms_c_get_header_len(void)
7778 * Update all beacons for the system.
7780 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7782 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7784 if (bsscfg->up && !bsscfg->BSS)
7785 /* Clear the soft intmask */
7786 wlc->defmacintmask &= ~MI_BCNTPL;
7789 /* Write ssid into shared memory */
7791 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7793 u8 *ssidptr = cfg->SSID;
7795 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7797 /* padding the ssid with zero and copy it into shm */
7798 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7799 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7801 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7802 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7806 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7807 struct brcms_bss_cfg *cfg,
7810 u16 prb_resp[BCN_TMPL_LEN / 2];
7811 int len = BCN_TMPL_LEN;
7814 * write the probe response to hardware, or save in
7815 * the config structure
7818 /* create the probe response template */
7819 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7820 cfg, prb_resp, &len);
7823 brcms_c_suspend_mac_and_wait(wlc);
7825 /* write the probe response into the template region */
7826 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7827 (len + 3) & ~3, prb_resp);
7829 /* write the length of the probe response frame (+PLCP/-FCS) */
7830 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7832 /* write the SSID and SSID length */
7833 brcms_c_shm_ssid_upd(wlc, cfg);
7836 * Write PLCP headers and durations for probe response frames
7837 * at all rates. Use the actual frame length covered by the
7838 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7839 * by subtracting the PLCP len and adding the FCS.
7841 len += (-D11_PHY_HDR_LEN + FCS_LEN);
7842 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7845 brcms_c_enable_mac(wlc);
7848 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7850 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7852 /* update AP or IBSS probe responses */
7853 if (bsscfg->up && !bsscfg->BSS)
7854 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7857 /* prepares pdu for transmission. returns BCM error codes */
7858 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7862 struct ieee80211_hdr *h;
7865 txh = (struct d11txh *) (pdu->data);
7866 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7868 /* get the pkt queue info. This was put at brcms_c_sendctl or
7869 * brcms_c_send for PDU */
7870 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7876 /* return if insufficient dma resources */
7877 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7878 /* Mark precedences related to this FIFO, unsendable */
7879 /* A fifo is full. Clear precedences related to that FIFO */
7880 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7886 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7892 *blocks = wlc_hw->xmtfifo_sz[fifo];
7898 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7901 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7902 if (match_reg_offset == RCM_BSSID_OFFSET)
7903 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7907 * Flag 'scan in progress' to withhold dynamic phy calibration
7909 void brcms_c_scan_start(struct brcms_c_info *wlc)
7911 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7914 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7916 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7919 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7921 wlc->pub->associated = state;
7922 wlc->bsscfg->associated = state;
7926 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7927 * AMPDU traffic, packets pending in hardware have to be invalidated so that
7928 * when later on hardware releases them, they can be handled appropriately.
7930 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7931 struct ieee80211_sta *sta,
7932 void (*dma_callback_fn))
7934 struct dma_pub *dmah;
7936 for (i = 0; i < NFIFO; i++) {
7939 dma_walk_packets(dmah, dma_callback_fn, sta);
7943 int brcms_c_get_curband(struct brcms_c_info *wlc)
7945 return wlc->band->bandunit;
7948 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7952 /* flush packet queue when requested */
7954 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
7956 /* wait for queue and DMA fifos to run dry */
7957 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) {
7958 brcms_msleep(wlc->wl, 1);
7964 WARN_ON_ONCE(timeout == 0);
7967 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
7969 wlc->bcn_li_bcn = interval;
7971 brcms_c_bcn_li_upd(wlc);
7974 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
7978 /* Remove override bit and clip to max qdbm value */
7979 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
7980 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
7983 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
7988 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
7990 /* Return qdbm units */
7991 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
7994 /* Process received frames */
7996 * Return true if more frames need to be processed. false otherwise.
7997 * Param 'bound' indicates max. # frames to process before break out.
7999 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8001 struct d11rxhdr *rxh;
8002 struct ieee80211_hdr *h;
8006 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8008 /* frame starts with rxhdr */
8009 rxh = (struct d11rxhdr *) (p->data);
8011 /* strip off rxhdr */
8012 skb_pull(p, BRCMS_HWRXOFF);
8014 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8015 if (rxh->RxStatus1 & RXS_PBPRES) {
8017 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8018 "len %d\n", wlc->pub->unit, p->len);
8024 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8027 if (rxh->RxStatus1 & RXS_FCSERR) {
8028 if (!(wlc->filter_flags & FIF_FCSFAIL))
8032 /* check received pkt has at least frame control field */
8033 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8036 /* not supporting A-MSDU */
8037 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8041 brcms_c_recvctl(wlc, rxh, p);
8045 brcmu_pkt_buf_free_skb(p);
8048 /* Process received frames */
8050 * Return true if more frames need to be processed. false otherwise.
8051 * Param 'bound' indicates max. # frames to process before break out.
8054 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8057 struct sk_buff *next = NULL;
8058 struct sk_buff_head recv_frames;
8061 uint bound_limit = bound ? RXBND : -1;
8063 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8064 skb_queue_head_init(&recv_frames);
8066 /* gather received frames */
8067 while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
8069 /* !give others some time to run! */
8070 if (++n >= bound_limit)
8074 /* post more rbufs */
8075 dma_rxfill(wlc_hw->di[fifo]);
8077 /* process each frame */
8078 skb_queue_walk_safe(&recv_frames, p, next) {
8079 struct d11rxhdr_le *rxh_le;
8080 struct d11rxhdr *rxh;
8082 skb_unlink(p, &recv_frames);
8083 rxh_le = (struct d11rxhdr_le *)p->data;
8084 rxh = (struct d11rxhdr *)p->data;
8086 /* fixup rx header endianness */
8087 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8088 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8089 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8090 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8091 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8092 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8093 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8094 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8095 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8096 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8097 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8099 brcms_c_recv(wlc_hw->wlc, p);
8102 return n >= bound_limit;
8105 /* second-level interrupt processing
8106 * Return true if another dpc needs to be re-scheduled. false otherwise.
8107 * Param 'bounded' indicates if applicable loops should be bounded.
8109 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8112 struct brcms_hardware *wlc_hw = wlc->hw;
8113 struct bcma_device *core = wlc_hw->d11core;
8114 struct wiphy *wiphy = wlc->wiphy;
8116 if (brcms_deviceremoved(wlc)) {
8117 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8119 brcms_down(wlc->wl);
8123 /* grab and clear the saved software intstatus bits */
8124 macintstatus = wlc->macintstatus;
8125 wlc->macintstatus = 0;
8127 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8128 wlc_hw->unit, macintstatus);
8130 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8133 if (macintstatus & MI_TFS) {
8135 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8136 wlc->macintstatus |= MI_TFS;
8138 wiphy_err(wiphy, "MI_TFS: fatal\n");
8143 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8146 /* ATIM window end */
8147 if (macintstatus & MI_ATIMWINEND) {
8148 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8149 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
8154 * received data or control frame, MI_DMAINT is
8155 * indication of RX_FIFO interrupt
8157 if (macintstatus & MI_DMAINT)
8158 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8159 wlc->macintstatus |= MI_DMAINT;
8161 /* noise sample collected */
8162 if (macintstatus & MI_BG_NOISE)
8163 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8165 if (macintstatus & MI_GP0) {
8166 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8167 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8169 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8170 __func__, ai_get_chip_id(wlc_hw->sih),
8171 ai_get_chiprev(wlc_hw->sih));
8172 brcms_fatal_error(wlc_hw->wlc->wl);
8175 /* gptimer timeout */
8176 if (macintstatus & MI_TO)
8177 bcma_write32(core, D11REGOFFS(gptimer), 0);
8179 if (macintstatus & MI_RFDISABLE) {
8180 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8181 " RF Disable Input\n", wlc_hw->unit);
8182 brcms_rfkill_set_hw_state(wlc->wl);
8185 /* send any enq'd tx packets. Just makes sure to jump start tx */
8186 if (!pktq_empty(&wlc->pkt_queue->q))
8187 brcms_c_send_q(wlc);
8189 /* it isn't done and needs to be resched if macintstatus is non-zero */
8190 return wlc->macintstatus != 0;
8193 brcms_fatal_error(wlc_hw->wlc->wl);
8194 return wlc->macintstatus != 0;
8197 void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8199 struct bcma_device *core = wlc->hw->d11core;
8200 struct ieee80211_channel *ch = wlc->pub->ieee_hw->conf.channel;
8203 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8205 chanspec = ch20mhz_chspec(ch->hw_value);
8207 brcms_b_init(wlc->hw, chanspec);
8209 /* update beacon listen interval */
8210 brcms_c_bcn_li_upd(wlc);
8212 /* write ethernet address to core */
8213 brcms_c_set_mac(wlc->bsscfg);
8214 brcms_c_set_bssid(wlc->bsscfg);
8216 /* Update tsf_cfprep if associated and up */
8217 if (wlc->pub->associated && wlc->bsscfg->up) {
8220 /* get beacon period and convert to uS */
8221 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8223 * update since init path would reset
8226 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8227 bi << CFPREP_CBI_SHIFT);
8229 /* Update maccontrol PM related bits */
8230 brcms_c_set_ps_ctrl(wlc);
8233 brcms_c_bandinit_ordered(wlc, chanspec);
8235 /* init probe response timeout */
8236 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8238 /* init max burst txop (framebursting) */
8239 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8241 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8243 /* initialize maximum allowed duty cycle */
8244 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8245 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8248 * Update some shared memory locations related to
8249 * max AMPDU size allowed to received
8251 brcms_c_ampdu_shm_upd(wlc->ampdu);
8253 /* band-specific inits */
8254 brcms_c_bsinit(wlc);
8256 /* Enable EDCF mode (while the MAC is suspended) */
8257 bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8258 brcms_c_edcf_setparams(wlc, false);
8260 /* Init precedence maps for empty FIFOs */
8261 brcms_c_tx_prec_map_init(wlc);
8263 /* read the ucode version if we have not yet done so */
8264 if (wlc->ucode_rev == 0) {
8266 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8267 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8270 /* ..now really unleash hell (allow the MAC out of suspend) */
8271 brcms_c_enable_mac(wlc);
8273 /* suspend the tx fifos and mute the phy for preism cac time */
8275 brcms_b_mute(wlc->hw, true);
8277 /* enable the RF Disable Delay timer */
8278 bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8281 * Initialize WME parameters; if they haven't been set by some other
8282 * mechanism (IOVar, etc) then read them from the hardware.
8284 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8285 /* Uninitialized; read from HW */
8288 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8289 wlc->wme_retries[ac] =
8290 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8295 * The common driver entry routine. Error codes should be unique
8297 struct brcms_c_info *
8298 brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8299 bool piomode, uint *perr)
8301 struct brcms_c_info *wlc;
8304 struct brcms_pub *pub;
8306 /* allocate struct brcms_c_info state and its substructures */
8307 wlc = brcms_c_attach_malloc(unit, &err, 0);
8310 wlc->wiphy = wl->wiphy;
8317 wlc->band = wlc->bandstate[0];
8318 wlc->core = wlc->corestate;
8321 pub->_piomode = piomode;
8322 wlc->bandinit_pending = false;
8324 /* populate struct brcms_c_info with default values */
8325 brcms_c_info_init(wlc, unit);
8327 /* update sta/ap related parameters */
8328 brcms_c_ap_upd(wlc);
8331 * low level attach steps(all hw accesses go
8332 * inside, no more in rest of the attach)
8334 err = brcms_b_attach(wlc, core, unit, piomode);
8338 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8340 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8342 /* disable allowed duty cycle */
8343 wlc->tx_duty_cycle_ofdm = 0;
8344 wlc->tx_duty_cycle_cck = 0;
8346 brcms_c_stf_phy_chain_calc(wlc);
8348 /* txchain 1: txant 0, txchain 2: txant 1 */
8349 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8350 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8352 /* push to BMAC driver */
8353 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8354 wlc->stf->hw_rxchain);
8356 /* pull up some info resulting from the low attach */
8357 for (i = 0; i < NFIFO; i++)
8358 wlc->core->txavail[i] = wlc->hw->txavail[i];
8360 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8361 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8363 for (j = 0; j < wlc->pub->_nbands; j++) {
8364 wlc->band = wlc->bandstate[j];
8366 if (!brcms_c_attach_stf_ant_init(wlc)) {
8371 /* default contention windows size limits */
8372 wlc->band->CWmin = APHY_CWMIN;
8373 wlc->band->CWmax = PHY_CWMAX;
8375 /* init gmode value */
8376 if (wlc->band->bandtype == BRCM_BAND_2G) {
8377 wlc->band->gmode = GMODE_AUTO;
8378 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8382 /* init _n_enab supported mode */
8383 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8384 pub->_n_enab = SUPPORT_11N;
8385 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8387 SUPPORT_11N) ? WL_11N_2x2 :
8391 /* init per-band default rateset, depend on band->gmode */
8392 brcms_default_rateset(wlc, &wlc->band->defrateset);
8394 /* fill in hw_rateset */
8395 brcms_c_rateset_filter(&wlc->band->defrateset,
8396 &wlc->band->hw_rateset, false,
8397 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8398 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8402 * update antenna config due to
8403 * wlc->stf->txant/txchain/ant_rx_ovr change
8405 brcms_c_stf_phy_txant_upd(wlc);
8407 /* attach each modules */
8408 err = brcms_c_attach_module(wlc);
8412 if (!brcms_c_timers_init(wlc, unit)) {
8413 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8419 /* depend on rateset, gmode */
8420 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8422 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8423 "\n", unit, __func__);
8428 /* init default when all parameters are ready, i.e. ->rateset */
8429 brcms_c_bss_default_init(wlc);
8432 * Complete the wlc default state initializations..
8435 /* allocate our initial queue */
8436 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8437 if (wlc->pkt_queue == NULL) {
8438 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8444 wlc->bsscfg->wlc = wlc;
8446 wlc->mimoft = FT_HT;
8447 wlc->mimo_40txbw = AUTO;
8448 wlc->ofdm_40txbw = AUTO;
8449 wlc->cck_40txbw = AUTO;
8450 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8452 /* Set default values of SGI */
8453 if (BRCMS_SGI_CAP_PHY(wlc)) {
8454 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8456 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8457 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8460 brcms_c_ht_update_sgi_rx(wlc, 0);
8463 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8471 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8472 unit, __func__, err);
8474 brcms_c_detach(wlc);