2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/pci_ids.h>
20 #include <linux/if_ether.h>
21 #include <net/cfg80211.h>
22 #include <net/mac80211.h>
23 #include <brcm_hw_ids.h>
25 #include <chipcommon.h>
28 #include "phy/phy_hal.h"
33 #include "mac80211_if.h"
34 #include "ucode_loader.h"
39 /* watchdog timer, in unit of ms */
40 #define TIMER_INTERVAL_WATCHDOG 1000
41 /* radio monitor timer, in unit of ms */
42 #define TIMER_INTERVAL_RADIOCHK 800
44 /* beacon interval, in unit of 1024TU */
45 #define BEACON_INTERVAL_DEFAULT 100
47 /* n-mode support capability */
48 /* 2x2 includes both 1x1 & 2x2 devices
49 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
50 * control it independently
56 #define EDCF_ACI_MASK 0x60
57 #define EDCF_ACI_SHIFT 5
58 #define EDCF_ECWMIN_MASK 0x0f
59 #define EDCF_ECWMAX_SHIFT 4
60 #define EDCF_AIFSN_MASK 0x0f
61 #define EDCF_AIFSN_MAX 15
62 #define EDCF_ECWMAX_MASK 0xf0
64 #define EDCF_AC_BE_TXOP_STA 0x0000
65 #define EDCF_AC_BK_TXOP_STA 0x0000
66 #define EDCF_AC_VO_ACI_STA 0x62
67 #define EDCF_AC_VO_ECW_STA 0x32
68 #define EDCF_AC_VI_ACI_STA 0x42
69 #define EDCF_AC_VI_ECW_STA 0x43
70 #define EDCF_AC_BK_ECW_STA 0xA4
71 #define EDCF_AC_VI_TXOP_STA 0x005e
72 #define EDCF_AC_VO_TXOP_STA 0x002f
73 #define EDCF_AC_BE_ACI_STA 0x03
74 #define EDCF_AC_BE_ECW_STA 0xA4
75 #define EDCF_AC_BK_ACI_STA 0x27
76 #define EDCF_AC_VO_TXOP_AP 0x002f
78 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
79 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
81 #define APHY_SYMBOL_TIME 4
82 #define APHY_PREAMBLE_TIME 16
83 #define APHY_SIGNAL_TIME 4
84 #define APHY_SIFS_TIME 16
85 #define APHY_SERVICE_NBITS 16
86 #define APHY_TAIL_NBITS 6
87 #define BPHY_SIFS_TIME 10
88 #define BPHY_PLCP_SHORT_TIME 96
90 #define PREN_PREAMBLE 24
91 #define PREN_MM_EXT 12
92 #define PREN_PREAMBLE_EXT 4
94 #define DOT11_MAC_HDR_LEN 24
95 #define DOT11_ACK_LEN 10
96 #define DOT11_BA_LEN 4
97 #define DOT11_OFDM_SIGNAL_EXTENSION 6
98 #define DOT11_MIN_FRAG_LEN 256
99 #define DOT11_RTS_LEN 16
100 #define DOT11_CTS_LEN 10
101 #define DOT11_BA_BITMAP_LEN 128
102 #define DOT11_MIN_BEACON_PERIOD 1
103 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
104 #define DOT11_MAXNUMFRAGS 16
105 #define DOT11_MAX_FRAG_LEN 2346
107 #define BPHY_PLCP_TIME 192
108 #define RIFS_11N_TIME 2
110 /* length of the BCN template area */
111 #define BCN_TMPL_LEN 512
113 /* brcms_bss_info flag bit values */
114 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
116 /* chip rx buffer offset */
117 #define BRCMS_HWRXOFF 38
119 /* rfdisable delay timer 500 ms, runs of ALP clock */
120 #define RFDISABLE_DEFAULT 10000000
122 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
124 /* precedences numbers for wlc queues. These are twice as may levels as
126 * Odd numbers are used for HI priority traffic at same precedence levels
127 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
130 #define _BRCMS_PREC_NONE 0 /* None = - */
131 #define _BRCMS_PREC_BK 2 /* BK - Background */
132 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
133 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
134 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
135 #define _BRCMS_PREC_VI 10 /* Vi - Video */
136 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
137 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
139 /* synthpu_dly times in us */
140 #define SYNTHPU_DLY_APHY_US 3700
141 #define SYNTHPU_DLY_BPHY_US 1050
142 #define SYNTHPU_DLY_NPHY_US 2048
143 #define SYNTHPU_DLY_LPPHY_US 300
145 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */
147 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
148 #define EDCF_SHORT_S 0
150 #define EDCF_LONG_S 8
151 #define EDCF_LFB_S 12
152 #define EDCF_SHORT_M BITFIELD_MASK(4)
153 #define EDCF_SFB_M BITFIELD_MASK(4)
154 #define EDCF_LONG_M BITFIELD_MASK(4)
155 #define EDCF_LFB_M BITFIELD_MASK(4)
157 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
158 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
159 #define RETRY_LONG_DEF 4 /* Default Long retry count */
160 #define RETRY_SHORT_FB 3 /* Short count for fb rate */
161 #define RETRY_LONG_FB 2 /* Long count for fb rate */
163 #define APHY_CWMIN 15
164 #define PHY_CWMAX 1023
166 #define EDCF_AIFSN_MIN 1
168 #define FRAGNUM_MASK 0xF
170 #define APHY_SLOT_TIME 9
171 #define BPHY_SLOT_TIME 20
173 #define WL_SPURAVOID_OFF 0
174 #define WL_SPURAVOID_ON1 1
175 #define WL_SPURAVOID_ON2 2
177 /* invalid core flags, use the saved coreflags */
178 #define BRCMS_USE_COREFLAGS 0xffffffff
180 /* values for PLCPHdr_override */
181 #define BRCMS_PLCP_AUTO -1
182 #define BRCMS_PLCP_SHORT 0
183 #define BRCMS_PLCP_LONG 1
185 /* values for g_protection_override and n_protection_override */
186 #define BRCMS_PROTECTION_AUTO -1
187 #define BRCMS_PROTECTION_OFF 0
188 #define BRCMS_PROTECTION_ON 1
189 #define BRCMS_PROTECTION_MMHDR_ONLY 2
190 #define BRCMS_PROTECTION_CTS_ONLY 3
192 /* values for g_protection_control and n_protection_control */
193 #define BRCMS_PROTECTION_CTL_OFF 0
194 #define BRCMS_PROTECTION_CTL_LOCAL 1
195 #define BRCMS_PROTECTION_CTL_OVERLAP 2
197 /* values for n_protection */
198 #define BRCMS_N_PROTECTION_OFF 0
199 #define BRCMS_N_PROTECTION_OPTIONAL 1
200 #define BRCMS_N_PROTECTION_20IN40 2
201 #define BRCMS_N_PROTECTION_MIXEDMODE 3
203 /* values for band specific 40MHz capabilities */
204 #define BRCMS_N_BW_20ALL 0
205 #define BRCMS_N_BW_40ALL 1
206 #define BRCMS_N_BW_20IN2G_40IN5G 2
208 /* bitflags for SGI support (sgi_rx iovar) */
209 #define BRCMS_N_SGI_20 0x01
210 #define BRCMS_N_SGI_40 0x02
212 /* defines used by the nrate iovar */
213 /* MSC in use,indicates b0-6 holds an mcs */
214 #define NRATE_MCS_INUSE 0x00000080
216 #define NRATE_RATE_MASK 0x0000007f
217 /* stf mode mask: siso, cdd, stbc, sdm */
218 #define NRATE_STF_MASK 0x0000ff00
220 #define NRATE_STF_SHIFT 8
221 /* bit indicate to override mcs only */
222 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
223 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
224 #define NRATE_SGI_SHIFT 23 /* sgi mode */
225 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
226 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
228 #define NRATE_STF_SISO 0 /* stf mode SISO */
229 #define NRATE_STF_CDD 1 /* stf mode CDD */
230 #define NRATE_STF_STBC 2 /* stf mode STBC */
231 #define NRATE_STF_SDM 3 /* stf mode SDM */
233 #define MAX_DMA_SEGS 4
235 /* # of entries in Tx FIFO */
237 /* Max # of entries in Rx FIFO based on 4kb page size */
240 /* Amount of headroom to leave in Tx FIFO */
241 #define TX_HEADROOM 4
243 /* try to keep this # rbufs posted to the chip */
244 #define NRXBUFPOST 32
246 /* max # frames to process in brcms_c_recv() */
248 /* max # tx status to process in wlc_txstatus() */
251 /* brcmu_format_flags() bit description structure */
252 struct brcms_c_bit_desc {
258 * The following table lists the buffer memory allocated to xmt fifos in HW.
259 * the size is in units of 256bytes(one block), total size is HW dependent
260 * ucode has default fifo partition, sw can overwrite if necessary
262 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
263 * the twiki is updated before making changes.
266 /* Starting corerev for the fifo size table */
267 #define XMTFIFOTBL_STARTREV 17
275 struct edcf_acparam {
284 /* TX FIFO number to WME/802.1E Access Category */
285 static const u8 wme_fifo2ac[] = {
294 /* ieee80211 Access Category to TX FIFO number */
295 static const u8 wme_ac2fifo[] = {
302 /* 802.1D Priority to precedence queue mapping */
303 const u8 wlc_prio2prec_map[] = {
304 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
305 _BRCMS_PREC_BK, /* 1 BK - Background */
306 _BRCMS_PREC_NONE, /* 2 None = - */
307 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
308 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
309 _BRCMS_PREC_VI, /* 5 Vi - Video */
310 _BRCMS_PREC_VO, /* 6 Vo - Voice */
311 _BRCMS_PREC_NC, /* 7 NC - Network Control */
314 static const u16 xmtfifo_sz[][NFIFO] = {
315 /* corerev 17: 5120, 49152, 49152, 5376, 4352, 1280 */
316 {20, 192, 192, 21, 17, 5},
321 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
322 {20, 192, 192, 21, 17, 5},
323 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
324 {9, 58, 22, 14, 14, 5},
325 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
326 {20, 192, 192, 21, 17, 5},
327 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
328 {20, 192, 192, 21, 17, 5},
329 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
330 {9, 58, 22, 14, 14, 5},
337 /* corerev 28: 2304, 14848, 5632, 3584, 3584, 1280 */
338 {9, 58, 22, 14, 14, 5},
342 static const char * const fifo_names[] = {
343 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
345 static const char fifo_names[6][0];
349 /* pointer to most recently allocated wl/wlc */
350 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
353 /* Mapping of ieee80211 AC numbers to tx fifos */
354 static const u8 ac_to_fifo_mapping[IEEE80211_NUM_ACS] = {
355 [IEEE80211_AC_VO] = TX_AC_VO_FIFO,
356 [IEEE80211_AC_VI] = TX_AC_VI_FIFO,
357 [IEEE80211_AC_BE] = TX_AC_BE_FIFO,
358 [IEEE80211_AC_BK] = TX_AC_BK_FIFO,
361 /* Mapping of tx fifos to ieee80211 AC numbers */
362 static const u8 fifo_to_ac_mapping[IEEE80211_NUM_ACS] = {
363 [TX_AC_BK_FIFO] = IEEE80211_AC_BK,
364 [TX_AC_BE_FIFO] = IEEE80211_AC_BE,
365 [TX_AC_VI_FIFO] = IEEE80211_AC_VI,
366 [TX_AC_VO_FIFO] = IEEE80211_AC_VO,
369 static u8 brcms_ac_to_fifo(u8 ac)
371 if (ac >= ARRAY_SIZE(ac_to_fifo_mapping))
372 return TX_AC_BE_FIFO;
373 return ac_to_fifo_mapping[ac];
376 static u8 brcms_fifo_to_ac(u8 fifo)
378 if (fifo >= ARRAY_SIZE(fifo_to_ac_mapping))
379 return IEEE80211_AC_BE;
380 return fifo_to_ac_mapping[fifo];
383 /* Find basic rate for a given rate */
384 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
386 if (is_mcs_rate(rspec))
387 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
389 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
392 static u16 frametype(u32 rspec, u8 mimoframe)
394 if (is_mcs_rate(rspec))
396 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
399 /* currently the best mechanism for determining SIFS is the band in use */
400 static u16 get_sifs(struct brcms_band *band)
402 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
407 * Detect Card removed.
408 * Even checking an sbconfig register read will not false trigger when the core
409 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
410 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
411 * reg with fixed 0/1 pattern (some platforms return all 0).
412 * If clocks are present, call the sb routine which will figure out if the
415 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
420 return ai_deviceremoved(wlc->hw->sih);
421 macctrl = bcma_read32(wlc->hw->d11core,
422 D11REGOFFS(maccontrol));
423 return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
426 /* sum the individual fifo tx pending packet counts */
427 static int brcms_txpktpendtot(struct brcms_c_info *wlc)
432 for (i = 0; i < ARRAY_SIZE(wlc->hw->di); i++)
434 pending += dma_txpending(wlc->hw->di[i]);
438 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
440 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
443 static int brcms_chspec_bw(u16 chanspec)
445 if (CHSPEC_IS40(chanspec))
447 if (CHSPEC_IS20(chanspec))
453 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
458 kfree(cfg->current_bss);
462 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
467 brcms_c_bsscfg_mfree(wlc->bsscfg);
469 kfree(wlc->modulecb);
470 kfree(wlc->default_bss);
471 kfree(wlc->protection);
473 kfree(wlc->bandstate[0]);
474 kfree(wlc->corestate->macstat_snapshot);
475 kfree(wlc->corestate);
476 kfree(wlc->hw->bandstate[0]);
484 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
486 struct brcms_bss_cfg *cfg;
488 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
492 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
493 if (cfg->current_bss == NULL)
499 brcms_c_bsscfg_mfree(cfg);
503 static struct brcms_c_info *
504 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
506 struct brcms_c_info *wlc;
508 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
514 /* allocate struct brcms_c_pub state structure */
515 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
516 if (wlc->pub == NULL) {
522 /* allocate struct brcms_hardware state structure */
524 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
525 if (wlc->hw == NULL) {
531 wlc->hw->bandstate[0] =
532 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
533 if (wlc->hw->bandstate[0] == NULL) {
539 for (i = 1; i < MAXBANDS; i++)
540 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
541 ((unsigned long)wlc->hw->bandstate[0] +
542 (sizeof(struct brcms_hw_band) * i));
546 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
547 if (wlc->modulecb == NULL) {
552 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
553 if (wlc->default_bss == NULL) {
558 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
559 if (wlc->bsscfg == NULL) {
564 wlc->protection = kzalloc(sizeof(struct brcms_protection),
566 if (wlc->protection == NULL) {
571 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
572 if (wlc->stf == NULL) {
578 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
579 if (wlc->bandstate[0] == NULL) {
585 for (i = 1; i < MAXBANDS; i++)
586 wlc->bandstate[i] = (struct brcms_band *)
587 ((unsigned long)wlc->bandstate[0]
588 + (sizeof(struct brcms_band)*i));
591 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
592 if (wlc->corestate == NULL) {
597 wlc->corestate->macstat_snapshot =
598 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
599 if (wlc->corestate->macstat_snapshot == NULL) {
607 brcms_c_detach_mfree(wlc);
612 * Update the slot timing for standard 11b/g (20us slots)
613 * or shortslot 11g (9us slots)
614 * The PSM needs to be suspended for this call.
616 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
619 struct bcma_device *core = wlc_hw->d11core;
622 /* 11g short slot: 11a timing */
623 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
624 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
626 /* 11g long slot: 11b timing */
627 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
628 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
633 * calculate frame duration of a given rate and length, return
636 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
637 u8 preamble_type, uint mac_len)
639 uint nsyms, dur = 0, Ndps, kNdps;
640 uint rate = rspec2rate(ratespec);
643 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
648 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
649 wlc->pub->unit, ratespec, preamble_type, mac_len);
651 if (is_mcs_rate(ratespec)) {
652 uint mcs = ratespec & RSPEC_RATE_MASK;
653 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
655 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
656 if (preamble_type == BRCMS_MM_PREAMBLE)
658 /* 1000Ndbps = kbps * 4 */
659 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
660 rspec_issgi(ratespec)) * 4;
662 if (rspec_stc(ratespec) == 0)
664 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
665 APHY_TAIL_NBITS) * 1000, kNdps);
667 /* STBC needs to have even number of symbols */
670 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
671 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
673 dur += APHY_SYMBOL_TIME * nsyms;
674 if (wlc->band->bandtype == BRCM_BAND_2G)
675 dur += DOT11_OFDM_SIGNAL_EXTENSION;
676 } else if (is_ofdm_rate(rate)) {
677 dur = APHY_PREAMBLE_TIME;
678 dur += APHY_SIGNAL_TIME;
679 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
681 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
683 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
685 dur += APHY_SYMBOL_TIME * nsyms;
686 if (wlc->band->bandtype == BRCM_BAND_2G)
687 dur += DOT11_OFDM_SIGNAL_EXTENSION;
690 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
693 mac_len = mac_len * 8 * 2;
694 /* calc ceiling of bits/rate = microseconds of air time */
695 dur = (mac_len + rate - 1) / rate;
696 if (preamble_type & BRCMS_SHORT_PREAMBLE)
697 dur += BPHY_PLCP_SHORT_TIME;
699 dur += BPHY_PLCP_TIME;
704 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
705 const struct d11init *inits)
707 struct bcma_device *core = wlc_hw->d11core;
713 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
715 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
716 size = le16_to_cpu(inits[i].size);
717 offset = le16_to_cpu(inits[i].addr);
718 value = le32_to_cpu(inits[i].value);
720 bcma_write16(core, offset, value);
722 bcma_write32(core, offset, value);
728 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
732 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
736 for (idx = 0; idx < MHFMAX; idx++)
737 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
740 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
742 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
743 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
745 /* init microcode host flags */
746 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
748 /* do band-specific ucode IHR, SHM, and SCR inits */
749 if (D11REV_IS(wlc_hw->corerev, 23)) {
750 if (BRCMS_ISNPHY(wlc_hw->band))
751 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
753 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
754 " %d\n", __func__, wlc_hw->unit,
757 if (D11REV_IS(wlc_hw->corerev, 24)) {
758 if (BRCMS_ISLCNPHY(wlc_hw->band))
759 brcms_c_write_inits(wlc_hw,
760 ucode->d11lcn0bsinitvals24);
762 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
763 " core rev %d\n", __func__,
764 wlc_hw->unit, wlc_hw->corerev);
766 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
767 __func__, wlc_hw->unit, wlc_hw->corerev);
772 static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
774 struct bcma_device *core = wlc_hw->d11core;
775 u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
777 bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
780 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
782 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
784 wlc_hw->phyclk = clk;
786 if (OFF == clk) { /* clear gmode bit, put phy into reset */
788 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
789 (SICF_PRST | SICF_FGC));
791 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
794 } else { /* take phy out of reset */
796 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
798 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
804 /* low-level band switch utility routine */
805 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
807 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
810 wlc_hw->band = wlc_hw->bandstate[bandunit];
814 * until we eliminate need for wlc->band refs in low level code
816 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
818 /* set gmode core flag */
819 if (wlc_hw->sbclk && !wlc_hw->noreset) {
825 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
829 /* switch to new band but leave it inactive */
830 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
832 struct brcms_hardware *wlc_hw = wlc->hw;
836 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
837 macctrl = bcma_read32(wlc_hw->d11core,
838 D11REGOFFS(maccontrol));
839 WARN_ON((macctrl & MCTL_EN_MAC) != 0);
841 /* disable interrupts */
842 macintmask = brcms_intrsoff(wlc->wl);
845 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
847 brcms_b_core_phy_clk(wlc_hw, OFF);
849 brcms_c_setxband(wlc_hw, bandunit);
854 /* process an individual struct tx_status */
856 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
858 struct sk_buff *p = NULL;
860 struct dma_pub *dma = NULL;
862 struct scb *scb = NULL;
864 int tx_rts, tx_frame_count, tx_rts_count;
865 uint totlen, supr_status;
867 struct ieee80211_hdr *h;
869 struct ieee80211_tx_info *tx_info;
870 struct ieee80211_tx_rate *txrate;
874 /* discard intermediate indications for ucode with one legitimate case:
875 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
876 * but the subsequent tx of DATA failed. so it will start rts/cts
877 * from the beginning (resetting the rts transmission count)
879 if (!(txs->status & TX_STATUS_AMPDU)
880 && (txs->status & TX_STATUS_INTERMEDIATE)) {
881 BCMMSG(wlc->wiphy, "INTERMEDIATE but not AMPDU\n");
886 queue = txs->frameid & TXFID_QUEUE_MASK;
890 dma = wlc->hw->di[queue];
892 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
896 txh = (struct d11txh *) (p->data);
897 mcl = le16_to_cpu(txh->MacTxControlLow);
900 if (brcm_msg_level & BRCM_DL_INFO) {
901 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
902 txs->phyerr, txh->MainRates);
903 brcms_c_print_txdesc(txh);
905 brcms_c_print_txstatus(txs);
908 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
910 tx_info = IEEE80211_SKB_CB(p);
911 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
913 if (tx_info->rate_driver_data[0])
916 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
917 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
922 supr_status = txs->status & TX_STATUS_SUPR_MASK;
923 if (supr_status == TX_STATUS_SUPR_BADCH)
925 "%s: Pkt tx suppressed, possibly channel %d\n",
926 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
928 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
930 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
932 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
934 lastframe = !ieee80211_has_morefrags(h->frame_control);
937 wiphy_err(wlc->wiphy, "Not last frame!\n");
940 * Set information to be consumed by Minstrel ht.
942 * The "fallback limit" is the number of tx attempts a given
943 * MPDU is sent at the "primary" rate. Tx attempts beyond that
944 * limit are sent at the "secondary" rate.
945 * A 'short frame' does not exceed RTS treshold.
947 u16 sfbl, /* Short Frame Rate Fallback Limit */
948 lfbl, /* Long Frame Rate Fallback Limit */
951 if (queue < IEEE80211_NUM_ACS) {
952 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
954 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
961 txrate = tx_info->status.rates;
962 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
967 ieee80211_tx_info_clear_status(tx_info);
969 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
971 * rate selection requested a fallback rate
974 txrate[0].count = fbl;
975 txrate[1].count = tx_frame_count - fbl;
978 * rate selection did not request fallback rate, or
981 txrate[0].count = tx_frame_count;
983 * rc80211_minstrel.c:minstrel_tx_status() expects
984 * unused rates to be marked with idx = -1
990 /* clear the rest of the rates */
991 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
996 if (txs->status & TX_STATUS_ACK_RCV)
997 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1004 /* remove PLCP & Broadcom tx descriptor header */
1005 skb_pull(p, D11_PHY_HDR_LEN);
1006 skb_pull(p, D11_TXH_LEN);
1007 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
1009 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
1010 "tx_status\n", __func__);
1017 brcmu_pkt_buf_free_skb(p);
1019 if (dma && queue < NFIFO) {
1020 u16 ac_queue = brcms_fifo_to_ac(queue);
1021 if (dma->txavail > TX_HEADROOM && queue < TX_BCMC_FIFO &&
1022 ieee80211_queue_stopped(wlc->pub->ieee_hw, ac_queue))
1023 ieee80211_wake_queue(wlc->pub->ieee_hw, ac_queue);
1030 /* process tx completion events in BMAC
1031 * Return true if more tx status need to be processed. false otherwise.
1034 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1036 bool morepending = false;
1037 struct brcms_c_info *wlc = wlc_hw->wlc;
1038 struct bcma_device *core;
1039 struct tx_status txstatus, *txs;
1043 * Param 'max_tx_num' indicates max. # tx status to process before
1046 uint max_tx_num = bound ? TXSBND : -1;
1048 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1051 core = wlc_hw->d11core;
1053 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1057 if (s1 == 0xffffffff) {
1058 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1059 wlc_hw->unit, __func__);
1062 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1064 txs->status = s1 & TXS_STATUS_MASK;
1065 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1066 txs->sequence = s2 & TXS_SEQ_MASK;
1067 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1068 txs->lasttxtime = 0;
1070 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1072 /* !give others some time to run! */
1073 if (++n >= max_tx_num)
1075 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1081 if (n >= max_tx_num)
1087 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1089 if (!wlc->bsscfg->BSS)
1091 * DirFrmQ is now valid...defer setting until end
1094 wlc->qvalid |= MCMD_DIRFRMQVAL;
1097 /* set initial host flags value */
1099 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1101 struct brcms_hardware *wlc_hw = wlc->hw;
1103 memset(mhfs, 0, MHFMAX * sizeof(u16));
1105 mhfs[MHF2] |= mhf2_init;
1107 /* prohibit use of slowclock on multifunction boards */
1108 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1109 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1111 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1112 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1113 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1118 dmareg(uint direction, uint fifonum)
1120 if (direction == DMA_TX)
1121 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1122 return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1125 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1130 * ucode host flag 2 needed for pio mode, independent of band and fifo
1133 struct brcms_hardware *wlc_hw = wlc->hw;
1134 uint unit = wlc_hw->unit;
1135 struct wiphy *wiphy = wlc->wiphy;
1137 /* name and offsets for dma_attach */
1138 snprintf(name, sizeof(name), "wl%d", unit);
1140 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1141 int dma_attach_err = 0;
1145 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1146 * RX: RX_FIFO (RX data packets)
1148 wlc_hw->di[0] = dma_attach(name, wlc,
1149 (wme ? dmareg(DMA_TX, 0) : 0),
1151 (wme ? NTXD : 0), NRXD,
1152 RXBUFSZ, -1, NRXBUFPOST,
1153 BRCMS_HWRXOFF, &brcm_msg_level);
1154 dma_attach_err |= (NULL == wlc_hw->di[0]);
1158 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1159 * (legacy) TX_DATA_FIFO (TX data packets)
1162 wlc_hw->di[1] = dma_attach(name, wlc,
1163 dmareg(DMA_TX, 1), 0,
1164 NTXD, 0, 0, -1, 0, 0,
1166 dma_attach_err |= (NULL == wlc_hw->di[1]);
1170 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1173 wlc_hw->di[2] = dma_attach(name, wlc,
1174 dmareg(DMA_TX, 2), 0,
1175 NTXD, 0, 0, -1, 0, 0,
1177 dma_attach_err |= (NULL == wlc_hw->di[2]);
1180 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1181 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1183 wlc_hw->di[3] = dma_attach(name, wlc,
1186 0, 0, &brcm_msg_level);
1187 dma_attach_err |= (NULL == wlc_hw->di[3]);
1188 /* Cleaner to leave this as if with AP defined */
1190 if (dma_attach_err) {
1191 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1196 /* get pointer to dma engine tx flow control variable */
1197 for (i = 0; i < NFIFO; i++)
1199 wlc_hw->txavail[i] =
1200 (uint *) dma_getvar(wlc_hw->di[i],
1204 /* initial ucode host flags */
1205 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1210 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1214 for (j = 0; j < NFIFO; j++) {
1215 if (wlc_hw->di[j]) {
1216 dma_detach(wlc_hw->di[j]);
1217 wlc_hw->di[j] = NULL;
1223 * Initialize brcms_c_info default values ...
1224 * may get overrides later in this function
1225 * BMAC_NOTES, move low out and resolve the dangling ones
1227 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1229 struct brcms_c_info *wlc = wlc_hw->wlc;
1231 /* set default sw macintmask value */
1232 wlc->defmacintmask = DEF_MACINTMASK;
1234 /* various 802.11g modes */
1235 wlc_hw->shortslot = false;
1237 wlc_hw->SFBL = RETRY_SHORT_FB;
1238 wlc_hw->LFBL = RETRY_LONG_FB;
1240 /* default mac retry limits */
1241 wlc_hw->SRL = RETRY_SHORT_DEF;
1242 wlc_hw->LRL = RETRY_LONG_DEF;
1243 wlc_hw->chanspec = ch20mhz_chspec(1);
1246 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1248 /* delay before first read of ucode state */
1251 /* wait until ucode is no longer asleep */
1252 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1253 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1256 /* control chip clock to save power, enable dynamic clock or force fast clock */
1257 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, enum bcma_clkmode mode)
1259 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1260 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1261 * on backplane, but mac core will still run on ALP(not HT) when
1262 * it enters powersave mode, which means the FCA bit may not be
1263 * set. Should wakeup mac if driver wants it to run on HT.
1267 if (mode == BCMA_CLKMODE_FAST) {
1268 bcma_set32(wlc_hw->d11core,
1269 D11REGOFFS(clk_ctl_st),
1275 ((bcma_read32(wlc_hw->d11core,
1276 D11REGOFFS(clk_ctl_st)) &
1278 PMU_MAX_TRANSITION_DLY);
1279 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1280 D11REGOFFS(clk_ctl_st)) &
1283 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1284 (bcma_read32(wlc_hw->d11core,
1285 D11REGOFFS(clk_ctl_st)) &
1286 (CCS_FORCEHT | CCS_HTAREQ)))
1288 ((bcma_read32(wlc_hw->d11core,
1289 offsetof(struct d11regs,
1292 PMU_MAX_TRANSITION_DLY);
1293 bcma_mask32(wlc_hw->d11core,
1294 D11REGOFFS(clk_ctl_st),
1298 wlc_hw->forcefastclk = (mode == BCMA_CLKMODE_FAST);
1301 /* old chips w/o PMU, force HT through cc,
1302 * then use FCA to verify mac is running fast clock
1305 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1307 /* check fast clock is available (if core is not in reset) */
1308 if (wlc_hw->forcefastclk && wlc_hw->clk)
1309 WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1313 * keep the ucode wake bit on if forcefastclk is on since we
1314 * do not want ucode to put us back to slow clock when it dozes
1315 * for PM mode. Code below matches the wake override bit with
1316 * current forcefastclk state. Only setting bit in wake_override
1317 * instead of waking ucode immediately since old code had this
1318 * behavior. Older code set wlc->forcefastclk but only had the
1319 * wake happen if the wakup_ucode work (protected by an up
1320 * check) was executed just below.
1322 if (wlc_hw->forcefastclk)
1323 mboolset(wlc_hw->wake_override,
1324 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1326 mboolclr(wlc_hw->wake_override,
1327 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1331 /* set or clear ucode host flag bits
1332 * it has an optimization for no-change write
1333 * it only writes through shared memory when the core has clock;
1334 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1337 * bands values are: BRCM_BAND_AUTO <--- Current band only
1338 * BRCM_BAND_5G <--- 5G band only
1339 * BRCM_BAND_2G <--- 2G band only
1340 * BRCM_BAND_ALL <--- All bands
1343 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1347 u16 addr[MHFMAX] = {
1348 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1351 struct brcms_hw_band *band;
1353 if ((val & ~mask) || idx >= MHFMAX)
1354 return; /* error condition */
1357 /* Current band only or all bands,
1358 * then set the band to current band
1360 case BRCM_BAND_AUTO:
1362 band = wlc_hw->band;
1365 band = wlc_hw->bandstate[BAND_5G_INDEX];
1368 band = wlc_hw->bandstate[BAND_2G_INDEX];
1371 band = NULL; /* error condition */
1375 save = band->mhfs[idx];
1376 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1378 /* optimization: only write through if changed, and
1379 * changed band is the current band
1381 if (wlc_hw->clk && (band->mhfs[idx] != save)
1382 && (band == wlc_hw->band))
1383 brcms_b_write_shm(wlc_hw, addr[idx],
1384 (u16) band->mhfs[idx]);
1387 if (bands == BRCM_BAND_ALL) {
1388 wlc_hw->bandstate[0]->mhfs[idx] =
1389 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1390 wlc_hw->bandstate[1]->mhfs[idx] =
1391 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1395 /* set the maccontrol register to desired reset state and
1396 * initialize the sw cache of the register
1398 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1400 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1401 wlc_hw->maccontrol = 0;
1402 wlc_hw->suspended_fifos = 0;
1403 wlc_hw->wake_override = 0;
1404 wlc_hw->mute_override = 0;
1405 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1409 * write the software state of maccontrol and
1410 * overrides to the maccontrol register
1412 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1414 u32 maccontrol = wlc_hw->maccontrol;
1416 /* OR in the wake bit if overridden */
1417 if (wlc_hw->wake_override)
1418 maccontrol |= MCTL_WAKE;
1420 /* set AP and INFRA bits for mute if needed */
1421 if (wlc_hw->mute_override) {
1422 maccontrol &= ~(MCTL_AP);
1423 maccontrol |= MCTL_INFRA;
1426 bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1430 /* set or clear maccontrol bits */
1431 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1437 return; /* error condition */
1438 maccontrol = wlc_hw->maccontrol;
1439 new_maccontrol = (maccontrol & ~mask) | val;
1441 /* if the new maccontrol value is the same as the old, nothing to do */
1442 if (new_maccontrol == maccontrol)
1445 /* something changed, cache the new value */
1446 wlc_hw->maccontrol = new_maccontrol;
1448 /* write the new values with overrides applied */
1449 brcms_c_mctrl_write(wlc_hw);
1452 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1455 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1456 mboolset(wlc_hw->wake_override, override_bit);
1460 mboolset(wlc_hw->wake_override, override_bit);
1462 brcms_c_mctrl_write(wlc_hw);
1463 brcms_b_wait_for_wake(wlc_hw);
1466 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1469 mboolclr(wlc_hw->wake_override, override_bit);
1471 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1474 brcms_c_mctrl_write(wlc_hw);
1477 /* When driver needs ucode to stop beaconing, it has to make sure that
1478 * MCTL_AP is clear and MCTL_INFRA is set
1479 * Mode MCTL_AP MCTL_INFRA
1481 * STA 0 1 <--- This will ensure no beacons
1484 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1486 wlc_hw->mute_override = 1;
1488 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1489 * override, then there is no change to write
1491 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1494 brcms_c_mctrl_write(wlc_hw);
1497 /* Clear the override on AP and INFRA bits */
1498 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1500 if (wlc_hw->mute_override == 0)
1503 wlc_hw->mute_override = 0;
1505 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1506 * override, then there is no change to write
1508 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1511 brcms_c_mctrl_write(wlc_hw);
1515 * Write a MAC address to the given match reg offset in the RXE match engine.
1518 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1521 struct bcma_device *core = wlc_hw->d11core;
1526 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1529 mac_l = addr[0] | (addr[1] << 8);
1530 mac_m = addr[2] | (addr[3] << 8);
1531 mac_h = addr[4] | (addr[5] << 8);
1533 /* enter the MAC addr into the RXE match registers */
1534 bcma_write16(core, D11REGOFFS(rcm_ctl),
1535 RCM_INC_DATA | match_reg_offset);
1536 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1537 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1538 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1542 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1545 struct bcma_device *core = wlc_hw->d11core;
1550 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1552 bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1554 /* if MCTL_BIGEND bit set in mac control register,
1555 * the chip swaps data in fifo, as well as data in
1558 be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1561 memcpy(&word, buf, sizeof(u32));
1564 word_be = cpu_to_be32(word);
1565 word = *(u32 *)&word_be;
1567 word_le = cpu_to_le32(word);
1568 word = *(u32 *)&word_le;
1571 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1573 buf = (u8 *) buf + sizeof(u32);
1578 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1580 wlc_hw->band->CWmin = newmin;
1582 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1583 OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1584 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1585 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1588 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1590 wlc_hw->band->CWmax = newmax;
1592 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1593 OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1594 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1595 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1598 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1602 /* request FAST clock if not on */
1603 fastclk = wlc_hw->forcefastclk;
1605 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
1607 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1609 brcms_b_phy_reset(wlc_hw);
1610 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1612 /* restore the clk */
1614 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
1617 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1620 struct brcms_c_info *wlc = wlc_hw->wlc;
1621 /* update SYNTHPU_DLY */
1623 if (BRCMS_ISLCNPHY(wlc->band))
1624 v = SYNTHPU_DLY_LPPHY_US;
1625 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1626 v = SYNTHPU_DLY_NPHY_US;
1628 v = SYNTHPU_DLY_BPHY_US;
1630 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1633 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1636 u16 phytxant = wlc_hw->bmac_phytxant;
1637 u16 mask = PHY_TXC_ANT_MASK;
1639 /* set the Probe Response frame phy control word */
1640 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1641 phyctl = (phyctl & ~mask) | phytxant;
1642 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1644 /* set the Response (ACK/CTS) frame phy control word */
1645 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1646 phyctl = (phyctl & ~mask) | phytxant;
1647 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1650 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1655 struct plcp_signal_rate_lookup {
1659 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1660 const struct plcp_signal_rate_lookup rate_lookup[] = {
1661 {BRCM_RATE_6M, 0xB},
1662 {BRCM_RATE_9M, 0xF},
1663 {BRCM_RATE_12M, 0xA},
1664 {BRCM_RATE_18M, 0xE},
1665 {BRCM_RATE_24M, 0x9},
1666 {BRCM_RATE_36M, 0xD},
1667 {BRCM_RATE_48M, 0x8},
1668 {BRCM_RATE_54M, 0xC}
1671 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1672 if (rate == rate_lookup[i].rate) {
1673 plcp_rate = rate_lookup[i].signal_rate;
1678 /* Find the SHM pointer to the rate table entry by looking in the
1681 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1684 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1688 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1689 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1695 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1698 /* walk the phy rate table and update the entries */
1699 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1702 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1704 /* read the SHM Rate Table entry OFDM PCTL1 values */
1706 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1708 /* modify the value */
1709 pctl1 &= ~PHY_TXC1_MODE_MASK;
1710 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1712 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1713 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1718 /* band-specific init */
1719 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1721 struct brcms_hardware *wlc_hw = wlc->hw;
1723 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1724 wlc_hw->band->bandunit);
1726 brcms_c_ucode_bsinit(wlc_hw);
1728 wlc_phy_init(wlc_hw->band->pi, chanspec);
1730 brcms_c_ucode_txant_set(wlc_hw);
1733 * cwmin is band-specific, update hardware
1734 * with value for current band
1736 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1737 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1739 brcms_b_update_slot_timing(wlc_hw,
1740 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1741 true : wlc_hw->shortslot);
1743 /* write phytype and phyvers */
1744 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1745 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1748 * initialize the txphyctl1 rate table since
1749 * shmem is shared between bands
1751 brcms_upd_ofdm_pctl1_table(wlc_hw);
1753 brcms_b_upd_synthpu(wlc_hw);
1756 /* Perform a soft reset of the PHY PLL */
1757 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1759 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1761 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1764 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1767 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1770 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1775 /* light way to turn on phy clock without reset for NPHY only
1776 * refer to brcms_b_core_phy_clk for full version
1778 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1780 /* support(necessary for NPHY and HYPHY) only */
1781 if (!BRCMS_ISNPHY(wlc_hw->band))
1785 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1787 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1791 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1794 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1796 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1799 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1801 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1803 bool phy_in_reset = false;
1805 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1810 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1812 /* Specific reset sequence required for NPHY rev 3 and 4 */
1813 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1814 NREV_LE(wlc_hw->band->phyrev, 4)) {
1815 /* Set the PHY bandwidth */
1816 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1820 /* Perform a soft reset of the PHY PLL */
1821 brcms_b_core_phypll_reset(wlc_hw);
1824 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1825 (SICF_PRST | SICF_PCLKE));
1826 phy_in_reset = true;
1828 brcms_b_core_ioctl(wlc_hw,
1829 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1830 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1834 brcms_b_core_phy_clk(wlc_hw, ON);
1837 wlc_phy_anacore(pih, ON);
1840 /* switch to and initialize new band */
1841 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1843 struct brcms_c_info *wlc = wlc_hw->wlc;
1846 /* Enable the d11 core before accessing it */
1847 if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1848 bcma_core_enable(wlc_hw->d11core, 0);
1849 brcms_c_mctrl_reset(wlc_hw);
1852 macintmask = brcms_c_setband_inact(wlc, bandunit);
1857 brcms_b_core_phy_clk(wlc_hw, ON);
1859 /* band-specific initializations */
1860 brcms_b_bsinit(wlc, chanspec);
1863 * If there are any pending software interrupt bits,
1864 * then replace these with a harmless nonzero value
1865 * so brcms_c_dpc() will re-enable interrupts when done.
1867 if (wlc->macintstatus)
1868 wlc->macintstatus = MI_DMAINT;
1870 /* restore macintmask */
1871 brcms_intrsrestore(wlc->wl, macintmask);
1873 /* ucode should still be suspended.. */
1874 WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1878 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1881 /* reject unsupported corerev */
1882 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1883 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1891 /* Validate some board info parameters */
1892 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1894 uint boardrev = wlc_hw->boardrev;
1896 /* 4 bits each for board type, major, minor, and tiny version */
1897 uint brt = (boardrev & 0xf000) >> 12;
1898 uint b0 = (boardrev & 0xf00) >> 8;
1899 uint b1 = (boardrev & 0xf0) >> 4;
1900 uint b2 = boardrev & 0xf;
1902 /* voards from other vendors are always considered valid */
1903 if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1906 /* do some boardrev sanity checks when boardvendor is Broadcom */
1910 if (boardrev <= 0xff)
1913 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1920 static void brcms_c_get_macaddr(struct brcms_hardware *wlc_hw, u8 etheraddr[ETH_ALEN])
1922 struct ssb_sprom *sprom = &wlc_hw->d11core->bus->sprom;
1924 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1925 if (!is_zero_ether_addr(sprom->il0mac)) {
1926 memcpy(etheraddr, sprom->il0mac, 6);
1930 if (wlc_hw->_nbands > 1)
1931 memcpy(etheraddr, sprom->et1mac, 6);
1933 memcpy(etheraddr, sprom->il0mac, 6);
1936 /* power both the pll and external oscillator on/off */
1937 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1939 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1942 * dont power down if plldown is false or
1943 * we must poll hw radio disable
1945 if (!want && wlc_hw->pllreq)
1948 wlc_hw->sbclk = want;
1949 if (!wlc_hw->sbclk) {
1950 wlc_hw->clk = false;
1951 if (wlc_hw->band && wlc_hw->band->pi)
1952 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1957 * Return true if radio is disabled, otherwise false.
1958 * hw radio disable signal is an external pin, users activate it asynchronously
1959 * this function could be called when driver is down and w/o clock
1960 * it operates on different registers depending on corerev and boardflag.
1962 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1967 xtal = wlc_hw->sbclk;
1969 brcms_b_xtal(wlc_hw, ON);
1971 /* may need to take core out of reset first */
1975 * mac no longer enables phyclk automatically when driver
1976 * accesses phyreg throughput mac. This can be skipped since
1977 * only mac reg is accessed below
1979 if (D11REV_GE(wlc_hw->corerev, 18))
1980 flags |= SICF_PCLKE;
1983 * TODO: test suspend/resume
1985 * AI chip doesn't restore bar0win2 on
1986 * hibernation/resume, need sw fixup
1989 bcma_core_enable(wlc_hw->d11core, flags);
1990 brcms_c_mctrl_reset(wlc_hw);
1993 v = ((bcma_read32(wlc_hw->d11core,
1994 D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1996 /* put core back into reset */
1998 bcma_core_disable(wlc_hw->d11core, 0);
2001 brcms_b_xtal(wlc_hw, OFF);
2006 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2008 struct dma_pub *di = wlc_hw->di[fifo];
2009 return dma_rxreset(di);
2013 * ensure fask clock during reset
2015 * reset d11(out of reset)
2016 * reset phy(out of reset)
2017 * clear software macintstatus for fresh new start
2018 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2020 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2025 if (flags == BRCMS_USE_COREFLAGS)
2026 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2028 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2030 /* request FAST clock if not on */
2031 fastclk = wlc_hw->forcefastclk;
2033 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
2035 /* reset the dma engines except first time thru */
2036 if (bcma_core_is_enabled(wlc_hw->d11core)) {
2037 for (i = 0; i < NFIFO; i++)
2038 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2039 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2040 "dma_txreset[%d]: cannot stop dma\n",
2041 wlc_hw->unit, __func__, i);
2043 if ((wlc_hw->di[RX_FIFO])
2044 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2045 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2046 "[%d]: cannot stop dma\n",
2047 wlc_hw->unit, __func__, RX_FIFO);
2049 /* if noreset, just stop the psm and return */
2050 if (wlc_hw->noreset) {
2051 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2052 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2057 * mac no longer enables phyclk automatically when driver accesses
2058 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2059 * band->pi is invalid. need to enable PHY CLK
2061 if (D11REV_GE(wlc_hw->corerev, 18))
2062 flags |= SICF_PCLKE;
2066 * In chips with PMU, the fastclk request goes through d11 core
2067 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2069 * This adds some delay and we can optimize it by also requesting
2070 * fastclk through chipcommon during this period if necessary. But
2071 * that has to work coordinate with other driver like mips/arm since
2072 * they may touch chipcommon as well.
2074 wlc_hw->clk = false;
2075 bcma_core_enable(wlc_hw->d11core, flags);
2077 if (wlc_hw->band && wlc_hw->band->pi)
2078 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2080 brcms_c_mctrl_reset(wlc_hw);
2082 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2083 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
2085 brcms_b_phy_reset(wlc_hw);
2087 /* turn on PHY_PLL */
2088 brcms_b_core_phypll_ctl(wlc_hw, true);
2090 /* clear sw intstatus */
2091 wlc_hw->wlc->macintstatus = 0;
2093 /* restore the clk setting */
2095 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
2098 /* txfifo sizes needs to be modified(increased) since the newer cores
2101 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2103 struct bcma_device *core = wlc_hw->d11core;
2105 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2106 u16 txfifo_def, txfifo_def1;
2109 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2110 txfifo_startblk = TXFIFO_START_BLK;
2112 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2113 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2115 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2116 txfifo_def = (txfifo_startblk & 0xff) |
2117 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2118 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2120 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2122 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2124 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2125 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2126 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2128 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2130 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2133 * need to propagate to shm location to be in sync since ucode/hw won't
2136 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2137 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2138 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2139 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2140 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2141 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2142 xmtfifo_sz[TX_AC_BK_FIFO]));
2143 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2144 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2145 xmtfifo_sz[TX_BCMC_FIFO]));
2148 /* This function is used for changing the tsf frac register
2149 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2150 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2151 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2152 * HTPHY Formula is 2^26/freq(MHz) e.g.
2153 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2154 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2155 * For spuron: 123MHz -> 2^26/123 = 545600.5
2156 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2157 * For spur off: 120MHz -> 2^26/120 = 559240.5
2158 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2161 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2163 struct bcma_device *core = wlc_hw->d11core;
2165 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43224) ||
2166 (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225)) {
2167 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2168 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2169 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2170 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2171 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2172 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2173 } else { /* 120Mhz */
2174 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2175 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2177 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2178 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2179 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2180 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2181 } else { /* 80Mhz */
2182 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2183 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2188 /* Initialize GPIOs that are controlled by D11 core */
2189 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2191 struct brcms_hardware *wlc_hw = wlc->hw;
2194 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2195 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2198 * Common GPIO setup:
2199 * G0 = LED 0 = WLAN Activity
2200 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2201 * G2 = LED 2 = WLAN 5 GHz Radio State
2202 * G4 = radio disable input (HI enabled, LO disabled)
2207 /* Allocate GPIOs for mimo antenna diversity feature */
2208 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2209 /* Enable antenna diversity, use 2x3 mode */
2210 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2211 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2212 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2213 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2215 /* init superswitch control */
2216 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2218 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2219 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2221 * The board itself is powered by these GPIOs
2222 * (when not sending pattern) so set them high
2224 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2225 (BOARD_GPIO_12 | BOARD_GPIO_13));
2226 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2227 (BOARD_GPIO_12 | BOARD_GPIO_13));
2229 /* Enable antenna diversity, use 2x4 mode */
2230 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2231 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2232 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2235 /* Configure the desired clock to be 4Mhz */
2236 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2237 ANTSEL_CLKDIV_4MHZ);
2241 * gpio 9 controls the PA. ucode is responsible
2242 * for wiggling out and oe
2244 if (wlc_hw->boardflags & BFL_PACTRL)
2245 gm |= gc |= BOARD_GPIO_PACTRL;
2247 /* apply to gpiocontrol register */
2248 bcma_chipco_gpio_control(&wlc_hw->d11core->bus->drv_cc, gm, gc);
2251 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2252 const __le32 ucode[], const size_t nbytes)
2254 struct bcma_device *core = wlc_hw->d11core;
2258 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2260 count = (nbytes / sizeof(u32));
2262 bcma_write32(core, D11REGOFFS(objaddr),
2263 OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2264 (void)bcma_read32(core, D11REGOFFS(objaddr));
2265 for (i = 0; i < count; i++)
2266 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2270 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2272 struct brcms_c_info *wlc;
2273 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2277 if (wlc_hw->ucode_loaded)
2280 if (D11REV_IS(wlc_hw->corerev, 23)) {
2281 if (BRCMS_ISNPHY(wlc_hw->band)) {
2282 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2283 ucode->bcm43xx_16_mimosz);
2284 wlc_hw->ucode_loaded = true;
2286 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2288 __func__, wlc_hw->unit, wlc_hw->corerev);
2289 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2290 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2291 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2292 ucode->bcm43xx_24_lcnsz);
2293 wlc_hw->ucode_loaded = true;
2295 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2297 __func__, wlc_hw->unit, wlc_hw->corerev);
2302 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2304 /* update sw state */
2305 wlc_hw->bmac_phytxant = phytxant;
2307 /* push to ucode if up */
2310 brcms_c_ucode_txant_set(wlc_hw);
2314 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2316 return (u16) wlc_hw->wlc->stf->txant;
2319 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2321 wlc_hw->antsel_type = antsel_type;
2323 /* Update the antsel type for phy module to use */
2324 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2327 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2331 uint intstatus, idx;
2332 struct bcma_device *core = wlc_hw->d11core;
2333 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2335 unit = wlc_hw->unit;
2337 for (idx = 0; idx < NFIFO; idx++) {
2338 /* read intstatus register and ignore any non-error bits */
2341 D11REGOFFS(intctrlregs[idx].intstatus)) &
2346 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2347 unit, idx, intstatus);
2349 if (intstatus & I_RO) {
2350 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2351 "overflow\n", unit, idx);
2355 if (intstatus & I_PC) {
2356 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2361 if (intstatus & I_PD) {
2362 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2367 if (intstatus & I_DE) {
2368 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2369 "error\n", unit, idx);
2373 if (intstatus & I_RU)
2374 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2375 "underflow\n", idx, unit);
2377 if (intstatus & I_XU) {
2378 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2379 "underflow\n", idx, unit);
2384 brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2388 D11REGOFFS(intctrlregs[idx].intstatus),
2393 void brcms_c_intrson(struct brcms_c_info *wlc)
2395 struct brcms_hardware *wlc_hw = wlc->hw;
2396 wlc->macintmask = wlc->defmacintmask;
2397 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2400 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2402 struct brcms_hardware *wlc_hw = wlc->hw;
2408 macintmask = wlc->macintmask; /* isr can still happen */
2410 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2411 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2412 udelay(1); /* ensure int line is no longer driven */
2413 wlc->macintmask = 0;
2415 /* return previous macintmask; resolve race between us and our isr */
2416 return wlc->macintstatus ? 0 : macintmask;
2419 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2421 struct brcms_hardware *wlc_hw = wlc->hw;
2425 wlc->macintmask = macintmask;
2426 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2429 /* assumes that the d11 MAC is enabled */
2430 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2433 u8 fifo = 1 << tx_fifo;
2435 /* Two clients of this code, 11h Quiet period and scanning. */
2437 /* only suspend if not already suspended */
2438 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2441 /* force the core awake only if not already */
2442 if (wlc_hw->suspended_fifos == 0)
2443 brcms_c_ucode_wake_override_set(wlc_hw,
2444 BRCMS_WAKE_OVERRIDE_TXFIFO);
2446 wlc_hw->suspended_fifos |= fifo;
2448 if (wlc_hw->di[tx_fifo]) {
2450 * Suspending AMPDU transmissions in the middle can cause
2451 * underflow which may result in mismatch between ucode and
2452 * driver so suspend the mac before suspending the FIFO
2454 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2455 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2457 dma_txsuspend(wlc_hw->di[tx_fifo]);
2459 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2460 brcms_c_enable_mac(wlc_hw->wlc);
2464 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2467 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2468 * but need to be done here for PIO otherwise the watchdog will catch
2469 * the inconsistency and fire
2471 /* Two clients of this code, 11h Quiet period and scanning. */
2472 if (wlc_hw->di[tx_fifo])
2473 dma_txresume(wlc_hw->di[tx_fifo]);
2475 /* allow core to sleep again */
2476 if (wlc_hw->suspended_fifos == 0)
2479 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2480 if (wlc_hw->suspended_fifos == 0)
2481 brcms_c_ucode_wake_override_clear(wlc_hw,
2482 BRCMS_WAKE_OVERRIDE_TXFIFO);
2486 /* precondition: requires the mac core to be enabled */
2487 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2489 static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2492 /* suspend tx fifos */
2493 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2494 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2495 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2496 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2498 /* zero the address match register so we do not send ACKs */
2499 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2502 /* resume tx fifos */
2503 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2504 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2505 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2506 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2508 /* Restore address */
2509 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2513 wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2516 brcms_c_ucode_mute_override_set(wlc_hw);
2518 brcms_c_ucode_mute_override_clear(wlc_hw);
2522 brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2524 brcms_b_mute(wlc->hw, mute_tx);
2528 * Read and clear macintmask and macintstatus and intstatus registers.
2529 * This routine should be called with interrupts off
2531 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2532 * 0 if the interrupt is not for us, or we are in some special cases;
2533 * device interrupt status bits otherwise.
2535 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2537 struct brcms_hardware *wlc_hw = wlc->hw;
2538 struct bcma_device *core = wlc_hw->d11core;
2541 /* macintstatus includes a DMA interrupt summary bit */
2542 macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2544 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2547 /* detect cardbus removed, in power down(suspend) and in reset */
2548 if (brcms_deviceremoved(wlc))
2551 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2552 * handle that case here.
2554 if (macintstatus == 0xffffffff)
2557 /* defer unsolicited interrupts */
2558 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2561 if (macintstatus == 0)
2564 /* interrupts are already turned off for CFE build
2565 * Caution: For CFE Turning off the interrupts again has some undesired
2568 /* turn off the interrupts */
2569 bcma_write32(core, D11REGOFFS(macintmask), 0);
2570 (void)bcma_read32(core, D11REGOFFS(macintmask));
2571 wlc->macintmask = 0;
2573 /* clear device interrupts */
2574 bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2576 /* MI_DMAINT is indication of non-zero intstatus */
2577 if (macintstatus & MI_DMAINT)
2579 * only fifo interrupt enabled is I_RI in
2580 * RX_FIFO. If MI_DMAINT is set, assume it
2581 * is set and clear the interrupt.
2583 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2586 return macintstatus;
2589 /* Update wlc->macintstatus and wlc->intstatus[]. */
2590 /* Return true if they are updated successfully. false otherwise */
2591 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2595 /* read and clear macintstatus and intstatus registers */
2596 macintstatus = wlc_intstatus(wlc, false);
2598 /* device is removed */
2599 if (macintstatus == 0xffffffff)
2602 /* update interrupt status in software */
2603 wlc->macintstatus |= macintstatus;
2609 * First-level interrupt processing.
2610 * Return true if this was our interrupt, false otherwise.
2611 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2614 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2616 struct brcms_hardware *wlc_hw = wlc->hw;
2621 if (!wlc_hw->up || !wlc->macintmask)
2624 /* read and clear macintstatus and intstatus registers */
2625 macintstatus = wlc_intstatus(wlc, true);
2627 if (macintstatus == 0xffffffff)
2628 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2631 /* it is not for us */
2632 if (macintstatus == 0)
2637 /* save interrupt status bits */
2638 wlc->macintstatus = macintstatus;
2644 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2646 struct brcms_hardware *wlc_hw = wlc->hw;
2647 struct bcma_device *core = wlc_hw->d11core;
2649 struct wiphy *wiphy = wlc->wiphy;
2651 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2652 wlc_hw->band->bandunit);
2655 * Track overlapping suspend requests
2657 wlc_hw->mac_suspend_depth++;
2658 if (wlc_hw->mac_suspend_depth > 1)
2661 /* force the core awake */
2662 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2664 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2666 if (mc == 0xffffffff) {
2667 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2669 brcms_down(wlc->wl);
2672 WARN_ON(mc & MCTL_PSM_JMP_0);
2673 WARN_ON(!(mc & MCTL_PSM_RUN));
2674 WARN_ON(!(mc & MCTL_EN_MAC));
2676 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2677 if (mi == 0xffffffff) {
2678 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2680 brcms_down(wlc->wl);
2683 WARN_ON(mi & MI_MACSSPNDD);
2685 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2687 SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2688 BRCMS_MAX_MAC_SUSPEND);
2690 if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2691 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2692 " and MI_MACSSPNDD is still not on.\n",
2693 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2694 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2695 "psm_brc 0x%04x\n", wlc_hw->unit,
2696 bcma_read32(core, D11REGOFFS(psmdebug)),
2697 bcma_read32(core, D11REGOFFS(phydebug)),
2698 bcma_read16(core, D11REGOFFS(psm_brc)));
2701 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2702 if (mc == 0xffffffff) {
2703 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2705 brcms_down(wlc->wl);
2708 WARN_ON(mc & MCTL_PSM_JMP_0);
2709 WARN_ON(!(mc & MCTL_PSM_RUN));
2710 WARN_ON(mc & MCTL_EN_MAC);
2713 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2715 struct brcms_hardware *wlc_hw = wlc->hw;
2716 struct bcma_device *core = wlc_hw->d11core;
2719 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2720 wlc->band->bandunit);
2723 * Track overlapping suspend requests
2725 wlc_hw->mac_suspend_depth--;
2726 if (wlc_hw->mac_suspend_depth > 0)
2729 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2730 WARN_ON(mc & MCTL_PSM_JMP_0);
2731 WARN_ON(mc & MCTL_EN_MAC);
2732 WARN_ON(!(mc & MCTL_PSM_RUN));
2734 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2735 bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2737 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2738 WARN_ON(mc & MCTL_PSM_JMP_0);
2739 WARN_ON(!(mc & MCTL_EN_MAC));
2740 WARN_ON(!(mc & MCTL_PSM_RUN));
2742 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2743 WARN_ON(mi & MI_MACSSPNDD);
2745 brcms_c_ucode_wake_override_clear(wlc_hw,
2746 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2749 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2751 wlc_hw->hw_stf_ss_opmode = stf_mode;
2754 brcms_upd_ofdm_pctl1_table(wlc_hw);
2757 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2759 struct bcma_device *core = wlc_hw->d11core;
2761 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2763 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2765 /* Validate dchip register access */
2767 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2768 (void)bcma_read32(core, D11REGOFFS(objaddr));
2769 w = bcma_read32(core, D11REGOFFS(objdata));
2771 /* Can we write and read back a 32bit register? */
2772 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2773 (void)bcma_read32(core, D11REGOFFS(objaddr));
2774 bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2776 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2777 (void)bcma_read32(core, D11REGOFFS(objaddr));
2778 val = bcma_read32(core, D11REGOFFS(objdata));
2779 if (val != (u32) 0xaa5555aa) {
2780 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2781 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2785 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2786 (void)bcma_read32(core, D11REGOFFS(objaddr));
2787 bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2789 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2790 (void)bcma_read32(core, D11REGOFFS(objaddr));
2791 val = bcma_read32(core, D11REGOFFS(objdata));
2792 if (val != (u32) 0x55aaaa55) {
2793 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2794 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2798 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2799 (void)bcma_read32(core, D11REGOFFS(objaddr));
2800 bcma_write32(core, D11REGOFFS(objdata), w);
2802 /* clear CFPStart */
2803 bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2805 w = bcma_read32(core, D11REGOFFS(maccontrol));
2806 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2807 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2808 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2809 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2810 (MCTL_IHR_EN | MCTL_WAKE),
2811 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2818 #define PHYPLL_WAIT_US 100000
2820 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2822 struct bcma_device *core = wlc_hw->d11core;
2825 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2830 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
2831 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2833 CCS_ERSRC_REQ_D11PLL |
2834 CCS_ERSRC_REQ_PHYPLL);
2835 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2836 CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2839 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2840 if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2841 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2842 " PLL failed\n", __func__);
2844 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2845 tmp | CCS_ERSRC_REQ_D11PLL |
2846 CCS_ERSRC_REQ_PHYPLL);
2847 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2848 (CCS_ERSRC_AVAIL_D11PLL |
2849 CCS_ERSRC_AVAIL_PHYPLL)) !=
2850 (CCS_ERSRC_AVAIL_D11PLL |
2851 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2853 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2855 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2857 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2858 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2859 "PHY PLL failed\n", __func__);
2863 * Since the PLL may be shared, other cores can still
2864 * be requesting it; so we'll deassert the request but
2865 * not wait for status to comply.
2867 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2868 ~CCS_ERSRC_REQ_PHYPLL);
2869 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2873 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2877 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2879 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2884 if (wlc_hw->noreset)
2888 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2890 /* turn off analog core */
2891 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2893 /* turn off PHYPLL to save power */
2894 brcms_b_core_phypll_ctl(wlc_hw, false);
2896 wlc_hw->clk = false;
2897 bcma_core_disable(wlc_hw->d11core, 0);
2898 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2901 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2903 struct brcms_hardware *wlc_hw = wlc->hw;
2906 /* free any posted tx packets */
2907 for (i = 0; i < NFIFO; i++) {
2908 if (wlc_hw->di[i]) {
2909 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2910 if (i < TX_BCMC_FIFO)
2911 ieee80211_wake_queue(wlc->pub->ieee_hw,
2912 brcms_fifo_to_ac(i));
2916 /* free any posted rx packets */
2917 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2921 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2923 struct bcma_device *core = wlc_hw->d11core;
2924 u16 objoff = D11REGOFFS(objdata);
2926 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2927 (void)bcma_read32(core, D11REGOFFS(objaddr));
2931 return bcma_read16(core, objoff);
2935 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2938 struct bcma_device *core = wlc_hw->d11core;
2939 u16 objoff = D11REGOFFS(objdata);
2941 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2942 (void)bcma_read32(core, D11REGOFFS(objaddr));
2946 bcma_write16(core, objoff, v);
2950 * Read a single u16 from shared memory.
2951 * SHM 'offset' needs to be an even address
2953 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2955 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2959 * Write a single u16 to shared memory.
2960 * SHM 'offset' needs to be an even address
2962 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2964 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2968 * Copy a buffer to shared memory of specified type .
2969 * SHM 'offset' needs to be an even address and
2970 * Buffer length 'len' must be an even number of bytes
2971 * 'sel' selects the type of memory
2974 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2975 const void *buf, int len, u32 sel)
2978 const u8 *p = (const u8 *)buf;
2981 if (len <= 0 || (offset & 1) || (len & 1))
2984 for (i = 0; i < len; i += 2) {
2985 v = p[i] | (p[i + 1] << 8);
2986 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2991 * Copy a piece of shared memory of specified type to a buffer .
2992 * SHM 'offset' needs to be an even address and
2993 * Buffer length 'len' must be an even number of bytes
2994 * 'sel' selects the type of memory
2997 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3004 if (len <= 0 || (offset & 1) || (len & 1))
3007 for (i = 0; i < len; i += 2) {
3008 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3010 p[i + 1] = (v >> 8) & 0xFF;
3014 /* Copy a buffer to shared memory.
3015 * SHM 'offset' needs to be an even address and
3016 * Buffer length 'len' must be an even number of bytes
3018 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
3019 const void *buf, int len)
3021 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
3024 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3030 /* write retry limit to SCR, shouldn't need to suspend */
3032 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3033 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3034 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3035 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3036 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3037 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3038 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3039 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3043 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3046 if (mboolisset(wlc_hw->pllreq, req_bit))
3049 mboolset(wlc_hw->pllreq, req_bit);
3051 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3053 brcms_b_xtal(wlc_hw, ON);
3056 if (!mboolisset(wlc_hw->pllreq, req_bit))
3059 mboolclr(wlc_hw->pllreq, req_bit);
3061 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3063 brcms_b_xtal(wlc_hw, OFF);
3068 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3070 wlc_hw->antsel_avail = antsel_avail;
3074 * conditions under which the PM bit should be set in outgoing frames
3075 * and STAY_AWAKE is meaningful
3077 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3079 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3081 /* disallow PS when one of the following global conditions meets */
3082 if (!wlc->pub->associated)
3085 /* disallow PS when one of these meets when not scanning */
3086 if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3089 if (cfg->associated) {
3091 * disallow PS when one of the following
3092 * bsscfg specific conditions meets
3103 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3106 struct macstat macstats;
3113 /* if driver down, make no sense to update stats */
3118 /* save last rx fifo 0 overflow count */
3119 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3121 /* save last tx fifo underflow count */
3122 for (i = 0; i < NFIFO; i++)
3123 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3126 /* Read mac stats from contiguous shared memory */
3127 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3128 sizeof(struct macstat), OBJADDR_SHM_SEL);
3131 /* check for rx fifo 0 overflow */
3132 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3134 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3135 wlc->pub->unit, delta);
3137 /* check for tx fifo underflows */
3138 for (i = 0; i < NFIFO; i++) {
3140 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3143 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3144 "\n", wlc->pub->unit, delta, i);
3148 /* merge counters from dma module */
3149 for (i = 0; i < NFIFO; i++) {
3151 dma_counterreset(wlc->hw->di[i]);
3155 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3157 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3159 /* reset the core */
3160 if (!brcms_deviceremoved(wlc_hw->wlc))
3161 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3163 /* purge the dma rings */
3164 brcms_c_flushqueues(wlc_hw->wlc);
3167 void brcms_c_reset(struct brcms_c_info *wlc)
3169 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3171 /* slurp up hw mac counters before core reset */
3172 brcms_c_statsupd(wlc);
3174 /* reset our snapshot of macstat counters */
3175 memset((char *)wlc->core->macstat_snapshot, 0,
3176 sizeof(struct macstat));
3178 brcms_b_reset(wlc->hw);
3181 void brcms_c_init_scb(struct scb *scb)
3185 memset(scb, 0, sizeof(struct scb));
3186 scb->flags = SCB_WMECAP | SCB_HTCAP;
3187 for (i = 0; i < NUMPRIO; i++) {
3189 scb->seqctl[i] = 0xFFFF;
3192 scb->seqctl_nonqos = 0xFFFF;
3193 scb->magic = SCB_MAGIC;
3198 * download ucode/PCM
3199 * let ucode run to suspended
3200 * download ucode inits
3201 * config other core registers
3204 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3206 struct brcms_hardware *wlc_hw = wlc->hw;
3207 struct bcma_device *core = wlc_hw->d11core;
3211 bool fifosz_fixup = false;
3214 struct wiphy *wiphy = wlc->wiphy;
3215 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3217 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3220 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3222 brcms_ucode_download(wlc_hw);
3224 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3226 fifosz_fixup = true;
3228 /* let the PSM run to the suspended state, set mode to BSS STA */
3229 bcma_write32(core, D11REGOFFS(macintstatus), -1);
3230 brcms_b_mctrl(wlc_hw, ~0,
3231 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3233 /* wait for ucode to self-suspend after auto-init */
3234 SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3235 MI_MACSSPNDD) == 0), 1000 * 1000);
3236 if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3237 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3238 "suspend!\n", wlc_hw->unit);
3240 brcms_c_gpio_init(wlc);
3242 sflags = bcma_aread32(core, BCMA_IOST);
3244 if (D11REV_IS(wlc_hw->corerev, 23)) {
3245 if (BRCMS_ISNPHY(wlc_hw->band))
3246 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3248 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3249 " %d\n", __func__, wlc_hw->unit,
3251 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3252 if (BRCMS_ISLCNPHY(wlc_hw->band))
3253 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3255 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3256 " %d\n", __func__, wlc_hw->unit,
3259 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3260 __func__, wlc_hw->unit, wlc_hw->corerev);
3263 /* For old ucode, txfifo sizes needs to be modified(increased) */
3265 brcms_b_corerev_fifofixup(wlc_hw);
3267 /* check txfifo allocations match between ucode and driver */
3268 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3269 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3273 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3274 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3278 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3279 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3280 buf[TX_AC_BK_FIFO] &= 0xff;
3281 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3285 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3289 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3290 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3291 buf[TX_BCMC_FIFO] &= 0xff;
3292 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3296 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3301 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3302 " driver size %d index %d\n", buf[i],
3303 wlc_hw->xmtfifo_sz[i], i);
3305 /* make sure we can still talk to the mac */
3306 WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3308 /* band-specific inits done by wlc_bsinit() */
3310 /* Set up frame burst size and antenna swap threshold init values */
3311 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3312 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3314 /* enable one rx interrupt per received frame */
3315 bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3317 /* set the station mode (BSS STA) */
3318 brcms_b_mctrl(wlc_hw,
3319 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3320 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3322 /* set up Beacon interval */
3323 bcnint_us = 0x8000 << 10;
3324 bcma_write32(core, D11REGOFFS(tsf_cfprep),
3325 (bcnint_us << CFPREP_CBI_SHIFT));
3326 bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3327 bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3329 /* write interrupt mask */
3330 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3333 /* allow the MAC to control the PHY clock (dynamic on/off) */
3334 brcms_b_macphyclk_set(wlc_hw, ON);
3336 /* program dynamic clock control fast powerup delay register */
3337 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3338 bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3340 /* tell the ucode the corerev */
3341 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3343 /* tell the ucode MAC capabilities */
3344 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3345 (u16) (wlc_hw->machwcap & 0xffff));
3346 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3348 machwcap >> 16) & 0xffff));
3350 /* write retry limits to SCR, this done after PSM init */
3351 bcma_write32(core, D11REGOFFS(objaddr),
3352 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3353 (void)bcma_read32(core, D11REGOFFS(objaddr));
3354 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3355 bcma_write32(core, D11REGOFFS(objaddr),
3356 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3357 (void)bcma_read32(core, D11REGOFFS(objaddr));
3358 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3360 /* write rate fallback retry limits */
3361 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3362 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3364 bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3365 bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3367 /* init the tx dma engines */
3368 for (i = 0; i < NFIFO; i++) {
3370 dma_txinit(wlc_hw->di[i]);
3373 /* init the rx dma engine(s) and post receive buffers */
3374 dma_rxinit(wlc_hw->di[RX_FIFO]);
3375 dma_rxfill(wlc_hw->di[RX_FIFO]);
3379 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3382 struct brcms_c_info *wlc = wlc_hw->wlc;
3384 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3386 /* request FAST clock if not on */
3387 fastclk = wlc_hw->forcefastclk;
3389 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
3391 /* disable interrupts */
3392 macintmask = brcms_intrsoff(wlc->wl);
3394 /* set up the specified band and chanspec */
3395 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3396 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3398 /* do one-time phy inits and calibration */
3399 wlc_phy_cal_init(wlc_hw->band->pi);
3401 /* core-specific initialization */
3402 brcms_b_coreinit(wlc);
3404 /* band-specific inits */
3405 brcms_b_bsinit(wlc, chanspec);
3407 /* restore macintmask */
3408 brcms_intrsrestore(wlc->wl, macintmask);
3410 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3411 * is suspended and brcms_c_enable_mac() will clear this override bit.
3413 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3416 * initialize mac_suspend_depth to 1 to match ucode
3417 * initial suspended state
3419 wlc_hw->mac_suspend_depth = 1;
3421 /* restore the clk */
3423 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
3426 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3429 /* Save our copy of the chanspec */
3430 wlc->chanspec = chanspec;
3432 /* Set the chanspec and power limits for this locale */
3433 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3435 if (wlc->stf->ss_algosel_auto)
3436 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3439 brcms_c_stf_ss_update(wlc, wlc->band);
3443 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3445 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3446 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3447 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3448 brcms_chspec_bw(wlc->default_bss->chanspec),
3449 wlc->stf->txstreams);
3452 /* derive wlc->band->basic_rate[] table from 'rateset' */
3453 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3454 struct brcms_c_rateset *rateset)
3460 u8 *br = wlc->band->basic_rate;
3463 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3464 memset(br, 0, BRCM_MAXRATE + 1);
3466 /* For each basic rate in the rates list, make an entry in the
3467 * best basic lookup.
3469 for (i = 0; i < rateset->count; i++) {
3470 /* only make an entry for a basic rate */
3471 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3474 /* mask off basic bit */
3475 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3477 if (rate > BRCM_MAXRATE) {
3478 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3479 "invalid rate 0x%X in rate set\n",
3487 /* The rate lookup table now has non-zero entries for each
3488 * basic rate, equal to the basic rate: br[basicN] = basicN
3490 * To look up the best basic rate corresponding to any
3491 * particular rate, code can use the basic_rate table
3494 * basic_rate = wlc->band->basic_rate[tx_rate]
3496 * Make sure there is a best basic rate entry for
3497 * every rate by walking up the table from low rates
3498 * to high, filling in holes in the lookup table
3501 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3502 rate = wlc->band->hw_rateset.rates[i];
3504 if (br[rate] != 0) {
3505 /* This rate is a basic rate.
3506 * Keep track of the best basic rate so far by
3509 if (is_ofdm_rate(rate))
3517 /* This rate is not a basic rate so figure out the
3518 * best basic rate less than this rate and fill in
3519 * the hole in the table
3522 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3527 if (is_ofdm_rate(rate)) {
3529 * In 11g and 11a, the OFDM mandatory rates
3530 * are 6, 12, and 24 Mbps
3532 if (rate >= BRCM_RATE_24M)
3533 mandatory = BRCM_RATE_24M;
3534 else if (rate >= BRCM_RATE_12M)
3535 mandatory = BRCM_RATE_12M;
3537 mandatory = BRCM_RATE_6M;
3539 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3543 br[rate] = mandatory;
3547 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3550 struct brcms_c_rateset default_rateset;
3552 uint i, band_order[2];
3554 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3556 * We might have been bandlocked during down and the chip
3557 * power-cycled (hibernate). Figure out the right band to park on
3559 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3560 /* updated in brcms_c_bandlock() */
3561 parkband = wlc->band->bandunit;
3562 band_order[0] = band_order[1] = parkband;
3564 /* park on the band of the specified chanspec */
3565 parkband = chspec_bandunit(chanspec);
3567 /* order so that parkband initialize last */
3568 band_order[0] = parkband ^ 1;
3569 band_order[1] = parkband;
3572 /* make each band operational, software state init */
3573 for (i = 0; i < wlc->pub->_nbands; i++) {
3574 uint j = band_order[i];
3576 wlc->band = wlc->bandstate[j];
3578 brcms_default_rateset(wlc, &default_rateset);
3580 /* fill in hw_rate */
3581 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3582 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3583 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3585 /* init basic rate lookup */
3586 brcms_c_rate_lookup_init(wlc, &default_rateset);
3589 /* sync up phy/radio chanspec */
3590 brcms_c_set_phy_chanspec(wlc, chanspec);
3594 * Set or clear filtering related maccontrol bits based on
3595 * specified filter flags
3597 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3599 u32 promisc_bits = 0;
3601 wlc->filter_flags = filter_flags;
3603 if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3604 promisc_bits |= MCTL_PROMISC;
3606 if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3607 promisc_bits |= MCTL_BCNS_PROMISC;
3609 if (filter_flags & FIF_FCSFAIL)
3610 promisc_bits |= MCTL_KEEPBADFCS;
3612 if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3613 promisc_bits |= MCTL_KEEPCONTROL;
3615 brcms_b_mctrl(wlc->hw,
3616 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3617 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3622 * ucode, hwmac update
3623 * Channel dependent updates for ucode and hw
3625 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3627 /* enable or disable any active IBSSs depending on whether or not
3628 * we are on the home channel
3630 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3631 if (wlc->pub->associated) {
3633 * BMAC_NOTE: This is something that should be fixed
3634 * in ucode inits. I think that the ucode inits set
3635 * up the bcn templates and shm values with a bogus
3636 * beacon. This should not be done in the inits. If
3637 * ucode needs to set up a beacon for testing, the
3638 * test routines should write it down, not expect the
3639 * inits to populate a bogus beacon.
3641 if (BRCMS_PHY_11N_CAP(wlc->band))
3642 brcms_b_write_shm(wlc->hw,
3643 M_BCN_TXTSF_OFFSET, 0);
3646 /* disable an active IBSS if we are not on the home channel */
3650 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3654 u8 basic_phy_rate, basic_index;
3655 u16 dir_table, basic_table;
3658 /* Shared memory address for the table we are reading */
3659 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3661 /* Shared memory address for the table we are writing */
3662 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3665 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3666 * the index into the rate table.
3668 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3669 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3670 index = phy_rate & 0xf;
3671 basic_index = basic_phy_rate & 0xf;
3673 /* Find the SHM pointer to the ACK rate entry by looking in the
3676 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3678 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3679 * to the correct basic rate for the given incoming rate
3681 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3684 static const struct brcms_c_rateset *
3685 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3687 const struct brcms_c_rateset *rs_dflt;
3689 if (BRCMS_PHY_11N_CAP(wlc->band)) {
3690 if (wlc->band->bandtype == BRCM_BAND_5G)
3691 rs_dflt = &ofdm_mimo_rates;
3693 rs_dflt = &cck_ofdm_mimo_rates;
3694 } else if (wlc->band->gmode)
3695 rs_dflt = &cck_ofdm_rates;
3697 rs_dflt = &cck_rates;
3702 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3704 const struct brcms_c_rateset *rs_dflt;
3705 struct brcms_c_rateset rs;
3706 u8 rate, basic_rate;
3709 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3711 brcms_c_rateset_copy(rs_dflt, &rs);
3712 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3714 /* walk the phy rate table and update SHM basic rate lookup table */
3715 for (i = 0; i < rs.count; i++) {
3716 rate = rs.rates[i] & BRCMS_RATE_MASK;
3718 /* for a given rate brcms_basic_rate returns the rate at
3719 * which a response ACK/CTS should be sent.
3721 basic_rate = brcms_basic_rate(wlc, rate);
3722 if (basic_rate == 0)
3723 /* This should only happen if we are using a
3724 * restricted rateset.
3726 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3728 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3732 /* band-specific init */
3733 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3735 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3736 wlc->pub->unit, wlc->band->bandunit);
3738 /* write ucode ACK/CTS rate table */
3739 brcms_c_set_ratetable(wlc);
3741 /* update some band specific mac configuration */
3742 brcms_c_ucode_mac_upd(wlc);
3744 /* init antenna selection */
3745 brcms_c_antsel_init(wlc->asi);
3749 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3751 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3754 int idle_busy_ratio_x_16 = 0;
3756 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3757 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3758 if (duty_cycle > 100 || duty_cycle < 0) {
3759 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3764 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3765 /* Only write to shared memory when wl is up */
3767 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3770 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3772 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3777 /* push sw hps and wake state through hardware */
3778 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3784 hps = brcms_c_ps_allowed(wlc);
3786 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3788 v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3793 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3795 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3798 brcms_b_wait_for_wake(wlc->hw);
3802 * Write this BSS config's MAC address to core.
3803 * Updates RXE match engine.
3805 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3808 struct brcms_c_info *wlc = bsscfg->wlc;
3810 /* enter the MAC addr into the RXE match registers */
3811 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3813 brcms_c_ampdu_macaddr_upd(wlc);
3818 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3819 * Updates RXE match engine.
3821 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3823 /* we need to update BSSID in RXE match registers */
3824 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3827 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3829 wlc_hw->shortslot = shortslot;
3831 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3832 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3833 brcms_b_update_slot_timing(wlc_hw, shortslot);
3834 brcms_c_enable_mac(wlc_hw->wlc);
3839 * Suspend the the MAC and update the slot timing
3840 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3842 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3844 /* use the override if it is set */
3845 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3846 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3848 if (wlc->shortslot == shortslot)
3851 wlc->shortslot = shortslot;
3853 brcms_b_set_shortslot(wlc->hw, shortslot);
3856 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3858 if (wlc->home_chanspec != chanspec) {
3859 wlc->home_chanspec = chanspec;
3861 if (wlc->bsscfg->associated)
3862 wlc->bsscfg->current_bss->chanspec = chanspec;
3867 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3868 bool mute_tx, struct txpwr_limits *txpwr)
3872 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3874 wlc_hw->chanspec = chanspec;
3876 /* Switch bands if necessary */
3877 if (wlc_hw->_nbands > 1) {
3878 bandunit = chspec_bandunit(chanspec);
3879 if (wlc_hw->band->bandunit != bandunit) {
3880 /* brcms_b_setband disables other bandunit,
3881 * use light band switch if not up yet
3884 wlc_phy_chanspec_radio_set(wlc_hw->
3885 bandstate[bandunit]->
3887 brcms_b_setband(wlc_hw, bandunit, chanspec);
3889 brcms_c_setxband(wlc_hw, bandunit);
3894 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3898 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3900 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3902 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3903 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3905 /* Update muting of the channel */
3906 brcms_b_mute(wlc_hw, mute_tx);
3910 /* switch to and initialize new band */
3911 static void brcms_c_setband(struct brcms_c_info *wlc,
3914 wlc->band = wlc->bandstate[bandunit];
3919 /* wait for at least one beacon before entering sleeping state */
3920 brcms_c_set_ps_ctrl(wlc);
3922 /* band-specific initializations */
3923 brcms_c_bsinit(wlc);
3926 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3929 bool switchband = false;
3930 u16 old_chanspec = wlc->chanspec;
3932 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3933 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3934 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3938 /* Switch bands if necessary */
3939 if (wlc->pub->_nbands > 1) {
3940 bandunit = chspec_bandunit(chanspec);
3941 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3943 if (wlc->bandlocked) {
3944 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3945 "band is locked!\n",
3946 wlc->pub->unit, __func__,
3947 CHSPEC_CHANNEL(chanspec));
3951 * should the setband call come after the
3952 * brcms_b_chanspec() ? if the setband updates
3953 * (brcms_c_bsinit) use low level calls to inspect and
3954 * set state, the state inspected may be from the wrong
3955 * band, or the following brcms_b_set_chanspec() may
3958 brcms_c_setband(wlc, bandunit);
3962 /* sync up phy/radio chanspec */
3963 brcms_c_set_phy_chanspec(wlc, chanspec);
3965 /* init antenna selection */
3966 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3967 brcms_c_antsel_init(wlc->asi);
3969 /* Fix the hardware rateset based on bw.
3970 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3972 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3973 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3976 /* update some mac configuration since chanspec changed */
3977 brcms_c_ucode_mac_upd(wlc);
3981 * This function changes the phytxctl for beacon based on current
3982 * beacon ratespec AND txant setting as per this table:
3983 * ratespec CCK ant = wlc->stf->txant
3986 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
3990 u16 phytxant = wlc->stf->phytxant;
3991 u16 mask = PHY_TXC_ANT_MASK;
3993 /* for non-siso rates or default setting, use the available chains */
3994 if (BRCMS_PHY_11N_CAP(wlc->band))
3995 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
3997 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
3998 phyctl = (phyctl & ~mask) | phytxant;
3999 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4003 * centralized protection config change function to simplify debugging, no
4004 * consistency checking this should be called only on changes to avoid overhead
4005 * in periodic function
4007 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4009 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4012 case BRCMS_PROT_G_SPEC:
4013 wlc->protection->_g = (bool) val;
4015 case BRCMS_PROT_G_OVR:
4016 wlc->protection->g_override = (s8) val;
4018 case BRCMS_PROT_G_USER:
4019 wlc->protection->gmode_user = (u8) val;
4021 case BRCMS_PROT_OVERLAP:
4022 wlc->protection->overlap = (s8) val;
4024 case BRCMS_PROT_N_USER:
4025 wlc->protection->nmode_user = (s8) val;
4027 case BRCMS_PROT_N_CFG:
4028 wlc->protection->n_cfg = (s8) val;
4030 case BRCMS_PROT_N_CFG_OVR:
4031 wlc->protection->n_cfg_override = (s8) val;
4033 case BRCMS_PROT_N_NONGF:
4034 wlc->protection->nongf = (bool) val;
4036 case BRCMS_PROT_N_NONGF_OVR:
4037 wlc->protection->nongf_override = (s8) val;
4039 case BRCMS_PROT_N_PAM_OVR:
4040 wlc->protection->n_pam_override = (s8) val;
4042 case BRCMS_PROT_N_OBSS:
4043 wlc->protection->n_obss = (bool) val;
4052 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4055 brcms_c_update_beacon(wlc);
4056 brcms_c_update_probe_resp(wlc, true);
4060 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4062 wlc->stf->ldpc = val;
4065 brcms_c_update_beacon(wlc);
4066 brcms_c_update_probe_resp(wlc, true);
4067 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4071 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4072 const struct ieee80211_tx_queue_params *params,
4076 struct shm_acparams acp_shm;
4079 /* Only apply params if the core is out of reset and has clocks */
4081 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4086 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4087 /* fill in shm ac params struct */
4088 acp_shm.txop = params->txop;
4089 /* convert from units of 32us to us for ucode */
4090 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4091 EDCF_TXOP2USEC(acp_shm.txop);
4092 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4094 if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4095 && acp_shm.aifs < EDCF_AIFSN_MAX)
4098 if (acp_shm.aifs < EDCF_AIFSN_MIN
4099 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4100 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4101 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4103 acp_shm.cwmin = params->cw_min;
4104 acp_shm.cwmax = params->cw_max;
4105 acp_shm.cwcur = acp_shm.cwmin;
4107 bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4109 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4110 /* Indicate the new params to the ucode */
4111 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4114 M_EDCF_STATUS_OFF));
4115 acp_shm.status |= WME_STATUS_NEWAC;
4117 /* Fill in shm acparam table */
4118 shm_entry = (u16 *) &acp_shm;
4119 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4120 brcms_b_write_shm(wlc->hw,
4122 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4127 brcms_c_suspend_mac_and_wait(wlc);
4128 brcms_c_enable_mac(wlc);
4132 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4136 struct ieee80211_tx_queue_params txq_pars;
4137 static const struct edcf_acparam default_edcf_acparams[] = {
4138 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4139 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4140 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4141 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4142 }; /* ucode needs these parameters during its initialization */
4143 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4145 for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4146 /* find out which ac this set of params applies to */
4147 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4149 /* fill in shm ac params struct */
4150 txq_pars.txop = edcf_acp->TXOP;
4151 txq_pars.aifs = edcf_acp->ACI;
4153 /* CWmin = 2^(ECWmin) - 1 */
4154 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4155 /* CWmax = 2^(ECWmax) - 1 */
4156 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4157 >> EDCF_ECWMAX_SHIFT);
4158 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4162 brcms_c_suspend_mac_and_wait(wlc);
4163 brcms_c_enable_mac(wlc);
4167 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4169 /* Don't start the timer if HWRADIO feature is disabled */
4170 if (wlc->radio_monitor)
4173 wlc->radio_monitor = true;
4174 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4175 brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4178 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4180 if (!wlc->radio_monitor)
4183 wlc->radio_monitor = false;
4184 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4185 return brcms_del_timer(wlc->radio_timer);
4188 /* read hwdisable state and propagate to wlc flag */
4189 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4191 if (wlc->pub->hw_off)
4194 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4195 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4197 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4200 /* update hwradio status and return it */
4201 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4203 brcms_c_radio_hwdisable_upd(wlc);
4205 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4209 /* periodical query hw radio button while driver is "down" */
4210 static void brcms_c_radio_timer(void *arg)
4212 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4214 if (brcms_deviceremoved(wlc)) {
4215 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4217 brcms_down(wlc->wl);
4221 brcms_c_radio_hwdisable_upd(wlc);
4224 /* common low-level watchdog code */
4225 static void brcms_b_watchdog(struct brcms_c_info *wlc)
4227 struct brcms_hardware *wlc_hw = wlc->hw;
4229 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4234 /* increment second count */
4237 /* Check for FIFO error interrupts */
4238 brcms_b_fifoerrors(wlc_hw);
4240 /* make sure RX dma has buffers */
4241 dma_rxfill(wlc->hw->di[RX_FIFO]);
4243 wlc_phy_watchdog(wlc_hw->band->pi);
4246 /* common watchdog code */
4247 static void brcms_c_watchdog(struct brcms_c_info *wlc)
4249 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4254 if (brcms_deviceremoved(wlc)) {
4255 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4257 brcms_down(wlc->wl);
4261 /* increment second count */
4264 brcms_c_radio_hwdisable_upd(wlc);
4265 /* if radio is disable, driver may be down, quit here */
4266 if (wlc->pub->radio_disabled)
4269 brcms_b_watchdog(wlc);
4272 * occasionally sample mac stat counters to
4273 * detect 16-bit counter wrap
4275 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4276 brcms_c_statsupd(wlc);
4278 if (BRCMS_ISNPHY(wlc->band) &&
4279 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4280 BRCMS_TEMPSENSE_PERIOD)) {
4281 wlc->tempsense_lasttime = wlc->pub->now;
4282 brcms_c_tempsense_upd(wlc);
4286 static void brcms_c_watchdog_by_timer(void *arg)
4288 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4290 brcms_c_watchdog(wlc);
4293 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4295 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4297 if (!wlc->wdtimer) {
4298 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4303 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4305 if (!wlc->radio_timer) {
4306 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4318 * Initialize brcms_c_info default values ...
4319 * may get overrides later in this function
4321 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4325 /* Save our copy of the chanspec */
4326 wlc->chanspec = ch20mhz_chspec(1);
4328 /* various 802.11g modes */
4329 wlc->shortslot = false;
4330 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4332 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4333 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4335 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4336 BRCMS_PROTECTION_AUTO);
4337 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4338 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4339 BRCMS_PROTECTION_AUTO);
4340 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4341 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4343 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4344 BRCMS_PROTECTION_CTL_OVERLAP);
4346 /* 802.11g draft 4.0 NonERP elt advertisement */
4347 wlc->include_legacy_erp = true;
4349 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4350 wlc->stf->txant = ANT_TX_DEF;
4352 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4354 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4355 for (i = 0; i < NFIFO; i++)
4356 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4357 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4359 /* default rate fallback retry limits */
4360 wlc->SFBL = RETRY_SHORT_FB;
4361 wlc->LFBL = RETRY_LONG_FB;
4363 /* default mac retry limits */
4364 wlc->SRL = RETRY_SHORT_DEF;
4365 wlc->LRL = RETRY_LONG_DEF;
4367 /* WME QoS mode is Auto by default */
4368 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4369 wlc->pub->bcmerror = 0;
4372 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4376 unit = wlc->pub->unit;
4378 wlc->asi = brcms_c_antsel_attach(wlc);
4379 if (wlc->asi == NULL) {
4380 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4386 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4387 if (wlc->ampdu == NULL) {
4388 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4394 if ((brcms_c_stf_attach(wlc) != 0)) {
4395 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4404 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4410 * run backplane attach, init nvram
4412 * initialize software state for each core and band
4413 * put the whole chip in reset(driver down state), no clock
4415 static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4416 uint unit, bool piomode)
4418 struct brcms_hardware *wlc_hw;
4422 struct shared_phy_params sha_params;
4423 struct wiphy *wiphy = wlc->wiphy;
4424 struct pci_dev *pcidev = core->bus->host_pci;
4425 struct ssb_sprom *sprom = &core->bus->sprom;
4427 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI)
4428 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4432 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4433 core->bus->boardinfo.vendor,
4434 core->bus->boardinfo.type);
4440 wlc_hw->unit = unit;
4441 wlc_hw->band = wlc_hw->bandstate[0];
4442 wlc_hw->_piomode = piomode;
4444 /* populate struct brcms_hardware with default values */
4445 brcms_b_info_init(wlc_hw);
4448 * Do the hardware portion of the attach. Also initialize software
4449 * state that depends on the particular hardware we are running.
4451 wlc_hw->sih = ai_attach(core->bus);
4452 if (wlc_hw->sih == NULL) {
4453 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4459 /* verify again the device is supported */
4460 if (!brcms_c_chipmatch(core)) {
4461 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported device\n",
4467 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
4468 wlc_hw->vendorid = pcidev->vendor;
4469 wlc_hw->deviceid = pcidev->device;
4471 wlc_hw->vendorid = core->bus->boardinfo.vendor;
4472 wlc_hw->deviceid = core->bus->boardinfo.type;
4475 wlc_hw->d11core = core;
4476 wlc_hw->corerev = core->id.rev;
4478 /* validate chip, chiprev and corerev */
4479 if (!brcms_c_isgoodchip(wlc_hw)) {
4484 /* initialize power control registers */
4485 ai_clkctl_init(wlc_hw->sih);
4487 /* request fastclock and force fastclock for the rest of attach
4488 * bring the d11 core out of reset.
4489 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4490 * is still false; But it will be called again inside wlc_corereset,
4491 * after d11 is out of reset.
4493 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
4494 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4496 if (!brcms_b_validate_chip_access(wlc_hw)) {
4497 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4503 /* get the board rev, used just below */
4504 j = sprom->board_rev;
4505 /* promote srom boardrev of 0xFF to 1 */
4506 if (j == BOARDREV_PROMOTABLE)
4507 j = BOARDREV_PROMOTED;
4508 wlc_hw->boardrev = (u16) j;
4509 if (!brcms_c_validboardtype(wlc_hw)) {
4510 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4511 "board type (0x%x)" " or revision level (0x%x)\n",
4512 unit, ai_get_boardtype(wlc_hw->sih),
4517 wlc_hw->sromrev = sprom->revision;
4518 wlc_hw->boardflags = sprom->boardflags_lo + (sprom->boardflags_hi << 16);
4519 wlc_hw->boardflags2 = sprom->boardflags2_lo + (sprom->boardflags2_hi << 16);
4521 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4522 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4524 /* check device id(srom, nvram etc.) to set bands */
4525 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4526 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4527 /* Dualband boards */
4528 wlc_hw->_nbands = 2;
4530 wlc_hw->_nbands = 1;
4532 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225))
4533 wlc_hw->_nbands = 1;
4535 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4536 * unconditionally does the init of these values
4538 wlc->vendorid = wlc_hw->vendorid;
4539 wlc->deviceid = wlc_hw->deviceid;
4540 wlc->pub->sih = wlc_hw->sih;
4541 wlc->pub->corerev = wlc_hw->corerev;
4542 wlc->pub->sromrev = wlc_hw->sromrev;
4543 wlc->pub->boardrev = wlc_hw->boardrev;
4544 wlc->pub->boardflags = wlc_hw->boardflags;
4545 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4546 wlc->pub->_nbands = wlc_hw->_nbands;
4548 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4550 if (wlc_hw->physhim == NULL) {
4551 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4557 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4558 sha_params.sih = wlc_hw->sih;
4559 sha_params.physhim = wlc_hw->physhim;
4560 sha_params.unit = unit;
4561 sha_params.corerev = wlc_hw->corerev;
4562 sha_params.vid = wlc_hw->vendorid;
4563 sha_params.did = wlc_hw->deviceid;
4564 sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4565 sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4566 sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4567 sha_params.sromrev = wlc_hw->sromrev;
4568 sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4569 sha_params.boardrev = wlc_hw->boardrev;
4570 sha_params.boardflags = wlc_hw->boardflags;
4571 sha_params.boardflags2 = wlc_hw->boardflags2;
4573 /* alloc and save pointer to shared phy state area */
4574 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4575 if (!wlc_hw->phy_sh) {
4580 /* initialize software state for each core and band */
4581 for (j = 0; j < wlc_hw->_nbands; j++) {
4583 * band0 is always 2.4Ghz
4584 * band1, if present, is 5Ghz
4587 brcms_c_setxband(wlc_hw, j);
4589 wlc_hw->band->bandunit = j;
4590 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4591 wlc->band->bandunit = j;
4592 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4593 wlc->core->coreidx = core->core_index;
4595 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4596 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4598 /* init tx fifo size */
4599 WARN_ON((wlc_hw->corerev - XMTFIFOTBL_STARTREV) < 0 ||
4600 (wlc_hw->corerev - XMTFIFOTBL_STARTREV) >
4601 ARRAY_SIZE(xmtfifo_sz));
4602 wlc_hw->xmtfifo_sz =
4603 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4604 WARN_ON(!wlc_hw->xmtfifo_sz[0]);
4606 /* Get a phy for this band */
4608 wlc_phy_attach(wlc_hw->phy_sh, core,
4609 wlc_hw->band->bandtype,
4611 if (wlc_hw->band->pi == NULL) {
4612 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4613 "attach failed\n", unit);
4618 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4620 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4621 &wlc_hw->band->phyrev,
4622 &wlc_hw->band->radioid,
4623 &wlc_hw->band->radiorev);
4624 wlc_hw->band->abgphy_encore =
4625 wlc_phy_get_encore(wlc_hw->band->pi);
4626 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4627 wlc_hw->band->core_flags =
4628 wlc_phy_get_coreflags(wlc_hw->band->pi);
4630 /* verify good phy_type & supported phy revision */
4631 if (BRCMS_ISNPHY(wlc_hw->band)) {
4632 if (NCONF_HAS(wlc_hw->band->phyrev))
4636 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4637 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4643 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4644 "phy type/rev (%d/%d)\n", unit,
4645 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4652 * BMAC_NOTE: wlc->band->pi should not be set below and should
4653 * be done in the high level attach. However we can not make
4654 * that change until all low level access is changed to
4655 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4656 * keeping wlc_hw->band->pi as well for incremental update of
4657 * low level fns, and cut over low only init when all fns
4660 wlc->band->pi = wlc_hw->band->pi;
4661 wlc->band->phytype = wlc_hw->band->phytype;
4662 wlc->band->phyrev = wlc_hw->band->phyrev;
4663 wlc->band->radioid = wlc_hw->band->radioid;
4664 wlc->band->radiorev = wlc_hw->band->radiorev;
4666 /* default contention windows size limits */
4667 wlc_hw->band->CWmin = APHY_CWMIN;
4668 wlc_hw->band->CWmax = PHY_CWMAX;
4670 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4676 /* disable core to match driver "down" state */
4677 brcms_c_coredisable(wlc_hw);
4679 /* Match driver "down" state */
4680 ai_pci_down(wlc_hw->sih);
4682 /* turn off pll and xtal to match driver "down" state */
4683 brcms_b_xtal(wlc_hw, OFF);
4685 /* *******************************************************************
4686 * The hardware is in the DOWN state at this point. D11 core
4687 * or cores are in reset with clocks off, and the board PLLs
4688 * are off if possible.
4690 * Beyond this point, wlc->sbclk == false and chip registers
4691 * should not be touched.
4692 *********************************************************************
4695 /* init etheraddr state variables */
4696 brcms_c_get_macaddr(wlc_hw, wlc_hw->etheraddr);
4698 if (is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4699 is_zero_ether_addr(wlc_hw->etheraddr)) {
4700 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr\n",
4706 BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x\n",
4707 wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih));
4712 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4717 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4720 unit = wlc->pub->unit;
4722 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4723 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4724 wlc->band->antgain = 8;
4725 } else if (wlc->band->antgain == -1) {
4726 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4727 " srom, using 2dB\n", unit, __func__);
4728 wlc->band->antgain = 8;
4731 /* Older sroms specified gain in whole dbm only. In order
4732 * be able to specify qdbm granularity and remain backward
4733 * compatible the whole dbms are now encoded in only
4734 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4735 * 6 bit signed number ranges from -32 - 31.
4739 * 0xc1 = 1.75 db (1 + 3 quarters),
4740 * 0x3f = -1 (-1 + 0 quarters),
4741 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4742 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4744 gain = wlc->band->antgain & 0x3f;
4745 gain <<= 2; /* Sign extend */
4747 fract = (wlc->band->antgain & 0xc0) >> 6;
4748 wlc->band->antgain = 4 * gain + fract;
4752 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4757 struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom;
4759 unit = wlc->pub->unit;
4760 bandtype = wlc->band->bandtype;
4762 /* get antennas available */
4763 if (bandtype == BRCM_BAND_5G)
4764 aa = sprom->ant_available_a;
4766 aa = sprom->ant_available_bg;
4768 if ((aa < 1) || (aa > 15)) {
4769 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4770 " srom (0x%x), using 3\n", unit, __func__, aa);
4774 /* reset the defaults if we have a single antenna */
4776 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4777 wlc->stf->txant = ANT_TX_FORCE_0;
4778 } else if (aa == 2) {
4779 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4780 wlc->stf->txant = ANT_TX_FORCE_1;
4784 /* Compute Antenna Gain */
4785 if (bandtype == BRCM_BAND_5G)
4786 wlc->band->antgain = sprom->antenna_gain.a1;
4788 wlc->band->antgain = sprom->antenna_gain.a0;
4790 brcms_c_attach_antgain_init(wlc);
4795 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4798 struct brcms_band *band;
4799 struct brcms_bss_info *bi = wlc->default_bss;
4801 /* init default and target BSS with some sane initial values */
4802 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4803 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4805 /* fill the default channel as the first valid channel
4806 * starting from the 2G channels
4808 chanspec = ch20mhz_chspec(1);
4809 wlc->home_chanspec = bi->chanspec = chanspec;
4811 /* find the band of our default channel */
4813 if (wlc->pub->_nbands > 1 &&
4814 band->bandunit != chspec_bandunit(chanspec))
4815 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4817 /* init bss rates to the band specific default rate set */
4818 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4819 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4820 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4821 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4823 if (wlc->pub->_n_enab & SUPPORT_11N)
4824 bi->flags |= BRCMS_BSS_HT;
4827 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4830 struct brcms_band *band;
4832 for (i = 0; i < wlc->pub->_nbands; i++) {
4833 band = wlc->bandstate[i];
4834 if (band->bandtype == BRCM_BAND_5G) {
4835 if ((bwcap == BRCMS_N_BW_40ALL)
4836 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4837 band->mimo_cap_40 = true;
4839 band->mimo_cap_40 = false;
4841 if (bwcap == BRCMS_N_BW_40ALL)
4842 band->mimo_cap_40 = true;
4844 band->mimo_cap_40 = false;
4849 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4851 /* free timer state */
4853 brcms_free_timer(wlc->wdtimer);
4854 wlc->wdtimer = NULL;
4856 if (wlc->radio_timer) {
4857 brcms_free_timer(wlc->radio_timer);
4858 wlc->radio_timer = NULL;
4862 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4865 brcms_c_antsel_detach(wlc->asi);
4870 brcms_c_ampdu_detach(wlc->ampdu);
4874 brcms_c_stf_detach(wlc);
4880 static int brcms_b_detach(struct brcms_c_info *wlc)
4883 struct brcms_hw_band *band;
4884 struct brcms_hardware *wlc_hw = wlc->hw;
4889 brcms_b_detach_dmapio(wlc_hw);
4891 band = wlc_hw->band;
4892 for (i = 0; i < wlc_hw->_nbands; i++) {
4894 /* Detach this band's phy */
4895 wlc_phy_detach(band->pi);
4898 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4901 /* Free shared phy state */
4902 kfree(wlc_hw->phy_sh);
4904 wlc_phy_shim_detach(wlc_hw->physhim);
4907 ai_detach(wlc_hw->sih);
4916 * Return a count of the number of driver callbacks still pending.
4918 * General policy is that brcms_c_detach can only dealloc/free software states.
4919 * It can NOT touch hardware registers since the d11core may be in reset and
4920 * clock may not be available.
4921 * One exception is sb register access, which is possible if crystal is turned
4922 * on after "down" state, driver should avoid software timer with the exception
4925 uint brcms_c_detach(struct brcms_c_info *wlc)
4932 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4934 callbacks += brcms_b_detach(wlc);
4936 /* delete software timers */
4937 if (!brcms_c_radio_monitor_stop(wlc))
4940 brcms_c_channel_mgr_detach(wlc->cmi);
4942 brcms_c_timers_deinit(wlc);
4944 brcms_c_detach_module(wlc);
4946 brcms_c_detach_mfree(wlc);
4950 /* update state that depends on the current value of "ap" */
4951 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
4953 /* STA-BSS; short capable */
4954 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
4957 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
4958 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
4960 if (wlc_hw->wlc->pub->hw_up)
4963 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
4966 * Enable pll and xtal, initialize the power control registers,
4967 * and force fastclock for the remainder of brcms_c_up().
4969 brcms_b_xtal(wlc_hw, ON);
4970 ai_clkctl_init(wlc_hw->sih);
4971 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
4974 * TODO: test suspend/resume
4976 * AI chip doesn't restore bar0win2 on
4977 * hibernation/resume, need sw fixup
4981 * Inform phy that a POR reset has occurred so
4982 * it does a complete phy init
4984 wlc_phy_por_inform(wlc_hw->band->pi);
4986 wlc_hw->ucode_loaded = false;
4987 wlc_hw->wlc->pub->hw_up = true;
4989 if ((wlc_hw->boardflags & BFL_FEM)
4990 && (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
4992 (wlc_hw->boardrev >= 0x1250
4993 && (wlc_hw->boardflags & BFL_FEM_BT)))
4994 ai_epa_4313war(wlc_hw->sih);
4998 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5000 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5003 * Enable pll and xtal, initialize the power control registers,
5004 * and force fastclock for the remainder of brcms_c_up().
5006 brcms_b_xtal(wlc_hw, ON);
5007 ai_clkctl_init(wlc_hw->sih);
5008 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
5011 * Configure pci/pcmcia here instead of in brcms_c_attach()
5012 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5014 bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci[0], wlc_hw->d11core,
5018 * Need to read the hwradio status here to cover the case where the
5019 * system is loaded with the hw radio disabled. We do not want to
5020 * bring the driver up in this case.
5022 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5023 /* put SB PCI in down state again */
5024 ai_pci_down(wlc_hw->sih);
5025 brcms_b_xtal(wlc_hw, OFF);
5029 ai_pci_up(wlc_hw->sih);
5031 /* reset the d11 core */
5032 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5037 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5039 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5042 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5044 /* FULLY enable dynamic power control and d11 core interrupt */
5045 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);
5046 brcms_intrson(wlc_hw->wlc->wl);
5051 * Write WME tunable parameters for retransmit/max rate
5052 * from wlc struct to ucode
5054 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5058 /* Need clock to do this */
5062 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5063 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5064 wlc->wme_retries[ac]);
5067 /* make interface operational */
5068 int brcms_c_up(struct brcms_c_info *wlc)
5070 struct ieee80211_channel *ch;
5072 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5074 /* HW is turned off so don't try to access it */
5075 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5078 if (!wlc->pub->hw_up) {
5079 brcms_b_hw_up(wlc->hw);
5080 wlc->pub->hw_up = true;
5083 if ((wlc->pub->boardflags & BFL_FEM)
5084 && (ai_get_chip_id(wlc->hw->sih) == BCMA_CHIP_ID_BCM4313)) {
5085 if (wlc->pub->boardrev >= 0x1250
5086 && (wlc->pub->boardflags & BFL_FEM_BT))
5087 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5088 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5090 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5091 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5095 * Need to read the hwradio status here to cover the case where the
5096 * system is loaded with the hw radio disabled. We do not want to bring
5097 * the driver up in this case. If radio is disabled, abort up, lower
5098 * power, start radio timer and return 0(for NDIS) don't call
5099 * radio_update to avoid looping brcms_c_up.
5101 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5103 if (!wlc->pub->radio_disabled) {
5104 int status = brcms_b_up_prep(wlc->hw);
5105 if (status == -ENOMEDIUM) {
5107 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5108 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5109 mboolset(wlc->pub->radio_disabled,
5110 WL_RADIO_HW_DISABLE);
5112 if (bsscfg->enable && bsscfg->BSS)
5113 wiphy_err(wlc->wiphy, "wl%d: up"
5115 "bsscfg_disable()\n",
5121 if (wlc->pub->radio_disabled) {
5122 brcms_c_radio_monitor_start(wlc);
5126 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5129 brcms_c_radio_monitor_stop(wlc);
5131 /* Set EDCF hostflags */
5132 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5134 brcms_init(wlc->wl);
5135 wlc->pub->up = true;
5137 if (wlc->bandinit_pending) {
5138 ch = wlc->pub->ieee_hw->conf.channel;
5139 brcms_c_suspend_mac_and_wait(wlc);
5140 brcms_c_set_chanspec(wlc, ch20mhz_chspec(ch->hw_value));
5141 wlc->bandinit_pending = false;
5142 brcms_c_enable_mac(wlc);
5145 brcms_b_up_finish(wlc->hw);
5147 /* Program the TX wme params with the current settings */
5148 brcms_c_wme_retries_write(wlc);
5150 /* start one second watchdog timer */
5151 brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5152 wlc->WDarmed = true;
5154 /* ensure antenna config is up to date */
5155 brcms_c_stf_phy_txant_upd(wlc);
5156 /* ensure LDPC config is in sync */
5157 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5162 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5169 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5174 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5179 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5181 /* disable interrupts */
5183 wlc_hw->wlc->macintmask = 0;
5185 /* now disable interrupts */
5186 brcms_intrsoff(wlc_hw->wlc->wl);
5188 /* ensure we're running on the pll clock again */
5189 brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);
5191 /* down phy at the last of this stage */
5192 callbacks += wlc_phy_down(wlc_hw->band->pi);
5197 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5202 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5208 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5210 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5213 wlc_hw->sbclk = false;
5214 wlc_hw->clk = false;
5215 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5217 /* reclaim any posted packets */
5218 brcms_c_flushqueues(wlc_hw->wlc);
5221 /* Reset and disable the core */
5222 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5223 if (bcma_read32(wlc_hw->d11core,
5224 D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5225 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5226 callbacks += brcms_reset(wlc_hw->wlc->wl);
5227 brcms_c_coredisable(wlc_hw);
5230 /* turn off primary xtal and pll */
5231 if (!wlc_hw->noreset) {
5232 ai_pci_down(wlc_hw->sih);
5233 brcms_b_xtal(wlc_hw, OFF);
5241 * Mark the interface nonoperational, stop the software mechanisms,
5242 * disable the hardware, free any transient buffer state.
5243 * Return a count of the number of driver callbacks still pending.
5245 uint brcms_c_down(struct brcms_c_info *wlc)
5250 bool dev_gone = false;
5252 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5254 /* check if we are already in the going down path */
5255 if (wlc->going_down) {
5256 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5257 "\n", wlc->pub->unit, __func__);
5263 wlc->going_down = true;
5265 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5267 dev_gone = brcms_deviceremoved(wlc);
5269 /* Call any registered down handlers */
5270 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5271 if (wlc->modulecb[i].down_fn)
5273 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5276 /* cancel the watchdog timer */
5278 if (!brcms_del_timer(wlc->wdtimer))
5280 wlc->WDarmed = false;
5282 /* cancel all other timers */
5283 callbacks += brcms_c_down_del_timer(wlc);
5285 wlc->pub->up = false;
5287 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5289 callbacks += brcms_b_down_finish(wlc->hw);
5291 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5294 wlc->going_down = false;
5298 /* Set the current gmode configuration */
5299 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5303 struct brcms_c_rateset rs;
5304 /* Default to 54g Auto */
5305 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5306 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5307 bool shortslot_restrict = false; /* Restrict association to stations
5308 * that support shortslot
5310 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5311 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5312 int preamble = BRCMS_PLCP_LONG;
5313 bool preamble_restrict = false; /* Restrict association to stations
5314 * that support short preambles
5316 struct brcms_band *band;
5318 /* if N-support is enabled, allow Gmode set as long as requested
5319 * Gmode is not GMODE_LEGACY_B
5321 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5324 /* verify that we are dealing with 2G band and grab the band pointer */
5325 if (wlc->band->bandtype == BRCM_BAND_2G)
5327 else if ((wlc->pub->_nbands > 1) &&
5328 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5329 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5333 /* update configuration value */
5335 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5337 /* Clear rateset override */
5338 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5341 case GMODE_LEGACY_B:
5342 shortslot = BRCMS_SHORTSLOT_OFF;
5343 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5351 /* Accept defaults */
5356 preamble = BRCMS_PLCP_SHORT;
5357 preamble_restrict = true;
5360 case GMODE_PERFORMANCE:
5361 shortslot = BRCMS_SHORTSLOT_ON;
5362 shortslot_restrict = true;
5364 preamble = BRCMS_PLCP_SHORT;
5365 preamble_restrict = true;
5370 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5371 wlc->pub->unit, __func__, gmode);
5375 band->gmode = gmode;
5377 wlc->shortslot_override = shortslot;
5379 /* Use the default 11g rateset */
5381 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5384 for (i = 0; i < rs.count; i++) {
5385 if (rs.rates[i] == BRCM_RATE_6M
5386 || rs.rates[i] == BRCM_RATE_12M
5387 || rs.rates[i] == BRCM_RATE_24M)
5388 rs.rates[i] |= BRCMS_RATE_FLAG;
5392 /* Set default bss rateset */
5393 wlc->default_bss->rateset.count = rs.count;
5394 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5395 sizeof(wlc->default_bss->rateset.rates));
5400 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5405 if (wlc->stf->txstreams == WL_11N_3x3)
5410 /* force GMODE_AUTO if NMODE is ON */
5411 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5412 if (nmode == WL_11N_3x3)
5413 wlc->pub->_n_enab = SUPPORT_HT;
5415 wlc->pub->_n_enab = SUPPORT_11N;
5416 wlc->default_bss->flags |= BRCMS_BSS_HT;
5417 /* add the mcs rates to the default and hw ratesets */
5418 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5419 wlc->stf->txstreams);
5420 for (i = 0; i < wlc->pub->_nbands; i++)
5421 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5422 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5428 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5429 struct brcms_c_rateset *rs_arg)
5431 struct brcms_c_rateset rs, new;
5434 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5436 /* check for bad count value */
5437 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5440 /* try the current band */
5441 bandunit = wlc->band->bandunit;
5442 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5443 if (brcms_c_rate_hwrs_filter_sort_validate
5444 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5445 wlc->stf->txstreams))
5448 /* try the other band */
5449 if (brcms_is_mband_unlocked(wlc)) {
5450 bandunit = OTHERBANDUNIT(wlc);
5451 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5452 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5454 bandstate[bandunit]->
5456 wlc->stf->txstreams))
5463 /* apply new rateset */
5464 memcpy(&wlc->default_bss->rateset, &new,
5465 sizeof(struct brcms_c_rateset));
5466 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5467 sizeof(struct brcms_c_rateset));
5471 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5476 if (wlc->bsscfg->associated)
5477 r = wlc->bsscfg->current_bss->rateset.rates[0];
5479 r = wlc->default_bss->rateset.rates[0];
5481 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5484 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5486 u16 chspec = ch20mhz_chspec(channel);
5488 if (channel < 0 || channel > MAXCHANNEL)
5491 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5495 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5496 if (wlc->band->bandunit != chspec_bandunit(chspec))
5497 wlc->bandinit_pending = true;
5499 wlc->bandinit_pending = false;
5502 wlc->default_bss->chanspec = chspec;
5503 /* brcms_c_BSSinit() will sanitize the rateset before
5505 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5506 brcms_c_set_home_chanspec(wlc, chspec);
5507 brcms_c_suspend_mac_and_wait(wlc);
5508 brcms_c_set_chanspec(wlc, chspec);
5509 brcms_c_enable_mac(wlc);
5514 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5518 if (srl < 1 || srl > RETRY_SHORT_MAX ||
5519 lrl < 1 || lrl > RETRY_SHORT_MAX)
5525 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5527 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5528 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5529 EDCF_SHORT, wlc->SRL);
5530 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5531 EDCF_LONG, wlc->LRL);
5533 brcms_c_wme_retries_write(wlc);
5538 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5539 struct brcm_rateset *currs)
5541 struct brcms_c_rateset *rs;
5543 if (wlc->pub->associated)
5544 rs = &wlc->bsscfg->current_bss->rateset;
5546 rs = &wlc->default_bss->rateset;
5548 /* Copy only legacy rateset section */
5549 currs->count = rs->count;
5550 memcpy(&currs->rates, &rs->rates, rs->count);
5553 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5555 struct brcms_c_rateset internal_rs;
5558 if (rs->count > BRCMS_NUMRATES)
5561 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5563 /* Copy only legacy rateset section */
5564 internal_rs.count = rs->count;
5565 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5567 /* merge rateset coming in with the current mcsset */
5568 if (wlc->pub->_n_enab & SUPPORT_11N) {
5569 struct brcms_bss_info *mcsset_bss;
5570 if (wlc->bsscfg->associated)
5571 mcsset_bss = wlc->bsscfg->current_bss;
5573 mcsset_bss = wlc->default_bss;
5574 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5578 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5580 brcms_c_ofdm_rateset_war(wlc);
5585 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5587 if (period < DOT11_MIN_BEACON_PERIOD ||
5588 period > DOT11_MAX_BEACON_PERIOD)
5591 wlc->default_bss->beacon_period = period;
5595 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5597 return wlc->band->phytype;
5600 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5602 wlc->shortslot_override = sslot_override;
5605 * shortslot is an 11g feature, so no more work if we are
5606 * currently on the 5G band
5608 if (wlc->band->bandtype == BRCM_BAND_5G)
5611 if (wlc->pub->up && wlc->pub->associated) {
5612 /* let watchdog or beacon processing update shortslot */
5613 } else if (wlc->pub->up) {
5614 /* unassociated shortslot is off */
5615 brcms_c_switch_shortslot(wlc, false);
5617 /* driver is down, so just update the brcms_c_info
5619 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5620 wlc->shortslot = false;
5623 (wlc->shortslot_override ==
5624 BRCMS_SHORTSLOT_ON);
5629 * register watchdog and down handlers.
5631 int brcms_c_module_register(struct brcms_pub *pub,
5632 const char *name, struct brcms_info *hdl,
5633 int (*d_fn)(void *handle))
5635 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5638 /* find an empty entry and just add, no duplication check! */
5639 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5640 if (wlc->modulecb[i].name[0] == '\0') {
5641 strncpy(wlc->modulecb[i].name, name,
5642 sizeof(wlc->modulecb[i].name) - 1);
5643 wlc->modulecb[i].hdl = hdl;
5644 wlc->modulecb[i].down_fn = d_fn;
5652 /* unregister module callbacks */
5653 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5654 struct brcms_info *hdl)
5656 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5662 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5663 if (!strcmp(wlc->modulecb[i].name, name) &&
5664 (wlc->modulecb[i].hdl == hdl)) {
5665 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5670 /* table not found! */
5674 void brcms_c_print_txstatus(struct tx_status *txs)
5676 pr_debug("\ntxpkt (MPDU) Complete\n");
5678 pr_debug("FrameID: %04x TxStatus: %04x\n", txs->frameid, txs->status);
5680 pr_debug("[15:12] %d frame attempts\n",
5681 (txs->status & TX_STATUS_FRM_RTX_MASK) >>
5682 TX_STATUS_FRM_RTX_SHIFT);
5683 pr_debug(" [11:8] %d rts attempts\n",
5684 (txs->status & TX_STATUS_RTS_RTX_MASK) >>
5685 TX_STATUS_RTS_RTX_SHIFT);
5686 pr_debug(" [7] %d PM mode indicated\n",
5687 txs->status & TX_STATUS_PMINDCTD ? 1 : 0);
5688 pr_debug(" [6] %d intermediate status\n",
5689 txs->status & TX_STATUS_INTERMEDIATE ? 1 : 0);
5690 pr_debug(" [5] %d AMPDU\n",
5691 txs->status & TX_STATUS_AMPDU ? 1 : 0);
5692 pr_debug(" [4:2] %d Frame Suppressed Reason (%s)\n",
5693 (txs->status & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT,
5698 "Previous frag failure",
5702 } [(txs->status & TX_STATUS_SUPR_MASK) >>
5703 TX_STATUS_SUPR_SHIFT]);
5704 pr_debug(" [1] %d acked\n",
5705 txs->status & TX_STATUS_ACK_RCV ? 1 : 0);
5707 pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5708 txs->lasttxtime, txs->sequence, txs->phyerr,
5709 (txs->ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT,
5710 (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5713 static bool brcms_c_chipmatch_pci(struct bcma_device *core)
5715 struct pci_dev *pcidev = core->bus->host_pci;
5716 u16 vendor = pcidev->vendor;
5717 u16 device = pcidev->device;
5719 if (vendor != PCI_VENDOR_ID_BROADCOM) {
5720 pr_err("unknown vendor id %04x\n", vendor);
5724 if (device == BCM43224_D11N_ID_VEN1)
5726 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5728 if (device == BCM4313_D11N2G_ID)
5730 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5733 pr_err("unknown device id %04x\n", device);
5737 static bool brcms_c_chipmatch_soc(struct bcma_device *core)
5739 struct bcma_chipinfo *chipinfo = &core->bus->chipinfo;
5741 if (chipinfo->id == BCMA_CHIP_ID_BCM4716)
5744 pr_err("unknown chip id %04x\n", chipinfo->id);
5748 bool brcms_c_chipmatch(struct bcma_device *core)
5750 switch (core->bus->hosttype) {
5751 case BCMA_HOSTTYPE_PCI:
5752 return brcms_c_chipmatch_pci(core);
5753 case BCMA_HOSTTYPE_SOC:
5754 return brcms_c_chipmatch_soc(core);
5756 pr_err("unknown host type: %i\n", core->bus->hosttype);
5762 void brcms_c_print_txdesc(struct d11txh *txh)
5764 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5765 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5766 u16 mfc = le16_to_cpu(txh->MacFrameControl);
5767 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5768 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5769 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5770 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5771 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5772 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5773 u16 mainrates = le16_to_cpu(txh->MainRates);
5774 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5776 u8 *ra = txh->TxFrameRA;
5777 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5778 u8 *rtspfb = txh->RTSPLCPFallback;
5779 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5780 u8 *fragpfb = txh->FragPLCPFallback;
5781 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5782 u16 mmodelen = le16_to_cpu(txh->MModeLen);
5783 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5784 u16 tfid = le16_to_cpu(txh->TxFrameID);
5785 u16 txs = le16_to_cpu(txh->TxStatus);
5786 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5787 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5788 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5789 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5791 u8 *rtsph = txh->RTSPhyHeader;
5792 struct ieee80211_rts rts = txh->rts_frame;
5794 /* add plcp header along with txh descriptor */
5795 brcmu_dbg_hex_dump(txh, sizeof(struct d11txh) + 48,
5796 "Raw TxDesc + plcp header:\n");
5798 pr_debug("TxCtlLow: %04x ", mtcl);
5799 pr_debug("TxCtlHigh: %04x ", mtch);
5800 pr_debug("FC: %04x ", mfc);
5801 pr_debug("FES Time: %04x\n", tfest);
5802 pr_debug("PhyCtl: %04x%s ", ptcw,
5803 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5804 pr_debug("PhyCtl_1: %04x ", ptcw_1);
5805 pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5806 pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5807 pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5808 pr_debug("MainRates: %04x ", mainrates);
5809 pr_debug("XtraFrameTypes: %04x ", xtraft);
5812 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5813 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5814 ra, sizeof(txh->TxFrameRA));
5816 pr_debug("Fb FES Time: %04x ", tfestfb);
5817 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5818 rtspfb, sizeof(txh->RTSPLCPFallback));
5819 pr_debug("RTS DUR: %04x ", rtsdfb);
5820 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5821 fragpfb, sizeof(txh->FragPLCPFallback));
5822 pr_debug("DUR: %04x", fragdfb);
5825 pr_debug("MModeLen: %04x ", mmodelen);
5826 pr_debug("MModeFbrLen: %04x\n", mmodefbrlen);
5828 pr_debug("FrameID: %04x\n", tfid);
5829 pr_debug("TxStatus: %04x\n", txs);
5831 pr_debug("MaxNumMpdu: %04x\n", mnmpdu);
5832 pr_debug("MaxAggbyte: %04x\n", mabyte);
5833 pr_debug("MaxAggbyte_fb: %04x\n", mabyte_f);
5834 pr_debug("MinByte: %04x\n", mmbyte);
5836 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5837 rtsph, sizeof(txh->RTSPhyHeader));
5838 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5839 (u8 *)&rts, sizeof(txh->rts_frame));
5842 #endif /* defined(DEBUG) */
5846 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5852 int slen = 0, nlen = 0;
5856 if (len < 2 || !buf)
5861 for (i = 0; flags != 0; i++) {
5864 if (bit == 0 && flags != 0) {
5865 /* print any unnamed bits */
5866 snprintf(hexstr, 16, "0x%X", flags);
5868 flags = 0; /* exit loop */
5869 } else if ((flags & bit) == 0)
5872 nlen = strlen(name);
5874 /* count btwn flag space */
5877 /* need NULL char as well */
5880 /* copy NULL char but don't count it */
5881 strncpy(p, name, nlen + 1);
5883 /* copy btwn flag space and NULL char */
5885 p += snprintf(p, 2, " ");
5889 /* indicate the str was too short */
5892 p -= 2 - len; /* overwrite last char */
5893 p += snprintf(p, 2, ">");
5896 return (int)(p - buf);
5898 #endif /* defined(DEBUG) */
5901 void brcms_c_print_rxh(struct d11rxhdr *rxh)
5903 u16 len = rxh->RxFrameSize;
5904 u16 phystatus_0 = rxh->PhyRxStatus_0;
5905 u16 phystatus_1 = rxh->PhyRxStatus_1;
5906 u16 phystatus_2 = rxh->PhyRxStatus_2;
5907 u16 phystatus_3 = rxh->PhyRxStatus_3;
5908 u16 macstatus1 = rxh->RxStatus1;
5909 u16 macstatus2 = rxh->RxStatus2;
5912 static const struct brcms_c_bit_desc macstat_flags[] = {
5913 {RXS_FCSERR, "FCSErr"},
5914 {RXS_RESPFRAMETX, "Reply"},
5915 {RXS_PBPRES, "PADDING"},
5916 {RXS_DECATMPT, "DeCr"},
5917 {RXS_DECERR, "DeCrErr"},
5918 {RXS_BCNSENT, "Bcn"},
5922 brcmu_dbg_hex_dump(rxh, sizeof(struct d11rxhdr), "Raw RxDesc:\n");
5924 brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
5926 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
5928 pr_debug("RxFrameSize: %6s (%d)%s\n", lenbuf, len,
5929 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
5930 pr_debug("RxPHYStatus: %04x %04x %04x %04x\n",
5931 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
5932 pr_debug("RxMACStatus: %x %s\n", macstatus1, flagstr);
5933 pr_debug("RXMACaggtype: %x\n",
5934 (macstatus2 & RXS_AGGTYPE_MASK));
5935 pr_debug("RxTSFTime: %04x\n", rxh->RxTSFTime);
5937 #endif /* defined(DEBUG) */
5939 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
5944 /* get the phy specific rate encoding for the PLCP SIGNAL field */
5945 if (is_ofdm_rate(rate))
5946 table_ptr = M_RT_DIRMAP_A;
5948 table_ptr = M_RT_DIRMAP_B;
5950 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
5951 * the index into the rate table.
5953 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
5954 index = phy_rate & 0xf;
5956 /* Find the SHM pointer to the rate table entry by looking in the
5959 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
5963 * bcmc_fid_generate:
5964 * Generate frame ID for a BCMC packet. The frag field is not used
5965 * for MC frames so is used as part of the sequence number.
5968 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
5973 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
5977 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
5984 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
5989 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
5990 wlc->pub->unit, rspec, preamble_type);
5992 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
5993 * is less than or equal to the rate of the immediately previous
5996 rspec = brcms_basic_rate(wlc, rspec);
5997 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
5999 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6000 (DOT11_ACK_LEN + FCS_LEN));
6005 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6008 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6009 wlc->pub->unit, rspec, preamble_type);
6010 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6014 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6017 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6018 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6020 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6021 * is less than or equal to the rate of the immediately previous
6024 rspec = brcms_basic_rate(wlc, rspec);
6025 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6026 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6027 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6031 /* brcms_c_compute_frame_dur()
6033 * Calculate the 802.11 MAC header DUR field for MPDU
6034 * DUR for a single frame = 1 SIFS + 1 ACK
6035 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6037 * rate MPDU rate in unit of 500kbps
6038 * next_frag_len next MPDU length in bytes
6039 * preamble_type use short/GF or long/MM PLCP header
6042 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6043 u8 preamble_type, uint next_frag_len)
6047 sifs = get_sifs(wlc->band);
6050 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6052 if (next_frag_len) {
6053 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6055 /* add another SIFS and the frag time */
6058 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6064 /* The opposite of brcms_c_calc_frame_time */
6066 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6067 u8 preamble_type, uint dur)
6069 uint nsyms, mac_len, Ndps, kNdps;
6070 uint rate = rspec2rate(ratespec);
6072 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6073 wlc->pub->unit, ratespec, preamble_type, dur);
6075 if (is_mcs_rate(ratespec)) {
6076 uint mcs = ratespec & RSPEC_RATE_MASK;
6077 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6078 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6079 /* payload calculation matches that of regular ofdm */
6080 if (wlc->band->bandtype == BRCM_BAND_2G)
6081 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6082 /* kNdbps = kbps * 4 */
6083 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6084 rspec_issgi(ratespec)) * 4;
6085 nsyms = dur / APHY_SYMBOL_TIME;
6088 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6089 } else if (is_ofdm_rate(ratespec)) {
6090 dur -= APHY_PREAMBLE_TIME;
6091 dur -= APHY_SIGNAL_TIME;
6092 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6094 nsyms = dur / APHY_SYMBOL_TIME;
6097 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6099 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6100 dur -= BPHY_PLCP_SHORT_TIME;
6102 dur -= BPHY_PLCP_TIME;
6103 mac_len = dur * rate;
6104 /* divide out factor of 2 in rate (1/2 mbps) */
6105 mac_len = mac_len / 8 / 2;
6111 * Return true if the specified rate is supported by the specified band.
6112 * BRCM_BAND_AUTO indicates the current band.
6114 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6117 struct brcms_c_rateset *hw_rateset;
6120 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6121 hw_rateset = &wlc->band->hw_rateset;
6122 else if (wlc->pub->_nbands > 1)
6123 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6125 /* other band specified and we are a single band device */
6128 /* check if this is a mimo rate */
6129 if (is_mcs_rate(rspec)) {
6130 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6133 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6136 for (i = 0; i < hw_rateset->count; i++)
6137 if (hw_rateset->rates[i] == rspec2rate(rspec))
6141 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6142 "not in hw_rateset\n", wlc->pub->unit, rspec);
6148 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6151 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6152 u8 rate = int_val & NRATE_RATE_MASK;
6154 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6155 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6156 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6157 == NRATE_OVERRIDE_MCS_ONLY);
6163 /* validate the combination of rate/mcs/stf is allowed */
6164 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6165 /* mcs only allowed when nmode */
6166 if (stf > PHY_TXC1_MODE_SDM) {
6167 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6168 wlc->pub->unit, __func__);
6173 /* mcs 32 is a special case, DUP mode 40 only */
6175 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6176 ((stf != PHY_TXC1_MODE_SISO)
6177 && (stf != PHY_TXC1_MODE_CDD))) {
6178 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6179 "32\n", wlc->pub->unit, __func__);
6183 /* mcs > 7 must use stf SDM */
6184 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6185 /* mcs > 7 must use stf SDM */
6186 if (stf != PHY_TXC1_MODE_SDM) {
6187 BCMMSG(wlc->wiphy, "wl%d: enabling "
6188 "SDM mode for mcs %d\n",
6189 wlc->pub->unit, rate);
6190 stf = PHY_TXC1_MODE_SDM;
6194 * MCS 0-7 may use SISO, CDD, and for
6197 if ((stf > PHY_TXC1_MODE_STBC) ||
6198 (!BRCMS_STBC_CAP_PHY(wlc)
6199 && (stf == PHY_TXC1_MODE_STBC))) {
6200 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6201 "\n", wlc->pub->unit, __func__);
6206 } else if (is_ofdm_rate(rate)) {
6207 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6208 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6209 wlc->pub->unit, __func__);
6213 } else if (is_cck_rate(rate)) {
6214 if ((cur_band->bandtype != BRCM_BAND_2G)
6215 || (stf != PHY_TXC1_MODE_SISO)) {
6216 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6217 wlc->pub->unit, __func__);
6222 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6223 wlc->pub->unit, __func__);
6227 /* make sure multiple antennae are available for non-siso rates */
6228 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6229 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6230 "request\n", wlc->pub->unit, __func__);
6237 rspec |= RSPEC_MIMORATE;
6238 /* For STBC populate the STC field of the ratespec */
6239 if (stf == PHY_TXC1_MODE_STBC) {
6241 stc = 1; /* Nss for single stream is always 1 */
6242 rspec |= (stc << RSPEC_STC_SHIFT);
6246 rspec |= (stf << RSPEC_STF_SHIFT);
6248 if (override_mcs_only)
6249 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6252 rspec |= RSPEC_SHORT_GI;
6255 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6264 * Compute PLCP, but only requires actual rate and length of pkt.
6265 * Rate is given in the driver standard multiple of 500 kbps.
6266 * le is set for 11 Mbps rate if necessary.
6267 * Broken out for PRQ.
6270 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6271 uint length, u8 *plcp)
6284 usec = (length << 4) / 11;
6285 if ((length << 4) - (usec * 11) > 0)
6289 usec = (length << 3) / 11;
6290 if ((length << 3) - (usec * 11) > 0) {
6292 if ((usec * 11) - (length << 3) >= 8)
6293 le = D11B_PLCP_SIGNAL_LE;
6298 wiphy_err(wlc->wiphy,
6299 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6301 rate_500 = BRCM_RATE_1M;
6305 /* PLCP signal byte */
6306 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6307 /* PLCP service byte */
6308 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6309 /* PLCP length u16, little endian */
6310 plcp[2] = usec & 0xff;
6311 plcp[3] = (usec >> 8) & 0xff;
6317 /* Rate: 802.11 rate code, length: PSDU length in octets */
6318 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6320 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6322 if (rspec_is40mhz(rspec) || (mcs == 32))
6323 plcp[0] |= MIMO_PLCP_40MHZ;
6324 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6325 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6326 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6327 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6331 /* Rate: 802.11 rate code, length: PSDU length in octets */
6333 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6337 int rate = rspec2rate(rspec);
6340 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6343 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6344 memset(plcp, 0, D11_PHY_HDR_LEN);
6345 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6347 tmp = (length & 0xfff) << 5;
6348 plcp[2] |= (tmp >> 16) & 0xff;
6349 plcp[1] |= (tmp >> 8) & 0xff;
6350 plcp[0] |= tmp & 0xff;
6353 /* Rate: 802.11 rate code, length: PSDU length in octets */
6354 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6355 uint length, u8 *plcp)
6357 int rate = rspec2rate(rspec);
6359 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6363 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6364 uint length, u8 *plcp)
6366 if (is_mcs_rate(rspec))
6367 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6368 else if (is_ofdm_rate(rspec))
6369 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6371 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6374 /* brcms_c_compute_rtscts_dur()
6376 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6377 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6378 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6380 * cts cts-to-self or rts/cts
6381 * rts_rate rts or cts rate in unit of 500kbps
6382 * rate next MPDU rate in unit of 500kbps
6383 * frame_len next MPDU frame length in bytes
6386 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6388 u32 frame_rate, u8 rts_preamble_type,
6389 u8 frame_preamble_type, uint frame_len, bool ba)
6393 sifs = get_sifs(wlc->band);
6399 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6407 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6411 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6412 BRCMS_SHORT_PREAMBLE);
6415 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6416 frame_preamble_type);
6420 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6425 if (BRCMS_ISLCNPHY(wlc->band)) {
6426 bw = PHY_TXC1_BW_20MHZ;
6428 bw = rspec_get_bw(rspec);
6429 /* 10Mhz is not supported yet */
6430 if (bw < PHY_TXC1_BW_20MHZ) {
6431 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6432 "not supported yet, set to 20L\n", bw);
6433 bw = PHY_TXC1_BW_20MHZ;
6437 if (is_mcs_rate(rspec)) {
6438 uint mcs = rspec & RSPEC_RATE_MASK;
6440 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6441 phyctl1 = rspec_phytxbyte2(rspec);
6442 /* set the upper byte of phyctl1 */
6443 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6444 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6445 && !BRCMS_ISSSLPNPHY(wlc->band)) {
6447 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6448 * Data Rate. Eventually MIMOPHY would also be converted to
6451 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6452 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6453 } else { /* legacy OFDM/CCK */
6455 /* get the phyctl byte from rate phycfg table */
6456 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6458 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6459 "legacy OFDM/CCK rate\n");
6462 /* set the upper byte of phyctl1 */
6464 (bw | (phycfg << 8) |
6465 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6471 * Add struct d11txh, struct cck_phy_hdr.
6473 * 'p' data must start with 802.11 MAC header
6474 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6476 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6480 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6481 struct sk_buff *p, struct scb *scb, uint frag,
6482 uint nfrags, uint queue, uint next_frag_len)
6484 struct ieee80211_hdr *h;
6486 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6487 int len, phylen, rts_phylen;
6488 u16 mch, phyctl, xfts, mainrates;
6489 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6490 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6491 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6492 bool use_rts = false;
6493 bool use_cts = false;
6494 bool use_rifs = false;
6495 bool short_preamble[2] = { false, false };
6496 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6497 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6498 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6499 struct ieee80211_rts *rts = NULL;
6502 bool hwtkmic = false;
6503 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6504 #define ANTCFG_NONE 0xFF
6505 u8 antcfg = ANTCFG_NONE;
6506 u8 fbantcfg = ANTCFG_NONE;
6507 uint phyctl1_stf = 0;
6509 struct ieee80211_tx_rate *txrate[2];
6511 struct ieee80211_tx_info *tx_info;
6514 u8 mimo_preamble_type;
6516 /* locate 802.11 MAC header */
6517 h = (struct ieee80211_hdr *)(p->data);
6518 qos = ieee80211_is_data_qos(h->frame_control);
6520 /* compute length of frame in bytes for use in PLCP computations */
6522 phylen = len + FCS_LEN;
6525 tx_info = IEEE80211_SKB_CB(p);
6528 plcp = skb_push(p, D11_PHY_HDR_LEN);
6530 /* add Broadcom tx descriptor header */
6531 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6532 memset(txh, 0, D11_TXH_LEN);
6535 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6536 /* non-AP STA should never use BCMC queue */
6537 if (queue == TX_BCMC_FIFO) {
6538 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6539 "TX_BCMC!\n", wlc->pub->unit, __func__);
6540 frameid = bcmc_fid_generate(wlc, NULL, txh);
6542 /* Increment the counter for first fragment */
6543 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6544 scb->seqnum[p->priority]++;
6546 /* extract fragment number from frame first */
6547 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6548 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6549 h->seq_ctrl = cpu_to_le16(seq);
6551 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6552 (queue & TXFID_QUEUE_MASK);
6555 frameid |= queue & TXFID_QUEUE_MASK;
6557 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6558 if (ieee80211_is_beacon(h->frame_control))
6559 mcl |= TXC_IGNOREPMQ;
6561 txrate[0] = tx_info->control.rates;
6562 txrate[1] = txrate[0] + 1;
6565 * if rate control algorithm didn't give us a fallback
6566 * rate, use the primary rate
6568 if (txrate[1]->idx < 0)
6569 txrate[1] = txrate[0];
6571 for (k = 0; k < hw->max_rates; k++) {
6572 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6574 if ((txrate[k]->idx >= 0)
6575 && (txrate[k]->idx <
6576 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6578 hw->wiphy->bands[tx_info->band]->
6579 bitrates[txrate[k]->idx].hw_value;
6582 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6585 rspec[k] = BRCM_RATE_1M;
6588 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6589 NRATE_MCS_INUSE | txrate[k]->idx);
6593 * Currently only support same setting for primay and
6594 * fallback rates. Unify flags for each rate into a
6595 * single value for the frame
6599 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6602 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6607 * determine and validate primary rate
6608 * and fallback rates
6610 if (!rspec_active(rspec[k])) {
6611 rspec[k] = BRCM_RATE_1M;
6613 if (!is_multicast_ether_addr(h->addr1)) {
6614 /* set tx antenna config */
6615 brcms_c_antsel_antcfg_get(wlc->asi, false,
6616 false, 0, 0, &antcfg, &fbantcfg);
6621 phyctl1_stf = wlc->stf->ss_opmode;
6623 if (wlc->pub->_n_enab & SUPPORT_11N) {
6624 for (k = 0; k < hw->max_rates; k++) {
6626 * apply siso/cdd to single stream mcs's or ofdm
6627 * if rspec is auto selected
6629 if (((is_mcs_rate(rspec[k]) &&
6630 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6631 is_ofdm_rate(rspec[k]))
6632 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6633 || !(rspec[k] & RSPEC_OVERRIDE))) {
6634 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6636 /* For SISO MCS use STBC if possible */
6637 if (is_mcs_rate(rspec[k])
6638 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6641 /* Nss for single stream is always 1 */
6643 rspec[k] |= (PHY_TXC1_MODE_STBC <<
6645 (stc << RSPEC_STC_SHIFT);
6648 (phyctl1_stf << RSPEC_STF_SHIFT);
6652 * Is the phy configured to use 40MHZ frames? If
6653 * so then pick the desired txbw
6655 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6656 /* default txbw is 20in40 SB */
6657 mimo_ctlchbw = mimo_txbw =
6658 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6660 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6662 if (is_mcs_rate(rspec[k])) {
6663 /* mcs 32 must be 40b/w DUP */
6664 if ((rspec[k] & RSPEC_RATE_MASK)
6667 PHY_TXC1_BW_40MHZ_DUP;
6669 } else if (wlc->mimo_40txbw != AUTO)
6670 mimo_txbw = wlc->mimo_40txbw;
6671 /* else check if dst is using 40 Mhz */
6672 else if (scb->flags & SCB_IS40)
6673 mimo_txbw = PHY_TXC1_BW_40MHZ;
6674 } else if (is_ofdm_rate(rspec[k])) {
6675 if (wlc->ofdm_40txbw != AUTO)
6676 mimo_txbw = wlc->ofdm_40txbw;
6677 } else if (wlc->cck_40txbw != AUTO) {
6678 mimo_txbw = wlc->cck_40txbw;
6682 * mcs32 is 40 b/w only.
6683 * This is possible for probe packets on
6686 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6688 rspec[k] = RSPEC_MIMORATE;
6690 mimo_txbw = PHY_TXC1_BW_20MHZ;
6693 /* Set channel width */
6694 rspec[k] &= ~RSPEC_BW_MASK;
6695 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6696 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6698 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6700 /* Disable short GI, not supported yet */
6701 rspec[k] &= ~RSPEC_SHORT_GI;
6703 mimo_preamble_type = BRCMS_MM_PREAMBLE;
6704 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6705 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6707 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6708 && (!is_mcs_rate(rspec[k]))) {
6709 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6710 "RC_MCS != is_mcs_rate(rspec)\n",
6711 wlc->pub->unit, __func__);
6714 if (is_mcs_rate(rspec[k])) {
6715 preamble_type[k] = mimo_preamble_type;
6718 * if SGI is selected, then forced mm
6721 if ((rspec[k] & RSPEC_SHORT_GI)
6722 && is_single_stream(rspec[k] &
6724 preamble_type[k] = BRCMS_MM_PREAMBLE;
6727 /* should be better conditionalized */
6728 if (!is_mcs_rate(rspec[0])
6729 && (tx_info->control.rates[0].
6730 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6731 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6734 for (k = 0; k < hw->max_rates; k++) {
6735 /* Set ctrlchbw as 20Mhz */
6736 rspec[k] &= ~RSPEC_BW_MASK;
6737 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6739 /* for nphy, stf of ofdm frames must follow policies */
6740 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6741 rspec[k] &= ~RSPEC_STF_MASK;
6742 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6747 /* Reset these for use with AMPDU's */
6748 txrate[0]->count = 0;
6749 txrate[1]->count = 0;
6751 /* (2) PROTECTION, may change rspec */
6752 if ((ieee80211_is_data(h->frame_control) ||
6753 ieee80211_is_mgmt(h->frame_control)) &&
6754 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6757 /* (3) PLCP: determine PLCP header and MAC duration,
6758 * fill struct d11txh */
6759 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6760 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6761 memcpy(&txh->FragPLCPFallback,
6762 plcp_fallback, sizeof(txh->FragPLCPFallback));
6764 /* Length field now put in CCK FBR CRC field */
6765 if (is_cck_rate(rspec[1])) {
6766 txh->FragPLCPFallback[4] = phylen & 0xff;
6767 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6770 /* MIMO-RATE: need validation ?? */
6771 mainrates = is_ofdm_rate(rspec[0]) ?
6772 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6775 /* DUR field for main rate */
6776 if (!ieee80211_is_pspoll(h->frame_control) &&
6777 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6779 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6781 h->duration_id = cpu_to_le16(durid);
6782 } else if (use_rifs) {
6783 /* NAV protect to end of next max packet size */
6785 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6787 DOT11_MAX_FRAG_LEN);
6788 durid += RIFS_11N_TIME;
6789 h->duration_id = cpu_to_le16(durid);
6792 /* DUR field for fallback rate */
6793 if (ieee80211_is_pspoll(h->frame_control))
6794 txh->FragDurFallback = h->duration_id;
6795 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6796 txh->FragDurFallback = 0;
6798 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6799 preamble_type[1], next_frag_len);
6800 txh->FragDurFallback = cpu_to_le16(durid);
6803 /* (4) MAC-HDR: MacTxControlLow */
6805 mcl |= TXC_STARTMSDU;
6807 if (!is_multicast_ether_addr(h->addr1))
6808 mcl |= TXC_IMMEDACK;
6810 if (wlc->band->bandtype == BRCM_BAND_5G)
6811 mcl |= TXC_FREQBAND_5G;
6813 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6816 /* set AMIC bit if using hardware TKIP MIC */
6820 txh->MacTxControlLow = cpu_to_le16(mcl);
6822 /* MacTxControlHigh */
6825 /* Set fallback rate preamble type */
6826 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6827 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6828 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6829 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6832 /* MacFrameControl */
6833 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6834 txh->TxFesTimeNormal = cpu_to_le16(0);
6836 txh->TxFesTimeFallback = cpu_to_le16(0);
6839 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6842 txh->TxFrameID = cpu_to_le16(frameid);
6845 * TxStatus, Note the case of recreating the first frag of a suppressed
6846 * frame then we may need to reset the retry cnt's via the status reg
6848 txh->TxStatus = cpu_to_le16(status);
6851 * extra fields for ucode AMPDU aggregation, the new fields are added to
6852 * the END of previous structure so that it's compatible in driver.
6854 txh->MaxNMpdus = cpu_to_le16(0);
6855 txh->MaxABytes_MRT = cpu_to_le16(0);
6856 txh->MaxABytes_FBR = cpu_to_le16(0);
6857 txh->MinMBytes = cpu_to_le16(0);
6859 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
6860 * furnish struct d11txh */
6861 /* RTS PLCP header and RTS frame */
6862 if (use_rts || use_cts) {
6863 if (use_rts && use_cts)
6866 for (k = 0; k < 2; k++) {
6867 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
6872 if (!is_ofdm_rate(rts_rspec[0]) &&
6873 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
6874 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
6875 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
6876 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
6879 if (!is_ofdm_rate(rts_rspec[1]) &&
6880 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
6881 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
6882 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
6883 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
6886 /* RTS/CTS additions to MacTxControlLow */
6888 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
6890 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
6891 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
6894 /* RTS PLCP header */
6895 rts_plcp = txh->RTSPhyHeader;
6897 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
6899 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
6901 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
6903 /* fallback rate version of RTS PLCP header */
6904 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
6906 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
6907 sizeof(txh->RTSPLCPFallback));
6909 /* RTS frame fields... */
6910 rts = (struct ieee80211_rts *)&txh->rts_frame;
6912 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
6913 rspec[0], rts_preamble_type[0],
6914 preamble_type[0], phylen, false);
6915 rts->duration = cpu_to_le16(durid);
6916 /* fallback rate version of RTS DUR field */
6917 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
6918 rts_rspec[1], rspec[1],
6919 rts_preamble_type[1],
6920 preamble_type[1], phylen, false);
6921 txh->RTSDurFallback = cpu_to_le16(durid);
6924 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
6925 IEEE80211_STYPE_CTS);
6927 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
6929 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
6930 IEEE80211_STYPE_RTS);
6932 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
6936 * low 8 bits: main frag rate/mcs,
6937 * high 8 bits: rts/cts rate/mcs
6939 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
6941 (struct ofdm_phy_hdr *) rts_plcp) :
6944 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
6945 memset((char *)&txh->rts_frame, 0,
6946 sizeof(struct ieee80211_rts));
6947 memset((char *)txh->RTSPLCPFallback, 0,
6948 sizeof(txh->RTSPLCPFallback));
6949 txh->RTSDurFallback = 0;
6952 #ifdef SUPPORT_40MHZ
6953 /* add null delimiter count */
6954 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
6955 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
6956 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
6961 * Now that RTS/RTS FB preamble types are updated, write
6964 txh->MacTxControlHigh = cpu_to_le16(mch);
6967 * MainRates (both the rts and frag plcp rates have
6968 * been calculated now)
6970 txh->MainRates = cpu_to_le16(mainrates);
6972 /* XtraFrameTypes */
6973 xfts = frametype(rspec[1], wlc->mimoft);
6974 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
6975 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
6976 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
6978 txh->XtraFrameTypes = cpu_to_le16(xfts);
6980 /* PhyTxControlWord */
6981 phyctl = frametype(rspec[0], wlc->mimoft);
6982 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
6983 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
6984 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
6985 phyctl |= PHY_TXC_SHORT_HDR;
6988 /* phytxant is properly bit shifted */
6989 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
6990 txh->PhyTxControlWord = cpu_to_le16(phyctl);
6992 /* PhyTxControlWord_1 */
6993 if (BRCMS_PHY_11N_CAP(wlc->band)) {
6996 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
6997 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
6998 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
6999 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7001 if (use_rts || use_cts) {
7002 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7003 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7004 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7005 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7009 * For mcs frames, if mixedmode(overloaded with long preamble)
7010 * is going to be set, fill in non-zero MModeLen and/or
7011 * MModeFbrLen it will be unnecessary if they are separated
7013 if (is_mcs_rate(rspec[0]) &&
7014 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7016 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7017 txh->MModeLen = cpu_to_le16(mmodelen);
7020 if (is_mcs_rate(rspec[1]) &&
7021 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7023 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7024 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7028 ac = skb_get_queue_mapping(p);
7029 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7030 uint frag_dur, dur, dur_fallback;
7032 /* WME: Update TXOP threshold */
7033 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7035 brcms_c_calc_frame_time(wlc, rspec[0],
7036 preamble_type[0], phylen);
7039 /* 1 RTS or CTS-to-self frame */
7041 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7042 rts_preamble_type[0]);
7044 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7045 rts_preamble_type[1]);
7046 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7047 dur += le16_to_cpu(rts->duration);
7049 le16_to_cpu(txh->RTSDurFallback);
7050 } else if (use_rifs) {
7054 /* frame + SIFS + ACK */
7057 brcms_c_compute_frame_dur(wlc, rspec[0],
7058 preamble_type[0], 0);
7061 brcms_c_calc_frame_time(wlc, rspec[1],
7065 brcms_c_compute_frame_dur(wlc, rspec[1],
7066 preamble_type[1], 0);
7068 /* NEED to set TxFesTimeNormal (hard) */
7069 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7071 * NEED to set fallback rate version of
7072 * TxFesTimeNormal (hard)
7074 txh->TxFesTimeFallback =
7075 cpu_to_le16((u16) dur_fallback);
7078 * update txop byte threshold (txop minus intraframe
7081 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7085 brcms_c_calc_frame_len(wlc,
7086 rspec[0], preamble_type[0],
7087 (wlc->edcf_txop[ac] -
7089 /* range bound the fragthreshold */
7090 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7093 else if (newfragthresh >
7094 wlc->usr_fragthresh)
7096 wlc->usr_fragthresh;
7097 /* update the fragthresh and do txc update */
7098 if (wlc->fragthresh[queue] !=
7099 (u16) newfragthresh)
7100 wlc->fragthresh[queue] =
7101 (u16) newfragthresh;
7103 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7105 wlc->pub->unit, fifo_names[queue],
7106 rspec2rate(rspec[0]));
7109 if (dur > wlc->edcf_txop[ac])
7110 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7111 "exceeded phylen %d/%d dur %d/%d\n",
7112 wlc->pub->unit, __func__,
7114 phylen, wlc->fragthresh[queue],
7115 dur, wlc->edcf_txop[ac]);
7122 static int brcms_c_tx(struct brcms_c_info *wlc, struct sk_buff *skb)
7124 struct dma_pub *dma;
7125 int fifo, ret = -ENOSPC;
7127 u16 frameid = INVALIDFID;
7129 fifo = brcms_ac_to_fifo(skb_get_queue_mapping(skb));
7130 dma = wlc->hw->di[fifo];
7131 txh = (struct d11txh *)(skb->data);
7133 if (dma->txavail == 0) {
7135 * We sometimes get a frame from mac80211 after stopping
7136 * the queues. This only ever seems to be a single frame
7137 * and is seems likely to be a race. TX_HEADROOM should
7138 * ensure that we have enough space to handle these stray
7139 * packets, so warn if there isn't. If we're out of space
7140 * in the tx ring and the tx queue isn't stopped then
7141 * we've really got a bug; warn loudly if that happens.
7143 wiphy_warn(wlc->wiphy,
7144 "Received frame for tx with no space in DMA ring\n");
7145 WARN_ON(!ieee80211_queue_stopped(wlc->pub->ieee_hw,
7146 skb_get_queue_mapping(skb)));
7150 /* When a BC/MC frame is being committed to the BCMC fifo
7151 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7153 if (fifo == TX_BCMC_FIFO)
7154 frameid = le16_to_cpu(txh->TxFrameID);
7156 /* Commit BCMC sequence number in the SHM frame ID location */
7157 if (frameid != INVALIDFID) {
7159 * To inform the ucode of the last mcast frame posted
7160 * so that it can clear moredata bit
7162 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7165 ret = brcms_c_txfifo(wlc, fifo, skb);
7167 * The only reason for brcms_c_txfifo to fail is because
7168 * there weren't any DMA descriptors, but we've already
7169 * checked for that. So if it does fail yell loudly.
7176 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7177 struct ieee80211_hw *hw)
7180 struct scb *scb = &wlc->pri_scb;
7182 fifo = brcms_ac_to_fifo(skb_get_queue_mapping(sdu));
7183 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7185 if (brcms_c_tx(wlc, sdu))
7186 dev_kfree_skb_any(sdu);
7190 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p)
7192 struct dma_pub *dma = wlc->hw->di[fifo];
7196 ret = dma_txfast(wlc, dma, p);
7198 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7201 * Stop queue if DMA ring is full. Reserve some free descriptors,
7202 * as we sometimes receive a frame from mac80211 after the queues
7205 queue = skb_get_queue_mapping(p);
7206 if (dma->txavail <= TX_HEADROOM && fifo < TX_BCMC_FIFO &&
7207 !ieee80211_queue_stopped(wlc->pub->ieee_hw, queue))
7208 ieee80211_stop_queue(wlc->pub->ieee_hw, queue);
7214 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7215 bool use_rspec, u16 mimo_ctlchbw)
7220 /* use frame rate as rts rate */
7222 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7223 /* Use 11Mbps as the g protection RTS target rate and fallback.
7224 * Use the brcms_basic_rate() lookup to find the best basic rate
7225 * under the target in case 11 Mbps is not Basic.
7226 * 6 and 9 Mbps are not usually selected by rate selection, but
7227 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7230 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7232 /* calculate RTS rate and fallback rate based on the frame rate
7233 * RTS must be sent at a basic rate since it is a
7234 * control frame, sec 9.6 of 802.11 spec
7236 rts_rspec = brcms_basic_rate(wlc, rspec);
7238 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7239 /* set rts txbw to correct side band */
7240 rts_rspec &= ~RSPEC_BW_MASK;
7243 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7244 * 20MHz channel (DUP), otherwise send RTS on control channel
7246 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7247 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7249 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7251 /* pick siso/cdd as default for ofdm */
7252 if (is_ofdm_rate(rts_rspec)) {
7253 rts_rspec &= ~RSPEC_STF_MASK;
7254 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7260 /* Update beacon listen interval in shared memory */
7261 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7263 /* wake up every DTIM is the default */
7264 if (wlc->bcn_li_dtim == 1)
7265 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7267 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7268 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7272 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7275 struct bcma_device *core = wlc_hw->d11core;
7277 /* read the tsf timer low, then high to get an atomic read */
7278 *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7279 *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7283 * recover 64bit TSF value from the 16bit TSF value in the rx header
7284 * given the assumption that the TSF passed in header is within 65ms
7285 * of the current tsf.
7288 * 3.......6.......8.......0.......2.......4.......6.......8......0
7289 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7291 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7292 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7293 * receive call sequence after rx interrupt. Only the higher 16 bits
7294 * are used. Finally, the tsf_h is read from the tsf register.
7296 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7297 struct d11rxhdr *rxh)
7300 u16 rx_tsf_0_15, rx_tsf_16_31;
7302 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7304 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7305 rx_tsf_0_15 = rxh->RxTSFTime;
7308 * a greater tsf time indicates the low 16 bits of
7309 * tsf_l wrapped, so decrement the high 16 bits.
7311 if ((u16)tsf_l < rx_tsf_0_15) {
7313 if (rx_tsf_16_31 == 0xffff)
7317 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7321 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7323 struct ieee80211_rx_status *rx_status)
7328 unsigned char *plcp;
7330 /* fill in TSF and flag its presence */
7331 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7332 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7334 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7337 channel > 14 ? IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
7339 ieee80211_channel_to_frequency(channel, rx_status->band);
7341 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7345 rx_status->antenna =
7346 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7350 rspec = brcms_c_compute_rspec(rxh, plcp);
7351 if (is_mcs_rate(rspec)) {
7352 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7353 rx_status->flag |= RX_FLAG_HT;
7354 if (rspec_is40mhz(rspec))
7355 rx_status->flag |= RX_FLAG_40MHZ;
7357 switch (rspec2rate(rspec)) {
7359 rx_status->rate_idx = 0;
7362 rx_status->rate_idx = 1;
7365 rx_status->rate_idx = 2;
7368 rx_status->rate_idx = 3;
7371 rx_status->rate_idx = 4;
7374 rx_status->rate_idx = 5;
7377 rx_status->rate_idx = 6;
7380 rx_status->rate_idx = 7;
7383 rx_status->rate_idx = 8;
7386 rx_status->rate_idx = 9;
7389 rx_status->rate_idx = 10;
7392 rx_status->rate_idx = 11;
7395 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7399 * For 5GHz, we should decrease the index as it is
7400 * a subset of the 2.4G rates. See bitrates field
7401 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7403 if (rx_status->band == IEEE80211_BAND_5GHZ)
7404 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7406 /* Determine short preamble and rate_idx */
7408 if (is_cck_rate(rspec)) {
7409 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7410 rx_status->flag |= RX_FLAG_SHORTPRE;
7411 } else if (is_ofdm_rate(rspec)) {
7412 rx_status->flag |= RX_FLAG_SHORTPRE;
7414 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7419 if (plcp3_issgi(plcp[3]))
7420 rx_status->flag |= RX_FLAG_SHORT_GI;
7422 if (rxh->RxStatus1 & RXS_DECERR) {
7423 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7424 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7427 if (rxh->RxStatus1 & RXS_FCSERR) {
7428 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7429 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7435 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7439 struct ieee80211_rx_status rx_status;
7440 struct ieee80211_hdr *hdr;
7442 memset(&rx_status, 0, sizeof(rx_status));
7443 prep_mac80211_status(wlc, rxh, p, &rx_status);
7445 /* mac header+body length, exclude CRC and plcp header */
7446 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7447 skb_pull(p, D11_PHY_HDR_LEN);
7448 __skb_trim(p, len_mpdu);
7450 /* unmute transmit */
7451 if (wlc->hw->suspended_fifos) {
7452 hdr = (struct ieee80211_hdr *)p->data;
7453 if (ieee80211_is_beacon(hdr->frame_control))
7454 brcms_b_mute(wlc->hw, false);
7457 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7458 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7461 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7462 * number of bytes goes in the length field
7464 * Formula given by HT PHY Spec v 1.13
7465 * len = 3(nsyms + nstream + 3) - 3
7468 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7471 uint nsyms, len = 0, kNdps;
7473 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7474 wlc->pub->unit, rspec2rate(ratespec), mac_len);
7476 if (is_mcs_rate(ratespec)) {
7477 uint mcs = ratespec & RSPEC_RATE_MASK;
7478 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7479 rspec_stc(ratespec);
7482 * the payload duration calculation matches that
7485 /* 1000Ndbps = kbps * 4 */
7486 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7487 rspec_issgi(ratespec)) * 4;
7489 if (rspec_stc(ratespec) == 0)
7491 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7492 APHY_TAIL_NBITS) * 1000, kNdps);
7494 /* STBC needs to have even number of symbols */
7497 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7498 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7500 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7501 nsyms += (tot_streams + 3);
7503 * 3 bytes/symbol @ legacy 6Mbps rate
7504 * (-3) excluding service bits and tail bits
7506 len = (3 * nsyms) - 3;
7513 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7515 const struct brcms_c_rateset *rs_dflt;
7516 struct brcms_c_rateset rs;
7519 u8 plcp[D11_PHY_HDR_LEN];
7523 sifs = get_sifs(wlc->band);
7525 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7527 brcms_c_rateset_copy(rs_dflt, &rs);
7528 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7531 * walk the phy rate table and update MAC core SHM
7532 * basic rate table entries
7534 for (i = 0; i < rs.count; i++) {
7535 rate = rs.rates[i] & BRCMS_RATE_MASK;
7537 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7539 /* Calculate the Probe Response PLCP for the given rate */
7540 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7543 * Calculate the duration of the Probe Response
7544 * frame plus SIFS for the MAC
7546 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7547 BRCMS_LONG_PREAMBLE, frame_len);
7550 /* Update the SHM Rate Table entry Probe Response values */
7551 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7552 (u16) (plcp[0] + (plcp[1] << 8)));
7553 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7554 (u16) (plcp[2] + (plcp[3] << 8)));
7555 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7559 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
7561 * PLCP header is 6 bytes.
7562 * 802.11 A3 header is 24 bytes.
7563 * Max beacon frame body template length is 112 bytes.
7564 * Max probe resp frame body template length is 110 bytes.
7566 * *len on input contains the max length of the packet available.
7568 * The *len value is set to the number of bytes in buf used, and starts
7569 * with the PLCP and included up to, but not including, the 4 byte FCS.
7572 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7574 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7576 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7577 struct cck_phy_hdr *plcp;
7578 struct ieee80211_mgmt *h;
7579 int hdr_len, body_len;
7581 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7583 /* calc buffer size provided for frame body */
7584 body_len = *len - hdr_len;
7585 /* return actual size */
7586 *len = hdr_len + body_len;
7588 /* format PHY and MAC headers */
7589 memset((char *)buf, 0, hdr_len);
7591 plcp = (struct cck_phy_hdr *) buf;
7594 * PLCP for Probe Response frames are filled in from
7597 if (type == IEEE80211_STYPE_BEACON)
7599 brcms_c_compute_plcp(wlc, bcn_rspec,
7600 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7603 /* "Regular" and 16 MBSS but not for 4 MBSS */
7604 /* Update the phytxctl for the beacon based on the rspec */
7605 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7607 h = (struct ieee80211_mgmt *)&plcp[1];
7609 /* fill in 802.11 header */
7610 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7612 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7613 /* A1 filled in by MAC for prb resp, broadcast for bcn */
7614 if (type == IEEE80211_STYPE_BEACON)
7615 memcpy(&h->da, ðer_bcast, ETH_ALEN);
7616 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7617 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7619 /* SEQ filled in by MAC */
7622 int brcms_c_get_header_len(void)
7628 * Update all beacons for the system.
7630 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7632 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7634 if (bsscfg->up && !bsscfg->BSS)
7635 /* Clear the soft intmask */
7636 wlc->defmacintmask &= ~MI_BCNTPL;
7639 /* Write ssid into shared memory */
7641 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7643 u8 *ssidptr = cfg->SSID;
7645 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7647 /* padding the ssid with zero and copy it into shm */
7648 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7649 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7651 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7652 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7656 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7657 struct brcms_bss_cfg *cfg,
7660 u16 prb_resp[BCN_TMPL_LEN / 2];
7661 int len = BCN_TMPL_LEN;
7664 * write the probe response to hardware, or save in
7665 * the config structure
7668 /* create the probe response template */
7669 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7670 cfg, prb_resp, &len);
7673 brcms_c_suspend_mac_and_wait(wlc);
7675 /* write the probe response into the template region */
7676 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7677 (len + 3) & ~3, prb_resp);
7679 /* write the length of the probe response frame (+PLCP/-FCS) */
7680 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7682 /* write the SSID and SSID length */
7683 brcms_c_shm_ssid_upd(wlc, cfg);
7686 * Write PLCP headers and durations for probe response frames
7687 * at all rates. Use the actual frame length covered by the
7688 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7689 * by subtracting the PLCP len and adding the FCS.
7691 len += (-D11_PHY_HDR_LEN + FCS_LEN);
7692 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7695 brcms_c_enable_mac(wlc);
7698 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7700 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7702 /* update AP or IBSS probe responses */
7703 if (bsscfg->up && !bsscfg->BSS)
7704 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7707 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7713 *blocks = wlc_hw->xmtfifo_sz[fifo];
7719 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7722 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7723 if (match_reg_offset == RCM_BSSID_OFFSET)
7724 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7728 * Flag 'scan in progress' to withhold dynamic phy calibration
7730 void brcms_c_scan_start(struct brcms_c_info *wlc)
7732 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7735 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7737 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7740 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7742 wlc->pub->associated = state;
7743 wlc->bsscfg->associated = state;
7747 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7748 * AMPDU traffic, packets pending in hardware have to be invalidated so that
7749 * when later on hardware releases them, they can be handled appropriately.
7751 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7752 struct ieee80211_sta *sta,
7753 void (*dma_callback_fn))
7755 struct dma_pub *dmah;
7757 for (i = 0; i < NFIFO; i++) {
7760 dma_walk_packets(dmah, dma_callback_fn, sta);
7764 int brcms_c_get_curband(struct brcms_c_info *wlc)
7766 return wlc->band->bandunit;
7769 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7774 /* Kick DMA to send any pending AMPDU */
7775 for (i = 0; i < ARRAY_SIZE(wlc->hw->di); i++)
7777 dma_txflush(wlc->hw->di[i]);
7779 /* wait for queue and DMA fifos to run dry */
7780 while (brcms_txpktpendtot(wlc) > 0) {
7781 brcms_msleep(wlc->wl, 1);
7787 WARN_ON_ONCE(timeout == 0);
7790 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
7792 wlc->bcn_li_bcn = interval;
7794 brcms_c_bcn_li_upd(wlc);
7797 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
7801 /* Remove override bit and clip to max qdbm value */
7802 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
7803 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
7806 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
7811 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
7813 /* Return qdbm units */
7814 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
7817 /* Process received frames */
7819 * Return true if more frames need to be processed. false otherwise.
7820 * Param 'bound' indicates max. # frames to process before break out.
7822 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
7824 struct d11rxhdr *rxh;
7825 struct ieee80211_hdr *h;
7829 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
7831 /* frame starts with rxhdr */
7832 rxh = (struct d11rxhdr *) (p->data);
7834 /* strip off rxhdr */
7835 skb_pull(p, BRCMS_HWRXOFF);
7837 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
7838 if (rxh->RxStatus1 & RXS_PBPRES) {
7840 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
7841 "len %d\n", wlc->pub->unit, p->len);
7847 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
7850 if (rxh->RxStatus1 & RXS_FCSERR) {
7851 if (!(wlc->filter_flags & FIF_FCSFAIL))
7855 /* check received pkt has at least frame control field */
7856 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
7859 /* not supporting A-MSDU */
7860 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
7864 brcms_c_recvctl(wlc, rxh, p);
7868 brcmu_pkt_buf_free_skb(p);
7871 /* Process received frames */
7873 * Return true if more frames need to be processed. false otherwise.
7874 * Param 'bound' indicates max. # frames to process before break out.
7877 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
7880 struct sk_buff *next = NULL;
7881 struct sk_buff_head recv_frames;
7884 uint bound_limit = bound ? RXBND : -1;
7886 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
7887 skb_queue_head_init(&recv_frames);
7889 /* gather received frames */
7890 while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
7892 /* !give others some time to run! */
7893 if (++n >= bound_limit)
7897 /* post more rbufs */
7898 dma_rxfill(wlc_hw->di[fifo]);
7900 /* process each frame */
7901 skb_queue_walk_safe(&recv_frames, p, next) {
7902 struct d11rxhdr_le *rxh_le;
7903 struct d11rxhdr *rxh;
7905 skb_unlink(p, &recv_frames);
7906 rxh_le = (struct d11rxhdr_le *)p->data;
7907 rxh = (struct d11rxhdr *)p->data;
7909 /* fixup rx header endianness */
7910 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
7911 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
7912 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
7913 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
7914 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
7915 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
7916 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
7917 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
7918 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
7919 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
7920 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
7922 brcms_c_recv(wlc_hw->wlc, p);
7925 return n >= bound_limit;
7928 /* second-level interrupt processing
7929 * Return true if another dpc needs to be re-scheduled. false otherwise.
7930 * Param 'bounded' indicates if applicable loops should be bounded.
7932 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
7935 struct brcms_hardware *wlc_hw = wlc->hw;
7936 struct bcma_device *core = wlc_hw->d11core;
7937 struct wiphy *wiphy = wlc->wiphy;
7939 if (brcms_deviceremoved(wlc)) {
7940 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
7942 brcms_down(wlc->wl);
7946 /* grab and clear the saved software intstatus bits */
7947 macintstatus = wlc->macintstatus;
7948 wlc->macintstatus = 0;
7950 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
7951 wlc_hw->unit, macintstatus);
7953 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
7956 if (macintstatus & MI_TFS) {
7958 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
7959 wlc->macintstatus |= MI_TFS;
7961 wiphy_err(wiphy, "MI_TFS: fatal\n");
7966 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
7969 /* ATIM window end */
7970 if (macintstatus & MI_ATIMWINEND) {
7971 BCMMSG(wlc->wiphy, "end of ATIM window\n");
7972 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
7977 * received data or control frame, MI_DMAINT is
7978 * indication of RX_FIFO interrupt
7980 if (macintstatus & MI_DMAINT)
7981 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
7982 wlc->macintstatus |= MI_DMAINT;
7984 /* noise sample collected */
7985 if (macintstatus & MI_BG_NOISE)
7986 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
7988 if (macintstatus & MI_GP0) {
7989 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
7990 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
7992 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
7993 __func__, ai_get_chip_id(wlc_hw->sih),
7994 ai_get_chiprev(wlc_hw->sih));
7995 brcms_fatal_error(wlc_hw->wlc->wl);
7998 /* gptimer timeout */
7999 if (macintstatus & MI_TO)
8000 bcma_write32(core, D11REGOFFS(gptimer), 0);
8002 if (macintstatus & MI_RFDISABLE) {
8003 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8004 " RF Disable Input\n", wlc_hw->unit);
8005 brcms_rfkill_set_hw_state(wlc->wl);
8008 /* it isn't done and needs to be resched if macintstatus is non-zero */
8009 return wlc->macintstatus != 0;
8012 brcms_fatal_error(wlc_hw->wlc->wl);
8013 return wlc->macintstatus != 0;
8016 void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8018 struct bcma_device *core = wlc->hw->d11core;
8019 struct ieee80211_channel *ch = wlc->pub->ieee_hw->conf.channel;
8022 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8024 chanspec = ch20mhz_chspec(ch->hw_value);
8026 brcms_b_init(wlc->hw, chanspec);
8028 /* update beacon listen interval */
8029 brcms_c_bcn_li_upd(wlc);
8031 /* write ethernet address to core */
8032 brcms_c_set_mac(wlc->bsscfg);
8033 brcms_c_set_bssid(wlc->bsscfg);
8035 /* Update tsf_cfprep if associated and up */
8036 if (wlc->pub->associated && wlc->bsscfg->up) {
8039 /* get beacon period and convert to uS */
8040 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8042 * update since init path would reset
8045 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8046 bi << CFPREP_CBI_SHIFT);
8048 /* Update maccontrol PM related bits */
8049 brcms_c_set_ps_ctrl(wlc);
8052 brcms_c_bandinit_ordered(wlc, chanspec);
8054 /* init probe response timeout */
8055 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8057 /* init max burst txop (framebursting) */
8058 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8060 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8062 /* initialize maximum allowed duty cycle */
8063 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8064 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8067 * Update some shared memory locations related to
8068 * max AMPDU size allowed to received
8070 brcms_c_ampdu_shm_upd(wlc->ampdu);
8072 /* band-specific inits */
8073 brcms_c_bsinit(wlc);
8075 /* Enable EDCF mode (while the MAC is suspended) */
8076 bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8077 brcms_c_edcf_setparams(wlc, false);
8079 /* read the ucode version if we have not yet done so */
8080 if (wlc->ucode_rev == 0) {
8082 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8083 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8086 /* ..now really unleash hell (allow the MAC out of suspend) */
8087 brcms_c_enable_mac(wlc);
8089 /* suspend the tx fifos and mute the phy for preism cac time */
8091 brcms_b_mute(wlc->hw, true);
8093 /* enable the RF Disable Delay timer */
8094 bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8097 * Initialize WME parameters; if they haven't been set by some other
8098 * mechanism (IOVar, etc) then read them from the hardware.
8100 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8101 /* Uninitialized; read from HW */
8104 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8105 wlc->wme_retries[ac] =
8106 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8111 * The common driver entry routine. Error codes should be unique
8113 struct brcms_c_info *
8114 brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8115 bool piomode, uint *perr)
8117 struct brcms_c_info *wlc;
8120 struct brcms_pub *pub;
8122 /* allocate struct brcms_c_info state and its substructures */
8123 wlc = brcms_c_attach_malloc(unit, &err, 0);
8126 wlc->wiphy = wl->wiphy;
8133 wlc->band = wlc->bandstate[0];
8134 wlc->core = wlc->corestate;
8137 pub->_piomode = piomode;
8138 wlc->bandinit_pending = false;
8140 /* populate struct brcms_c_info with default values */
8141 brcms_c_info_init(wlc, unit);
8143 /* update sta/ap related parameters */
8144 brcms_c_ap_upd(wlc);
8147 * low level attach steps(all hw accesses go
8148 * inside, no more in rest of the attach)
8150 err = brcms_b_attach(wlc, core, unit, piomode);
8154 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8156 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8158 /* disable allowed duty cycle */
8159 wlc->tx_duty_cycle_ofdm = 0;
8160 wlc->tx_duty_cycle_cck = 0;
8162 brcms_c_stf_phy_chain_calc(wlc);
8164 /* txchain 1: txant 0, txchain 2: txant 1 */
8165 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8166 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8168 /* push to BMAC driver */
8169 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8170 wlc->stf->hw_rxchain);
8172 /* pull up some info resulting from the low attach */
8173 for (i = 0; i < NFIFO; i++)
8174 wlc->core->txavail[i] = wlc->hw->txavail[i];
8176 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8177 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8179 for (j = 0; j < wlc->pub->_nbands; j++) {
8180 wlc->band = wlc->bandstate[j];
8182 if (!brcms_c_attach_stf_ant_init(wlc)) {
8187 /* default contention windows size limits */
8188 wlc->band->CWmin = APHY_CWMIN;
8189 wlc->band->CWmax = PHY_CWMAX;
8191 /* init gmode value */
8192 if (wlc->band->bandtype == BRCM_BAND_2G) {
8193 wlc->band->gmode = GMODE_AUTO;
8194 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8198 /* init _n_enab supported mode */
8199 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8200 pub->_n_enab = SUPPORT_11N;
8201 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8203 SUPPORT_11N) ? WL_11N_2x2 :
8207 /* init per-band default rateset, depend on band->gmode */
8208 brcms_default_rateset(wlc, &wlc->band->defrateset);
8210 /* fill in hw_rateset */
8211 brcms_c_rateset_filter(&wlc->band->defrateset,
8212 &wlc->band->hw_rateset, false,
8213 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8214 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8218 * update antenna config due to
8219 * wlc->stf->txant/txchain/ant_rx_ovr change
8221 brcms_c_stf_phy_txant_upd(wlc);
8223 /* attach each modules */
8224 err = brcms_c_attach_module(wlc);
8228 if (!brcms_c_timers_init(wlc, unit)) {
8229 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8235 /* depend on rateset, gmode */
8236 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8238 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8239 "\n", unit, __func__);
8244 /* init default when all parameters are ready, i.e. ->rateset */
8245 brcms_c_bss_default_init(wlc);
8248 * Complete the wlc default state initializations..
8251 wlc->bsscfg->wlc = wlc;
8253 wlc->mimoft = FT_HT;
8254 wlc->mimo_40txbw = AUTO;
8255 wlc->ofdm_40txbw = AUTO;
8256 wlc->cck_40txbw = AUTO;
8257 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8259 /* Set default values of SGI */
8260 if (BRCMS_SGI_CAP_PHY(wlc)) {
8261 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8263 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8264 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8267 brcms_c_ht_update_sgi_rx(wlc, 0);
8270 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8278 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8279 unit, __func__, err);
8281 brcms_c_detach(wlc);