2 * 'Standard' SDIO HOST CONTROLLER driver
4 * Copyright (C) 1999-2015, Broadcom Corporation
6 * Unless you and Broadcom execute a separate written software license
7 * agreement governing use of this software, this software is licensed to you
8 * under the terms of the GNU General Public License version 2 (the "GPL"),
9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
10 * following added to such license:
12 * As a special exception, the copyright holders of this software give you
13 * permission to link this software with independent modules, and to copy and
14 * distribute the resulting executable under terms of your choice, provided that
15 * you also meet, for each linked independent module, the terms and conditions of
16 * the license of that module. An independent module is a module which is not
17 * derived from this software. The special exception does not apply to any
18 * modifications of the software.
20 * Notwithstanding the above, under no circumstances may you combine this
21 * software in any way with any other Broadcom software provided under a license
22 * other than the GPL, without Broadcom's express prior written consent.
24 * $Id: bcmsdstd.h 523962 2015-01-05 10:23:21Z $
29 /* global msglevel for debug messages - bitvals come from sdiovar.h */
30 #define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0)
38 #define sd_sync_dma(sd, read, nbytes)
39 #define sd_init_dma(sd)
40 #define sd_ack_intr(sd)
41 #define sd_wakeup(sd);
42 /* Allocate/init/free per-OS private data */
43 extern int sdstd_osinit(sdioh_info_t *sd);
44 extern void sdstd_osfree(sdioh_info_t *sd);
48 #define SDIOH_ASSERT(exp) \
50 printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \
53 #define BLOCK_SIZE_4318 64
54 #define BLOCK_SIZE_4328 512
56 /* internal return code */
60 /* private bus modes */
61 #define SDIOH_MODE_SPI 0
62 #define SDIOH_MODE_SD1 1
63 #define SDIOH_MODE_SD4 2
65 #define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */
66 #define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */
68 #define SDIOH_TYPE_ARASAN_HDK 1
69 #define SDIOH_TYPE_BCM27XX 2
70 #define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */
71 #define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */
72 #define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */
74 /* For linux, allow yielding for dongle */
77 /* Expected card status value for CMD7 */
78 #define SDIOH_CMD7_EXP_STATUS 0x00001E00
80 #define RETRIES_LARGE 100000
81 #define sdstd_os_yield(sd) do {} while (0)
82 #define RETRIES_SMALL 100
85 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */
86 #define USE_MULTIBLOCK 0x4
88 #define USE_FIFO 0x8 /* Fifo vs non-fifo */
90 #define CLIENT_INTR 0x100 /* Get rid of this! */
92 #define HC_INTR_RETUNING 0x1000
95 #ifdef BCMSDIOH_TXGLOM
96 /* Total glom pkt can not exceed 64K
97 * need one more slot for glom padding packet
99 #define SDIOH_MAXGLOM_SIZE (40+1)
101 typedef struct glom_buf {
102 uint32 count; /* Total number of pkts queued */
103 void *dma_buf_arr[SDIOH_MAXGLOM_SIZE]; /* Frame address */
104 ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */
105 uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */
110 uint cfg_bar; /* pci cfg address for bar */
111 uint32 caps; /* cached value of capabilities reg */
112 uint32 curr_caps; /* max current capabilities reg */
114 osl_t *osh; /* osh handler */
115 volatile char *mem_space; /* pci device memory va */
116 uint lockcount; /* nest count of sdstd_lock() calls */
117 bool client_intr_enabled; /* interrupt connnected flag */
118 bool intr_handler_valid; /* client driver interrupt handler valid */
119 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
120 void *intr_handler_arg; /* argument to call interrupt handler */
121 bool initialized; /* card initialized */
122 uint target_dev; /* Target device ID */
123 uint16 intmask; /* Current active interrupts */
124 void *sdos_info; /* Pointer to per-OS private data */
125 void *bcmsdh; /* handler to upper layer stack (bcmsdh) */
127 uint32 controller_type; /* Host controller type */
128 uint8 version; /* Host Controller Spec Compliance Version */
129 uint irq; /* Client irq */
130 int intrcount; /* Client interrupts */
131 int local_intrcount; /* Controller interrupts */
132 bool host_init_done; /* Controller initted */
133 bool card_init_done; /* Client SDIO interface initted */
134 bool polled_mode; /* polling for command completion */
136 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
137 /* Must be on for sd_multiblock to be effective */
138 bool use_client_ints; /* If this is false, make sure to restore */
139 /* polling hack in wl_linux.c:wl_timer() */
140 int adapter_slot; /* Maybe dealing with multiple slots/controllers */
141 int sd_mode; /* SD1/SD4/SPI */
142 int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */
143 uint32 data_xfer_count; /* Current transfer */
144 uint16 card_rca; /* Current Address */
145 int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */
146 uint8 num_funcs; /* Supported funcs on client */
148 uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
149 void *dma_buf; /* DMA Buffer virtual address */
150 ulong dma_phys; /* DMA Buffer physical address */
151 void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */
152 ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */
154 /* adjustments needed to make the dma align properly */
156 ulong dma_start_phys;
157 uint alloced_dma_size;
158 void *adma2_dscr_start_buf;
159 ulong adma2_dscr_start_phys;
160 uint alloced_adma2_dscr_size;
162 int r_cnt; /* rx count */
163 int t_cnt; /* tx_count */
164 bool got_hcint; /* local interrupt flag */
165 uint16 last_intrstatus; /* to cache intrstatus */
166 int host_UHSISupported; /* whether UHSI is supported for HC. */
167 int card_UHSI_voltage_Supported; /* whether UHSI is supported for
168 * Card in terms of Voltage [1.8 or 3.3].
170 int global_UHSI_Supp; /* type of UHSI support in both host and card.
171 * HOST_SDR_UNSUPP: capabilities not supported/matched
172 * HOST_SDR_12_25: SDR12 and SDR25 supported
173 * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd
175 volatile int sd3_dat_state; /* data transfer state used for retuning check */
176 volatile int sd3_tun_state; /* tuning state used for retuning check */
177 bool sd3_tuning_reqd; /* tuning requirement parameter */
178 uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */
179 #ifdef BCMSDIOH_TXGLOM
180 glom_buf_t glom_info; /* pkt information used for glomming */
181 uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */
185 #define DMA_MODE_NONE 0
186 #define DMA_MODE_SDMA 1
187 #define DMA_MODE_ADMA1 2
188 #define DMA_MODE_ADMA2 3
189 #define DMA_MODE_ADMA2_64 4
190 #define DMA_MODE_AUTO -1
192 #define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE))
194 /* States for Tuning and corr data */
195 #define TUNING_IDLE 0
196 #define TUNING_START 1
197 #define TUNING_START_AFTER_DAT 2
198 #define TUNING_ONGOING 3
200 #define DATA_TRANSFER_IDLE 0
201 #define DATA_TRANSFER_ONGOING 1
203 #define CHECK_TUNING_PRE_DATA 1
204 #define CHECK_TUNING_POST_DATA 2
208 #define SD_DHD_DISABLE_PERIODIC_TUNING 0x01
209 #define SD_DHD_ENABLE_PERIODIC_TUNING 0x00
213 /************************************************************
214 * Internal interfaces: per-port references into bcmsdstd.c
217 /* Global message bits */
218 extern uint sd_msglevel;
220 /* OS-independent interrupt handler */
221 extern bool check_client_intr(sdioh_info_t *sd);
223 /* Core interrupt enable/disable of device interrupts */
224 extern void sdstd_devintr_on(sdioh_info_t *sd);
225 extern void sdstd_devintr_off(sdioh_info_t *sd);
227 /* Enable/disable interrupts for local controller events */
228 extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err);
229 extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err);
231 /* Wait for specified interrupt and error bits to be set */
232 extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err);
235 /**************************************************************
236 * Internal interfaces: bcmsdstd.c references to per-port code
239 /* Register mapping routines */
240 extern uint32 *sdstd_reg_map(osl_t *osh, ulong addr, int size);
241 extern void sdstd_reg_unmap(osl_t *osh, ulong addr, int size);
243 /* Interrupt (de)registration routines */
244 extern int sdstd_register_irq(sdioh_info_t *sd, uint irq);
245 extern void sdstd_free_irq(uint irq, sdioh_info_t *sd);
247 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */
248 extern void sdstd_lock(sdioh_info_t *sd);
249 extern void sdstd_unlock(sdioh_info_t *sd);
250 extern void sdstd_waitlockfree(sdioh_info_t *sd);
252 /* OS-specific wrappers for safe concurrent register access */
253 extern void sdstd_os_lock_irqsave(sdioh_info_t *sd, ulong* flags);
254 extern void sdstd_os_unlock_irqrestore(sdioh_info_t *sd, ulong* flags);
256 /* OS-specific wait-for-interrupt-or-status */
257 extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits);
259 /* used by bcmsdstd_linux [implemented in sdstd] */
260 extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd);
261 extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd);
262 extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd);
263 extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param);
264 extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd);
265 extern int sdstd_3_get_tune_state(sdioh_info_t *sd);
266 extern int sdstd_3_get_data_state(sdioh_info_t *sd);
267 extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state);
268 extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state);
269 extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd);
270 extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd);
271 extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode);
273 /* used by sdstd [implemented in bcmsdstd_linux/ndis] */
274 extern void sdstd_3_start_tuning(sdioh_info_t *sd);
275 extern void sdstd_3_osinit_tuning(sdioh_info_t *sd);
276 extern void sdstd_3_osclean_tuning(sdioh_info_t *sd);
278 extern void sdstd_enable_disable_periodic_timer(sdioh_info_t * sd, uint val);
280 extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq);
281 extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *sd);
282 #endif /* _BCM_SD_STD_H */