2 * Misc utility routines for accessing PMU corerev specific features
3 * of the SiliconBackplane-based Broadcom chips.
5 * Copyright (C) 1999-2011, Broadcom Corporation
7 * Unless you and Broadcom execute a separate written software license
8 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2 (the "GPL"),
10 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
11 * following added to such license:
13 * As a special exception, the copyright holders of this software give you
14 * permission to link this software with independent modules, and to copy and
15 * distribute the resulting executable under terms of your choice, provided that
16 * you also meet, for each linked independent module, the terms and conditions of
17 * the license of that module. An independent module is a module which is not
18 * derived from this software. The special exception does not apply to any
19 * modifications of the software.
21 * Notwithstanding the above, under no circumstances may you combine this
22 * software in any way with any other Broadcom software provided under a license
23 * other than the GPL, without Broadcom's express prior written consent.
25 * $Id: hndpmu.c,v 1.228.2.51.2.3 2011-02-11 22:06:01 $
38 #define PMU_ERROR(args)
42 /* To check in verbose debugging messages not intended
43 * to be on except on private builds.
45 #define PMU_NONE(args)
48 /* SDIO Pad drive strength to select value mappings.
49 * The last strength value in each table must be 0 (the tri-state value).
52 uint8 strength; /* Pad Drive Strength in mA */
53 uint8 sel; /* Chip-specific select value */
56 /* SDIO Drive Strength to sel value table for PMU Rev 1 */
57 static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = {
63 /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
64 static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = {
73 /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
74 static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = {
84 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8v) */
85 static const sdiod_drive_str_t sdiod_drive_strength_tab4_1v8[] = {
95 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.2v) */
96 static const sdiod_drive_str_t sdiod_drive_strength_tab4_1v2[] = {
106 /* SDIO Drive Strength to sel value table for PMU Rev 11 (2.5v) */
107 static const sdiod_drive_str_t sdiod_drive_strength_tab4_2v5[] = {
117 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
118 static const sdiod_drive_str_t sdiod_drive_strength_tab5_1v8[] = {
127 /* SDIO Drive Strength to sel value table for PMU Rev 13 (3.3v) */
128 static const sdiod_drive_str_t sdiod_drive_strength_tab5_3v3[] = {
138 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
141 si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength)
144 uint origidx, intr_val = 0;
145 sdiod_drive_str_t *str_tab = NULL;
147 uint32 str_shift = 0;
149 if (!(sih->cccaps & CC_CAP_PMU)) {
153 /* Remember original core before switch to chipc */
154 cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx, &intr_val);
156 switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
157 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
158 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
159 str_mask = 0x30000000;
162 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
163 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
164 case SDIOD_DRVSTR_KEY(BCM4315_CHIP_ID, 4):
165 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
166 str_mask = 0x00003800;
169 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
170 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 11):
171 if (sih->pmurev == 8) {
172 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab3;
174 else if (sih->pmurev == 11) {
175 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
177 str_mask = 0x00003800;
180 case SDIOD_DRVSTR_KEY(BCM4330_CHIP_ID, 12):
181 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
182 str_mask = 0x00003800;
185 case SDIOD_DRVSTR_KEY(BCM43362_CHIP_ID, 13):
186 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab5_1v8;
187 str_mask = 0x00003800;
191 PMU_MSG(("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
192 bcm_chipname(sih->chip, chn, 8), sih->chiprev, sih->pmurev));
197 if (str_tab != NULL) {
201 /* Pick the lowest available drive strength equal or greater than the
202 * requested strength. Drive strength of 0 requests tri-state.
204 for (i = 0; drivestrength < str_tab[i].strength; i++)
207 if (i > 0 && drivestrength > str_tab[i].strength)
210 W_REG(osh, &cc->chipcontrol_addr, 1);
211 cc_data_temp = R_REG(osh, &cc->chipcontrol_data);
212 cc_data_temp &= ~str_mask;
213 cc_data_temp |= str_tab[i].sel << str_shift;
214 W_REG(osh, &cc->chipcontrol_data, cc_data_temp);
216 PMU_MSG(("SDIO: %dmA drive strength requested; set to %dmA\n",
217 drivestrength, str_tab[i].strength));
220 /* Return to original core */
221 si_restore_core(sih, origidx, intr_val);