drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/version.h>
  38 #include <linux/firmware.h>
  39 #include <linux/wireless.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/dma-mapping.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  64 static int modparam_pio;
  65 module_param_named(pio, modparam_pio, int, 0444);
  66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  67 #elif defined(CONFIG_B43LEGACY_DMA)
  68 # define modparam_pio   0
  69 #elif defined(CONFIG_B43LEGACY_PIO)
  70 # define modparam_pio   1
  71 #endif
  72
  73 static int modparam_bad_frames_preempt;
  74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  76                  " Preemption");
  77
  78 static char modparam_fwpostfix[16];
  79 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  80 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  81
  82 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  83 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  84         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  85         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  86         SSB_DEVTABLE_END
  87 };
  88 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  89
  90
  91 /* Channel and ratetables are shared for all devices.
  92  * They can't be const, because ieee80211 puts some precalculated
  93  * data in there. This data is the same for all devices, so we don't
  94  * get concurrency issues */
  95 #define RATETAB_ENT(_rateid, _flags) \
  96         {                                                       \
  97                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
  98                 .val    = (_rateid),                            \
  99                 .val2   = (_rateid),                            \
 100                 .flags  = (_flags),                             \
 101         }
 102 static struct ieee80211_rate __b43legacy_ratetable[] = {
 103         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
 104         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
 105         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
 106         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
 107         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
 108         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
 109         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
 110         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
 111         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
 112         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
 115 };
 116 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
 117 #define b43legacy_a_ratetable_size      8
 118 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 119 #define b43legacy_b_ratetable_size      4
 120 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 121 #define b43legacy_g_ratetable_size      12
 122
 123 #define CHANTAB_ENT(_chanid, _freq) \
 124         {                                                       \
 125                 .chan   = (_chanid),                            \
 126                 .freq   = (_freq),                              \
 127                 .val    = (_chanid),                            \
 128                 .flag   = IEEE80211_CHAN_W_SCAN |               \
 129                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
 130                           IEEE80211_CHAN_W_IBSS,                \
 131                 .power_level    = 0x0A,                         \
 132                 .antenna_max    = 0xFF,                         \
 133         }
 134 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 135         CHANTAB_ENT(1, 2412),
 136         CHANTAB_ENT(2, 2417),
 137         CHANTAB_ENT(3, 2422),
 138         CHANTAB_ENT(4, 2427),
 139         CHANTAB_ENT(5, 2432),
 140         CHANTAB_ENT(6, 2437),
 141         CHANTAB_ENT(7, 2442),
 142         CHANTAB_ENT(8, 2447),
 143         CHANTAB_ENT(9, 2452),
 144         CHANTAB_ENT(10, 2457),
 145         CHANTAB_ENT(11, 2462),
 146         CHANTAB_ENT(12, 2467),
 147         CHANTAB_ENT(13, 2472),
 148         CHANTAB_ENT(14, 2484),
 149 };
 150 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
 151
 152 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 153 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 154 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 155 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 156
 157
 158 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 159 {
 160         if (!wl || !wl->current_dev)
 161                 return 1;
 162         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 163                 return 1;
 164         /* We are up and running.
 165          * Ratelimit the messages to avoid DoS over the net. */
 166         return net_ratelimit();
 167 }
 168
 169 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 170 {
 171         va_list args;
 172
 173         if (!b43legacy_ratelimit(wl))
 174                 return;
 175         va_start(args, fmt);
 176         printk(KERN_INFO "b43legacy-%s: ",
 177                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 178         vprintk(fmt, args);
 179         va_end(args);
 180 }
 181
 182 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 183 {
 184         va_list args;
 185
 186         if (!b43legacy_ratelimit(wl))
 187                 return;
 188         va_start(args, fmt);
 189         printk(KERN_ERR "b43legacy-%s ERROR: ",
 190                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 191         vprintk(fmt, args);
 192         va_end(args);
 193 }
 194
 195 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 196 {
 197         va_list args;
 198
 199         if (!b43legacy_ratelimit(wl))
 200                 return;
 201         va_start(args, fmt);
 202         printk(KERN_WARNING "b43legacy-%s warning: ",
 203                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 204         vprintk(fmt, args);
 205         va_end(args);
 206 }
 207
 208 #if B43legacy_DEBUG
 209 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 210 {
 211         va_list args;
 212
 213         va_start(args, fmt);
 214         printk(KERN_DEBUG "b43legacy-%s debug: ",
 215                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 216         vprintk(fmt, args);
 217         va_end(args);
 218 }
 219 #endif /* DEBUG */
 220
 221 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 222                                 u32 val)
 223 {
 224         u32 status;
 225
 226         B43legacy_WARN_ON(offset % 4 != 0);
 227
 228         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 229         if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
 230                 val = swab32(val);
 231
 232         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 233         mmiowb();
 234         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 235 }
 236
 237 static inline
 238 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 239                                 u16 routing, u16 offset)
 240 {
 241         u32 control;
 242
 243         /* "offset" is the WORD offset. */
 244
 245         control = routing;
 246         control <<= 16;
 247         control |= offset;
 248         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 249 }
 250
 251 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 252                        u16 routing, u16 offset)
 253 {
 254         u32 ret;
 255
 256         if (routing == B43legacy_SHM_SHARED) {
 257                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 258                 if (offset & 0x0003) {
 259                         /* Unaligned access */
 260                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 261                         ret = b43legacy_read16(dev,
 262                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 263                         ret <<= 16;
 264                         b43legacy_shm_control_word(dev, routing,
 265                                                      (offset >> 2) + 1);
 266                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 267
 268                         return ret;
 269                 }
 270                 offset >>= 2;
 271         }
 272         b43legacy_shm_control_word(dev, routing, offset);
 273         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 274
 275         return ret;
 276 }
 277
 278 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 279                            u16 routing, u16 offset)
 280 {
 281         u16 ret;
 282
 283         if (routing == B43legacy_SHM_SHARED) {
 284                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 285                 if (offset & 0x0003) {
 286                         /* Unaligned access */
 287                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 288                         ret = b43legacy_read16(dev,
 289                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 290
 291                         return ret;
 292                 }
 293                 offset >>= 2;
 294         }
 295         b43legacy_shm_control_word(dev, routing, offset);
 296         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 297
 298         return ret;
 299 }
 300
 301 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 302                            u16 routing, u16 offset,
 303                            u32 value)
 304 {
 305         if (routing == B43legacy_SHM_SHARED) {
 306                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 307                 if (offset & 0x0003) {
 308                         /* Unaligned access */
 309                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 310                         mmiowb();
 311                         b43legacy_write16(dev,
 312                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 313                                           (value >> 16) & 0xffff);
 314                         mmiowb();
 315                         b43legacy_shm_control_word(dev, routing,
 316                                                    (offset >> 2) + 1);
 317                         mmiowb();
 318                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 319                                           value & 0xffff);
 320                         return;
 321                 }
 322                 offset >>= 2;
 323         }
 324         b43legacy_shm_control_word(dev, routing, offset);
 325         mmiowb();
 326         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 327 }
 328
 329 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 330                            u16 value)
 331 {
 332         if (routing == B43legacy_SHM_SHARED) {
 333                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 334                 if (offset & 0x0003) {
 335                         /* Unaligned access */
 336                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 337                         mmiowb();
 338                         b43legacy_write16(dev,
 339                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 340                                           value);
 341                         return;
 342                 }
 343                 offset >>= 2;
 344         }
 345         b43legacy_shm_control_word(dev, routing, offset);
 346         mmiowb();
 347         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 348 }
 349
 350 /* Read HostFlags */
 351 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 352 {
 353         u32 ret;
 354
 355         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 356                                    B43legacy_SHM_SH_HOSTFHI);
 357         ret <<= 16;
 358         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 359                                     B43legacy_SHM_SH_HOSTFLO);
 360
 361         return ret;
 362 }
 363
 364 /* Write HostFlags */
 365 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 366 {
 367         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 368                               B43legacy_SHM_SH_HOSTFLO,
 369                               (value & 0x0000FFFF));
 370         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 371                               B43legacy_SHM_SH_HOSTFHI,
 372                               ((value & 0xFFFF0000) >> 16));
 373 }
 374
 375 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 376 {
 377         /* We need to be careful. As we read the TSF from multiple
 378          * registers, we should take care of register overflows.
 379          * In theory, the whole tsf read process should be atomic.
 380          * We try to be atomic here, by restaring the read process,
 381          * if any of the high registers changed (overflew).
 382          */
 383         if (dev->dev->id.revision >= 3) {
 384                 u32 low;
 385                 u32 high;
 386                 u32 high2;
 387
 388                 do {
 389                         high = b43legacy_read32(dev,
 390                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 391                         low = b43legacy_read32(dev,
 392                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 393                         high2 = b43legacy_read32(dev,
 394                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 395                 } while (unlikely(high != high2));
 396
 397                 *tsf = high;
 398                 *tsf <<= 32;
 399                 *tsf |= low;
 400         } else {
 401                 u64 tmp;
 402                 u16 v0;
 403                 u16 v1;
 404                 u16 v2;
 405                 u16 v3;
 406                 u16 test1;
 407                 u16 test2;
 408                 u16 test3;
 409
 410                 do {
 411                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 412                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 413                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 414                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 415
 416                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 417                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 418                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 419                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 420
 421                 *tsf = v3;
 422                 *tsf <<= 48;
 423                 tmp = v2;
 424                 tmp <<= 32;
 425                 *tsf |= tmp;
 426                 tmp = v1;
 427                 tmp <<= 16;
 428                 *tsf |= tmp;
 429                 *tsf |= v0;
 430         }
 431 }
 432
 433 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 434 {
 435         u32 status;
 436
 437         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 438         status |= B43legacy_SBF_TIME_UPDATE;
 439         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 440         mmiowb();
 441 }
 442
 443 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 444 {
 445         u32 status;
 446
 447         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 448         status &= ~B43legacy_SBF_TIME_UPDATE;
 449         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 450 }
 451
 452 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 453 {
 454         /* Be careful with the in-progress timer.
 455          * First zero out the low register, so we have a full
 456          * register-overflow duration to complete the operation.
 457          */
 458         if (dev->dev->id.revision >= 3) {
 459                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 460                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 461
 462                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 463                 mmiowb();
 464                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 465                                     hi);
 466                 mmiowb();
 467                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 468                                     lo);
 469         } else {
 470                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 471                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 472                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 473                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 474
 475                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 476                 mmiowb();
 477                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 478                 mmiowb();
 479                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 480                 mmiowb();
 481                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 482                 mmiowb();
 483                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 484         }
 485 }
 486
 487 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 488 {
 489         b43legacy_time_lock(dev);
 490         b43legacy_tsf_write_locked(dev, tsf);
 491         b43legacy_time_unlock(dev);
 492 }
 493
 494 static
 495 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 496                              u16 offset, const u8 *mac)
 497 {
 498         static const u8 zero_addr[ETH_ALEN] = { 0 };
 499         u16 data;
 500
 501         if (!mac)
 502                 mac = zero_addr;
 503
 504         offset |= 0x0020;
 505         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 506
 507         data = mac[0];
 508         data |= mac[1] << 8;
 509         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 510         data = mac[2];
 511         data |= mac[3] << 8;
 512         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 513         data = mac[4];
 514         data |= mac[5] << 8;
 515         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 516 }
 517
 518 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 519 {
 520         static const u8 zero_addr[ETH_ALEN] = { 0 };
 521         const u8 *mac = dev->wl->mac_addr;
 522         const u8 *bssid = dev->wl->bssid;
 523         u8 mac_bssid[ETH_ALEN * 2];
 524         int i;
 525         u32 tmp;
 526
 527         if (!bssid)
 528                 bssid = zero_addr;
 529         if (!mac)
 530                 mac = zero_addr;
 531
 532         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 533
 534         memcpy(mac_bssid, mac, ETH_ALEN);
 535         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 536
 537         /* Write our MAC address and BSSID to template ram */
 538         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 539                 tmp =  (u32)(mac_bssid[i + 0]);
 540                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 541                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 542                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 543                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 544                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 545                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 546         }
 547 }
 548
 549 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 550 {
 551         b43legacy_write_mac_bssid_templates(dev);
 552         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 553                                 dev->wl->mac_addr);
 554 }
 555
 556 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 557                                     u16 slot_time)
 558 {
 559         /* slot_time is in usec. */
 560         if (dev->phy.type != B43legacy_PHYTYPE_G)
 561                 return;
 562         b43legacy_write16(dev, 0x684, 510 + slot_time);
 563         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 564                               slot_time);
 565 }
 566
 567 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 568 {
 569         b43legacy_set_slot_time(dev, 9);
 570         dev->short_slot = 1;
 571 }
 572
 573 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 574 {
 575         b43legacy_set_slot_time(dev, 20);
 576         dev->short_slot = 0;
 577 }
 578
 579 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 580  * Returns the _previously_ enabled IRQ mask.
 581  */
 582 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 583                                              u32 mask)
 584 {
 585         u32 old_mask;
 586
 587         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 588         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 589                           mask);
 590
 591         return old_mask;
 592 }
 593
 594 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 595  * Returns the _previously_ enabled IRQ mask.
 596  */
 597 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 598                                               u32 mask)
 599 {
 600         u32 old_mask;
 601
 602         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 603         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 604
 605         return old_mask;
 606 }
 607
 608 /* Synchronize IRQ top- and bottom-half.
 609  * IRQs must be masked before calling this.
 610  * This must not be called with the irq_lock held.
 611  */
 612 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 613 {
 614         synchronize_irq(dev->dev->irq);
 615         tasklet_kill(&dev->isr_tasklet);
 616 }
 617
 618 /* DummyTransmission function, as documented on
 619  * http://bcm-specs.sipsolutions.net/DummyTransmission
 620  */
 621 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 622 {
 623         struct b43legacy_phy *phy = &dev->phy;
 624         unsigned int i;
 625         unsigned int max_loop;
 626         u16 value;
 627         u32 buffer[5] = {
 628                 0x00000000,
 629                 0x00D40000,
 630                 0x00000000,
 631                 0x01000000,
 632                 0x00000000,
 633         };
 634
 635         switch (phy->type) {
 636         case B43legacy_PHYTYPE_B:
 637         case B43legacy_PHYTYPE_G:
 638                 max_loop = 0xFA;
 639                 buffer[0] = 0x000B846E;
 640                 break;
 641         default:
 642                 B43legacy_BUG_ON(1);
 643                 return;
 644         }
 645
 646         for (i = 0; i < 5; i++)
 647                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 648
 649         /* dummy read follows */
 650         b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 651
 652         b43legacy_write16(dev, 0x0568, 0x0000);
 653         b43legacy_write16(dev, 0x07C0, 0x0000);
 654         b43legacy_write16(dev, 0x050C, 0x0000);
 655         b43legacy_write16(dev, 0x0508, 0x0000);
 656         b43legacy_write16(dev, 0x050A, 0x0000);
 657         b43legacy_write16(dev, 0x054C, 0x0000);
 658         b43legacy_write16(dev, 0x056A, 0x0014);
 659         b43legacy_write16(dev, 0x0568, 0x0826);
 660         b43legacy_write16(dev, 0x0500, 0x0000);
 661         b43legacy_write16(dev, 0x0502, 0x0030);
 662
 663         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 664                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 665         for (i = 0x00; i < max_loop; i++) {
 666                 value = b43legacy_read16(dev, 0x050E);
 667                 if (value & 0x0080)
 668                         break;
 669                 udelay(10);
 670         }
 671         for (i = 0x00; i < 0x0A; i++) {
 672                 value = b43legacy_read16(dev, 0x050E);
 673                 if (value & 0x0400)
 674                         break;
 675                 udelay(10);
 676         }
 677         for (i = 0x00; i < 0x0A; i++) {
 678                 value = b43legacy_read16(dev, 0x0690);
 679                 if (!(value & 0x0100))
 680                         break;
 681                 udelay(10);
 682         }
 683         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 684                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 685 }
 686
 687 /* Turn the Analog ON/OFF */
 688 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 689 {
 690         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 691 }
 692
 693 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 694 {
 695         u32 tmslow;
 696         u32 macctl;
 697
 698         flags |= B43legacy_TMSLOW_PHYCLKEN;
 699         flags |= B43legacy_TMSLOW_PHYRESET;
 700         ssb_device_enable(dev->dev, flags);
 701         msleep(2); /* Wait for the PLL to turn on. */
 702
 703         /* Now take the PHY out of Reset again */
 704         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 705         tmslow |= SSB_TMSLOW_FGC;
 706         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 707         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 708         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 709         msleep(1);
 710         tmslow &= ~SSB_TMSLOW_FGC;
 711         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 712         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 713         msleep(1);
 714
 715         /* Turn Analog ON */
 716         b43legacy_switch_analog(dev, 1);
 717
 718         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 719         macctl &= ~B43legacy_MACCTL_GMODE;
 720         if (flags & B43legacy_TMSLOW_GMODE) {
 721                 macctl |= B43legacy_MACCTL_GMODE;
 722                 dev->phy.gmode = 1;
 723         } else
 724                 dev->phy.gmode = 0;
 725         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 726         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 727 }
 728
 729 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 730 {
 731         u32 v0;
 732         u32 v1;
 733         u16 tmp;
 734         struct b43legacy_txstatus stat;
 735
 736         while (1) {
 737                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 738                 if (!(v0 & 0x00000001))
 739                         break;
 740                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 741
 742                 stat.cookie = (v0 >> 16);
 743                 stat.seq = (v1 & 0x0000FFFF);
 744                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 745                 tmp = (v0 & 0x0000FFFF);
 746                 stat.frame_count = ((tmp & 0xF000) >> 12);
 747                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 748                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 749                 stat.pm_indicated = !!(tmp & 0x0080);
 750                 stat.intermediate = !!(tmp & 0x0040);
 751                 stat.for_ampdu = !!(tmp & 0x0020);
 752                 stat.acked = !!(tmp & 0x0002);
 753
 754                 b43legacy_handle_txstatus(dev, &stat);
 755         }
 756 }
 757
 758 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 759 {
 760         u32 dummy;
 761
 762         if (dev->dev->id.revision < 5)
 763                 return;
 764         /* Read all entries from the microcode TXstatus FIFO
 765          * and throw them away.
 766          */
 767         while (1) {
 768                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 769                 if (!(dummy & 0x00000001))
 770                         break;
 771                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 772         }
 773 }
 774
 775 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 776 {
 777         u32 val = 0;
 778
 779         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 780         val <<= 16;
 781         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 782
 783         return val;
 784 }
 785
 786 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 787 {
 788         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 789                               (jssi & 0x0000FFFF));
 790         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 791                               (jssi & 0xFFFF0000) >> 16);
 792 }
 793
 794 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 795 {
 796         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 797         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 798                           b43legacy_read32(dev,
 799                           B43legacy_MMIO_STATUS2_BITFIELD)
 800                           | (1 << 4));
 801         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 802                             dev->phy.channel);
 803 }
 804
 805 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 806 {
 807         /* Top half of Link Quality calculation. */
 808
 809         if (dev->noisecalc.calculation_running)
 810                 return;
 811         dev->noisecalc.channel_at_start = dev->phy.channel;
 812         dev->noisecalc.calculation_running = 1;
 813         dev->noisecalc.nr_samples = 0;
 814
 815         b43legacy_generate_noise_sample(dev);
 816 }
 817
 818 static void handle_irq_noise(struct b43legacy_wldev *dev)
 819 {
 820         struct b43legacy_phy *phy = &dev->phy;
 821         u16 tmp;
 822         u8 noise[4];
 823         u8 i;
 824         u8 j;
 825         s32 average;
 826
 827         /* Bottom half of Link Quality calculation. */
 828
 829         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 830         if (dev->noisecalc.channel_at_start != phy->channel)
 831                 goto drop_calculation;
 832         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 833         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 834             noise[2] == 0x7F || noise[3] == 0x7F)
 835                 goto generate_new;
 836
 837         /* Get the noise samples. */
 838         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 839         i = dev->noisecalc.nr_samples;
 840         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 841         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 842         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 843         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 844         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 845         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 846         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 847         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 848         dev->noisecalc.nr_samples++;
 849         if (dev->noisecalc.nr_samples == 8) {
 850                 /* Calculate the Link Quality by the noise samples. */
 851                 average = 0;
 852                 for (i = 0; i < 8; i++) {
 853                         for (j = 0; j < 4; j++)
 854                                 average += dev->noisecalc.samples[i][j];
 855                 }
 856                 average /= (8 * 4);
 857                 average *= 125;
 858                 average += 64;
 859                 average /= 128;
 860                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 861                                              0x40C);
 862                 tmp = (tmp / 128) & 0x1F;
 863                 if (tmp >= 8)
 864                         average += 2;
 865                 else
 866                         average -= 25;
 867                 if (tmp == 8)
 868                         average -= 72;
 869                 else
 870                         average -= 48;
 871
 872                 dev->stats.link_noise = average;
 873 drop_calculation:
 874                 dev->noisecalc.calculation_running = 0;
 875                 return;
 876         }
 877 generate_new:
 878         b43legacy_generate_noise_sample(dev);
 879 }
 880
 881 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 882 {
 883         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
 884                 /* TODO: PS TBTT */
 885         } else {
 886                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 887                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 888         }
 889         dev->reg124_set_0x4 = 0;
 890         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
 891                 dev->reg124_set_0x4 = 1;
 892 }
 893
 894 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 895 {
 896         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
 897                 return;
 898         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 899                           b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
 900                           | 0x4);
 901 }
 902
 903 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 904 {
 905         u32 tmp;
 906
 907         /* TODO: AP mode. */
 908
 909         while (1) {
 910                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 911                 if (!(tmp & 0x00000008))
 912                         break;
 913         }
 914         /* 16bit write is odd, but correct. */
 915         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 916 }
 917
 918 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 919                                             const u8 *data, u16 size,
 920                                             u16 ram_offset,
 921                                             u16 shm_size_offset, u8 rate)
 922 {
 923         u32 i;
 924         u32 tmp;
 925         struct b43legacy_plcp_hdr4 plcp;
 926
 927         plcp.data = 0;
 928         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 929         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 930         ram_offset += sizeof(u32);
 931         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 932          * So leave the first two bytes of the next write blank.
 933          */
 934         tmp = (u32)(data[0]) << 16;
 935         tmp |= (u32)(data[1]) << 24;
 936         b43legacy_ram_write(dev, ram_offset, tmp);
 937         ram_offset += sizeof(u32);
 938         for (i = 2; i < size; i += sizeof(u32)) {
 939                 tmp = (u32)(data[i + 0]);
 940                 if (i + 1 < size)
 941                         tmp |= (u32)(data[i + 1]) << 8;
 942                 if (i + 2 < size)
 943                         tmp |= (u32)(data[i + 2]) << 16;
 944                 if (i + 3 < size)
 945                         tmp |= (u32)(data[i + 3]) << 24;
 946                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 947         }
 948         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 949                               size + sizeof(struct b43legacy_plcp_hdr6));
 950 }
 951
 952 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 953                                             u16 ram_offset,
 954                                             u16 shm_size_offset, u8 rate)
 955 {
 956         int len;
 957         const u8 *data;
 958
 959         B43legacy_WARN_ON(!dev->cached_beacon);
 960         len = min((size_t)dev->cached_beacon->len,
 961                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 962         data = (const u8 *)(dev->cached_beacon->data);
 963         b43legacy_write_template_common(dev, data,
 964                                         len, ram_offset,
 965                                         shm_size_offset, rate);
 966 }
 967
 968 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
 969                                             u16 shm_offset, u16 size,
 970                                             u8 rate)
 971 {
 972         struct b43legacy_plcp_hdr4 plcp;
 973         u32 tmp;
 974         __le16 dur;
 975
 976         plcp.data = 0;
 977         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 978         dur = ieee80211_generic_frame_duration(dev->wl->hw,
 979                                                dev->wl->if_id,
 980                                                size,
 981                                                B43legacy_RATE_TO_100KBPS(rate));
 982         /* Write PLCP in two parts and timing for packet transfer */
 983         tmp = le32_to_cpu(plcp.data);
 984         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
 985                               tmp & 0xFFFF);
 986         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
 987                               tmp >> 16);
 988         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
 989                               le16_to_cpu(dur));
 990 }
 991
 992 /* Instead of using custom probe response template, this function
 993  * just patches custom beacon template by:
 994  * 1) Changing packet type
 995  * 2) Patching duration field
 996  * 3) Stripping TIM
 997  */
 998 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
 999                                          u16 *dest_size, u8 rate)
1000 {
1001         const u8 *src_data;
1002         u8 *dest_data;
1003         u16 src_size;
1004         u16 elem_size;
1005         u16 src_pos;
1006         u16 dest_pos;
1007         __le16 dur;
1008         struct ieee80211_hdr *hdr;
1009
1010         B43legacy_WARN_ON(!dev->cached_beacon);
1011         src_size = dev->cached_beacon->len;
1012         src_data = (const u8 *)dev->cached_beacon->data;
1013
1014         if (unlikely(src_size < 0x24)) {
1015                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1016                        "invalid beacon\n");
1017                 return NULL;
1018         }
1019
1020         dest_data = kmalloc(src_size, GFP_ATOMIC);
1021         if (unlikely(!dest_data))
1022                 return NULL;
1023
1024         /* 0x24 is offset of first variable-len Information-Element
1025          * in beacon frame.
1026          */
1027         memcpy(dest_data, src_data, 0x24);
1028         src_pos = 0x24;
1029         dest_pos = 0x24;
1030         for (; src_pos < src_size - 2; src_pos += elem_size) {
1031                 elem_size = src_data[src_pos + 1] + 2;
1032                 if (src_data[src_pos] != 0x05) { /* TIM */
1033                         memcpy(dest_data + dest_pos, src_data + src_pos,
1034                                elem_size);
1035                         dest_pos += elem_size;
1036                 }
1037         }
1038         *dest_size = dest_pos;
1039         hdr = (struct ieee80211_hdr *)dest_data;
1040
1041         /* Set the frame control. */
1042         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1043                                          IEEE80211_STYPE_PROBE_RESP);
1044         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1045                                                dev->wl->if_id,
1046                                                *dest_size,
1047                                                B43legacy_RATE_TO_100KBPS(rate));
1048         hdr->duration_id = dur;
1049
1050         return dest_data;
1051 }
1052
1053 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1054                                                 u16 ram_offset,
1055                                                 u16 shm_size_offset, u8 rate)
1056 {
1057         u8 *probe_resp_data;
1058         u16 size;
1059
1060         B43legacy_WARN_ON(!dev->cached_beacon);
1061         size = dev->cached_beacon->len;
1062         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1063         if (unlikely(!probe_resp_data))
1064                 return;
1065
1066         /* Looks like PLCP headers plus packet timings are stored for
1067          * all possible basic rates
1068          */
1069         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1070                                         B43legacy_CCK_RATE_1MB);
1071         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1072                                         B43legacy_CCK_RATE_2MB);
1073         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1074                                         B43legacy_CCK_RATE_5MB);
1075         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1076                                         B43legacy_CCK_RATE_11MB);
1077
1078         size = min((size_t)size,
1079                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1080         b43legacy_write_template_common(dev, probe_resp_data,
1081                                         size, ram_offset,
1082                                         shm_size_offset, rate);
1083         kfree(probe_resp_data);
1084 }
1085
1086 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1087                                            struct sk_buff *beacon)
1088 {
1089         if (dev->cached_beacon)
1090                 kfree_skb(dev->cached_beacon);
1091         dev->cached_beacon = beacon;
1092
1093         return 0;
1094 }
1095
1096 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1097 {
1098         u32 status;
1099
1100         B43legacy_WARN_ON(!dev->cached_beacon);
1101
1102         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1103                                         B43legacy_CCK_RATE_1MB);
1104         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1105                                         B43legacy_CCK_RATE_1MB);
1106         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1107                                             B43legacy_CCK_RATE_11MB);
1108
1109         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1110         status |= 0x03;
1111         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1112 }
1113
1114 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1115                                         struct sk_buff *beacon)
1116 {
1117         int err;
1118
1119         err = b43legacy_refresh_cached_beacon(dev, beacon);
1120         if (unlikely(err))
1121                 return;
1122         b43legacy_update_templates(dev);
1123 }
1124
1125 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1126                                const u8 *ssid, u8 ssid_len)
1127 {
1128         u32 tmp;
1129         u16 i;
1130         u16 len;
1131
1132         len = min((u16)ssid_len, (u16)0x100);
1133         for (i = 0; i < len; i += sizeof(u32)) {
1134                 tmp = (u32)(ssid[i + 0]);
1135                 if (i + 1 < len)
1136                         tmp |= (u32)(ssid[i + 1]) << 8;
1137                 if (i + 2 < len)
1138                         tmp |= (u32)(ssid[i + 2]) << 16;
1139                 if (i + 3 < len)
1140                         tmp |= (u32)(ssid[i + 3]) << 24;
1141                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1142                                       0x380 + i, tmp);
1143         }
1144         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1145                               0x48, len);
1146 }
1147
1148 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1149                                      u16 beacon_int)
1150 {
1151         b43legacy_time_lock(dev);
1152         if (dev->dev->id.revision >= 3)
1153                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1154         else {
1155                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1156                 b43legacy_write16(dev, 0x610, beacon_int);
1157         }
1158         b43legacy_time_unlock(dev);
1159 }
1160
1161 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1162 {
1163         u32 status;
1164
1165         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1166                 return;
1167
1168         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1169         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1170
1171         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1172                 /* ACK beacon IRQ. */
1173                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1174                                   B43legacy_IRQ_BEACON);
1175                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1176                 if (dev->cached_beacon)
1177                         kfree_skb(dev->cached_beacon);
1178                 dev->cached_beacon = NULL;
1179                 return;
1180         }
1181         if (!(status & 0x1)) {
1182                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1183                                                 B43legacy_CCK_RATE_1MB);
1184                 status |= 0x1;
1185                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1186                                   status);
1187         }
1188         if (!(status & 0x2)) {
1189                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1190                                                 B43legacy_CCK_RATE_1MB);
1191                 status |= 0x2;
1192                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1193                                   status);
1194         }
1195 }
1196
1197 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1198 {
1199 }
1200
1201 /* Interrupt handler bottom-half */
1202 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1203 {
1204         u32 reason;
1205         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1206         u32 merged_dma_reason = 0;
1207         int i;
1208         unsigned long flags;
1209
1210         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1211
1212         B43legacy_WARN_ON(b43legacy_status(dev) <
1213                           B43legacy_STAT_INITIALIZED);
1214
1215         reason = dev->irq_reason;
1216         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1217                 dma_reason[i] = dev->dma_reason[i];
1218                 merged_dma_reason |= dma_reason[i];
1219         }
1220
1221         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1222                 b43legacyerr(dev->wl, "MAC transmission error\n");
1223
1224         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1225                 b43legacyerr(dev->wl, "PHY transmission error\n");
1226                 rmb();
1227                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1228                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1229                                               "restarting the controller\n");
1230                         b43legacy_controller_restart(dev, "PHY TX errors");
1231                 }
1232         }
1233
1234         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1235                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1236                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1237                         b43legacyerr(dev->wl, "Fatal DMA error: "
1238                                "0x%08X, 0x%08X, 0x%08X, "
1239                                "0x%08X, 0x%08X, 0x%08X\n",
1240                                dma_reason[0], dma_reason[1],
1241                                dma_reason[2], dma_reason[3],
1242                                dma_reason[4], dma_reason[5]);
1243                         b43legacy_controller_restart(dev, "DMA error");
1244                         mmiowb();
1245                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1246                         return;
1247                 }
1248                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1249                         b43legacyerr(dev->wl, "DMA error: "
1250                                "0x%08X, 0x%08X, 0x%08X, "
1251                                "0x%08X, 0x%08X, 0x%08X\n",
1252                                dma_reason[0], dma_reason[1],
1253                                dma_reason[2], dma_reason[3],
1254                                dma_reason[4], dma_reason[5]);
1255         }
1256
1257         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1258                 handle_irq_ucode_debug(dev);
1259         if (reason & B43legacy_IRQ_TBTT_INDI)
1260                 handle_irq_tbtt_indication(dev);
1261         if (reason & B43legacy_IRQ_ATIM_END)
1262                 handle_irq_atim_end(dev);
1263         if (reason & B43legacy_IRQ_BEACON)
1264                 handle_irq_beacon(dev);
1265         if (reason & B43legacy_IRQ_PMQ)
1266                 handle_irq_pmq(dev);
1267         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1268                 ;/*TODO*/
1269         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1270                 handle_irq_noise(dev);
1271
1272         /* Check the DMA reason registers for received data. */
1273         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1274                 if (b43legacy_using_pio(dev))
1275                         b43legacy_pio_rx(dev->pio.queue0);
1276                 else
1277                         b43legacy_dma_rx(dev->dma.rx_ring0);
1278         }
1279         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1280         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1281         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1282                 if (b43legacy_using_pio(dev))
1283                         b43legacy_pio_rx(dev->pio.queue3);
1284                 else
1285                         b43legacy_dma_rx(dev->dma.rx_ring3);
1286         }
1287         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1288         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1289
1290         if (reason & B43legacy_IRQ_TX_OK)
1291                 handle_irq_transmit_status(dev);
1292
1293         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1294         mmiowb();
1295         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1296 }
1297
1298 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1299                                u16 base, int queueidx)
1300 {
1301         u16 rxctl;
1302
1303         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1304         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1305                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1306         else
1307                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1308 }
1309
1310 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1311 {
1312         if (b43legacy_using_pio(dev) &&
1313             (dev->dev->id.revision < 3) &&
1314             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1315                 /* Apply a PIO specific workaround to the dma_reasons */
1316                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1317                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1318                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1319                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1320         }
1321
1322         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1323
1324         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1325                           dev->dma_reason[0]);
1326         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1327                           dev->dma_reason[1]);
1328         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1329                           dev->dma_reason[2]);
1330         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1331                           dev->dma_reason[3]);
1332         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1333                           dev->dma_reason[4]);
1334         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1335                           dev->dma_reason[5]);
1336 }
1337
1338 /* Interrupt handler top-half */
1339 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1340 {
1341         irqreturn_t ret = IRQ_NONE;
1342         struct b43legacy_wldev *dev = dev_id;
1343         u32 reason;
1344
1345         if (!dev)
1346                 return IRQ_NONE;
1347
1348         spin_lock(&dev->wl->irq_lock);
1349
1350         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1351                 goto out;
1352         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1353         if (reason == 0xffffffff) /* shared IRQ */
1354                 goto out;
1355         ret = IRQ_HANDLED;
1356         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1357         if (!reason)
1358                 goto out;
1359
1360         dev->dma_reason[0] = b43legacy_read32(dev,
1361                                               B43legacy_MMIO_DMA0_REASON)
1362                                               & 0x0001DC00;
1363         dev->dma_reason[1] = b43legacy_read32(dev,
1364                                               B43legacy_MMIO_DMA1_REASON)
1365                                               & 0x0000DC00;
1366         dev->dma_reason[2] = b43legacy_read32(dev,
1367                                               B43legacy_MMIO_DMA2_REASON)
1368                                               & 0x0000DC00;
1369         dev->dma_reason[3] = b43legacy_read32(dev,
1370                                               B43legacy_MMIO_DMA3_REASON)
1371                                               & 0x0001DC00;
1372         dev->dma_reason[4] = b43legacy_read32(dev,
1373                                               B43legacy_MMIO_DMA4_REASON)
1374                                               & 0x0000DC00;
1375         dev->dma_reason[5] = b43legacy_read32(dev,
1376                                               B43legacy_MMIO_DMA5_REASON)
1377                                               & 0x0000DC00;
1378
1379         b43legacy_interrupt_ack(dev, reason);
1380         /* disable all IRQs. They are enabled again in the bottom half. */
1381         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1382                                                           B43legacy_IRQ_ALL);
1383         /* save the reason code and call our bottom half. */
1384         dev->irq_reason = reason;
1385         tasklet_schedule(&dev->isr_tasklet);
1386 out:
1387         mmiowb();
1388         spin_unlock(&dev->wl->irq_lock);
1389
1390         return ret;
1391 }
1392
1393 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1394 {
1395         release_firmware(dev->fw.ucode);
1396         dev->fw.ucode = NULL;
1397         release_firmware(dev->fw.pcm);
1398         dev->fw.pcm = NULL;
1399         release_firmware(dev->fw.initvals);
1400         dev->fw.initvals = NULL;
1401         release_firmware(dev->fw.initvals_band);
1402         dev->fw.initvals_band = NULL;
1403 }
1404
1405 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1406 {
1407         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1408                      "Drivers/b43#devicefirmware "
1409                      "and download the correct firmware (version 3).\n");
1410 }
1411
1412 static int do_request_fw(struct b43legacy_wldev *dev,
1413                          const char *name,
1414                          const struct firmware **fw)
1415 {
1416         char path[sizeof(modparam_fwpostfix) + 32];
1417         struct b43legacy_fw_header *hdr;
1418         u32 size;
1419         int err;
1420
1421         if (!name)
1422                 return 0;
1423
1424         snprintf(path, ARRAY_SIZE(path),
1425                  "b43legacy%s/%s.fw",
1426                  modparam_fwpostfix, name);
1427         err = request_firmware(fw, path, dev->dev->dev);
1428         if (err) {
1429                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1430                        "or load failed.\n", path);
1431                 return err;
1432         }
1433         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1434                 goto err_format;
1435         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1436         switch (hdr->type) {
1437         case B43legacy_FW_TYPE_UCODE:
1438         case B43legacy_FW_TYPE_PCM:
1439                 size = be32_to_cpu(hdr->size);
1440                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1441                         goto err_format;
1442                 /* fallthrough */
1443         case B43legacy_FW_TYPE_IV:
1444                 if (hdr->ver != 1)
1445                         goto err_format;
1446                 break;
1447         default:
1448                 goto err_format;
1449         }
1450
1451         return err;
1452
1453 err_format:
1454         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1455         return -EPROTO;
1456 }
1457
1458 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1459 {
1460         struct b43legacy_firmware *fw = &dev->fw;
1461         const u8 rev = dev->dev->id.revision;
1462         const char *filename;
1463         u32 tmshigh;
1464         int err;
1465
1466         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1467         if (!fw->ucode) {
1468                 if (rev == 2)
1469                         filename = "ucode2";
1470                 else if (rev == 4)
1471                         filename = "ucode4";
1472                 else
1473                         filename = "ucode5";
1474                 err = do_request_fw(dev, filename, &fw->ucode);
1475                 if (err)
1476                         goto err_load;
1477         }
1478         if (!fw->pcm) {
1479                 if (rev < 5)
1480                         filename = "pcm4";
1481                 else
1482                         filename = "pcm5";
1483                 err = do_request_fw(dev, filename, &fw->pcm);
1484                 if (err)
1485                         goto err_load;
1486         }
1487         if (!fw->initvals) {
1488                 switch (dev->phy.type) {
1489                 case B43legacy_PHYTYPE_G:
1490                         if ((rev >= 5) && (rev <= 10))
1491                                 filename = "b0g0initvals5";
1492                         else if (rev == 2 || rev == 4)
1493                                 filename = "b0g0initvals2";
1494                         else
1495                                 goto err_no_initvals;
1496                         break;
1497                 default:
1498                         goto err_no_initvals;
1499                 }
1500                 err = do_request_fw(dev, filename, &fw->initvals);
1501                 if (err)
1502                         goto err_load;
1503         }
1504         if (!fw->initvals_band) {
1505                 switch (dev->phy.type) {
1506                 case B43legacy_PHYTYPE_G:
1507                         if ((rev >= 5) && (rev <= 10))
1508                                 filename = "b0g0bsinitvals5";
1509                         else if (rev >= 11)
1510                                 filename = NULL;
1511                         else if (rev == 2 || rev == 4)
1512                                 filename = NULL;
1513                         else
1514                                 goto err_no_initvals;
1515                         break;
1516                 default:
1517                         goto err_no_initvals;
1518                 }
1519                 err = do_request_fw(dev, filename, &fw->initvals_band);
1520                 if (err)
1521                         goto err_load;
1522         }
1523
1524         return 0;
1525
1526 err_load:
1527         b43legacy_print_fw_helptext(dev->wl);
1528         goto error;
1529
1530 err_no_initvals:
1531         err = -ENODEV;
1532         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1533                "core rev %u\n", dev->phy.type, rev);
1534         goto error;
1535
1536 error:
1537         b43legacy_release_firmware(dev);
1538         return err;
1539 }
1540
1541 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1542 {
1543         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1544         const __be32 *data;
1545         unsigned int i;
1546         unsigned int len;
1547         u16 fwrev;
1548         u16 fwpatch;
1549         u16 fwdate;
1550         u16 fwtime;
1551         u32 tmp;
1552         int err = 0;
1553
1554         /* Upload Microcode. */
1555         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1556         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1557         b43legacy_shm_control_word(dev,
1558                                    B43legacy_SHM_UCODE |
1559                                    B43legacy_SHM_AUTOINC_W,
1560                                    0x0000);
1561         for (i = 0; i < len; i++) {
1562                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1563                                     be32_to_cpu(data[i]));
1564                 udelay(10);
1565         }
1566
1567         if (dev->fw.pcm) {
1568                 /* Upload PCM data. */
1569                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1570                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1571                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1572                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1573                 /* No need for autoinc bit in SHM_HW */
1574                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1575                 for (i = 0; i < len; i++) {
1576                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1577                                           be32_to_cpu(data[i]));
1578                         udelay(10);
1579                 }
1580         }
1581
1582         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1583                           B43legacy_IRQ_ALL);
1584         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1585
1586         /* Wait for the microcode to load and respond */
1587         i = 0;
1588         while (1) {
1589                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1590                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1591                         break;
1592                 i++;
1593                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1594                         b43legacyerr(dev->wl, "Microcode not responding\n");
1595                         b43legacy_print_fw_helptext(dev->wl);
1596                         err = -ENODEV;
1597                         goto out;
1598                 }
1599                 udelay(10);
1600         }
1601         /* dummy read follows */
1602         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1603
1604         /* Get and check the revisions. */
1605         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1606                                      B43legacy_SHM_SH_UCODEREV);
1607         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1608                                        B43legacy_SHM_SH_UCODEPATCH);
1609         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1610                                       B43legacy_SHM_SH_UCODEDATE);
1611         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1612                                       B43legacy_SHM_SH_UCODETIME);
1613
1614         if (fwrev > 0x128) {
1615                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1616                              " Only firmware from binary drivers version 3.x"
1617                              " is supported. You must change your firmware"
1618                              " files.\n");
1619                 b43legacy_print_fw_helptext(dev->wl);
1620                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1621                 err = -EOPNOTSUPP;
1622                 goto out;
1623         }
1624         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1625                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1626                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1627                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1628
1629         dev->fw.rev = fwrev;
1630         dev->fw.patch = fwpatch;
1631
1632 out:
1633         return err;
1634 }
1635
1636 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1637                                     const struct b43legacy_iv *ivals,
1638                                     size_t count,
1639                                     size_t array_size)
1640 {
1641         const struct b43legacy_iv *iv;
1642         u16 offset;
1643         size_t i;
1644         bool bit32;
1645
1646         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1647         iv = ivals;
1648         for (i = 0; i < count; i++) {
1649                 if (array_size < sizeof(iv->offset_size))
1650                         goto err_format;
1651                 array_size -= sizeof(iv->offset_size);
1652                 offset = be16_to_cpu(iv->offset_size);
1653                 bit32 = !!(offset & B43legacy_IV_32BIT);
1654                 offset &= B43legacy_IV_OFFSET_MASK;
1655                 if (offset >= 0x1000)
1656                         goto err_format;
1657                 if (bit32) {
1658                         u32 value;
1659
1660                         if (array_size < sizeof(iv->data.d32))
1661                                 goto err_format;
1662                         array_size -= sizeof(iv->data.d32);
1663
1664                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1665                         b43legacy_write32(dev, offset, value);
1666
1667                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1668                                                         sizeof(__be16) +
1669                                                         sizeof(__be32));
1670                 } else {
1671                         u16 value;
1672
1673                         if (array_size < sizeof(iv->data.d16))
1674                                 goto err_format;
1675                         array_size -= sizeof(iv->data.d16);
1676
1677                         value = be16_to_cpu(iv->data.d16);
1678                         b43legacy_write16(dev, offset, value);
1679
1680                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1681                                                         sizeof(__be16) +
1682                                                         sizeof(__be16));
1683                 }
1684         }
1685         if (array_size)
1686                 goto err_format;
1687
1688         return 0;
1689
1690 err_format:
1691         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1692         b43legacy_print_fw_helptext(dev->wl);
1693
1694         return -EPROTO;
1695 }
1696
1697 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1698 {
1699         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1700         const struct b43legacy_fw_header *hdr;
1701         struct b43legacy_firmware *fw = &dev->fw;
1702         const struct b43legacy_iv *ivals;
1703         size_t count;
1704         int err;
1705
1706         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1707         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1708         count = be32_to_cpu(hdr->size);
1709         err = b43legacy_write_initvals(dev, ivals, count,
1710                                  fw->initvals->size - hdr_len);
1711         if (err)
1712                 goto out;
1713         if (fw->initvals_band) {
1714                 hdr = (const struct b43legacy_fw_header *)
1715                       (fw->initvals_band->data);
1716                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1717                         + hdr_len);
1718                 count = be32_to_cpu(hdr->size);
1719                 err = b43legacy_write_initvals(dev, ivals, count,
1720                                          fw->initvals_band->size - hdr_len);
1721                 if (err)
1722                         goto out;
1723         }
1724 out:
1725
1726         return err;
1727 }
1728
1729 /* Initialize the GPIOs
1730  * http://bcm-specs.sipsolutions.net/GPIO
1731  */
1732 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1733 {
1734         struct ssb_bus *bus = dev->dev->bus;
1735         struct ssb_device *gpiodev, *pcidev = NULL;
1736         u32 mask;
1737         u32 set;
1738
1739         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1740                           b43legacy_read32(dev,
1741                           B43legacy_MMIO_STATUS_BITFIELD)
1742                           & 0xFFFF3FFF);
1743
1744         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1745                           b43legacy_read16(dev,
1746                           B43legacy_MMIO_GPIO_MASK)
1747                           | 0x000F);
1748
1749         mask = 0x0000001F;
1750         set = 0x0000000F;
1751         if (dev->dev->bus->chip_id == 0x4301) {
1752                 mask |= 0x0060;
1753                 set |= 0x0060;
1754         }
1755         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1756                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1757                                   b43legacy_read16(dev,
1758                                   B43legacy_MMIO_GPIO_MASK)
1759                                   | 0x0200);
1760                 mask |= 0x0200;
1761                 set |= 0x0200;
1762         }
1763         if (dev->dev->id.revision >= 2)
1764                 mask  |= 0x0010; /* FIXME: This is redundant. */
1765
1766 #ifdef CONFIG_SSB_DRIVER_PCICORE
1767         pcidev = bus->pcicore.dev;
1768 #endif
1769         gpiodev = bus->chipco.dev ? : pcidev;
1770         if (!gpiodev)
1771                 return 0;
1772         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1773                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1774                      & mask) | set);
1775
1776         return 0;
1777 }
1778
1779 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1780 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1781 {
1782         struct ssb_bus *bus = dev->dev->bus;
1783         struct ssb_device *gpiodev, *pcidev = NULL;
1784
1785 #ifdef CONFIG_SSB_DRIVER_PCICORE
1786         pcidev = bus->pcicore.dev;
1787 #endif
1788         gpiodev = bus->chipco.dev ? : pcidev;
1789         if (!gpiodev)
1790                 return;
1791         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1792 }
1793
1794 /* http://bcm-specs.sipsolutions.net/EnableMac */
1795 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1796 {
1797         dev->mac_suspended--;
1798         B43legacy_WARN_ON(dev->mac_suspended < 0);
1799         B43legacy_WARN_ON(irqs_disabled());
1800         if (dev->mac_suspended == 0) {
1801                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1802                                   b43legacy_read32(dev,
1803                                   B43legacy_MMIO_STATUS_BITFIELD)
1804                                   | B43legacy_SBF_MAC_ENABLED);
1805                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1806                                   B43legacy_IRQ_MAC_SUSPENDED);
1807                 /* the next two are dummy reads */
1808                 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1809                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1810                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1811
1812                 /* Re-enable IRQs. */
1813                 spin_lock_irq(&dev->wl->irq_lock);
1814                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1815                 spin_unlock_irq(&dev->wl->irq_lock);
1816         }
1817 }
1818
1819 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1820 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1821 {
1822         int i;
1823         u32 tmp;
1824
1825         might_sleep();
1826         B43legacy_WARN_ON(irqs_disabled());
1827         B43legacy_WARN_ON(dev->mac_suspended < 0);
1828
1829         if (dev->mac_suspended == 0) {
1830                 /* Mask IRQs before suspending MAC. Otherwise
1831                  * the MAC stays busy and won't suspend. */
1832                 spin_lock_irq(&dev->wl->irq_lock);
1833                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1834                 spin_unlock_irq(&dev->wl->irq_lock);
1835                 b43legacy_synchronize_irq(dev);
1836                 dev->irq_savedstate = tmp;
1837
1838                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1839                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1840                                   b43legacy_read32(dev,
1841                                   B43legacy_MMIO_STATUS_BITFIELD)
1842                                   & ~B43legacy_SBF_MAC_ENABLED);
1843                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1844                 for (i = 40; i; i--) {
1845                         tmp = b43legacy_read32(dev,
1846                                                B43legacy_MMIO_GEN_IRQ_REASON);
1847                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1848                                 goto out;
1849                         msleep(1);
1850                 }
1851                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1852         }
1853 out:
1854         dev->mac_suspended++;
1855 }
1856
1857 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1858 {
1859         struct b43legacy_wl *wl = dev->wl;
1860         u32 ctl;
1861         u16 cfp_pretbtt;
1862
1863         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1864         /* Reset status to STA infrastructure mode. */
1865         ctl &= ~B43legacy_MACCTL_AP;
1866         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1867         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1868         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1869         ctl &= ~B43legacy_MACCTL_PROMISC;
1870         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1871         ctl |= B43legacy_MACCTL_INFRA;
1872
1873         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1874                 ctl |= B43legacy_MACCTL_AP;
1875         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1876                 ctl &= ~B43legacy_MACCTL_INFRA;
1877
1878         if (wl->filter_flags & FIF_CONTROL)
1879                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1880         if (wl->filter_flags & FIF_FCSFAIL)
1881                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1882         if (wl->filter_flags & FIF_PLCPFAIL)
1883                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1884         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1885                 ctl |= B43legacy_MACCTL_PROMISC;
1886         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1887                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1888
1889         /* Workaround: On old hardware the HW-MAC-address-filter
1890          * doesn't work properly, so always run promisc in filter
1891          * it in software. */
1892         if (dev->dev->id.revision <= 4)
1893                 ctl |= B43legacy_MACCTL_PROMISC;
1894
1895         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1896
1897         cfp_pretbtt = 2;
1898         if ((ctl & B43legacy_MACCTL_INFRA) &&
1899             !(ctl & B43legacy_MACCTL_AP)) {
1900                 if (dev->dev->bus->chip_id == 0x4306 &&
1901                     dev->dev->bus->chip_rev == 3)
1902                         cfp_pretbtt = 100;
1903                 else
1904                         cfp_pretbtt = 50;
1905         }
1906         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1907 }
1908
1909 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1910                                         u16 rate,
1911                                         int is_ofdm)
1912 {
1913         u16 offset;
1914
1915         if (is_ofdm) {
1916                 offset = 0x480;
1917                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1918         } else {
1919                 offset = 0x4C0;
1920                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1921         }
1922         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1923                               b43legacy_shm_read16(dev,
1924                               B43legacy_SHM_SHARED, offset));
1925 }
1926
1927 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1928 {
1929         switch (dev->phy.type) {
1930         case B43legacy_PHYTYPE_G:
1931                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1932                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1933                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1934                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1935                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1936                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1937                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1938                 /* fallthrough */
1939         case B43legacy_PHYTYPE_B:
1940                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1941                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1942                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1943                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1944                 break;
1945         default:
1946                 B43legacy_BUG_ON(1);
1947         }
1948 }
1949
1950 /* Set the TX-Antenna for management frames sent by firmware. */
1951 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1952                                           int antenna)
1953 {
1954         u16 ant = 0;
1955         u16 tmp;
1956
1957         switch (antenna) {
1958         case B43legacy_ANTENNA0:
1959                 ant |= B43legacy_TX4_PHY_ANT0;
1960                 break;
1961         case B43legacy_ANTENNA1:
1962                 ant |= B43legacy_TX4_PHY_ANT1;
1963                 break;
1964         case B43legacy_ANTENNA_AUTO:
1965                 ant |= B43legacy_TX4_PHY_ANTLAST;
1966                 break;
1967         default:
1968                 B43legacy_BUG_ON(1);
1969         }
1970
1971         /* FIXME We also need to set the other flags of the PHY control
1972          * field somewhere. */
1973
1974         /* For Beacons */
1975         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1976                                    B43legacy_SHM_SH_BEACPHYCTL);
1977         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1978         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1979                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
1980         /* For ACK/CTS */
1981         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1982                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
1983         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1984         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1985                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
1986         /* For Probe Resposes */
1987         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1988                                    B43legacy_SHM_SH_PRPHYCTL);
1989         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1990         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1991                               B43legacy_SHM_SH_PRPHYCTL, tmp);
1992 }
1993
1994 /* This is the opposite of b43legacy_chip_init() */
1995 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
1996 {
1997         b43legacy_radio_turn_off(dev, 1);
1998         b43legacy_leds_exit(dev);
1999         b43legacy_gpio_cleanup(dev);
2000         /* firmware is released later */
2001 }
2002
2003 /* Initialize the chip
2004  * http://bcm-specs.sipsolutions.net/ChipInit
2005  */
2006 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2007 {
2008         struct b43legacy_phy *phy = &dev->phy;
2009         int err;
2010         int tmp;
2011         u32 value32;
2012         u16 value16;
2013
2014         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2015                           B43legacy_SBF_CORE_READY
2016                           | B43legacy_SBF_400);
2017
2018         err = b43legacy_request_firmware(dev);
2019         if (err)
2020                 goto out;
2021         err = b43legacy_upload_microcode(dev);
2022         if (err)
2023                 goto out; /* firmware is released later */
2024
2025         err = b43legacy_gpio_init(dev);
2026         if (err)
2027                 goto out; /* firmware is released later */
2028         b43legacy_leds_init(dev);
2029
2030         err = b43legacy_upload_initvals(dev);
2031         if (err)
2032                 goto err_leds_exit;
2033         b43legacy_radio_turn_on(dev);
2034
2035         b43legacy_write16(dev, 0x03E6, 0x0000);
2036         err = b43legacy_phy_init(dev);
2037         if (err)
2038                 goto err_radio_off;
2039
2040         /* Select initial Interference Mitigation. */
2041         tmp = phy->interfmode;
2042         phy->interfmode = B43legacy_INTERFMODE_NONE;
2043         b43legacy_radio_set_interference_mitigation(dev, tmp);
2044
2045         b43legacy_phy_set_antenna_diversity(dev);
2046         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2047
2048         if (phy->type == B43legacy_PHYTYPE_B) {
2049                 value16 = b43legacy_read16(dev, 0x005E);
2050                 value16 |= 0x0004;
2051                 b43legacy_write16(dev, 0x005E, value16);
2052         }
2053         b43legacy_write32(dev, 0x0100, 0x01000000);
2054         if (dev->dev->id.revision < 5)
2055                 b43legacy_write32(dev, 0x010C, 0x01000000);
2056
2057         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2058         value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2059         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2060         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2061         value32 |= B43legacy_SBF_MODE_NOTADHOC;
2062         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2063
2064         if (b43legacy_using_pio(dev)) {
2065                 b43legacy_write32(dev, 0x0210, 0x00000100);
2066                 b43legacy_write32(dev, 0x0230, 0x00000100);
2067                 b43legacy_write32(dev, 0x0250, 0x00000100);
2068                 b43legacy_write32(dev, 0x0270, 0x00000100);
2069                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2070                                       0x0000);
2071         }
2072
2073         /* Probe Response Timeout value */
2074         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2075         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2076
2077         /* Initially set the wireless operation mode. */
2078         b43legacy_adjust_opmode(dev);
2079
2080         if (dev->dev->id.revision < 3) {
2081                 b43legacy_write16(dev, 0x060E, 0x0000);
2082                 b43legacy_write16(dev, 0x0610, 0x8000);
2083                 b43legacy_write16(dev, 0x0604, 0x0000);
2084                 b43legacy_write16(dev, 0x0606, 0x0200);
2085         } else {
2086                 b43legacy_write32(dev, 0x0188, 0x80000000);
2087                 b43legacy_write32(dev, 0x018C, 0x02000000);
2088         }
2089         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2090         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2091         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2092         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2093         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2094         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2095         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2096
2097         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2098         value32 |= 0x00100000;
2099         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2100
2101         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2102                           dev->dev->bus->chipco.fast_pwrup_delay);
2103
2104         /* PHY TX errors counter. */
2105         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2106
2107         B43legacy_WARN_ON(err != 0);
2108         b43legacydbg(dev->wl, "Chip initialized\n");
2109 out:
2110         return err;
2111
2112 err_radio_off:
2113         b43legacy_radio_turn_off(dev, 1);
2114 err_leds_exit:
2115         b43legacy_leds_exit(dev);
2116         b43legacy_gpio_cleanup(dev);
2117         goto out;
2118 }
2119
2120 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2121 {
2122         struct b43legacy_phy *phy = &dev->phy;
2123
2124         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2125                 return;
2126
2127         b43legacy_mac_suspend(dev);
2128         b43legacy_phy_lo_g_measure(dev);
2129         b43legacy_mac_enable(dev);
2130 }
2131
2132 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2133 {
2134         b43legacy_phy_lo_mark_all_unused(dev);
2135         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2136                 b43legacy_mac_suspend(dev);
2137                 b43legacy_calc_nrssi_slope(dev);
2138                 b43legacy_mac_enable(dev);
2139         }
2140 }
2141
2142 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2143 {
2144         /* Update device statistics. */
2145         b43legacy_calculate_link_quality(dev);
2146 }
2147
2148 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2149 {
2150         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2151
2152         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2153         wmb();
2154 }
2155
2156 static void do_periodic_work(struct b43legacy_wldev *dev)
2157 {
2158         unsigned int state;
2159
2160         state = dev->periodic_state;
2161         if (state % 8 == 0)
2162                 b43legacy_periodic_every120sec(dev);
2163         if (state % 4 == 0)
2164                 b43legacy_periodic_every60sec(dev);
2165         if (state % 2 == 0)
2166                 b43legacy_periodic_every30sec(dev);
2167         b43legacy_periodic_every15sec(dev);
2168 }
2169
2170 /* Periodic work locking policy:
2171  *      The whole periodic work handler is protected by
2172  *      wl->mutex. If another lock is needed somewhere in the
2173  *      pwork callchain, it's aquired in-place, where it's needed.
2174  */
2175 static void b43legacy_periodic_work_handler(struct work_struct *work)
2176 {
2177         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2178                                              periodic_work.work);
2179         struct b43legacy_wl *wl = dev->wl;
2180         unsigned long delay;
2181
2182         mutex_lock(&wl->mutex);
2183
2184         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2185                 goto out;
2186         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2187                 goto out_requeue;
2188
2189         do_periodic_work(dev);
2190
2191         dev->periodic_state++;
2192 out_requeue:
2193         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2194                 delay = msecs_to_jiffies(50);
2195         else
2196                 delay = round_jiffies_relative(HZ * 15);
2197         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2198 out:
2199         mutex_unlock(&wl->mutex);
2200 }
2201
2202 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2203 {
2204         struct delayed_work *work = &dev->periodic_work;
2205
2206         dev->periodic_state = 0;
2207         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2208         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2209 }
2210
2211 /* Validate access to the chip (SHM) */
2212 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2213 {
2214         u32 value;
2215         u32 shm_backup;
2216
2217         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2218         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2219         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2220                                  0xAA5555AA)
2221                 goto error;
2222         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2223         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2224                                  0x55AAAA55)
2225                 goto error;
2226         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2227
2228         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2229         if ((value | B43legacy_MACCTL_GMODE) !=
2230             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2231                 goto error;
2232
2233         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2234         if (value)
2235                 goto error;
2236
2237         return 0;
2238 error:
2239         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2240         return -ENODEV;
2241 }
2242
2243 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2244 {
2245         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2246         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2247         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2248                                         0x0056);
2249         /* KTP is a word address, but we address SHM bytewise.
2250          * So multiply by two.
2251          */
2252         dev->ktp *= 2;
2253         if (dev->dev->id.revision >= 5)
2254                 /* Number of RCMTA address slots */
2255                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2256                                   dev->max_nr_keys - 8);
2257 }
2258
2259 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2260 {
2261         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2262         unsigned long flags;
2263
2264         /* Don't take wl->mutex here, as it could deadlock with
2265          * hwrng internal locking. It's not needed to take
2266          * wl->mutex here, anyway. */
2267
2268         spin_lock_irqsave(&wl->irq_lock, flags);
2269         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2270         spin_unlock_irqrestore(&wl->irq_lock, flags);
2271
2272         return (sizeof(u16));
2273 }
2274
2275 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2276 {
2277         if (wl->rng_initialized)
2278                 hwrng_unregister(&wl->rng);
2279 }
2280
2281 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2282 {
2283         int err;
2284
2285         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2286                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2287         wl->rng.name = wl->rng_name;
2288         wl->rng.data_read = b43legacy_rng_read;
2289         wl->rng.priv = (unsigned long)wl;
2290         wl->rng_initialized = 1;
2291         err = hwrng_register(&wl->rng);
2292         if (err) {
2293                 wl->rng_initialized = 0;
2294                 b43legacyerr(wl, "Failed to register the random "
2295                        "number generator (%d)\n", err);
2296         }
2297
2298         return err;
2299 }
2300
2301 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2302                            struct sk_buff *skb,
2303                            struct ieee80211_tx_control *ctl)
2304 {
2305         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2306         struct b43legacy_wldev *dev = wl->current_dev;
2307         int err = -ENODEV;
2308         unsigned long flags;
2309
2310         if (unlikely(!dev))
2311                 goto out;
2312         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2313                 goto out;
2314         /* DMA-TX is done without a global lock. */
2315         if (b43legacy_using_pio(dev)) {
2316                 spin_lock_irqsave(&wl->irq_lock, flags);
2317                 err = b43legacy_pio_tx(dev, skb, ctl);
2318                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2319         } else
2320                 err = b43legacy_dma_tx(dev, skb, ctl);
2321 out:
2322         if (unlikely(err))
2323                 return NETDEV_TX_BUSY;
2324         return NETDEV_TX_OK;
2325 }
2326
2327 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2328                                 int queue,
2329                                 const struct ieee80211_tx_queue_params *params)
2330 {
2331         return 0;
2332 }
2333
2334 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2335                                      struct ieee80211_tx_queue_stats *stats)
2336 {
2337         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2338         struct b43legacy_wldev *dev = wl->current_dev;
2339         unsigned long flags;
2340         int err = -ENODEV;
2341
2342         if (!dev)
2343                 goto out;
2344         spin_lock_irqsave(&wl->irq_lock, flags);
2345         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2346                 if (b43legacy_using_pio(dev))
2347                         b43legacy_pio_get_tx_stats(dev, stats);
2348                 else
2349                         b43legacy_dma_get_tx_stats(dev, stats);
2350                 err = 0;
2351         }
2352         spin_unlock_irqrestore(&wl->irq_lock, flags);
2353 out:
2354         return err;
2355 }
2356
2357 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2358                                   struct ieee80211_low_level_stats *stats)
2359 {
2360         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2361         unsigned long flags;
2362
2363         spin_lock_irqsave(&wl->irq_lock, flags);
2364         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2365         spin_unlock_irqrestore(&wl->irq_lock, flags);
2366
2367         return 0;
2368 }
2369
2370 static const char *phymode_to_string(unsigned int phymode)
2371 {
2372         switch (phymode) {
2373         case B43legacy_PHYMODE_B:
2374                 return "B";
2375         case B43legacy_PHYMODE_G:
2376                 return "G";
2377         default:
2378                 B43legacy_BUG_ON(1);
2379         }
2380         return "";
2381 }
2382
2383 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2384                                   unsigned int phymode,
2385                                   struct b43legacy_wldev **dev,
2386                                   bool *gmode)
2387 {
2388         struct b43legacy_wldev *d;
2389
2390         list_for_each_entry(d, &wl->devlist, list) {
2391                 if (d->phy.possible_phymodes & phymode) {
2392                         /* Ok, this device supports the PHY-mode.
2393                          * Set the gmode bit. */
2394                         *gmode = 1;
2395                         *dev = d;
2396
2397                         return 0;
2398                 }
2399         }
2400
2401         return -ESRCH;
2402 }
2403
2404 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2405 {
2406         struct ssb_device *sdev = dev->dev;
2407         u32 tmslow;
2408
2409         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2410         tmslow &= ~B43legacy_TMSLOW_GMODE;
2411         tmslow |= B43legacy_TMSLOW_PHYRESET;
2412         tmslow |= SSB_TMSLOW_FGC;
2413         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2414         msleep(1);
2415
2416         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2417         tmslow &= ~SSB_TMSLOW_FGC;
2418         tmslow |= B43legacy_TMSLOW_PHYRESET;
2419         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2420         msleep(1);
2421 }
2422
2423 /* Expects wl->mutex locked */
2424 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2425                                       unsigned int new_mode)
2426 {
2427         struct b43legacy_wldev *up_dev;
2428         struct b43legacy_wldev *down_dev;
2429         int err;
2430         bool gmode = 0;
2431         int prev_status;
2432
2433         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2434         if (err) {
2435                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2436                        phymode_to_string(new_mode));
2437                 return err;
2438         }
2439         if ((up_dev == wl->current_dev) &&
2440             (!!wl->current_dev->phy.gmode == !!gmode))
2441                 /* This device is already running. */
2442                 return 0;
2443         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2444                phymode_to_string(new_mode));
2445         down_dev = wl->current_dev;
2446
2447         prev_status = b43legacy_status(down_dev);
2448         /* Shutdown the currently running core. */
2449         if (prev_status >= B43legacy_STAT_STARTED)
2450                 b43legacy_wireless_core_stop(down_dev);
2451         if (prev_status >= B43legacy_STAT_INITIALIZED)
2452                 b43legacy_wireless_core_exit(down_dev);
2453
2454         if (down_dev != up_dev)
2455                 /* We switch to a different core, so we put PHY into
2456                  * RESET on the old core. */
2457                 b43legacy_put_phy_into_reset(down_dev);
2458
2459         /* Now start the new core. */
2460         up_dev->phy.gmode = gmode;
2461         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2462                 err = b43legacy_wireless_core_init(up_dev);
2463                 if (err) {
2464                         b43legacyerr(wl, "Fatal: Could not initialize device"
2465                                      " for newly selected %s-PHY mode\n",
2466                                      phymode_to_string(new_mode));
2467                         goto init_failure;
2468                 }
2469         }
2470         if (prev_status >= B43legacy_STAT_STARTED) {
2471                 err = b43legacy_wireless_core_start(up_dev);
2472                 if (err) {
2473                         b43legacyerr(wl, "Fatal: Coult not start device for "
2474                                "newly selected %s-PHY mode\n",
2475                                phymode_to_string(new_mode));
2476                         b43legacy_wireless_core_exit(up_dev);
2477                         goto init_failure;
2478                 }
2479         }
2480         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2481
2482         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2483
2484         wl->current_dev = up_dev;
2485
2486         return 0;
2487 init_failure:
2488         /* Whoops, failed to init the new core. No core is operating now. */
2489         wl->current_dev = NULL;
2490         return err;
2491 }
2492
2493 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2494 {
2495         switch (antenna) {
2496         case 0: /* default/diversity */
2497                 return B43legacy_ANTENNA_DEFAULT;
2498         case 1: /* Antenna 0 */
2499                 return B43legacy_ANTENNA0;
2500         case 2: /* Antenna 1 */
2501                 return B43legacy_ANTENNA1;
2502         default:
2503                 return B43legacy_ANTENNA_DEFAULT;
2504         }
2505 }
2506
2507 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2508                                    struct ieee80211_conf *conf)
2509 {
2510         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2511         struct b43legacy_wldev *dev;
2512         struct b43legacy_phy *phy;
2513         unsigned long flags;
2514         unsigned int new_phymode = 0xFFFF;
2515         int antenna_tx;
2516         int antenna_rx;
2517         int err = 0;
2518         u32 savedirqs;
2519
2520         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2521         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2522
2523         mutex_lock(&wl->mutex);
2524
2525         /* Switch the PHY mode (if necessary). */
2526         switch (conf->phymode) {
2527         case MODE_IEEE80211B:
2528                 new_phymode = B43legacy_PHYMODE_B;
2529                 break;
2530         case MODE_IEEE80211G:
2531                 new_phymode = B43legacy_PHYMODE_G;
2532                 break;
2533         default:
2534                 B43legacy_WARN_ON(1);
2535         }
2536         err = b43legacy_switch_phymode(wl, new_phymode);
2537         if (err)
2538                 goto out_unlock_mutex;
2539         dev = wl->current_dev;
2540         phy = &dev->phy;
2541
2542         /* Disable IRQs while reconfiguring the device.
2543          * This makes it possible to drop the spinlock throughout
2544          * the reconfiguration process. */
2545         spin_lock_irqsave(&wl->irq_lock, flags);
2546         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2547                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2548                 goto out_unlock_mutex;
2549         }
2550         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2551         spin_unlock_irqrestore(&wl->irq_lock, flags);
2552         b43legacy_synchronize_irq(dev);
2553
2554         /* Switch to the requested channel.
2555          * The firmware takes care of races with the TX handler. */
2556         if (conf->channel_val != phy->channel)
2557                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2558
2559         /* Enable/Disable ShortSlot timing. */
2560         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2561              != dev->short_slot) {
2562                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2563                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2564                         b43legacy_short_slot_timing_enable(dev);
2565                 else
2566                         b43legacy_short_slot_timing_disable(dev);
2567         }
2568
2569         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2570
2571         /* Adjust the desired TX power level. */
2572         if (conf->power_level != 0) {
2573                 if (conf->power_level != phy->power_level) {
2574                         phy->power_level = conf->power_level;
2575                         b43legacy_phy_xmitpower(dev);
2576                 }
2577         }
2578
2579         /* Antennas for RX and management frame TX. */
2580         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2581
2582         /* Update templates for AP mode. */
2583         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2584                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2585
2586
2587         if (!!conf->radio_enabled != phy->radio_on) {
2588                 if (conf->radio_enabled) {
2589                         b43legacy_radio_turn_on(dev);
2590                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2591                         if (!dev->radio_hw_enable)
2592                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2593                                               " button still turns the radio"
2594                                               " physically off. Press the"
2595                                               " button to turn it on.\n");
2596                 } else {
2597                         b43legacy_radio_turn_off(dev, 0);
2598                         b43legacyinfo(dev->wl, "Radio turned off by"
2599                                       " software\n");
2600                 }
2601         }
2602
2603         spin_lock_irqsave(&wl->irq_lock, flags);
2604         b43legacy_interrupt_enable(dev, savedirqs);
2605         mmiowb();
2606         spin_unlock_irqrestore(&wl->irq_lock, flags);
2607 out_unlock_mutex:
2608         mutex_unlock(&wl->mutex);
2609
2610         return err;
2611 }
2612
2613 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2614                                           unsigned int changed,
2615                                           unsigned int *fflags,
2616                                           int mc_count,
2617                                           struct dev_addr_list *mc_list)
2618 {
2619         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2620         struct b43legacy_wldev *dev = wl->current_dev;
2621         unsigned long flags;
2622
2623         if (!dev) {
2624                 *fflags = 0;
2625                 return;
2626         }
2627
2628         spin_lock_irqsave(&wl->irq_lock, flags);
2629         *fflags &= FIF_PROMISC_IN_BSS |
2630                   FIF_ALLMULTI |
2631                   FIF_FCSFAIL |
2632                   FIF_PLCPFAIL |
2633                   FIF_CONTROL |
2634                   FIF_OTHER_BSS |
2635                   FIF_BCN_PRBRESP_PROMISC;
2636
2637         changed &= FIF_PROMISC_IN_BSS |
2638                    FIF_ALLMULTI |
2639                    FIF_FCSFAIL |
2640                    FIF_PLCPFAIL |
2641                    FIF_CONTROL |
2642                    FIF_OTHER_BSS |
2643                    FIF_BCN_PRBRESP_PROMISC;
2644
2645         wl->filter_flags = *fflags;
2646
2647         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2648                 b43legacy_adjust_opmode(dev);
2649         spin_unlock_irqrestore(&wl->irq_lock, flags);
2650 }
2651
2652 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2653                                          int if_id,
2654                                          struct ieee80211_if_conf *conf)
2655 {
2656         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2657         struct b43legacy_wldev *dev = wl->current_dev;
2658         unsigned long flags;
2659
2660         if (!dev)
2661                 return -ENODEV;
2662         mutex_lock(&wl->mutex);
2663         spin_lock_irqsave(&wl->irq_lock, flags);
2664         B43legacy_WARN_ON(wl->if_id != if_id);
2665         if (conf->bssid)
2666                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2667         else
2668                 memset(wl->bssid, 0, ETH_ALEN);
2669         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2670                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2671                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2672                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2673                         if (conf->beacon)
2674                                 b43legacy_refresh_templates(dev, conf->beacon);
2675                 }
2676                 b43legacy_write_mac_bssid_templates(dev);
2677         }
2678         spin_unlock_irqrestore(&wl->irq_lock, flags);
2679         mutex_unlock(&wl->mutex);
2680
2681         return 0;
2682 }
2683
2684 /* Locking: wl->mutex */
2685 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2686 {
2687         struct b43legacy_wl *wl = dev->wl;
2688         unsigned long flags;
2689
2690         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2691                 return;
2692
2693         /* Disable and sync interrupts. We must do this before than
2694          * setting the status to INITIALIZED, as the interrupt handler
2695          * won't care about IRQs then. */
2696         spin_lock_irqsave(&wl->irq_lock, flags);
2697         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2698                                                           B43legacy_IRQ_ALL);
2699         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2700         spin_unlock_irqrestore(&wl->irq_lock, flags);
2701         b43legacy_synchronize_irq(dev);
2702
2703         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2704
2705         mutex_unlock(&wl->mutex);
2706         /* Must unlock as it would otherwise deadlock. No races here.
2707          * Cancel the possibly running self-rearming periodic work. */
2708         cancel_delayed_work_sync(&dev->periodic_work);
2709         mutex_lock(&wl->mutex);
2710
2711         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2712
2713         b43legacy_mac_suspend(dev);
2714         free_irq(dev->dev->irq, dev);
2715         b43legacydbg(wl, "Wireless interface stopped\n");
2716 }
2717
2718 /* Locking: wl->mutex */
2719 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2720 {
2721         int err;
2722
2723         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2724
2725         drain_txstatus_queue(dev);
2726         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2727                           IRQF_SHARED, KBUILD_MODNAME, dev);
2728         if (err) {
2729                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2730                        dev->dev->irq);
2731                 goto out;
2732         }
2733         /* We are ready to run. */
2734         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2735
2736         /* Start data flow (TX/RX) */
2737         b43legacy_mac_enable(dev);
2738         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2739         ieee80211_start_queues(dev->wl->hw);
2740
2741         /* Start maintenance work */
2742         b43legacy_periodic_tasks_setup(dev);
2743
2744         b43legacydbg(dev->wl, "Wireless interface started\n");
2745 out:
2746         return err;
2747 }
2748
2749 /* Get PHY and RADIO versioning numbers */
2750 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2751 {
2752         struct b43legacy_phy *phy = &dev->phy;
2753         u32 tmp;
2754         u8 analog_type;
2755         u8 phy_type;
2756         u8 phy_rev;
2757         u16 radio_manuf;
2758         u16 radio_ver;
2759         u16 radio_rev;
2760         int unsupported = 0;
2761
2762         /* Get PHY versioning */
2763         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2764         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2765                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2766         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2767         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2768         switch (phy_type) {
2769         case B43legacy_PHYTYPE_B:
2770                 if (phy_rev != 2 && phy_rev != 4
2771                     && phy_rev != 6 && phy_rev != 7)
2772                         unsupported = 1;
2773                 break;
2774         case B43legacy_PHYTYPE_G:
2775                 if (phy_rev > 8)
2776                         unsupported = 1;
2777                 break;
2778         default:
2779                 unsupported = 1;
2780         };
2781         if (unsupported) {
2782                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2783                        "(Analog %u, Type %u, Revision %u)\n",
2784                        analog_type, phy_type, phy_rev);
2785                 return -EOPNOTSUPP;
2786         }
2787         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2788                analog_type, phy_type, phy_rev);
2789
2790
2791         /* Get RADIO versioning */
2792         if (dev->dev->bus->chip_id == 0x4317) {
2793                 if (dev->dev->bus->chip_rev == 0)
2794                         tmp = 0x3205017F;
2795                 else if (dev->dev->bus->chip_rev == 1)
2796                         tmp = 0x4205017F;
2797                 else
2798                         tmp = 0x5205017F;
2799         } else {
2800                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2801                                   B43legacy_RADIOCTL_ID);
2802                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2803                 tmp <<= 16;
2804                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2805                                   B43legacy_RADIOCTL_ID);
2806                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2807         }
2808         radio_manuf = (tmp & 0x00000FFF);
2809         radio_ver = (tmp & 0x0FFFF000) >> 12;
2810         radio_rev = (tmp & 0xF0000000) >> 28;
2811         switch (phy_type) {
2812         case B43legacy_PHYTYPE_B:
2813                 if ((radio_ver & 0xFFF0) != 0x2050)
2814                         unsupported = 1;
2815                 break;
2816         case B43legacy_PHYTYPE_G:
2817                 if (radio_ver != 0x2050)
2818                         unsupported = 1;
2819                 break;
2820         default:
2821                 B43legacy_BUG_ON(1);
2822         }
2823         if (unsupported) {
2824                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2825                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2826                        radio_manuf, radio_ver, radio_rev);
2827                 return -EOPNOTSUPP;
2828         }
2829         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2830                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2831
2832
2833         phy->radio_manuf = radio_manuf;
2834         phy->radio_ver = radio_ver;
2835         phy->radio_rev = radio_rev;
2836
2837         phy->analog = analog_type;
2838         phy->type = phy_type;
2839         phy->rev = phy_rev;
2840
2841         return 0;
2842 }
2843
2844 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2845                                       struct b43legacy_phy *phy)
2846 {
2847         struct b43legacy_lopair *lo;
2848         int i;
2849
2850         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2851         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2852
2853         /* Flags */
2854         phy->locked = 0;
2855         /* Assume the radio is enabled. If it's not enabled, the state will
2856          * immediately get fixed on the first periodic work run. */
2857         dev->radio_hw_enable = 1;
2858
2859         phy->savedpctlreg = 0xFFFF;
2860         phy->aci_enable = 0;
2861         phy->aci_wlan_automatic = 0;
2862         phy->aci_hw_rssi = 0;
2863
2864         lo = phy->_lo_pairs;
2865         if (lo)
2866                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2867                                      B43legacy_LO_COUNT);
2868         phy->max_lb_gain = 0;
2869         phy->trsw_rx_gain = 0;
2870
2871         /* Set default attenuation values. */
2872         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2873         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2874         phy->txctl1 = b43legacy_default_txctl1(dev);
2875         phy->txpwr_offset = 0;
2876
2877         /* NRSSI */
2878         phy->nrssislope = 0;
2879         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2880                 phy->nrssi[i] = -1000;
2881         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2882                 phy->nrssi_lt[i] = i;
2883
2884         phy->lofcal = 0xFFFF;
2885         phy->initval = 0xFFFF;
2886
2887         spin_lock_init(&phy->lock);
2888         phy->interfmode = B43legacy_INTERFMODE_NONE;
2889         phy->channel = 0xFF;
2890 }
2891
2892 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2893 {
2894         /* Flags */
2895         dev->reg124_set_0x4 = 0;
2896
2897         /* Stats */
2898         memset(&dev->stats, 0, sizeof(dev->stats));
2899
2900         setup_struct_phy_for_init(dev, &dev->phy);
2901
2902         /* IRQ related flags */
2903         dev->irq_reason = 0;
2904         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2905         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2906
2907         dev->mac_suspended = 1;
2908
2909         /* Noise calculation context */
2910         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2911 }
2912
2913 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2914 {
2915 #ifdef CONFIG_SSB_DRIVER_PCICORE
2916         struct ssb_bus *bus = dev->dev->bus;
2917         u32 tmp;
2918
2919         if (bus->pcicore.dev &&
2920             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2921             bus->pcicore.dev->id.revision <= 5) {
2922                 /* IMCFGLO timeouts workaround. */
2923                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2924                 tmp &= ~SSB_IMCFGLO_REQTO;
2925                 tmp &= ~SSB_IMCFGLO_SERTO;
2926                 switch (bus->bustype) {
2927                 case SSB_BUSTYPE_PCI:
2928                 case SSB_BUSTYPE_PCMCIA:
2929                         tmp |= 0x32;
2930                         break;
2931                 case SSB_BUSTYPE_SSB:
2932                         tmp |= 0x53;
2933                         break;
2934                 }
2935                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2936         }
2937 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2938 }
2939
2940 /* Write the short and long frame retry limit values. */
2941 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2942                                        unsigned int short_retry,
2943                                        unsigned int long_retry)
2944 {
2945         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2946          * the chip-internal counter. */
2947         short_retry = min(short_retry, (unsigned int)0xF);
2948         long_retry = min(long_retry, (unsigned int)0xF);
2949
2950         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2951         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2952 }
2953
2954 /* Shutdown a wireless core */
2955 /* Locking: wl->mutex */
2956 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2957 {
2958         struct b43legacy_wl *wl = dev->wl;
2959         struct b43legacy_phy *phy = &dev->phy;
2960
2961         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2962         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2963                 return;
2964         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2965
2966         mutex_unlock(&wl->mutex);
2967         /* Must unlock as it would otherwise deadlock. No races here.
2968          * Cancel possibly pending workqueues. */
2969         cancel_work_sync(&dev->restart_work);
2970         mutex_lock(&wl->mutex);
2971
2972         mutex_unlock(&dev->wl->mutex);
2973         b43legacy_rfkill_exit(dev);
2974         mutex_lock(&dev->wl->mutex);
2975
2976         b43legacy_rng_exit(dev->wl);
2977         b43legacy_pio_free(dev);
2978         b43legacy_dma_free(dev);
2979         b43legacy_chip_exit(dev);
2980         b43legacy_radio_turn_off(dev, 1);
2981         b43legacy_switch_analog(dev, 0);
2982         if (phy->dyn_tssi_tbl)
2983                 kfree(phy->tssi2dbm);
2984         kfree(phy->lo_control);
2985         phy->lo_control = NULL;
2986         ssb_device_disable(dev->dev, 0);
2987         ssb_bus_may_powerdown(dev->dev->bus);
2988 }
2989
2990 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
2991 {
2992         struct b43legacy_phy *phy = &dev->phy;
2993         int i;
2994
2995         /* Set default attenuation values. */
2996         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2997         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2998         phy->txctl1 = b43legacy_default_txctl1(dev);
2999         phy->txctl2 = 0xFFFF;
3000         phy->txpwr_offset = 0;
3001
3002         /* NRSSI */
3003         phy->nrssislope = 0;
3004         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3005                 phy->nrssi[i] = -1000;
3006         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3007                 phy->nrssi_lt[i] = i;
3008
3009         phy->lofcal = 0xFFFF;
3010         phy->initval = 0xFFFF;
3011
3012         phy->aci_enable = 0;
3013         phy->aci_wlan_automatic = 0;
3014         phy->aci_hw_rssi = 0;
3015
3016         phy->antenna_diversity = 0xFFFF;
3017         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3018         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3019
3020         /* Flags */
3021         phy->calibrated = 0;
3022         phy->locked = 0;
3023
3024         if (phy->_lo_pairs)
3025                 memset(phy->_lo_pairs, 0,
3026                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3027         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3028 }
3029
3030 /* Initialize a wireless core */
3031 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3032 {
3033         struct b43legacy_wl *wl = dev->wl;
3034         struct ssb_bus *bus = dev->dev->bus;
3035         struct b43legacy_phy *phy = &dev->phy;
3036         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3037         int err;
3038         u32 hf;
3039         u32 tmp;
3040
3041         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3042
3043         err = ssb_bus_powerup(bus, 0);
3044         if (err)
3045                 goto out;
3046         if (!ssb_device_is_enabled(dev->dev)) {
3047                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3048                 b43legacy_wireless_core_reset(dev, tmp);
3049         }
3050
3051         if ((phy->type == B43legacy_PHYTYPE_B) ||
3052             (phy->type == B43legacy_PHYTYPE_G)) {
3053                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3054                                          * B43legacy_LO_COUNT,
3055                                          GFP_KERNEL);
3056                 if (!phy->_lo_pairs)
3057                         return -ENOMEM;
3058         }
3059         setup_struct_wldev_for_init(dev);
3060
3061         err = b43legacy_phy_init_tssi2dbm_table(dev);
3062         if (err)
3063                 goto err_kfree_lo_control;
3064
3065         /* Enable IRQ routing to this device. */
3066         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3067
3068         b43legacy_imcfglo_timeouts_workaround(dev);
3069         prepare_phy_data_for_init(dev);
3070         b43legacy_phy_calibrate(dev);
3071         err = b43legacy_chip_init(dev);
3072         if (err)
3073                 goto err_kfree_tssitbl;
3074         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3075                               B43legacy_SHM_SH_WLCOREREV,
3076                               dev->dev->id.revision);
3077         hf = b43legacy_hf_read(dev);
3078         if (phy->type == B43legacy_PHYTYPE_G) {
3079                 hf |= B43legacy_HF_SYMW;
3080                 if (phy->rev == 1)
3081                         hf |= B43legacy_HF_GDCW;
3082                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3083                         hf |= B43legacy_HF_OFDMPABOOST;
3084         } else if (phy->type == B43legacy_PHYTYPE_B) {
3085                 hf |= B43legacy_HF_SYMW;
3086                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3087                         hf &= ~B43legacy_HF_GDCW;
3088         }
3089         b43legacy_hf_write(dev, hf);
3090
3091         b43legacy_set_retry_limits(dev,
3092                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3093                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3094
3095         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3096                               0x0044, 3);
3097         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3098                               0x0046, 2);
3099
3100         /* Disable sending probe responses from firmware.
3101          * Setting the MaxTime to one usec will always trigger
3102          * a timeout, so we never send any probe resp.
3103          * A timeout of zero is infinite. */
3104         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3105                               B43legacy_SHM_SH_PRMAXTIME, 1);
3106
3107         b43legacy_rate_memory_init(dev);
3108
3109         /* Minimum Contention Window */
3110         if (phy->type == B43legacy_PHYTYPE_B)
3111                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3112                                       0x0003, 31);
3113         else
3114                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3115                                       0x0003, 15);
3116         /* Maximum Contention Window */
3117         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3118                               0x0004, 1023);
3119
3120         do {
3121                 if (b43legacy_using_pio(dev))
3122                         err = b43legacy_pio_init(dev);
3123                 else {
3124                         err = b43legacy_dma_init(dev);
3125                         if (!err)
3126                                 b43legacy_qos_init(dev);
3127                 }
3128         } while (err == -EAGAIN);
3129         if (err)
3130                 goto err_chip_exit;
3131
3132         b43legacy_write16(dev, 0x0612, 0x0050);
3133         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3134         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3135
3136         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3137         memset(wl->bssid, 0, ETH_ALEN);
3138         memset(wl->mac_addr, 0, ETH_ALEN);
3139         b43legacy_upload_card_macaddress(dev);
3140         b43legacy_security_init(dev);
3141         b43legacy_rfkill_init(dev);
3142         b43legacy_rng_init(wl);
3143
3144         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3145
3146 out:
3147         return err;
3148
3149 err_chip_exit:
3150         b43legacy_chip_exit(dev);
3151 err_kfree_tssitbl:
3152         if (phy->dyn_tssi_tbl)
3153                 kfree(phy->tssi2dbm);
3154 err_kfree_lo_control:
3155         kfree(phy->lo_control);
3156         phy->lo_control = NULL;
3157         ssb_bus_may_powerdown(bus);
3158         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3159         return err;
3160 }
3161
3162 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3163                                       struct ieee80211_if_init_conf *conf)
3164 {
3165         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3166         struct b43legacy_wldev *dev;
3167         unsigned long flags;
3168         int err = -EOPNOTSUPP;
3169
3170         /* TODO: allow WDS/AP devices to coexist */
3171
3172         if (conf->type != IEEE80211_IF_TYPE_AP &&
3173             conf->type != IEEE80211_IF_TYPE_STA &&
3174             conf->type != IEEE80211_IF_TYPE_WDS &&
3175             conf->type != IEEE80211_IF_TYPE_IBSS)
3176                 return -EOPNOTSUPP;
3177
3178         mutex_lock(&wl->mutex);
3179         if (wl->operating)
3180                 goto out_mutex_unlock;
3181
3182         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3183
3184         dev = wl->current_dev;
3185         wl->operating = 1;
3186         wl->if_id = conf->if_id;
3187         wl->if_type = conf->type;
3188         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3189
3190         spin_lock_irqsave(&wl->irq_lock, flags);
3191         b43legacy_adjust_opmode(dev);
3192         b43legacy_upload_card_macaddress(dev);
3193         spin_unlock_irqrestore(&wl->irq_lock, flags);
3194
3195         err = 0;
3196  out_mutex_unlock:
3197         mutex_unlock(&wl->mutex);
3198
3199         return err;
3200 }
3201
3202 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3203                                           struct ieee80211_if_init_conf *conf)
3204 {
3205         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3206         struct b43legacy_wldev *dev = wl->current_dev;
3207         unsigned long flags;
3208
3209         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3210
3211         mutex_lock(&wl->mutex);
3212
3213         B43legacy_WARN_ON(!wl->operating);
3214         B43legacy_WARN_ON(wl->if_id != conf->if_id);
3215
3216         wl->operating = 0;
3217
3218         spin_lock_irqsave(&wl->irq_lock, flags);
3219         b43legacy_adjust_opmode(dev);
3220         memset(wl->mac_addr, 0, ETH_ALEN);
3221         b43legacy_upload_card_macaddress(dev);
3222         spin_unlock_irqrestore(&wl->irq_lock, flags);
3223
3224         mutex_unlock(&wl->mutex);
3225 }
3226
3227 static int b43legacy_op_start(struct ieee80211_hw *hw)
3228 {
3229         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3230         struct b43legacy_wldev *dev = wl->current_dev;
3231         int did_init = 0;
3232         int err = 0;
3233
3234         mutex_lock(&wl->mutex);
3235
3236         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3237                 err = b43legacy_wireless_core_init(dev);
3238                 if (err)
3239                         goto out_mutex_unlock;
3240                 did_init = 1;
3241         }
3242
3243         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3244                 err = b43legacy_wireless_core_start(dev);
3245                 if (err) {
3246                         if (did_init)
3247                                 b43legacy_wireless_core_exit(dev);
3248                         goto out_mutex_unlock;
3249                 }
3250         }
3251
3252 out_mutex_unlock:
3253         mutex_unlock(&wl->mutex);
3254
3255         return err;
3256 }
3257
3258 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3259 {
3260         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3261         struct b43legacy_wldev *dev = wl->current_dev;
3262
3263         mutex_lock(&wl->mutex);
3264         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3265                 b43legacy_wireless_core_stop(dev);
3266         b43legacy_wireless_core_exit(dev);
3267         mutex_unlock(&wl->mutex);
3268 }
3269
3270 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3271                                         u32 short_retry_limit,
3272                                         u32 long_retry_limit)
3273 {
3274         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3275         struct b43legacy_wldev *dev;
3276         int err = 0;
3277
3278         mutex_lock(&wl->mutex);
3279         dev = wl->current_dev;
3280         if (unlikely(!dev ||
3281                      (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3282                 err = -ENODEV;
3283                 goto out_unlock;
3284         }
3285         b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3286 out_unlock:
3287         mutex_unlock(&wl->mutex);
3288
3289         return err;
3290 }
3291
3292 static const struct ieee80211_ops b43legacy_hw_ops = {
3293         .tx                     = b43legacy_op_tx,
3294         .conf_tx                = b43legacy_op_conf_tx,
3295         .add_interface          = b43legacy_op_add_interface,
3296         .remove_interface       = b43legacy_op_remove_interface,
3297         .config                 = b43legacy_op_dev_config,
3298         .config_interface       = b43legacy_op_config_interface,
3299         .configure_filter       = b43legacy_op_configure_filter,
3300         .get_stats              = b43legacy_op_get_stats,
3301         .get_tx_stats           = b43legacy_op_get_tx_stats,
3302         .start                  = b43legacy_op_start,
3303         .stop                   = b43legacy_op_stop,
3304         .set_retry_limit        = b43legacy_op_set_retry_limit,
3305 };
3306
3307 /* Hard-reset the chip. Do not call this directly.
3308  * Use b43legacy_controller_restart()
3309  */
3310 static void b43legacy_chip_reset(struct work_struct *work)
3311 {
3312         struct b43legacy_wldev *dev =
3313                 container_of(work, struct b43legacy_wldev, restart_work);
3314         struct b43legacy_wl *wl = dev->wl;
3315         int err = 0;
3316         int prev_status;
3317
3318         mutex_lock(&wl->mutex);
3319
3320         prev_status = b43legacy_status(dev);
3321         /* Bring the device down... */
3322         if (prev_status >= B43legacy_STAT_STARTED)
3323                 b43legacy_wireless_core_stop(dev);
3324         if (prev_status >= B43legacy_STAT_INITIALIZED)
3325                 b43legacy_wireless_core_exit(dev);
3326
3327         /* ...and up again. */
3328         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3329                 err = b43legacy_wireless_core_init(dev);
3330                 if (err)
3331                         goto out;
3332         }
3333         if (prev_status >= B43legacy_STAT_STARTED) {
3334                 err = b43legacy_wireless_core_start(dev);
3335                 if (err) {
3336                         b43legacy_wireless_core_exit(dev);
3337                         goto out;
3338                 }
3339         }
3340 out:
3341         mutex_unlock(&wl->mutex);
3342         if (err)
3343                 b43legacyerr(wl, "Controller restart FAILED\n");
3344         else
3345                 b43legacyinfo(wl, "Controller restarted\n");
3346 }
3347
3348 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3349                                  int have_bphy,
3350                                  int have_gphy)
3351 {
3352         struct ieee80211_hw *hw = dev->wl->hw;
3353         struct ieee80211_hw_mode *mode;
3354         struct b43legacy_phy *phy = &dev->phy;
3355         int cnt = 0;
3356         int err;
3357
3358         phy->possible_phymodes = 0;
3359         for (; 1; cnt++) {
3360                 if (have_bphy) {
3361                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3362                         mode = &phy->hwmodes[cnt];
3363
3364                         mode->mode = MODE_IEEE80211B;
3365                         mode->num_channels = b43legacy_bg_chantable_size;
3366                         mode->channels = b43legacy_bg_chantable;
3367                         mode->num_rates = b43legacy_b_ratetable_size;
3368                         mode->rates = b43legacy_b_ratetable;
3369                         err = ieee80211_register_hwmode(hw, mode);
3370                         if (err)
3371                                 return err;
3372
3373                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3374                         have_bphy = 0;
3375                         continue;
3376                 }
3377                 if (have_gphy) {
3378                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3379                         mode = &phy->hwmodes[cnt];
3380
3381                         mode->mode = MODE_IEEE80211G;
3382                         mode->num_channels = b43legacy_bg_chantable_size;
3383                         mode->channels = b43legacy_bg_chantable;
3384                         mode->num_rates = b43legacy_g_ratetable_size;
3385                         mode->rates = b43legacy_g_ratetable;
3386                         err = ieee80211_register_hwmode(hw, mode);
3387                         if (err)
3388                                 return err;
3389
3390                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3391                         have_gphy = 0;
3392                         continue;
3393                 }
3394                 break;
3395         }
3396
3397         return 0;
3398 }
3399
3400 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3401 {
3402         /* We release firmware that late to not be required to re-request
3403          * is all the time when we reinit the core. */
3404         b43legacy_release_firmware(dev);
3405 }
3406
3407 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3408 {
3409         struct b43legacy_wl *wl = dev->wl;
3410         struct ssb_bus *bus = dev->dev->bus;
3411         struct pci_dev *pdev = bus->host_pci;
3412         int err;
3413         int have_bphy = 0;
3414         int have_gphy = 0;
3415         u32 tmp;
3416
3417         /* Do NOT do any device initialization here.
3418          * Do it in wireless_core_init() instead.
3419          * This function is for gathering basic information about the HW, only.
3420          * Also some structs may be set up here. But most likely you want to
3421          * have that in core_init(), too.
3422          */
3423
3424         err = ssb_bus_powerup(bus, 0);
3425         if (err) {
3426                 b43legacyerr(wl, "Bus powerup failed\n");
3427                 goto out;
3428         }
3429         /* Get the PHY type. */
3430         if (dev->dev->id.revision >= 5) {
3431                 u32 tmshigh;
3432
3433                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3434                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3435                 if (!have_gphy)
3436                         have_bphy = 1;
3437         } else if (dev->dev->id.revision == 4)
3438                 have_gphy = 1;
3439         else
3440                 have_bphy = 1;
3441
3442         dev->phy.gmode = (have_gphy || have_bphy);
3443         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3444         b43legacy_wireless_core_reset(dev, tmp);
3445
3446         err = b43legacy_phy_versioning(dev);
3447         if (err)
3448                 goto err_powerdown;
3449         /* Check if this device supports multiband. */
3450         if (!pdev ||
3451             (pdev->device != 0x4312 &&
3452              pdev->device != 0x4319 &&
3453              pdev->device != 0x4324)) {
3454                 /* No multiband support. */
3455                 have_bphy = 0;
3456                 have_gphy = 0;
3457                 switch (dev->phy.type) {
3458                 case B43legacy_PHYTYPE_B:
3459                         have_bphy = 1;
3460                         break;
3461                 case B43legacy_PHYTYPE_G:
3462                         have_gphy = 1;
3463                         break;
3464                 default:
3465                         B43legacy_BUG_ON(1);
3466                 }
3467         }
3468         dev->phy.gmode = (have_gphy || have_bphy);
3469         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3470         b43legacy_wireless_core_reset(dev, tmp);
3471
3472         err = b43legacy_validate_chipaccess(dev);
3473         if (err)
3474                 goto err_powerdown;
3475         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3476         if (err)
3477                 goto err_powerdown;
3478
3479         /* Now set some default "current_dev" */
3480         if (!wl->current_dev)
3481                 wl->current_dev = dev;
3482         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3483
3484         b43legacy_radio_turn_off(dev, 1);
3485         b43legacy_switch_analog(dev, 0);
3486         ssb_device_disable(dev->dev, 0);
3487         ssb_bus_may_powerdown(bus);
3488
3489 out:
3490         return err;
3491
3492 err_powerdown:
3493         ssb_bus_may_powerdown(bus);
3494         return err;
3495 }
3496
3497 static void b43legacy_one_core_detach(struct ssb_device *dev)
3498 {
3499         struct b43legacy_wldev *wldev;
3500         struct b43legacy_wl *wl;
3501
3502         wldev = ssb_get_drvdata(dev);
3503         wl = wldev->wl;
3504         cancel_work_sync(&wldev->restart_work);
3505         b43legacy_debugfs_remove_device(wldev);
3506         b43legacy_wireless_core_detach(wldev);
3507         list_del(&wldev->list);
3508         wl->nr_devs--;
3509         ssb_set_drvdata(dev, NULL);
3510         kfree(wldev);
3511 }
3512
3513 static int b43legacy_one_core_attach(struct ssb_device *dev,
3514                                      struct b43legacy_wl *wl)
3515 {
3516         struct b43legacy_wldev *wldev;
3517         struct pci_dev *pdev;
3518         int err = -ENOMEM;
3519
3520         if (!list_empty(&wl->devlist)) {
3521                 /* We are not the first core on this chip. */
3522                 pdev = dev->bus->host_pci;
3523                 /* Only special chips support more than one wireless
3524                  * core, although some of the other chips have more than
3525                  * one wireless core as well. Check for this and
3526                  * bail out early.
3527                  */
3528                 if (!pdev ||
3529                     ((pdev->device != 0x4321) &&
3530                      (pdev->device != 0x4313) &&
3531                      (pdev->device != 0x431A))) {
3532                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3533                         return -ENODEV;
3534                 }
3535         }
3536
3537         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3538         if (!wldev)
3539                 goto out;
3540
3541         wldev->dev = dev;
3542         wldev->wl = wl;
3543         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3544         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3545         tasklet_init(&wldev->isr_tasklet,
3546                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3547                      (unsigned long)wldev);
3548         if (modparam_pio)
3549                 wldev->__using_pio = 1;
3550         INIT_LIST_HEAD(&wldev->list);
3551
3552         err = b43legacy_wireless_core_attach(wldev);
3553         if (err)
3554                 goto err_kfree_wldev;
3555
3556         list_add(&wldev->list, &wl->devlist);
3557         wl->nr_devs++;
3558         ssb_set_drvdata(dev, wldev);
3559         b43legacy_debugfs_add_device(wldev);
3560 out:
3561         return err;
3562
3563 err_kfree_wldev:
3564         kfree(wldev);
3565         return err;
3566 }
3567
3568 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3569 {
3570         /* boardflags workarounds */
3571         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3572             bus->boardinfo.type == 0x4E &&
3573             bus->boardinfo.rev > 0x40)
3574                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3575
3576         /* Convert Antennagain values to Q5.2 */
3577         if (bus->sprom.antenna_gain_bg == 0xFF)
3578                 bus->sprom.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3579         bus->sprom.antenna_gain_bg <<= 2;
3580 }
3581
3582 static void b43legacy_wireless_exit(struct ssb_device *dev,
3583                                   struct b43legacy_wl *wl)
3584 {
3585         struct ieee80211_hw *hw = wl->hw;
3586
3587         ssb_set_devtypedata(dev, NULL);
3588         ieee80211_free_hw(hw);
3589 }
3590
3591 static int b43legacy_wireless_init(struct ssb_device *dev)
3592 {
3593         struct ssb_sprom *sprom = &dev->bus->sprom;
3594         struct ieee80211_hw *hw;
3595         struct b43legacy_wl *wl;
3596         int err = -ENOMEM;
3597
3598         b43legacy_sprom_fixup(dev->bus);
3599
3600         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3601         if (!hw) {
3602                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3603                 goto out;
3604         }
3605
3606         /* fill hw info */
3607         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3608                     IEEE80211_HW_RX_INCLUDES_FCS;
3609         hw->max_signal = 100;
3610         hw->max_rssi = -110;
3611         hw->max_noise = -110;
3612         hw->queues = 1; /* FIXME: hardware has more queues */
3613         SET_IEEE80211_DEV(hw, dev->dev);
3614         if (is_valid_ether_addr(sprom->et1mac))
3615                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3616         else
3617                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3618
3619         /* Get and initialize struct b43legacy_wl */
3620         wl = hw_to_b43legacy_wl(hw);
3621         memset(wl, 0, sizeof(*wl));
3622         wl->hw = hw;
3623         spin_lock_init(&wl->irq_lock);
3624         spin_lock_init(&wl->leds_lock);
3625         mutex_init(&wl->mutex);
3626         INIT_LIST_HEAD(&wl->devlist);
3627
3628         ssb_set_devtypedata(dev, wl);
3629         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3630         err = 0;
3631 out:
3632         return err;
3633 }
3634
3635 static int b43legacy_probe(struct ssb_device *dev,
3636                          const struct ssb_device_id *id)
3637 {
3638         struct b43legacy_wl *wl;
3639         int err;
3640         int first = 0;
3641
3642         wl = ssb_get_devtypedata(dev);
3643         if (!wl) {
3644                 /* Probing the first core - setup common struct b43legacy_wl */
3645                 first = 1;
3646                 err = b43legacy_wireless_init(dev);
3647                 if (err)
3648                         goto out;
3649                 wl = ssb_get_devtypedata(dev);
3650                 B43legacy_WARN_ON(!wl);
3651         }
3652         err = b43legacy_one_core_attach(dev, wl);
3653         if (err)
3654                 goto err_wireless_exit;
3655
3656         if (first) {
3657                 err = ieee80211_register_hw(wl->hw);
3658                 if (err)
3659                         goto err_one_core_detach;
3660         }
3661
3662 out:
3663         return err;
3664
3665 err_one_core_detach:
3666         b43legacy_one_core_detach(dev);
3667 err_wireless_exit:
3668         if (first)
3669                 b43legacy_wireless_exit(dev, wl);
3670         return err;
3671 }
3672
3673 static void b43legacy_remove(struct ssb_device *dev)
3674 {
3675         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3676         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3677
3678         B43legacy_WARN_ON(!wl);
3679         if (wl->current_dev == wldev)
3680                 ieee80211_unregister_hw(wl->hw);
3681
3682         b43legacy_one_core_detach(dev);
3683
3684         if (list_empty(&wl->devlist))
3685                 /* Last core on the chip unregistered.
3686                  * We can destroy common struct b43legacy_wl.
3687                  */
3688                 b43legacy_wireless_exit(dev, wl);
3689 }
3690
3691 /* Perform a hardware reset. This can be called from any context. */
3692 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3693                                   const char *reason)
3694 {
3695         /* Must avoid requeueing, if we are in shutdown. */
3696         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3697                 return;
3698         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3699         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3700 }
3701
3702 #ifdef CONFIG_PM
3703
3704 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3705 {
3706         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3707         struct b43legacy_wl *wl = wldev->wl;
3708
3709         b43legacydbg(wl, "Suspending...\n");
3710
3711         mutex_lock(&wl->mutex);
3712         wldev->suspend_init_status = b43legacy_status(wldev);
3713         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3714                 b43legacy_wireless_core_stop(wldev);
3715         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3716                 b43legacy_wireless_core_exit(wldev);
3717         mutex_unlock(&wl->mutex);
3718
3719         b43legacydbg(wl, "Device suspended.\n");
3720
3721         return 0;
3722 }
3723
3724 static int b43legacy_resume(struct ssb_device *dev)
3725 {
3726         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3727         struct b43legacy_wl *wl = wldev->wl;
3728         int err = 0;
3729
3730         b43legacydbg(wl, "Resuming...\n");
3731
3732         mutex_lock(&wl->mutex);
3733         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3734                 err = b43legacy_wireless_core_init(wldev);
3735                 if (err) {
3736                         b43legacyerr(wl, "Resume failed at core init\n");
3737                         goto out;
3738                 }
3739         }
3740         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3741                 err = b43legacy_wireless_core_start(wldev);
3742                 if (err) {
3743                         b43legacy_wireless_core_exit(wldev);
3744                         b43legacyerr(wl, "Resume failed at core start\n");
3745                         goto out;
3746                 }
3747         }
3748         mutex_unlock(&wl->mutex);
3749
3750         b43legacydbg(wl, "Device resumed.\n");
3751 out:
3752         return err;
3753 }
3754
3755 #else   /* CONFIG_PM */
3756 # define b43legacy_suspend      NULL
3757 # define b43legacy_resume               NULL
3758 #endif  /* CONFIG_PM */
3759
3760 static struct ssb_driver b43legacy_ssb_driver = {
3761         .name           = KBUILD_MODNAME,
3762         .id_table       = b43legacy_ssb_tbl,
3763         .probe          = b43legacy_probe,
3764         .remove         = b43legacy_remove,
3765         .suspend        = b43legacy_suspend,
3766         .resume         = b43legacy_resume,
3767 };
3768
3769 static int __init b43legacy_init(void)
3770 {
3771         int err;
3772
3773         b43legacy_debugfs_init();
3774
3775         err = ssb_driver_register(&b43legacy_ssb_driver);
3776         if (err)
3777                 goto err_dfs_exit;
3778
3779         return err;
3780
3781 err_dfs_exit:
3782         b43legacy_debugfs_exit();
3783         return err;
3784 }
3785
3786 static void __exit b43legacy_exit(void)
3787 {
3788         ssb_driver_unregister(&b43legacy_ssb_driver);
3789         b43legacy_debugfs_exit();
3790 }
3791
3792 module_init(b43legacy_init)
3793 module_exit(b43legacy_exit)