2 * Copyright (c) 2012-2014 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 #include <linux/timex.h>
24 #include "wil_platform.h"
27 #define WIL_NAME "wil6210"
28 #define WIL_FW_NAME "wil6210.fw"
30 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
34 #define WIL_BOARD_MARLON (1)
35 #define WIL_BOARD_SPARROW (2)
36 const char * const name;
40 * extract bits [@b0:@b1] (inclusive) from the value @x
41 * it should be @b0 <= @b1, or result is incorrect
43 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
45 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
48 #define WIL6210_MEM_SIZE (2*1024*1024UL)
50 #define WIL6210_RX_RING_SIZE (128)
51 #define WIL6210_TX_RING_SIZE (512)
52 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
53 #define WIL6210_MAX_CID (8) /* HW limit */
54 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
55 #define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */
56 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
57 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
58 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
60 /* Hardware definitions begin */
64 * RGF File | Host addr | FW addr
66 * user_rgf | 0x000000 | 0x880000
67 * dma_rgf | 0x001000 | 0x881000
68 * pcie_rgf | 0x002000 | 0x882000
72 /* Where various structures placed in host address space */
73 #define WIL6210_FW_HOST_OFF (0x880000UL)
75 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
78 * Interrupt control registers block
80 * each interrupt controlled by the same bit in all registers
83 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
84 u32 ICR; /* Cause, W1C/COR depending on ICC */
85 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
86 u32 ICS; /* Cause Set, WO */
87 u32 IMV; /* Mask, RW+S/C */
88 u32 IMS; /* Mask Set, write 1 to set */
89 u32 IMC; /* Mask Clear, write 1 to clear */
92 /* registers - FW addresses */
93 #define RGF_USER_USAGE_1 (0x880004)
94 #define RGF_USER_USAGE_6 (0x880018)
95 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
96 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
97 #define RGF_USER_USER_CPU_0 (0x8801e0)
98 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
99 #define RGF_USER_MAC_CPU_0 (0x8801fc)
100 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
101 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
102 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
103 #define RGF_USER_CLKS_CTL_0 (0x880abc)
104 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
105 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
106 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
107 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
108 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
109 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
110 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
111 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
112 #define BIT_CAR_PERST_RST BIT(7)
113 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
114 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
115 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
116 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
118 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
119 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
120 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
121 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
122 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
123 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
124 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
125 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
126 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
128 /* Interrupt moderation control */
129 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
130 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
131 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
132 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
133 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
134 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
135 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
136 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
138 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
139 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
140 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
141 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
142 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
143 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
145 #define RGF_HP_CTRL (0x88265c)
146 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
148 /* MAC timer, usec, for packet lifetime */
149 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
151 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
153 /* popular locations */
154 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
155 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
156 offsetof(struct RGF_ICR, ICS))
157 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
159 /* ISR register bits */
160 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
161 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
162 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
164 /* Hardware definitions end */
166 u32 from; /* linker address - from, inclusive */
167 u32 to; /* linker address - to, exclusive */
168 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
169 const char *name; /* for debugfs */
172 /* array size should be in sync with actual definition in the wmi.c */
173 extern const struct fw_map fw_mapping[7];
176 * mk_cidxtid - construct @cidxtid field
180 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
182 static inline u8 mk_cidxtid(u8 cid, u8 tid)
184 return ((tid & 0xf) << 4) | (cid & 0xf);
188 * parse_cidxtid - parse @cidxtid field
189 * @cid: store CID value here
190 * @tid: store TID value here
192 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
194 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
196 *cid = cidxtid & 0xf;
197 *tid = (cidxtid >> 4) & 0xf;
200 struct wil6210_mbox_ring {
202 u16 entry_size; /* max. size of mbox entry, incl. all headers */
208 struct wil6210_mbox_ring_desc {
213 /* at HOST_OFF_WIL6210_MBOX_CTL */
214 struct wil6210_mbox_ctl {
215 struct wil6210_mbox_ring tx;
216 struct wil6210_mbox_ring rx;
219 struct wil6210_mbox_hdr {
221 __le16 len; /* payload, bytes after this header */
227 #define WIL_MBOX_HDR_TYPE_WMI (0)
229 /* max. value for wil6210_mbox_hdr.len */
230 #define MAX_MBOXITEM_SIZE (240)
233 * struct wil6210_mbox_hdr_wmi - WMI header
236 * 00 - default, created by FW
237 * 01..0f - WiFi ports, driver to create
240 * @id: command/event ID
241 * @timestamp: FW fills for events, free-running msec timer
243 struct wil6210_mbox_hdr_wmi {
250 struct pending_wmi_event {
251 struct list_head list;
253 struct wil6210_mbox_hdr hdr;
254 struct wil6210_mbox_hdr_wmi wmi;
259 enum { /* for wil_ctx.mapped_as */
260 wil_mapped_as_none = 0,
261 wil_mapped_as_single = 1,
262 wil_mapped_as_page = 2,
266 * struct wil_ctx - software context for Vring descriptor
278 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
279 u16 size; /* number of vring_desc elements */
282 u32 hwtail; /* write here to inform hw */
283 struct wil_ctx *ctx; /* ctx[size] - software context */
287 * Additional data for Tx Vring
289 struct vring_tx_data {
291 cycles_t idle, last_idle, begin;
294 enum { /* for wil6210_priv.status */
295 wil_status_fwready = 0,
296 wil_status_fwconnecting,
297 wil_status_fwconnected,
299 wil_status_reset_done,
300 wil_status_irqen, /* FIXME: interrupts enabled - for debug */
301 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
307 * struct tid_ampdu_rx - TID aggregation information (Rx).
309 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
310 * @reorder_time: jiffies when skb was added
311 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
312 * @reorder_timer: releases expired frames from the reorder buffer.
313 * @last_rx: jiffies of last rx activity
314 * @head_seq_num: head sequence number in reordering buffer.
315 * @stored_mpdu_num: number of MPDUs in reordering buffer
316 * @ssn: Starting Sequence Number expected to be aggregated.
317 * @buf_size: buffer size for incoming A-MPDUs
318 * @timeout: reset timer value (in TUs).
319 * @dialog_token: dialog token for aggregation session
320 * @rcu_head: RCU head used for freeing this struct
322 * This structure's lifetime is managed by RCU, assignments to
323 * the array holding it must hold the aggregation mutex.
326 struct wil_tid_ampdu_rx {
327 struct sk_buff **reorder_buf;
328 unsigned long *reorder_time;
329 struct timer_list session_timer;
330 struct timer_list reorder_timer;
331 unsigned long last_rx;
339 bool first_time; /* is it 1-st time this buffer used? */
342 enum wil_sta_status {
344 wil_sta_conn_pending = 1,
345 wil_sta_connected = 2,
348 #define WIL_STA_TID_NUM (16)
350 struct wil_net_stats {
351 unsigned long rx_packets;
352 unsigned long tx_packets;
353 unsigned long rx_bytes;
354 unsigned long tx_bytes;
355 unsigned long tx_errors;
356 unsigned long rx_dropped;
361 * struct wil_sta_info - data for peer
363 * Peer identified by its CID (connection ID)
364 * NIC performs beam forming for each peer;
365 * if no beam forming done, frame exchange is not
368 struct wil_sta_info {
370 enum wil_sta_status status;
371 struct wil_net_stats stats;
372 bool data_port_open; /* can send any data, not only EAPOL */
374 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
375 spinlock_t tid_rx_lock; /* guarding tid_rx array */
376 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
377 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
380 struct wil6210_priv {
381 struct pci_dev *pdev;
383 struct wireless_dev *wdev;
388 struct wil_board *board;
389 u8 n_mids; /* number of additional MIDs as reported by FW */
390 int recovery_count; /* num of FW recovery attempts in a short time */
391 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
394 u32 secure_pcp; /* create secure PCP? */
396 /* cached ISR registers */
398 /* mailbox related */
399 struct mutex wmi_mutex;
400 struct wil6210_mbox_ctl mbox_ctl;
401 struct completion wmi_ready;
402 struct completion wmi_call;
404 u16 reply_id; /**< wait for this WMI event */
407 struct workqueue_struct *wmi_wq; /* for deferred calls */
408 struct work_struct wmi_event_worker;
409 struct workqueue_struct *wmi_wq_conn; /* for connect worker */
410 struct work_struct connect_worker;
411 struct work_struct disconnect_worker;
412 struct work_struct fw_error_worker; /* for FW error recovery */
413 struct timer_list connect_timer;
414 struct timer_list scan_timer; /* detect scan timeout */
415 int pending_connect_cid;
416 struct list_head pending_wmi_ev;
418 * protect pending_wmi_ev
419 * - fill in IRQ from wil6210_irq_misc,
420 * - consumed in thread by wmi_event_worker
422 spinlock_t wmi_ev_lock;
423 struct napi_struct napi_rx;
424 struct napi_struct napi_tx;
426 struct vring vring_rx;
427 struct vring vring_tx[WIL6210_MAX_TX_RINGS];
428 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
429 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
430 struct wil_sta_info sta[WIL6210_MAX_CID];
432 struct cfg80211_scan_request *scan_request;
434 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
436 atomic_t isr_count_rx, isr_count_tx;
438 struct dentry *debug;
439 struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
441 void *platform_handle;
442 struct wil_platform_ops platform_ops;
445 #define wil_to_wiphy(i) (i->wdev->wiphy)
446 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
447 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
448 #define wil_to_wdev(i) (i->wdev)
449 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
450 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
451 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
452 #define wil_to_pcie_dev(i) (&i->pdev->dev)
454 int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
455 int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
456 int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
457 #define wil_dbg(wil, fmt, arg...) do { \
458 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
459 wil_dbg_trace(wil, fmt, ##arg); \
462 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
463 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
464 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
465 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
467 #if defined(CONFIG_DYNAMIC_DEBUG)
468 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
469 groupsize, buf, len, ascii) \
470 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
471 prefix_type, rowsize, \
472 groupsize, buf, len, ascii)
474 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
475 groupsize, buf, len, ascii) \
476 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
477 prefix_type, rowsize, \
478 groupsize, buf, len, ascii)
480 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
481 groupsize, buf, len, ascii)
482 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
483 groupsize, buf, len, ascii)
486 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
488 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
491 void *wil_if_alloc(struct device *dev, void __iomem *csr);
492 void wil_if_free(struct wil6210_priv *wil);
493 int wil_if_add(struct wil6210_priv *wil);
494 void wil_if_remove(struct wil6210_priv *wil);
495 int wil_priv_init(struct wil6210_priv *wil);
496 void wil_priv_deinit(struct wil6210_priv *wil);
497 int wil_reset(struct wil6210_priv *wil);
498 void wil_fw_error_recovery(struct wil6210_priv *wil);
499 void wil_link_on(struct wil6210_priv *wil);
500 void wil_link_off(struct wil6210_priv *wil);
501 int wil_up(struct wil6210_priv *wil);
502 int wil_down(struct wil6210_priv *wil);
503 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
504 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
506 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
507 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
508 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
509 struct wil6210_mbox_hdr *hdr);
510 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
511 void wmi_recv_cmd(struct wil6210_priv *wil);
512 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
513 u16 reply_id, void *reply, u8 reply_size, int to_msec);
514 void wmi_event_worker(struct work_struct *work);
515 void wmi_event_flush(struct wil6210_priv *wil);
516 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
517 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
518 int wmi_set_channel(struct wil6210_priv *wil, int channel);
519 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
520 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
521 const void *mac_addr);
522 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
523 const void *mac_addr, int key_len, const void *key);
524 int wmi_echo(struct wil6210_priv *wil);
525 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
526 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
527 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
528 int wmi_rxon(struct wil6210_priv *wil, bool on);
529 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
530 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason);
532 void wil6210_clear_irq(struct wil6210_priv *wil);
533 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
534 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
535 void wil6210_disable_irq(struct wil6210_priv *wil);
536 void wil6210_enable_irq(struct wil6210_priv *wil);
537 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
538 struct cfg80211_mgmt_tx_params *params,
541 int wil6210_debugfs_init(struct wil6210_priv *wil);
542 void wil6210_debugfs_remove(struct wil6210_priv *wil);
543 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
544 struct station_info *sinfo);
546 struct wireless_dev *wil_cfg80211_init(struct device *dev);
547 void wil_wdev_free(struct wil6210_priv *wil);
549 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
550 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
551 int wmi_pcp_stop(struct wil6210_priv *wil);
552 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid);
554 int wil_rx_init(struct wil6210_priv *wil);
555 void wil_rx_fini(struct wil6210_priv *wil);
558 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
560 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
562 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
563 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
564 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
567 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
568 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
570 int wil_iftype_nl2wmi(enum nl80211_iftype type);
572 int wil_request_firmware(struct wil6210_priv *wil, const char *name);
573 #endif /* __WIL6210_H__ */