drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  23                                                int mindelta, int main_rssi_avg,
  24                                                int alt_rssi_avg, int pkt_count)
  25 {
  26         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  27                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  28                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  29 }
  30
  31 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
  32                                         int curr_main_set, int curr_alt_set,
  33                                         int alt_rssi_avg, int main_rssi_avg)
  34 {
  35         bool result = false;
  36         switch (div_group) {
  37         case 0:
  38                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  39                         result = true;
  40                 break;
  41         case 1:
  42                 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
  43                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
  44                                 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
  45                         ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
  46                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
  47                                 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
  48                                                         (alt_rssi_avg >= 4))
  49                         result = true;
  50                 else
  51                         result = false;
  52                 break;
  53         }
  54
  55         return result;
  56 }
  57
  58 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  59 {
  60         return sc->ps_enabled &&
  61                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  62 }
  63
  64 /*
  65  * Setup and link descriptors.
  66  *
  67  * 11N: we can no longer afford to self link the last descriptor.
  68  * MAC acknowledges BA status as long as it copies frames to host
  69  * buffer (or rx fifo). This can incorrectly acknowledge packets
  70  * to a sender if last desc is self-linked.
  71  */
  72 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  73 {
  74         struct ath_hw *ah = sc->sc_ah;
  75         struct ath_common *common = ath9k_hw_common(ah);
  76         struct ath_desc *ds;
  77         struct sk_buff *skb;
  78
  79         ATH_RXBUF_RESET(bf);
  80
  81         ds = bf->bf_desc;
  82         ds->ds_link = 0; /* link to null */
  83         ds->ds_data = bf->bf_buf_addr;
  84
  85         /* virtual addr of the beginning of the buffer. */
  86         skb = bf->bf_mpdu;
  87         BUG_ON(skb == NULL);
  88         ds->ds_vdata = skb->data;
  89
  90         /*
  91          * setup rx descriptors. The rx_bufsize here tells the hardware
  92          * how much data it can DMA to us and that we are prepared
  93          * to process
  94          */
  95         ath9k_hw_setuprxdesc(ah, ds,
  96                              common->rx_bufsize,
  97                              0);
  98
  99         if (sc->rx.rxlink == NULL)
 100                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 101         else
 102                 *sc->rx.rxlink = bf->bf_daddr;
 103
 104         sc->rx.rxlink = &ds->ds_link;
 105 }
 106
 107 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 108 {
 109         /* XXX block beacon interrupts */
 110         ath9k_hw_setantenna(sc->sc_ah, antenna);
 111         sc->rx.defant = antenna;
 112         sc->rx.rxotherant = 0;
 113 }
 114
 115 static void ath_opmode_init(struct ath_softc *sc)
 116 {
 117         struct ath_hw *ah = sc->sc_ah;
 118         struct ath_common *common = ath9k_hw_common(ah);
 119
 120         u32 rfilt, mfilt[2];
 121
 122         /* configure rx filter */
 123         rfilt = ath_calcrxfilter(sc);
 124         ath9k_hw_setrxfilter(ah, rfilt);
 125
 126         /* configure bssid mask */
 127         ath_hw_setbssidmask(common);
 128
 129         /* configure operational mode */
 130         ath9k_hw_setopmode(ah);
 131
 132         /* calculate and install multicast filter */
 133         mfilt[0] = mfilt[1] = ~0;
 134         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 135 }
 136
 137 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 138                                  enum ath9k_rx_qtype qtype)
 139 {
 140         struct ath_hw *ah = sc->sc_ah;
 141         struct ath_rx_edma *rx_edma;
 142         struct sk_buff *skb;
 143         struct ath_buf *bf;
 144
 145         rx_edma = &sc->rx.rx_edma[qtype];
 146         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 147                 return false;
 148
 149         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 150         list_del_init(&bf->list);
 151
 152         skb = bf->bf_mpdu;
 153
 154         ATH_RXBUF_RESET(bf);
 155         memset(skb->data, 0, ah->caps.rx_status_len);
 156         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 157                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 158
 159         SKB_CB_ATHBUF(skb) = bf;
 160         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 161         skb_queue_tail(&rx_edma->rx_fifo, skb);
 162
 163         return true;
 164 }
 165
 166 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 167                                   enum ath9k_rx_qtype qtype, int size)
 168 {
 169         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 170         u32 nbuf = 0;
 171
 172         if (list_empty(&sc->rx.rxbuf)) {
 173                 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 174                 return;
 175         }
 176
 177         while (!list_empty(&sc->rx.rxbuf)) {
 178                 nbuf++;
 179
 180                 if (!ath_rx_edma_buf_link(sc, qtype))
 181                         break;
 182
 183                 if (nbuf >= size)
 184                         break;
 185         }
 186 }
 187
 188 static void ath_rx_remove_buffer(struct ath_softc *sc,
 189                                  enum ath9k_rx_qtype qtype)
 190 {
 191         struct ath_buf *bf;
 192         struct ath_rx_edma *rx_edma;
 193         struct sk_buff *skb;
 194
 195         rx_edma = &sc->rx.rx_edma[qtype];
 196
 197         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 198                 bf = SKB_CB_ATHBUF(skb);
 199                 BUG_ON(!bf);
 200                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 201         }
 202 }
 203
 204 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 205 {
 206         struct ath_buf *bf;
 207
 208         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 209         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 210
 211         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 212                 if (bf->bf_mpdu)
 213                         dev_kfree_skb_any(bf->bf_mpdu);
 214         }
 215
 216         INIT_LIST_HEAD(&sc->rx.rxbuf);
 217
 218         kfree(sc->rx.rx_bufptr);
 219         sc->rx.rx_bufptr = NULL;
 220 }
 221
 222 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 223 {
 224         skb_queue_head_init(&rx_edma->rx_fifo);
 225         skb_queue_head_init(&rx_edma->rx_buffers);
 226         rx_edma->rx_fifo_hwsize = size;
 227 }
 228
 229 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 230 {
 231         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct sk_buff *skb;
 234         struct ath_buf *bf;
 235         int error = 0, i;
 236         u32 size;
 237
 238         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 239                                     ah->caps.rx_status_len);
 240
 241         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 242                                ah->caps.rx_lp_qdepth);
 243         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 244                                ah->caps.rx_hp_qdepth);
 245
 246         size = sizeof(struct ath_buf) * nbufs;
 247         bf = kzalloc(size, GFP_KERNEL);
 248         if (!bf)
 249                 return -ENOMEM;
 250
 251         INIT_LIST_HEAD(&sc->rx.rxbuf);
 252         sc->rx.rx_bufptr = bf;
 253
 254         for (i = 0; i < nbufs; i++, bf++) {
 255                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 256                 if (!skb) {
 257                         error = -ENOMEM;
 258                         goto rx_init_fail;
 259                 }
 260
 261                 memset(skb->data, 0, common->rx_bufsize);
 262                 bf->bf_mpdu = skb;
 263
 264                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 265                                                  common->rx_bufsize,
 266                                                  DMA_BIDIRECTIONAL);
 267                 if (unlikely(dma_mapping_error(sc->dev,
 268                                                 bf->bf_buf_addr))) {
 269                                 dev_kfree_skb_any(skb);
 270                                 bf->bf_mpdu = NULL;
 271                                 bf->bf_buf_addr = 0;
 272                                 ath_err(common,
 273                                         "dma_mapping_error() on RX init\n");
 274                                 error = -ENOMEM;
 275                                 goto rx_init_fail;
 276                 }
 277
 278                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 279         }
 280
 281         return 0;
 282
 283 rx_init_fail:
 284         ath_rx_edma_cleanup(sc);
 285         return error;
 286 }
 287
 288 static void ath_edma_start_recv(struct ath_softc *sc)
 289 {
 290         spin_lock_bh(&sc->rx.rxbuflock);
 291
 292         ath9k_hw_rxena(sc->sc_ah);
 293
 294         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 295                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 296
 297         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 298                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 299
 300         ath_opmode_init(sc);
 301
 302         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 303
 304         spin_unlock_bh(&sc->rx.rxbuflock);
 305 }
 306
 307 static void ath_edma_stop_recv(struct ath_softc *sc)
 308 {
 309         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 311 }
 312
 313 int ath_rx_init(struct ath_softc *sc, int nbufs)
 314 {
 315         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 316         struct sk_buff *skb;
 317         struct ath_buf *bf;
 318         int error = 0;
 319
 320         spin_lock_init(&sc->sc_pcu_lock);
 321         sc->sc_flags &= ~SC_OP_RXFLUSH;
 322         spin_lock_init(&sc->rx.rxbuflock);
 323
 324         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
 325                              sc->sc_ah->caps.rx_status_len;
 326
 327         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 328                 return ath_rx_edma_init(sc, nbufs);
 329         } else {
 330                 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 331                         common->cachelsz, common->rx_bufsize);
 332
 333                 /* Initialize rx descriptors */
 334
 335                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 336                                 "rx", nbufs, 1, 0);
 337                 if (error != 0) {
 338                         ath_err(common,
 339                                 "failed to allocate rx descriptors: %d\n",
 340                                 error);
 341                         goto err;
 342                 }
 343
 344                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 345                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 346                                               GFP_KERNEL);
 347                         if (skb == NULL) {
 348                                 error = -ENOMEM;
 349                                 goto err;
 350                         }
 351
 352                         bf->bf_mpdu = skb;
 353                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 354                                         common->rx_bufsize,
 355                                         DMA_FROM_DEVICE);
 356                         if (unlikely(dma_mapping_error(sc->dev,
 357                                                         bf->bf_buf_addr))) {
 358                                 dev_kfree_skb_any(skb);
 359                                 bf->bf_mpdu = NULL;
 360                                 bf->bf_buf_addr = 0;
 361                                 ath_err(common,
 362                                         "dma_mapping_error() on RX init\n");
 363                                 error = -ENOMEM;
 364                                 goto err;
 365                         }
 366                 }
 367                 sc->rx.rxlink = NULL;
 368         }
 369
 370 err:
 371         if (error)
 372                 ath_rx_cleanup(sc);
 373
 374         return error;
 375 }
 376
 377 void ath_rx_cleanup(struct ath_softc *sc)
 378 {
 379         struct ath_hw *ah = sc->sc_ah;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         struct sk_buff *skb;
 382         struct ath_buf *bf;
 383
 384         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 385                 ath_rx_edma_cleanup(sc);
 386                 return;
 387         } else {
 388                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 389                         skb = bf->bf_mpdu;
 390                         if (skb) {
 391                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 392                                                 common->rx_bufsize,
 393                                                 DMA_FROM_DEVICE);
 394                                 dev_kfree_skb(skb);
 395                                 bf->bf_buf_addr = 0;
 396                                 bf->bf_mpdu = NULL;
 397                         }
 398                 }
 399
 400                 if (sc->rx.rxdma.dd_desc_len != 0)
 401                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 402         }
 403 }
 404
 405 /*
 406  * Calculate the receive filter according to the
 407  * operating mode and state:
 408  *
 409  * o always accept unicast, broadcast, and multicast traffic
 410  * o maintain current state of phy error reception (the hal
 411  *   may enable phy error frames for noise immunity work)
 412  * o probe request frames are accepted only when operating in
 413  *   hostap, adhoc, or monitor modes
 414  * o enable promiscuous mode according to the interface state
 415  * o accept beacons:
 416  *   - when operating in adhoc mode so the 802.11 layer creates
 417  *     node table entries for peers,
 418  *   - when operating in station mode for collecting rssi data when
 419  *     the station is otherwise quiet, or
 420  *   - when operating as a repeater so we see repeater-sta beacons
 421  *   - when scanning
 422  */
 423
 424 u32 ath_calcrxfilter(struct ath_softc *sc)
 425 {
 426         u32 rfilt;
 427
 428         rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 429                 | ATH9K_RX_FILTER_MCAST;
 430
 431         if (sc->rx.rxfilter & FIF_PROBE_REQ)
 432                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 433
 434         /*
 435          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 436          * mode interface or when in monitor mode. AP mode does not need this
 437          * since it receives all in-BSS frames anyway.
 438          */
 439         if (sc->sc_ah->is_monitoring)
 440                 rfilt |= ATH9K_RX_FILTER_PROM;
 441
 442         if (sc->rx.rxfilter & FIF_CONTROL)
 443                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 444
 445         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 446             (sc->nvifs <= 1) &&
 447             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 448                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 449         else
 450                 rfilt |= ATH9K_RX_FILTER_BEACON;
 451
 452         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
 453             (sc->rx.rxfilter & FIF_PSPOLL))
 454                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 455
 456         if (conf_is_ht(&sc->hw->conf))
 457                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 458
 459         if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 460                 /* The following may also be needed for other older chips */
 461                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 462                         rfilt |= ATH9K_RX_FILTER_PROM;
 463                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 464         }
 465
 466         return rfilt;
 467
 468 #undef RX_FILTER_PRESERVE
 469 }
 470
 471 int ath_startrecv(struct ath_softc *sc)
 472 {
 473         struct ath_hw *ah = sc->sc_ah;
 474         struct ath_buf *bf, *tbf;
 475
 476         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 477                 ath_edma_start_recv(sc);
 478                 return 0;
 479         }
 480
 481         spin_lock_bh(&sc->rx.rxbuflock);
 482         if (list_empty(&sc->rx.rxbuf))
 483                 goto start_recv;
 484
 485         sc->rx.rxlink = NULL;
 486         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 487                 ath_rx_buf_link(sc, bf);
 488         }
 489
 490         /* We could have deleted elements so the list may be empty now */
 491         if (list_empty(&sc->rx.rxbuf))
 492                 goto start_recv;
 493
 494         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 495         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 496         ath9k_hw_rxena(ah);
 497
 498 start_recv:
 499         ath_opmode_init(sc);
 500         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 501
 502         spin_unlock_bh(&sc->rx.rxbuflock);
 503
 504         return 0;
 505 }
 506
 507 bool ath_stoprecv(struct ath_softc *sc)
 508 {
 509         struct ath_hw *ah = sc->sc_ah;
 510         bool stopped, reset = false;
 511
 512         spin_lock_bh(&sc->rx.rxbuflock);
 513         ath9k_hw_abortpcurecv(ah);
 514         ath9k_hw_setrxfilter(ah, 0);
 515         stopped = ath9k_hw_stopdmarecv(ah, &reset);
 516
 517         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 518                 ath_edma_stop_recv(sc);
 519         else
 520                 sc->rx.rxlink = NULL;
 521         spin_unlock_bh(&sc->rx.rxbuflock);
 522
 523         if (!(ah->ah_flags & AH_UNPLUGGED) &&
 524             unlikely(!stopped)) {
 525                 ath_err(ath9k_hw_common(sc->sc_ah),
 526                         "Could not stop RX, we could be "
 527                         "confusing the DMA engine when we start RX up\n");
 528                 ATH_DBG_WARN_ON_ONCE(!stopped);
 529         }
 530         return stopped && !reset;
 531 }
 532
 533 void ath_flushrecv(struct ath_softc *sc)
 534 {
 535         sc->sc_flags |= SC_OP_RXFLUSH;
 536         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 537                 ath_rx_tasklet(sc, 1, true);
 538         ath_rx_tasklet(sc, 1, false);
 539         sc->sc_flags &= ~SC_OP_RXFLUSH;
 540 }
 541
 542 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 543 {
 544         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 545         struct ieee80211_mgmt *mgmt;
 546         u8 *pos, *end, id, elen;
 547         struct ieee80211_tim_ie *tim;
 548
 549         mgmt = (struct ieee80211_mgmt *)skb->data;
 550         pos = mgmt->u.beacon.variable;
 551         end = skb->data + skb->len;
 552
 553         while (pos + 2 < end) {
 554                 id = *pos++;
 555                 elen = *pos++;
 556                 if (pos + elen > end)
 557                         break;
 558
 559                 if (id == WLAN_EID_TIM) {
 560                         if (elen < sizeof(*tim))
 561                                 break;
 562                         tim = (struct ieee80211_tim_ie *) pos;
 563                         if (tim->dtim_count != 0)
 564                                 break;
 565                         return tim->bitmap_ctrl & 0x01;
 566                 }
 567
 568                 pos += elen;
 569         }
 570
 571         return false;
 572 }
 573
 574 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 575 {
 576         struct ieee80211_mgmt *mgmt;
 577         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 578
 579         if (skb->len < 24 + 8 + 2 + 2)
 580                 return;
 581
 582         mgmt = (struct ieee80211_mgmt *)skb->data;
 583         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
 584                 /* TODO:  This doesn't work well if you have stations
 585                  * associated to two different APs because curbssid
 586                  * is just the last AP that any of the stations associated
 587                  * with.
 588                  */
 589                 return; /* not from our current AP */
 590         }
 591
 592         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 593
 594         if (sc->ps_flags & PS_BEACON_SYNC) {
 595                 sc->ps_flags &= ~PS_BEACON_SYNC;
 596                 ath_dbg(common, ATH_DBG_PS,
 597                         "Reconfigure Beacon timers based on timestamp from the AP\n");
 598                 ath_set_beacon(sc);
 599                 sc->ps_flags &= ~PS_TSFOOR_SYNC;
 600         }
 601
 602         if (ath_beacon_dtim_pending_cab(skb)) {
 603                 /*
 604                  * Remain awake waiting for buffered broadcast/multicast
 605                  * frames. If the last broadcast/multicast frame is not
 606                  * received properly, the next beacon frame will work as
 607                  * a backup trigger for returning into NETWORK SLEEP state,
 608                  * so we are waiting for it as well.
 609                  */
 610                 ath_dbg(common, ATH_DBG_PS,
 611                         "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
 612                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 613                 return;
 614         }
 615
 616         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 617                 /*
 618                  * This can happen if a broadcast frame is dropped or the AP
 619                  * fails to send a frame indicating that all CAB frames have
 620                  * been delivered.
 621                  */
 622                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 623                 ath_dbg(common, ATH_DBG_PS,
 624                         "PS wait for CAB frames timed out\n");
 625         }
 626 }
 627
 628 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 629 {
 630         struct ieee80211_hdr *hdr;
 631         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 632
 633         hdr = (struct ieee80211_hdr *)skb->data;
 634
 635         /* Process Beacon and CAB receive in PS state */
 636         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 637             && ieee80211_is_beacon(hdr->frame_control))
 638                 ath_rx_ps_beacon(sc, skb);
 639         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 640                  (ieee80211_is_data(hdr->frame_control) ||
 641                   ieee80211_is_action(hdr->frame_control)) &&
 642                  is_multicast_ether_addr(hdr->addr1) &&
 643                  !ieee80211_has_moredata(hdr->frame_control)) {
 644                 /*
 645                  * No more broadcast/multicast frames to be received at this
 646                  * point.
 647                  */
 648                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
 649                 ath_dbg(common, ATH_DBG_PS,
 650                         "All PS CAB frames received, back to sleep\n");
 651         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 652                    !is_multicast_ether_addr(hdr->addr1) &&
 653                    !ieee80211_has_morefrags(hdr->frame_control)) {
 654                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 655                 ath_dbg(common, ATH_DBG_PS,
 656                         "Going back to sleep after having received PS-Poll data (0x%lx)\n",
 657                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 658                                         PS_WAIT_FOR_CAB |
 659                                         PS_WAIT_FOR_PSPOLL_DATA |
 660                                         PS_WAIT_FOR_TX_ACK));
 661         }
 662 }
 663
 664 static bool ath_edma_get_buffers(struct ath_softc *sc,
 665                                  enum ath9k_rx_qtype qtype)
 666 {
 667         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 668         struct ath_hw *ah = sc->sc_ah;
 669         struct ath_common *common = ath9k_hw_common(ah);
 670         struct sk_buff *skb;
 671         struct ath_buf *bf;
 672         int ret;
 673
 674         skb = skb_peek(&rx_edma->rx_fifo);
 675         if (!skb)
 676                 return false;
 677
 678         bf = SKB_CB_ATHBUF(skb);
 679         BUG_ON(!bf);
 680
 681         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 682                                 common->rx_bufsize, DMA_FROM_DEVICE);
 683
 684         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 685         if (ret == -EINPROGRESS) {
 686                 /*let device gain the buffer again*/
 687                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 688                                 common->rx_bufsize, DMA_FROM_DEVICE);
 689                 return false;
 690         }
 691
 692         __skb_unlink(skb, &rx_edma->rx_fifo);
 693         if (ret == -EINVAL) {
 694                 /* corrupt descriptor, skip this one and the following one */
 695                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 696                 ath_rx_edma_buf_link(sc, qtype);
 697                 skb = skb_peek(&rx_edma->rx_fifo);
 698                 if (!skb)
 699                         return true;
 700
 701                 bf = SKB_CB_ATHBUF(skb);
 702                 BUG_ON(!bf);
 703
 704                 __skb_unlink(skb, &rx_edma->rx_fifo);
 705                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 706                 ath_rx_edma_buf_link(sc, qtype);
 707                 return true;
 708         }
 709         skb_queue_tail(&rx_edma->rx_buffers, skb);
 710
 711         return true;
 712 }
 713
 714 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 715                                                 struct ath_rx_status *rs,
 716                                                 enum ath9k_rx_qtype qtype)
 717 {
 718         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 719         struct sk_buff *skb;
 720         struct ath_buf *bf;
 721
 722         while (ath_edma_get_buffers(sc, qtype));
 723         skb = __skb_dequeue(&rx_edma->rx_buffers);
 724         if (!skb)
 725                 return NULL;
 726
 727         bf = SKB_CB_ATHBUF(skb);
 728         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 729         return bf;
 730 }
 731
 732 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 733                                            struct ath_rx_status *rs)
 734 {
 735         struct ath_hw *ah = sc->sc_ah;
 736         struct ath_common *common = ath9k_hw_common(ah);
 737         struct ath_desc *ds;
 738         struct ath_buf *bf;
 739         int ret;
 740
 741         if (list_empty(&sc->rx.rxbuf)) {
 742                 sc->rx.rxlink = NULL;
 743                 return NULL;
 744         }
 745
 746         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 747         ds = bf->bf_desc;
 748
 749         /*
 750          * Must provide the virtual address of the current
 751          * descriptor, the physical address, and the virtual
 752          * address of the next descriptor in the h/w chain.
 753          * This allows the HAL to look ahead to see if the
 754          * hardware is done with a descriptor by checking the
 755          * done bit in the following descriptor and the address
 756          * of the current descriptor the DMA engine is working
 757          * on.  All this is necessary because of our use of
 758          * a self-linked list to avoid rx overruns.
 759          */
 760         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 761         if (ret == -EINPROGRESS) {
 762                 struct ath_rx_status trs;
 763                 struct ath_buf *tbf;
 764                 struct ath_desc *tds;
 765
 766                 memset(&trs, 0, sizeof(trs));
 767                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 768                         sc->rx.rxlink = NULL;
 769                         return NULL;
 770                 }
 771
 772                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 773
 774                 /*
 775                  * On some hardware the descriptor status words could
 776                  * get corrupted, including the done bit. Because of
 777                  * this, check if the next descriptor's done bit is
 778                  * set or not.
 779                  *
 780                  * If the next descriptor's done bit is set, the current
 781                  * descriptor has been corrupted. Force s/w to discard
 782                  * this descriptor and continue...
 783                  */
 784
 785                 tds = tbf->bf_desc;
 786                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 787                 if (ret == -EINPROGRESS)
 788                         return NULL;
 789         }
 790
 791         if (!bf->bf_mpdu)
 792                 return bf;
 793
 794         /*
 795          * Synchronize the DMA transfer with CPU before
 796          * 1. accessing the frame
 797          * 2. requeueing the same buffer to h/w
 798          */
 799         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 800                         common->rx_bufsize,
 801                         DMA_FROM_DEVICE);
 802
 803         return bf;
 804 }
 805
 806 /* Assumes you've already done the endian to CPU conversion */
 807 static bool ath9k_rx_accept(struct ath_common *common,
 808                             struct ieee80211_hdr *hdr,
 809                             struct ieee80211_rx_status *rxs,
 810                             struct ath_rx_status *rx_stats,
 811                             bool *decrypt_error)
 812 {
 813 #define is_mc_or_valid_tkip_keyix ((is_mc ||                    \
 814                 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
 815                 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
 816
 817         struct ath_hw *ah = common->ah;
 818         __le16 fc;
 819         u8 rx_status_len = ah->caps.rx_status_len;
 820
 821         fc = hdr->frame_control;
 822
 823         if (!rx_stats->rs_datalen)
 824                 return false;
 825         /*
 826          * rs_status follows rs_datalen so if rs_datalen is too large
 827          * we can take a hint that hardware corrupted it, so ignore
 828          * those frames.
 829          */
 830         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 831                 return false;
 832
 833         /* Only use error bits from the last fragment */
 834         if (rx_stats->rs_more)
 835                 return true;
 836
 837         /*
 838          * The rx_stats->rs_status will not be set until the end of the
 839          * chained descriptors so it can be ignored if rs_more is set. The
 840          * rs_more will be false at the last element of the chained
 841          * descriptors.
 842          */
 843         if (rx_stats->rs_status != 0) {
 844                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
 845                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 846                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 847                         return false;
 848
 849                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
 850                         *decrypt_error = true;
 851                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
 852                         bool is_mc;
 853                         /*
 854                          * The MIC error bit is only valid if the frame
 855                          * is not a control frame or fragment, and it was
 856                          * decrypted using a valid TKIP key.
 857                          */
 858                         is_mc = !!is_multicast_ether_addr(hdr->addr1);
 859
 860                         if (!ieee80211_is_ctl(fc) &&
 861                             !ieee80211_has_morefrags(fc) &&
 862                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 863                             is_mc_or_valid_tkip_keyix)
 864                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 865                         else
 866                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
 867                 }
 868                 /*
 869                  * Reject error frames with the exception of
 870                  * decryption and MIC failures. For monitor mode,
 871                  * we also ignore the CRC error.
 872                  */
 873                 if (ah->is_monitoring) {
 874                         if (rx_stats->rs_status &
 875                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 876                               ATH9K_RXERR_CRC))
 877                                 return false;
 878                 } else {
 879                         if (rx_stats->rs_status &
 880                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
 881                                 return false;
 882                         }
 883                 }
 884         }
 885         return true;
 886 }
 887
 888 static int ath9k_process_rate(struct ath_common *common,
 889                               struct ieee80211_hw *hw,
 890                               struct ath_rx_status *rx_stats,
 891                               struct ieee80211_rx_status *rxs)
 892 {
 893         struct ieee80211_supported_band *sband;
 894         enum ieee80211_band band;
 895         unsigned int i = 0;
 896
 897         band = hw->conf.channel->band;
 898         sband = hw->wiphy->bands[band];
 899
 900         if (rx_stats->rs_rate & 0x80) {
 901                 /* HT rate */
 902                 rxs->flag |= RX_FLAG_HT;
 903                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 904                         rxs->flag |= RX_FLAG_40MHZ;
 905                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 906                         rxs->flag |= RX_FLAG_SHORT_GI;
 907                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 908                 return 0;
 909         }
 910
 911         for (i = 0; i < sband->n_bitrates; i++) {
 912                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 913                         rxs->rate_idx = i;
 914                         return 0;
 915                 }
 916                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 917                         rxs->flag |= RX_FLAG_SHORTPRE;
 918                         rxs->rate_idx = i;
 919                         return 0;
 920                 }
 921         }
 922
 923         /*
 924          * No valid hardware bitrate found -- we should not get here
 925          * because hardware has already validated this frame as OK.
 926          */
 927         ath_dbg(common, ATH_DBG_XMIT,
 928                 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
 929                 rx_stats->rs_rate);
 930
 931         return -EINVAL;
 932 }
 933
 934 static void ath9k_process_rssi(struct ath_common *common,
 935                                struct ieee80211_hw *hw,
 936                                struct ieee80211_hdr *hdr,
 937                                struct ath_rx_status *rx_stats)
 938 {
 939         struct ath_softc *sc = hw->priv;
 940         struct ath_hw *ah = common->ah;
 941         int last_rssi;
 942         __le16 fc;
 943
 944         if ((ah->opmode != NL80211_IFTYPE_STATION) &&
 945             (ah->opmode != NL80211_IFTYPE_ADHOC))
 946                 return;
 947
 948         fc = hdr->frame_control;
 949         if (!ieee80211_is_beacon(fc) ||
 950             compare_ether_addr(hdr->addr3, common->curbssid)) {
 951                 /* TODO:  This doesn't work well if you have stations
 952                  * associated to two different APs because curbssid
 953                  * is just the last AP that any of the stations associated
 954                  * with.
 955                  */
 956                 return;
 957         }
 958
 959         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
 960                 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
 961
 962         last_rssi = sc->last_rssi;
 963         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
 964                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
 965                                               ATH_RSSI_EP_MULTIPLIER);
 966         if (rx_stats->rs_rssi < 0)
 967                 rx_stats->rs_rssi = 0;
 968
 969         /* Update Beacon RSSI, this is used by ANI. */
 970         ah->stats.avgbrssi = rx_stats->rs_rssi;
 971 }
 972
 973 /*
 974  * For Decrypt or Demic errors, we only mark packet status here and always push
 975  * up the frame up to let mac80211 handle the actual error case, be it no
 976  * decryption key or real decryption error. This let us keep statistics there.
 977  */
 978 static int ath9k_rx_skb_preprocess(struct ath_common *common,
 979                                    struct ieee80211_hw *hw,
 980                                    struct ieee80211_hdr *hdr,
 981                                    struct ath_rx_status *rx_stats,
 982                                    struct ieee80211_rx_status *rx_status,
 983                                    bool *decrypt_error)
 984 {
 985         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
 986
 987         /*
 988          * everything but the rate is checked here, the rate check is done
 989          * separately to avoid doing two lookups for a rate for each frame.
 990          */
 991         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
 992                 return -EINVAL;
 993
 994         /* Only use status info from the last fragment */
 995         if (rx_stats->rs_more)
 996                 return 0;
 997
 998         ath9k_process_rssi(common, hw, hdr, rx_stats);
 999
1000         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1001                 return -EINVAL;
1002
1003         rx_status->band = hw->conf.channel->band;
1004         rx_status->freq = hw->conf.channel->center_freq;
1005         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1006         rx_status->antenna = rx_stats->rs_antenna;
1007         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1008
1009         return 0;
1010 }
1011
1012 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1013                                      struct sk_buff *skb,
1014                                      struct ath_rx_status *rx_stats,
1015                                      struct ieee80211_rx_status *rxs,
1016                                      bool decrypt_error)
1017 {
1018         struct ath_hw *ah = common->ah;
1019         struct ieee80211_hdr *hdr;
1020         int hdrlen, padpos, padsize;
1021         u8 keyix;
1022         __le16 fc;
1023
1024         /* see if any padding is done by the hw and remove it */
1025         hdr = (struct ieee80211_hdr *) skb->data;
1026         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1027         fc = hdr->frame_control;
1028         padpos = ath9k_cmn_padpos(hdr->frame_control);
1029
1030         /* The MAC header is padded to have 32-bit boundary if the
1031          * packet payload is non-zero. The general calculation for
1032          * padsize would take into account odd header lengths:
1033          * padsize = (4 - padpos % 4) % 4; However, since only
1034          * even-length headers are used, padding can only be 0 or 2
1035          * bytes and we can optimize this a bit. In addition, we must
1036          * not try to remove padding from short control frames that do
1037          * not have payload. */
1038         padsize = padpos & 3;
1039         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1040                 memmove(skb->data + padsize, skb->data, padpos);
1041                 skb_pull(skb, padsize);
1042         }
1043
1044         keyix = rx_stats->rs_keyix;
1045
1046         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1047             ieee80211_has_protected(fc)) {
1048                 rxs->flag |= RX_FLAG_DECRYPTED;
1049         } else if (ieee80211_has_protected(fc)
1050                    && !decrypt_error && skb->len >= hdrlen + 4) {
1051                 keyix = skb->data[hdrlen + 3] >> 6;
1052
1053                 if (test_bit(keyix, common->keymap))
1054                         rxs->flag |= RX_FLAG_DECRYPTED;
1055         }
1056         if (ah->sw_mgmt_crypto &&
1057             (rxs->flag & RX_FLAG_DECRYPTED) &&
1058             ieee80211_is_mgmt(fc))
1059                 /* Use software decrypt for management frames. */
1060                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1061 }
1062
1063 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1064                                       struct ath_hw_antcomb_conf ant_conf,
1065                                       int main_rssi_avg)
1066 {
1067         antcomb->quick_scan_cnt = 0;
1068
1069         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1070                 antcomb->rssi_lna2 = main_rssi_avg;
1071         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1072                 antcomb->rssi_lna1 = main_rssi_avg;
1073
1074         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1075         case (0x10): /* LNA2 A-B */
1076                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1077                 antcomb->first_quick_scan_conf =
1078                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1079                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1080                 break;
1081         case (0x20): /* LNA1 A-B */
1082                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1083                 antcomb->first_quick_scan_conf =
1084                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1085                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1086                 break;
1087         case (0x21): /* LNA1 LNA2 */
1088                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1089                 antcomb->first_quick_scan_conf =
1090                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1091                 antcomb->second_quick_scan_conf =
1092                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1093                 break;
1094         case (0x12): /* LNA2 LNA1 */
1095                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1096                 antcomb->first_quick_scan_conf =
1097                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1098                 antcomb->second_quick_scan_conf =
1099                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1100                 break;
1101         case (0x13): /* LNA2 A+B */
1102                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1103                 antcomb->first_quick_scan_conf =
1104                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1105                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1106                 break;
1107         case (0x23): /* LNA1 A+B */
1108                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1109                 antcomb->first_quick_scan_conf =
1110                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1111                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1112                 break;
1113         default:
1114                 break;
1115         }
1116 }
1117
1118 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1119                                 struct ath_hw_antcomb_conf *div_ant_conf,
1120                                 int main_rssi_avg, int alt_rssi_avg,
1121                                 int alt_ratio)
1122 {
1123         /* alt_good */
1124         switch (antcomb->quick_scan_cnt) {
1125         case 0:
1126                 /* set alt to main, and alt to first conf */
1127                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1128                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1129                 break;
1130         case 1:
1131                 /* set alt to main, and alt to first conf */
1132                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1133                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1134                 antcomb->rssi_first = main_rssi_avg;
1135                 antcomb->rssi_second = alt_rssi_avg;
1136
1137                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1138                         /* main is LNA1 */
1139                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1140                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1141                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1142                                                 main_rssi_avg, alt_rssi_avg,
1143                                                 antcomb->total_pkt_count))
1144                                 antcomb->first_ratio = true;
1145                         else
1146                                 antcomb->first_ratio = false;
1147                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1148                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1149                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1150                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1151                                                 main_rssi_avg, alt_rssi_avg,
1152                                                 antcomb->total_pkt_count))
1153                                 antcomb->first_ratio = true;
1154                         else
1155                                 antcomb->first_ratio = false;
1156                 } else {
1157                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1158                             (alt_rssi_avg > main_rssi_avg +
1159                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1160                             (alt_rssi_avg > main_rssi_avg)) &&
1161                             (antcomb->total_pkt_count > 50))
1162                                 antcomb->first_ratio = true;
1163                         else
1164                                 antcomb->first_ratio = false;
1165                 }
1166                 break;
1167         case 2:
1168                 antcomb->alt_good = false;
1169                 antcomb->scan_not_start = false;
1170                 antcomb->scan = false;
1171                 antcomb->rssi_first = main_rssi_avg;
1172                 antcomb->rssi_third = alt_rssi_avg;
1173
1174                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1175                         antcomb->rssi_lna1 = alt_rssi_avg;
1176                 else if (antcomb->second_quick_scan_conf ==
1177                          ATH_ANT_DIV_COMB_LNA2)
1178                         antcomb->rssi_lna2 = alt_rssi_avg;
1179                 else if (antcomb->second_quick_scan_conf ==
1180                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1181                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1182                                 antcomb->rssi_lna2 = main_rssi_avg;
1183                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1184                                 antcomb->rssi_lna1 = main_rssi_avg;
1185                 }
1186
1187                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1188                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1189                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1190                 else
1191                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1192
1193                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1194                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1195                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1196                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1197                                                 main_rssi_avg, alt_rssi_avg,
1198                                                 antcomb->total_pkt_count))
1199                                 antcomb->second_ratio = true;
1200                         else
1201                                 antcomb->second_ratio = false;
1202                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1203                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1204                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1205                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1206                                                 main_rssi_avg, alt_rssi_avg,
1207                                                 antcomb->total_pkt_count))
1208                                 antcomb->second_ratio = true;
1209                         else
1210                                 antcomb->second_ratio = false;
1211                 } else {
1212                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1213                             (alt_rssi_avg > main_rssi_avg +
1214                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1215                             (alt_rssi_avg > main_rssi_avg)) &&
1216                             (antcomb->total_pkt_count > 50))
1217                                 antcomb->second_ratio = true;
1218                         else
1219                                 antcomb->second_ratio = false;
1220                 }
1221
1222                 /* set alt to the conf with maximun ratio */
1223                 if (antcomb->first_ratio && antcomb->second_ratio) {
1224                         if (antcomb->rssi_second > antcomb->rssi_third) {
1225                                 /* first alt*/
1226                                 if ((antcomb->first_quick_scan_conf ==
1227                                     ATH_ANT_DIV_COMB_LNA1) ||
1228                                     (antcomb->first_quick_scan_conf ==
1229                                     ATH_ANT_DIV_COMB_LNA2))
1230                                         /* Set alt LNA1 or LNA2*/
1231                                         if (div_ant_conf->main_lna_conf ==
1232                                             ATH_ANT_DIV_COMB_LNA2)
1233                                                 div_ant_conf->alt_lna_conf =
1234                                                         ATH_ANT_DIV_COMB_LNA1;
1235                                         else
1236                                                 div_ant_conf->alt_lna_conf =
1237                                                         ATH_ANT_DIV_COMB_LNA2;
1238                                 else
1239                                         /* Set alt to A+B or A-B */
1240                                         div_ant_conf->alt_lna_conf =
1241                                                 antcomb->first_quick_scan_conf;
1242                         } else if ((antcomb->second_quick_scan_conf ==
1243                                    ATH_ANT_DIV_COMB_LNA1) ||
1244                                    (antcomb->second_quick_scan_conf ==
1245                                    ATH_ANT_DIV_COMB_LNA2)) {
1246                                 /* Set alt LNA1 or LNA2 */
1247                                 if (div_ant_conf->main_lna_conf ==
1248                                     ATH_ANT_DIV_COMB_LNA2)
1249                                         div_ant_conf->alt_lna_conf =
1250                                                 ATH_ANT_DIV_COMB_LNA1;
1251                                 else
1252                                         div_ant_conf->alt_lna_conf =
1253                                                 ATH_ANT_DIV_COMB_LNA2;
1254                         } else {
1255                                 /* Set alt to A+B or A-B */
1256                                 div_ant_conf->alt_lna_conf =
1257                                         antcomb->second_quick_scan_conf;
1258                         }
1259                 } else if (antcomb->first_ratio) {
1260                         /* first alt */
1261                         if ((antcomb->first_quick_scan_conf ==
1262                             ATH_ANT_DIV_COMB_LNA1) ||
1263                             (antcomb->first_quick_scan_conf ==
1264                             ATH_ANT_DIV_COMB_LNA2))
1265                                         /* Set alt LNA1 or LNA2 */
1266                                 if (div_ant_conf->main_lna_conf ==
1267                                     ATH_ANT_DIV_COMB_LNA2)
1268                                         div_ant_conf->alt_lna_conf =
1269                                                         ATH_ANT_DIV_COMB_LNA1;
1270                                 else
1271                                         div_ant_conf->alt_lna_conf =
1272                                                         ATH_ANT_DIV_COMB_LNA2;
1273                         else
1274                                 /* Set alt to A+B or A-B */
1275                                 div_ant_conf->alt_lna_conf =
1276                                                 antcomb->first_quick_scan_conf;
1277                 } else if (antcomb->second_ratio) {
1278                                 /* second alt */
1279                         if ((antcomb->second_quick_scan_conf ==
1280                             ATH_ANT_DIV_COMB_LNA1) ||
1281                             (antcomb->second_quick_scan_conf ==
1282                             ATH_ANT_DIV_COMB_LNA2))
1283                                 /* Set alt LNA1 or LNA2 */
1284                                 if (div_ant_conf->main_lna_conf ==
1285                                     ATH_ANT_DIV_COMB_LNA2)
1286                                         div_ant_conf->alt_lna_conf =
1287                                                 ATH_ANT_DIV_COMB_LNA1;
1288                                 else
1289                                         div_ant_conf->alt_lna_conf =
1290                                                 ATH_ANT_DIV_COMB_LNA2;
1291                         else
1292                                 /* Set alt to A+B or A-B */
1293                                 div_ant_conf->alt_lna_conf =
1294                                                 antcomb->second_quick_scan_conf;
1295                 } else {
1296                         /* main is largest */
1297                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1298                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1299                                 /* Set alt LNA1 or LNA2 */
1300                                 if (div_ant_conf->main_lna_conf ==
1301                                     ATH_ANT_DIV_COMB_LNA2)
1302                                         div_ant_conf->alt_lna_conf =
1303                                                         ATH_ANT_DIV_COMB_LNA1;
1304                                 else
1305                                         div_ant_conf->alt_lna_conf =
1306                                                         ATH_ANT_DIV_COMB_LNA2;
1307                         else
1308                                 /* Set alt to A+B or A-B */
1309                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1310                 }
1311                 break;
1312         default:
1313                 break;
1314         }
1315 }
1316
1317 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1318                 struct ath_ant_comb *antcomb, int alt_ratio)
1319 {
1320         if (ant_conf->div_group == 0) {
1321                 /* Adjust the fast_div_bias based on main and alt lna conf */
1322                 switch ((ant_conf->main_lna_conf << 4) |
1323                                 ant_conf->alt_lna_conf) {
1324                 case (0x01): /* A-B LNA2 */
1325                         ant_conf->fast_div_bias = 0x3b;
1326                         break;
1327                 case (0x02): /* A-B LNA1 */
1328                         ant_conf->fast_div_bias = 0x3d;
1329                         break;
1330                 case (0x03): /* A-B A+B */
1331                         ant_conf->fast_div_bias = 0x1;
1332                         break;
1333                 case (0x10): /* LNA2 A-B */
1334                         ant_conf->fast_div_bias = 0x7;
1335                         break;
1336                 case (0x12): /* LNA2 LNA1 */
1337                         ant_conf->fast_div_bias = 0x2;
1338                         break;
1339                 case (0x13): /* LNA2 A+B */
1340                         ant_conf->fast_div_bias = 0x7;
1341                         break;
1342                 case (0x20): /* LNA1 A-B */
1343                         ant_conf->fast_div_bias = 0x6;
1344                         break;
1345                 case (0x21): /* LNA1 LNA2 */
1346                         ant_conf->fast_div_bias = 0x0;
1347                         break;
1348                 case (0x23): /* LNA1 A+B */
1349                         ant_conf->fast_div_bias = 0x6;
1350                         break;
1351                 case (0x30): /* A+B A-B */
1352                         ant_conf->fast_div_bias = 0x1;
1353                         break;
1354                 case (0x31): /* A+B LNA2 */
1355                         ant_conf->fast_div_bias = 0x3b;
1356                         break;
1357                 case (0x32): /* A+B LNA1 */
1358                         ant_conf->fast_div_bias = 0x3d;
1359                         break;
1360                 default:
1361                         break;
1362                 }
1363         } else if (ant_conf->div_group == 2) {
1364                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1365                 switch ((ant_conf->main_lna_conf << 4) |
1366                                 ant_conf->alt_lna_conf) {
1367                 case (0x01): /* A-B LNA2 */
1368                         ant_conf->fast_div_bias = 0x1;
1369                         ant_conf->main_gaintb = 0;
1370                         ant_conf->alt_gaintb = 0;
1371                         break;
1372                 case (0x02): /* A-B LNA1 */
1373                         ant_conf->fast_div_bias = 0x1;
1374                         ant_conf->main_gaintb = 0;
1375                         ant_conf->alt_gaintb = 0;
1376                         break;
1377                 case (0x03): /* A-B A+B */
1378                         ant_conf->fast_div_bias = 0x1;
1379                         ant_conf->main_gaintb = 0;
1380                         ant_conf->alt_gaintb = 0;
1381                         break;
1382                 case (0x10): /* LNA2 A-B */
1383                         if (!(antcomb->scan) &&
1384                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1385                                 ant_conf->fast_div_bias = 0x1;
1386                         else
1387                                 ant_conf->fast_div_bias = 0x2;
1388                         ant_conf->main_gaintb = 0;
1389                         ant_conf->alt_gaintb = 0;
1390                         break;
1391                 case (0x12): /* LNA2 LNA1 */
1392                         ant_conf->fast_div_bias = 0x1;
1393                         ant_conf->main_gaintb = 0;
1394                         ant_conf->alt_gaintb = 0;
1395                         break;
1396                 case (0x13): /* LNA2 A+B */
1397                         if (!(antcomb->scan) &&
1398                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1399                                 ant_conf->fast_div_bias = 0x1;
1400                         else
1401                                 ant_conf->fast_div_bias = 0x2;
1402                         ant_conf->main_gaintb = 0;
1403                         ant_conf->alt_gaintb = 0;
1404                         break;
1405                 case (0x20): /* LNA1 A-B */
1406                         if (!(antcomb->scan) &&
1407                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1408                                 ant_conf->fast_div_bias = 0x1;
1409                         else
1410                                 ant_conf->fast_div_bias = 0x2;
1411                         ant_conf->main_gaintb = 0;
1412                         ant_conf->alt_gaintb = 0;
1413                         break;
1414                 case (0x21): /* LNA1 LNA2 */
1415                         ant_conf->fast_div_bias = 0x1;
1416                         ant_conf->main_gaintb = 0;
1417                         ant_conf->alt_gaintb = 0;
1418                         break;
1419                 case (0x23): /* LNA1 A+B */
1420                         if (!(antcomb->scan) &&
1421                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1422                                 ant_conf->fast_div_bias = 0x1;
1423                         else
1424                                 ant_conf->fast_div_bias = 0x2;
1425                         ant_conf->main_gaintb = 0;
1426                         ant_conf->alt_gaintb = 0;
1427                         break;
1428                 case (0x30): /* A+B A-B */
1429                         ant_conf->fast_div_bias = 0x1;
1430                         ant_conf->main_gaintb = 0;
1431                         ant_conf->alt_gaintb = 0;
1432                         break;
1433                 case (0x31): /* A+B LNA2 */
1434                         ant_conf->fast_div_bias = 0x1;
1435                         ant_conf->main_gaintb = 0;
1436                         ant_conf->alt_gaintb = 0;
1437                         break;
1438                 case (0x32): /* A+B LNA1 */
1439                         ant_conf->fast_div_bias = 0x1;
1440                         ant_conf->main_gaintb = 0;
1441                         ant_conf->alt_gaintb = 0;
1442                         break;
1443                 default:
1444                         break;
1445                 }
1446
1447         }
1448
1449 }
1450
1451 /* Antenna diversity and combining */
1452 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1453 {
1454         struct ath_hw_antcomb_conf div_ant_conf;
1455         struct ath_ant_comb *antcomb = &sc->ant_comb;
1456         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1457         int curr_main_set;
1458         int main_rssi = rs->rs_rssi_ctl0;
1459         int alt_rssi = rs->rs_rssi_ctl1;
1460         int rx_ant_conf,  main_ant_conf;
1461         bool short_scan = false;
1462
1463         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1464                        ATH_ANT_RX_MASK;
1465         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1466                          ATH_ANT_RX_MASK;
1467
1468         /* Record packet only when both main_rssi and  alt_rssi is positive */
1469         if (main_rssi > 0 && alt_rssi > 0) {
1470                 antcomb->total_pkt_count++;
1471                 antcomb->main_total_rssi += main_rssi;
1472                 antcomb->alt_total_rssi  += alt_rssi;
1473                 if (main_ant_conf == rx_ant_conf)
1474                         antcomb->main_recv_cnt++;
1475                 else
1476                         antcomb->alt_recv_cnt++;
1477         }
1478
1479         /* Short scan check */
1480         if (antcomb->scan && antcomb->alt_good) {
1481                 if (time_after(jiffies, antcomb->scan_start_time +
1482                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1483                         short_scan = true;
1484                 else
1485                         if (antcomb->total_pkt_count ==
1486                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1487                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1488                                             antcomb->total_pkt_count);
1489                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1490                                         short_scan = true;
1491                         }
1492         }
1493
1494         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1495             rs->rs_moreaggr) && !short_scan)
1496                 return;
1497
1498         if (antcomb->total_pkt_count) {
1499                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1500                              antcomb->total_pkt_count);
1501                 main_rssi_avg = (antcomb->main_total_rssi /
1502                                  antcomb->total_pkt_count);
1503                 alt_rssi_avg = (antcomb->alt_total_rssi /
1504                                  antcomb->total_pkt_count);
1505         }
1506
1507
1508         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1509         curr_alt_set = div_ant_conf.alt_lna_conf;
1510         curr_main_set = div_ant_conf.main_lna_conf;
1511
1512         antcomb->count++;
1513
1514         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1515                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1516                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1517                                                   main_rssi_avg);
1518                         antcomb->alt_good = true;
1519                 } else {
1520                         antcomb->alt_good = false;
1521                 }
1522
1523                 antcomb->count = 0;
1524                 antcomb->scan = true;
1525                 antcomb->scan_not_start = true;
1526         }
1527
1528         if (!antcomb->scan) {
1529                 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1530                                         alt_ratio, curr_main_set, curr_alt_set,
1531                                         alt_rssi_avg, main_rssi_avg)) {
1532                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1533                                 /* Switch main and alt LNA */
1534                                 div_ant_conf.main_lna_conf =
1535                                                 ATH_ANT_DIV_COMB_LNA2;
1536                                 div_ant_conf.alt_lna_conf  =
1537                                                 ATH_ANT_DIV_COMB_LNA1;
1538                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1539                                 div_ant_conf.main_lna_conf =
1540                                                 ATH_ANT_DIV_COMB_LNA1;
1541                                 div_ant_conf.alt_lna_conf  =
1542                                                 ATH_ANT_DIV_COMB_LNA2;
1543                         }
1544
1545                         goto div_comb_done;
1546                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1547                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1548                         /* Set alt to another LNA */
1549                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1550                                 div_ant_conf.alt_lna_conf =
1551                                                 ATH_ANT_DIV_COMB_LNA1;
1552                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1553                                 div_ant_conf.alt_lna_conf =
1554                                                 ATH_ANT_DIV_COMB_LNA2;
1555
1556                         goto div_comb_done;
1557                 }
1558
1559                 if ((alt_rssi_avg < (main_rssi_avg +
1560                                                 div_ant_conf.lna1_lna2_delta)))
1561                         goto div_comb_done;
1562         }
1563
1564         if (!antcomb->scan_not_start) {
1565                 switch (curr_alt_set) {
1566                 case ATH_ANT_DIV_COMB_LNA2:
1567                         antcomb->rssi_lna2 = alt_rssi_avg;
1568                         antcomb->rssi_lna1 = main_rssi_avg;
1569                         antcomb->scan = true;
1570                         /* set to A+B */
1571                         div_ant_conf.main_lna_conf =
1572                                 ATH_ANT_DIV_COMB_LNA1;
1573                         div_ant_conf.alt_lna_conf  =
1574                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1575                         break;
1576                 case ATH_ANT_DIV_COMB_LNA1:
1577                         antcomb->rssi_lna1 = alt_rssi_avg;
1578                         antcomb->rssi_lna2 = main_rssi_avg;
1579                         antcomb->scan = true;
1580                         /* set to A+B */
1581                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1582                         div_ant_conf.alt_lna_conf  =
1583                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1584                         break;
1585                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1586                         antcomb->rssi_add = alt_rssi_avg;
1587                         antcomb->scan = true;
1588                         /* set to A-B */
1589                         div_ant_conf.alt_lna_conf =
1590                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1591                         break;
1592                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1593                         antcomb->rssi_sub = alt_rssi_avg;
1594                         antcomb->scan = false;
1595                         if (antcomb->rssi_lna2 >
1596                             (antcomb->rssi_lna1 +
1597                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1598                                 /* use LNA2 as main LNA */
1599                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1600                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1601                                         /* set to A+B */
1602                                         div_ant_conf.main_lna_conf =
1603                                                 ATH_ANT_DIV_COMB_LNA2;
1604                                         div_ant_conf.alt_lna_conf  =
1605                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1606                                 } else if (antcomb->rssi_sub >
1607                                            antcomb->rssi_lna1) {
1608                                         /* set to A-B */
1609                                         div_ant_conf.main_lna_conf =
1610                                                 ATH_ANT_DIV_COMB_LNA2;
1611                                         div_ant_conf.alt_lna_conf =
1612                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1613                                 } else {
1614                                         /* set to LNA1 */
1615                                         div_ant_conf.main_lna_conf =
1616                                                 ATH_ANT_DIV_COMB_LNA2;
1617                                         div_ant_conf.alt_lna_conf =
1618                                                 ATH_ANT_DIV_COMB_LNA1;
1619                                 }
1620                         } else {
1621                                 /* use LNA1 as main LNA */
1622                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1623                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1624                                         /* set to A+B */
1625                                         div_ant_conf.main_lna_conf =
1626                                                 ATH_ANT_DIV_COMB_LNA1;
1627                                         div_ant_conf.alt_lna_conf  =
1628                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1629                                 } else if (antcomb->rssi_sub >
1630                                            antcomb->rssi_lna1) {
1631                                         /* set to A-B */
1632                                         div_ant_conf.main_lna_conf =
1633                                                 ATH_ANT_DIV_COMB_LNA1;
1634                                         div_ant_conf.alt_lna_conf =
1635                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1636                                 } else {
1637                                         /* set to LNA2 */
1638                                         div_ant_conf.main_lna_conf =
1639                                                 ATH_ANT_DIV_COMB_LNA1;
1640                                         div_ant_conf.alt_lna_conf =
1641                                                 ATH_ANT_DIV_COMB_LNA2;
1642                                 }
1643                         }
1644                         break;
1645                 default:
1646                         break;
1647                 }
1648         } else {
1649                 if (!antcomb->alt_good) {
1650                         antcomb->scan_not_start = false;
1651                         /* Set alt to another LNA */
1652                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1653                                 div_ant_conf.main_lna_conf =
1654                                                 ATH_ANT_DIV_COMB_LNA2;
1655                                 div_ant_conf.alt_lna_conf =
1656                                                 ATH_ANT_DIV_COMB_LNA1;
1657                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1658                                 div_ant_conf.main_lna_conf =
1659                                                 ATH_ANT_DIV_COMB_LNA1;
1660                                 div_ant_conf.alt_lna_conf =
1661                                                 ATH_ANT_DIV_COMB_LNA2;
1662                         }
1663                         goto div_comb_done;
1664                 }
1665         }
1666
1667         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1668                                            main_rssi_avg, alt_rssi_avg,
1669                                            alt_ratio);
1670
1671         antcomb->quick_scan_cnt++;
1672
1673 div_comb_done:
1674         ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1675         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1676
1677         antcomb->scan_start_time = jiffies;
1678         antcomb->total_pkt_count = 0;
1679         antcomb->main_total_rssi = 0;
1680         antcomb->alt_total_rssi = 0;
1681         antcomb->main_recv_cnt = 0;
1682         antcomb->alt_recv_cnt = 0;
1683 }
1684
1685 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1686 {
1687         struct ath_buf *bf;
1688         struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1689         struct ieee80211_rx_status *rxs;
1690         struct ath_hw *ah = sc->sc_ah;
1691         struct ath_common *common = ath9k_hw_common(ah);
1692         /*
1693          * The hw can technically differ from common->hw when using ath9k
1694          * virtual wiphy so to account for that we iterate over the active
1695          * wiphys and find the appropriate wiphy and therefore hw.
1696          */
1697         struct ieee80211_hw *hw = sc->hw;
1698         struct ieee80211_hdr *hdr;
1699         int retval;
1700         bool decrypt_error = false;
1701         struct ath_rx_status rs;
1702         enum ath9k_rx_qtype qtype;
1703         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1704         int dma_type;
1705         u8 rx_status_len = ah->caps.rx_status_len;
1706         u64 tsf = 0;
1707         u32 tsf_lower = 0;
1708         unsigned long flags;
1709
1710         if (edma)
1711                 dma_type = DMA_BIDIRECTIONAL;
1712         else
1713                 dma_type = DMA_FROM_DEVICE;
1714
1715         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1716         spin_lock_bh(&sc->rx.rxbuflock);
1717
1718         tsf = ath9k_hw_gettsf64(ah);
1719         tsf_lower = tsf & 0xffffffff;
1720
1721         do {
1722                 /* If handling rx interrupt and flush is in progress => exit */
1723                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1724                         break;
1725
1726                 memset(&rs, 0, sizeof(rs));
1727                 if (edma)
1728                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1729                 else
1730                         bf = ath_get_next_rx_buf(sc, &rs);
1731
1732                 if (!bf)
1733                         break;
1734
1735                 skb = bf->bf_mpdu;
1736                 if (!skb)
1737                         continue;
1738
1739                 /*
1740                  * Take frame header from the first fragment and RX status from
1741                  * the last one.
1742                  */
1743                 if (sc->rx.frag)
1744                         hdr_skb = sc->rx.frag;
1745                 else
1746                         hdr_skb = skb;
1747
1748                 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1749                 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1750
1751                 ath_debug_stat_rx(sc, &rs);
1752
1753                 /*
1754                  * If we're asked to flush receive queue, directly
1755                  * chain it back at the queue without processing it.
1756                  */
1757                 if (flush)
1758                         goto requeue_drop_frag;
1759
1760                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1761                                                  rxs, &decrypt_error);
1762                 if (retval)
1763                         goto requeue_drop_frag;
1764
1765                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1766                 if (rs.rs_tstamp > tsf_lower &&
1767                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1768                         rxs->mactime -= 0x100000000ULL;
1769
1770                 if (rs.rs_tstamp < tsf_lower &&
1771                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1772                         rxs->mactime += 0x100000000ULL;
1773
1774                 /* Ensure we always have an skb to requeue once we are done
1775                  * processing the current buffer's skb */
1776                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1777
1778                 /* If there is no memory we ignore the current RX'd frame,
1779                  * tell hardware it can give us a new frame using the old
1780                  * skb and put it at the tail of the sc->rx.rxbuf list for
1781                  * processing. */
1782                 if (!requeue_skb)
1783                         goto requeue_drop_frag;
1784
1785                 /* Unmap the frame */
1786                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1787                                  common->rx_bufsize,
1788                                  dma_type);
1789
1790                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1791                 if (ah->caps.rx_status_len)
1792                         skb_pull(skb, ah->caps.rx_status_len);
1793
1794                 if (!rs.rs_more)
1795                         ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1796                                                  rxs, decrypt_error);
1797
1798                 /* We will now give hardware our shiny new allocated skb */
1799                 bf->bf_mpdu = requeue_skb;
1800                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1801                                                  common->rx_bufsize,
1802                                                  dma_type);
1803                 if (unlikely(dma_mapping_error(sc->dev,
1804                           bf->bf_buf_addr))) {
1805                         dev_kfree_skb_any(requeue_skb);
1806                         bf->bf_mpdu = NULL;
1807                         bf->bf_buf_addr = 0;
1808                         ath_err(common, "dma_mapping_error() on RX\n");
1809                         ieee80211_rx(hw, skb);
1810                         break;
1811                 }
1812
1813                 if (rs.rs_more) {
1814                         /*
1815                          * rs_more indicates chained descriptors which can be
1816                          * used to link buffers together for a sort of
1817                          * scatter-gather operation.
1818                          */
1819                         if (sc->rx.frag) {
1820                                 /* too many fragments - cannot handle frame */
1821                                 dev_kfree_skb_any(sc->rx.frag);
1822                                 dev_kfree_skb_any(skb);
1823                                 skb = NULL;
1824                         }
1825                         sc->rx.frag = skb;
1826                         goto requeue;
1827                 }
1828
1829                 if (sc->rx.frag) {
1830                         int space = skb->len - skb_tailroom(hdr_skb);
1831
1832                         sc->rx.frag = NULL;
1833
1834                         if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1835                                 dev_kfree_skb(skb);
1836                                 goto requeue_drop_frag;
1837                         }
1838
1839                         skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1840                                                   skb->len);
1841                         dev_kfree_skb_any(skb);
1842                         skb = hdr_skb;
1843                 }
1844
1845                 /*
1846                  * change the default rx antenna if rx diversity chooses the
1847                  * other antenna 3 times in a row.
1848                  */
1849                 if (sc->rx.defant != rs.rs_antenna) {
1850                         if (++sc->rx.rxotherant >= 3)
1851                                 ath_setdefantenna(sc, rs.rs_antenna);
1852                 } else {
1853                         sc->rx.rxotherant = 0;
1854                 }
1855
1856                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1857
1858                 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1859                                               PS_WAIT_FOR_CAB |
1860                                               PS_WAIT_FOR_PSPOLL_DATA)) ||
1861                                                 ath9k_check_auto_sleep(sc))
1862                         ath_rx_ps(sc, skb);
1863                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1864
1865                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1866                         ath_ant_comb_scan(sc, &rs);
1867
1868                 ieee80211_rx(hw, skb);
1869
1870 requeue_drop_frag:
1871                 if (sc->rx.frag) {
1872                         dev_kfree_skb_any(sc->rx.frag);
1873                         sc->rx.frag = NULL;
1874                 }
1875 requeue:
1876                 if (edma) {
1877                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1878                         ath_rx_edma_buf_link(sc, qtype);
1879                 } else {
1880                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1881                         ath_rx_buf_link(sc, bf);
1882                         ath9k_hw_rxena(ah);
1883                 }
1884         } while (1);
1885
1886         spin_unlock_bh(&sc->rx.rxbuflock);
1887
1888         return 0;
1889 }