drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 /*
 158  * Set/change channels.  If the channel is really being changed, it's done
 159  * by reseting the chip.  To accomplish this we must first cleanup any pending
 160  * DMA, then restart stuff.
 161 */
 162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 163                     struct ath9k_channel *hchan)
 164 {
 165         struct ath_hw *ah = sc->sc_ah;
 166         struct ath_common *common = ath9k_hw_common(ah);
 167         struct ieee80211_conf *conf = &common->hw->conf;
 168         bool fastcc = true, stopped;
 169         struct ieee80211_channel *channel = hw->conf.channel;
 170         int r;
 171
 172         if (sc->sc_flags & SC_OP_INVALID)
 173                 return -EIO;
 174
 175         ath9k_ps_wakeup(sc);
 176
 177         /*
 178          * This is only performed if the channel settings have
 179          * actually changed.
 180          *
 181          * To switch channels clear any pending DMA operations;
 182          * wait long enough for the RX fifo to drain, reset the
 183          * hardware at the new frequency, and then re-enable
 184          * the relevant bits of the h/w.
 185          */
 186         ath9k_hw_set_interrupts(ah, 0);
 187         ath_drain_all_txq(sc, false);
 188         stopped = ath_stoprecv(sc);
 189
 190         /* XXX: do not flush receive queue here. We don't want
 191          * to flush data frames already in queue because of
 192          * changing channel. */
 193
 194         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 195                 fastcc = false;
 196
 197         ath_print(common, ATH_DBG_CONFIG,
 198                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 199                   sc->sc_ah->curchan->channel,
 200                   channel->center_freq, conf_is_ht40(conf));
 201
 202         spin_lock_bh(&sc->sc_resetlock);
 203
 204         r = ath9k_hw_reset(ah, hchan, fastcc);
 205         if (r) {
 206                 ath_print(common, ATH_DBG_FATAL,
 207                           "Unable to reset channel (%u MHz), "
 208                           "reset status %d\n",
 209                           channel->center_freq, r);
 210                 spin_unlock_bh(&sc->sc_resetlock);
 211                 goto ps_restore;
 212         }
 213         spin_unlock_bh(&sc->sc_resetlock);
 214
 215         sc->sc_flags &= ~SC_OP_FULL_RESET;
 216
 217         if (ath_startrecv(sc) != 0) {
 218                 ath_print(common, ATH_DBG_FATAL,
 219                           "Unable to restart recv logic\n");
 220                 r = -EIO;
 221                 goto ps_restore;
 222         }
 223
 224         ath_cache_conf_rate(sc, &hw->conf);
 225         ath_update_txpow(sc);
 226         ath9k_hw_set_interrupts(ah, ah->imask);
 227
 228  ps_restore:
 229         ath9k_ps_restore(sc);
 230         return r;
 231 }
 232
 233 static void ath_paprd_activate(struct ath_softc *sc)
 234 {
 235         struct ath_hw *ah = sc->sc_ah;
 236         int chain;
 237
 238         if (!ah->curchan->paprd_done)
 239                 return;
 240
 241         ath9k_ps_wakeup(sc);
 242         ar9003_paprd_enable(ah, false);
 243         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 244                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 245                         continue;
 246
 247                 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
 248         }
 249
 250         ar9003_paprd_enable(ah, true);
 251         ath9k_ps_restore(sc);
 252 }
 253
 254 void ath_paprd_calibrate(struct work_struct *work)
 255 {
 256         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 257         struct ieee80211_hw *hw = sc->hw;
 258         struct ath_hw *ah = sc->sc_ah;
 259         struct ieee80211_hdr *hdr;
 260         struct sk_buff *skb = NULL;
 261         struct ieee80211_tx_info *tx_info;
 262         int band = hw->conf.channel->band;
 263         struct ieee80211_supported_band *sband = &sc->sbands[band];
 264         struct ath_tx_control txctl;
 265         int qnum, ftype;
 266         int chain_ok = 0;
 267         int chain;
 268         int len = 1800;
 269         int time_left;
 270         int i;
 271
 272         skb = alloc_skb(len, GFP_KERNEL);
 273         if (!skb)
 274                 return;
 275
 276         tx_info = IEEE80211_SKB_CB(skb);
 277
 278         skb_put(skb, len);
 279         memset(skb->data, 0, len);
 280         hdr = (struct ieee80211_hdr *)skb->data;
 281         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 282         hdr->frame_control = cpu_to_le16(ftype);
 283         hdr->duration_id = cpu_to_le16(10);
 284         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 285         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 286         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 287
 288         memset(&txctl, 0, sizeof(txctl));
 289         qnum = sc->tx.hwq_map[WME_AC_BE];
 290         txctl.txq = &sc->tx.txq[qnum];
 291
 292         ath9k_ps_wakeup(sc);
 293         ar9003_paprd_init_table(ah);
 294         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 295                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 296                         continue;
 297
 298                 chain_ok = 0;
 299                 memset(tx_info, 0, sizeof(*tx_info));
 300                 tx_info->band = band;
 301
 302                 for (i = 0; i < 4; i++) {
 303                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 304                         tx_info->control.rates[i].count = 6;
 305                 }
 306
 307                 init_completion(&sc->paprd_complete);
 308                 ar9003_paprd_setup_gain_table(ah, chain);
 309                 txctl.paprd = BIT(chain);
 310                 if (ath_tx_start(hw, skb, &txctl) != 0)
 311                         break;
 312
 313                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 314                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 315                 if (!time_left) {
 316                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 317                                   "Timeout waiting for paprd training on "
 318                                   "TX chain %d\n",
 319                                   chain);
 320                         goto fail_paprd;
 321                 }
 322
 323                 if (!ar9003_paprd_is_done(ah))
 324                         break;
 325
 326                 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
 327                         break;
 328
 329                 chain_ok = 1;
 330         }
 331         kfree_skb(skb);
 332
 333         if (chain_ok) {
 334                 ah->curchan->paprd_done = true;
 335                 ath_paprd_activate(sc);
 336         }
 337
 338 fail_paprd:
 339         ath9k_ps_restore(sc);
 340 }
 341
 342 /*
 343  *  This routine performs the periodic noise floor calibration function
 344  *  that is used to adjust and optimize the chip performance.  This
 345  *  takes environmental changes (location, temperature) into account.
 346  *  When the task is complete, it reschedules itself depending on the
 347  *  appropriate interval that was calculated.
 348  */
 349 void ath_ani_calibrate(unsigned long data)
 350 {
 351         struct ath_softc *sc = (struct ath_softc *)data;
 352         struct ath_hw *ah = sc->sc_ah;
 353         struct ath_common *common = ath9k_hw_common(ah);
 354         bool longcal = false;
 355         bool shortcal = false;
 356         bool aniflag = false;
 357         unsigned int timestamp = jiffies_to_msecs(jiffies);
 358         u32 cal_interval, short_cal_interval;
 359
 360         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 361                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 362
 363         /* Only calibrate if awake */
 364         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 365                 goto set_timer;
 366
 367         ath9k_ps_wakeup(sc);
 368
 369         /* Long calibration runs independently of short calibration. */
 370         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 371                 longcal = true;
 372                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 373                 common->ani.longcal_timer = timestamp;
 374         }
 375
 376         /* Short calibration applies only while caldone is false */
 377         if (!common->ani.caldone) {
 378                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 379                         shortcal = true;
 380                         ath_print(common, ATH_DBG_ANI,
 381                                   "shortcal @%lu\n", jiffies);
 382                         common->ani.shortcal_timer = timestamp;
 383                         common->ani.resetcal_timer = timestamp;
 384                 }
 385         } else {
 386                 if ((timestamp - common->ani.resetcal_timer) >=
 387                     ATH_RESTART_CALINTERVAL) {
 388                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 389                         if (common->ani.caldone)
 390                                 common->ani.resetcal_timer = timestamp;
 391                 }
 392         }
 393
 394         /* Verify whether we must check ANI */
 395         if ((timestamp - common->ani.checkani_timer) >=
 396              ah->config.ani_poll_interval) {
 397                 aniflag = true;
 398                 common->ani.checkani_timer = timestamp;
 399         }
 400
 401         /* Skip all processing if there's nothing to do. */
 402         if (longcal || shortcal || aniflag) {
 403                 /* Call ANI routine if necessary */
 404                 if (aniflag)
 405                         ath9k_hw_ani_monitor(ah, ah->curchan);
 406
 407                 /* Perform calibration if necessary */
 408                 if (longcal || shortcal) {
 409                         common->ani.caldone =
 410                                 ath9k_hw_calibrate(ah,
 411                                                    ah->curchan,
 412                                                    common->rx_chainmask,
 413                                                    longcal);
 414
 415                         if (longcal)
 416                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 417                                                                      ah->curchan);
 418
 419                         ath_print(common, ATH_DBG_ANI,
 420                                   " calibrate chan %u/%x nf: %d\n",
 421                                   ah->curchan->channel,
 422                                   ah->curchan->channelFlags,
 423                                   common->ani.noise_floor);
 424                 }
 425         }
 426
 427         ath9k_ps_restore(sc);
 428
 429 set_timer:
 430         /*
 431         * Set timer interval based on previous results.
 432         * The interval must be the shortest necessary to satisfy ANI,
 433         * short calibration and long calibration.
 434         */
 435         cal_interval = ATH_LONG_CALINTERVAL;
 436         if (sc->sc_ah->config.enable_ani)
 437                 cal_interval = min(cal_interval,
 438                                    (u32)ah->config.ani_poll_interval);
 439         if (!common->ani.caldone)
 440                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 441
 442         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 443         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
 444             !(sc->sc_flags & SC_OP_SCANNING)) {
 445                 if (!sc->sc_ah->curchan->paprd_done)
 446                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 447                 else
 448                         ath_paprd_activate(sc);
 449         }
 450 }
 451
 452 static void ath_start_ani(struct ath_common *common)
 453 {
 454         struct ath_hw *ah = common->ah;
 455         unsigned long timestamp = jiffies_to_msecs(jiffies);
 456         struct ath_softc *sc = (struct ath_softc *) common->priv;
 457
 458         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 459                 return;
 460
 461         common->ani.longcal_timer = timestamp;
 462         common->ani.shortcal_timer = timestamp;
 463         common->ani.checkani_timer = timestamp;
 464
 465         mod_timer(&common->ani.timer,
 466                   jiffies +
 467                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 468 }
 469
 470 /*
 471  * Update tx/rx chainmask. For legacy association,
 472  * hard code chainmask to 1x1, for 11n association, use
 473  * the chainmask configuration, for bt coexistence, use
 474  * the chainmask configuration even in legacy mode.
 475  */
 476 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 477 {
 478         struct ath_hw *ah = sc->sc_ah;
 479         struct ath_common *common = ath9k_hw_common(ah);
 480
 481         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 482             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 483                 common->tx_chainmask = ah->caps.tx_chainmask;
 484                 common->rx_chainmask = ah->caps.rx_chainmask;
 485         } else {
 486                 common->tx_chainmask = 1;
 487                 common->rx_chainmask = 1;
 488         }
 489
 490         ath_print(common, ATH_DBG_CONFIG,
 491                   "tx chmask: %d, rx chmask: %d\n",
 492                   common->tx_chainmask,
 493                   common->rx_chainmask);
 494 }
 495
 496 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 497 {
 498         struct ath_node *an;
 499
 500         an = (struct ath_node *)sta->drv_priv;
 501
 502         if (sc->sc_flags & SC_OP_TXAGGR) {
 503                 ath_tx_node_init(sc, an);
 504                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 505                                      sta->ht_cap.ampdu_factor);
 506                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 507                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 508         }
 509 }
 510
 511 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 512 {
 513         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 514
 515         if (sc->sc_flags & SC_OP_TXAGGR)
 516                 ath_tx_node_cleanup(sc, an);
 517 }
 518
 519 void ath_hw_check(struct work_struct *work)
 520 {
 521         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 522         int i;
 523
 524         ath9k_ps_wakeup(sc);
 525
 526         for (i = 0; i < 3; i++) {
 527                 if (ath9k_hw_check_alive(sc->sc_ah))
 528                         goto out;
 529
 530                 msleep(1);
 531         }
 532         ath_reset(sc, false);
 533
 534 out:
 535         ath9k_ps_restore(sc);
 536 }
 537
 538 void ath9k_tasklet(unsigned long data)
 539 {
 540         struct ath_softc *sc = (struct ath_softc *)data;
 541         struct ath_hw *ah = sc->sc_ah;
 542         struct ath_common *common = ath9k_hw_common(ah);
 543
 544         u32 status = sc->intrstatus;
 545         u32 rxmask;
 546
 547         ath9k_ps_wakeup(sc);
 548
 549         if (status & ATH9K_INT_FATAL) {
 550                 ath_reset(sc, false);
 551                 ath9k_ps_restore(sc);
 552                 return;
 553         }
 554
 555         if (!ath9k_hw_check_alive(ah))
 556                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 557
 558         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 559                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 560                           ATH9K_INT_RXORN);
 561         else
 562                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 563
 564         if (status & rxmask) {
 565                 spin_lock_bh(&sc->rx.rxflushlock);
 566
 567                 /* Check for high priority Rx first */
 568                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 569                     (status & ATH9K_INT_RXHP))
 570                         ath_rx_tasklet(sc, 0, true);
 571
 572                 ath_rx_tasklet(sc, 0, false);
 573                 spin_unlock_bh(&sc->rx.rxflushlock);
 574         }
 575
 576         if (status & ATH9K_INT_TX) {
 577                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 578                         ath_tx_edma_tasklet(sc);
 579                 else
 580                         ath_tx_tasklet(sc);
 581         }
 582
 583         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 584                 /*
 585                  * TSF sync does not look correct; remain awake to sync with
 586                  * the next Beacon.
 587                  */
 588                 ath_print(common, ATH_DBG_PS,
 589                           "TSFOOR - Sync with next Beacon\n");
 590                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 591         }
 592
 593         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 594                 if (status & ATH9K_INT_GENTIMER)
 595                         ath_gen_timer_isr(sc->sc_ah);
 596
 597         /* re-enable hardware interrupt */
 598         ath9k_hw_set_interrupts(ah, ah->imask);
 599         ath9k_ps_restore(sc);
 600 }
 601
 602 irqreturn_t ath_isr(int irq, void *dev)
 603 {
 604 #define SCHED_INTR (                            \
 605                 ATH9K_INT_FATAL |               \
 606                 ATH9K_INT_RXORN |               \
 607                 ATH9K_INT_RXEOL |               \
 608                 ATH9K_INT_RX |                  \
 609                 ATH9K_INT_RXLP |                \
 610                 ATH9K_INT_RXHP |                \
 611                 ATH9K_INT_TX |                  \
 612                 ATH9K_INT_BMISS |               \
 613                 ATH9K_INT_CST |                 \
 614                 ATH9K_INT_TSFOOR |              \
 615                 ATH9K_INT_GENTIMER)
 616
 617         struct ath_softc *sc = dev;
 618         struct ath_hw *ah = sc->sc_ah;
 619         enum ath9k_int status;
 620         bool sched = false;
 621
 622         /*
 623          * The hardware is not ready/present, don't
 624          * touch anything. Note this can happen early
 625          * on if the IRQ is shared.
 626          */
 627         if (sc->sc_flags & SC_OP_INVALID)
 628                 return IRQ_NONE;
 629
 630
 631         /* shared irq, not for us */
 632
 633         if (!ath9k_hw_intrpend(ah))
 634                 return IRQ_NONE;
 635
 636         /*
 637          * Figure out the reason(s) for the interrupt.  Note
 638          * that the hal returns a pseudo-ISR that may include
 639          * bits we haven't explicitly enabled so we mask the
 640          * value to insure we only process bits we requested.
 641          */
 642         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 643         status &= ah->imask;    /* discard unasked-for bits */
 644
 645         /*
 646          * If there are no status bits set, then this interrupt was not
 647          * for me (should have been caught above).
 648          */
 649         if (!status)
 650                 return IRQ_NONE;
 651
 652         /* Cache the status */
 653         sc->intrstatus = status;
 654
 655         if (status & SCHED_INTR)
 656                 sched = true;
 657
 658         /*
 659          * If a FATAL or RXORN interrupt is received, we have to reset the
 660          * chip immediately.
 661          */
 662         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 663             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 664                 goto chip_reset;
 665
 666         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 667             (status & ATH9K_INT_BB_WATCHDOG)) {
 668                 ar9003_hw_bb_watchdog_dbg_info(ah);
 669                 goto chip_reset;
 670         }
 671
 672         if (status & ATH9K_INT_SWBA)
 673                 tasklet_schedule(&sc->bcon_tasklet);
 674
 675         if (status & ATH9K_INT_TXURN)
 676                 ath9k_hw_updatetxtriglevel(ah, true);
 677
 678         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 679                 if (status & ATH9K_INT_RXEOL) {
 680                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 681                         ath9k_hw_set_interrupts(ah, ah->imask);
 682                 }
 683         }
 684
 685         if (status & ATH9K_INT_MIB) {
 686                 /*
 687                  * Disable interrupts until we service the MIB
 688                  * interrupt; otherwise it will continue to
 689                  * fire.
 690                  */
 691                 ath9k_hw_set_interrupts(ah, 0);
 692                 /*
 693                  * Let the hal handle the event. We assume
 694                  * it will clear whatever condition caused
 695                  * the interrupt.
 696                  */
 697                 ath9k_hw_procmibevent(ah);
 698                 ath9k_hw_set_interrupts(ah, ah->imask);
 699         }
 700
 701         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 702                 if (status & ATH9K_INT_TIM_TIMER) {
 703                         /* Clear RxAbort bit so that we can
 704                          * receive frames */
 705                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 706                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 707                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 708                 }
 709
 710 chip_reset:
 711
 712         ath_debug_stat_interrupt(sc, status);
 713
 714         if (sched) {
 715                 /* turn off every interrupt except SWBA */
 716                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 717                 tasklet_schedule(&sc->intr_tq);
 718         }
 719
 720         return IRQ_HANDLED;
 721
 722 #undef SCHED_INTR
 723 }
 724
 725 static u32 ath_get_extchanmode(struct ath_softc *sc,
 726                                struct ieee80211_channel *chan,
 727                                enum nl80211_channel_type channel_type)
 728 {
 729         u32 chanmode = 0;
 730
 731         switch (chan->band) {
 732         case IEEE80211_BAND_2GHZ:
 733                 switch(channel_type) {
 734                 case NL80211_CHAN_NO_HT:
 735                 case NL80211_CHAN_HT20:
 736                         chanmode = CHANNEL_G_HT20;
 737                         break;
 738                 case NL80211_CHAN_HT40PLUS:
 739                         chanmode = CHANNEL_G_HT40PLUS;
 740                         break;
 741                 case NL80211_CHAN_HT40MINUS:
 742                         chanmode = CHANNEL_G_HT40MINUS;
 743                         break;
 744                 }
 745                 break;
 746         case IEEE80211_BAND_5GHZ:
 747                 switch(channel_type) {
 748                 case NL80211_CHAN_NO_HT:
 749                 case NL80211_CHAN_HT20:
 750                         chanmode = CHANNEL_A_HT20;
 751                         break;
 752                 case NL80211_CHAN_HT40PLUS:
 753                         chanmode = CHANNEL_A_HT40PLUS;
 754                         break;
 755                 case NL80211_CHAN_HT40MINUS:
 756                         chanmode = CHANNEL_A_HT40MINUS;
 757                         break;
 758                 }
 759                 break;
 760         default:
 761                 break;
 762         }
 763
 764         return chanmode;
 765 }
 766
 767 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 768                                  struct ieee80211_vif *vif,
 769                                  struct ieee80211_bss_conf *bss_conf)
 770 {
 771         struct ath_hw *ah = sc->sc_ah;
 772         struct ath_common *common = ath9k_hw_common(ah);
 773
 774         if (bss_conf->assoc) {
 775                 ath_print(common, ATH_DBG_CONFIG,
 776                           "Bss Info ASSOC %d, bssid: %pM\n",
 777                            bss_conf->aid, common->curbssid);
 778
 779                 /* New association, store aid */
 780                 common->curaid = bss_conf->aid;
 781                 ath9k_hw_write_associd(ah);
 782
 783                 /*
 784                  * Request a re-configuration of Beacon related timers
 785                  * on the receipt of the first Beacon frame (i.e.,
 786                  * after time sync with the AP).
 787                  */
 788                 sc->ps_flags |= PS_BEACON_SYNC;
 789
 790                 /* Configure the beacon */
 791                 ath_beacon_config(sc, vif);
 792
 793                 /* Reset rssi stats */
 794                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 795
 796                 sc->sc_flags |= SC_OP_ANI_RUN;
 797                 ath_start_ani(common);
 798         } else {
 799                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 800                 common->curaid = 0;
 801                 /* Stop ANI */
 802                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 803                 del_timer_sync(&common->ani.timer);
 804         }
 805 }
 806
 807 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 808 {
 809         struct ath_hw *ah = sc->sc_ah;
 810         struct ath_common *common = ath9k_hw_common(ah);
 811         struct ieee80211_channel *channel = hw->conf.channel;
 812         int r;
 813
 814         ath9k_ps_wakeup(sc);
 815         ath9k_hw_configpcipowersave(ah, 0, 0);
 816
 817         if (!ah->curchan)
 818                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 819
 820         spin_lock_bh(&sc->sc_resetlock);
 821         r = ath9k_hw_reset(ah, ah->curchan, false);
 822         if (r) {
 823                 ath_print(common, ATH_DBG_FATAL,
 824                           "Unable to reset channel (%u MHz), "
 825                           "reset status %d\n",
 826                           channel->center_freq, r);
 827         }
 828         spin_unlock_bh(&sc->sc_resetlock);
 829
 830         ath_update_txpow(sc);
 831         if (ath_startrecv(sc) != 0) {
 832                 ath_print(common, ATH_DBG_FATAL,
 833                           "Unable to restart recv logic\n");
 834                 return;
 835         }
 836
 837         if (sc->sc_flags & SC_OP_BEACONS)
 838                 ath_beacon_config(sc, NULL);    /* restart beacons */
 839
 840         /* Re-Enable  interrupts */
 841         ath9k_hw_set_interrupts(ah, ah->imask);
 842
 843         /* Enable LED */
 844         ath9k_hw_cfg_output(ah, ah->led_pin,
 845                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 846         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 847
 848         ieee80211_wake_queues(hw);
 849         ath9k_ps_restore(sc);
 850 }
 851
 852 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 853 {
 854         struct ath_hw *ah = sc->sc_ah;
 855         struct ieee80211_channel *channel = hw->conf.channel;
 856         int r;
 857
 858         ath9k_ps_wakeup(sc);
 859         ieee80211_stop_queues(hw);
 860
 861         /*
 862          * Keep the LED on when the radio is disabled
 863          * during idle unassociated state.
 864          */
 865         if (!sc->ps_idle) {
 866                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 867                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 868         }
 869
 870         /* Disable interrupts */
 871         ath9k_hw_set_interrupts(ah, 0);
 872
 873         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 874         ath_stoprecv(sc);               /* turn off frame recv */
 875         ath_flushrecv(sc);              /* flush recv queue */
 876
 877         if (!ah->curchan)
 878                 ah->curchan = ath_get_curchannel(sc, hw);
 879
 880         spin_lock_bh(&sc->sc_resetlock);
 881         r = ath9k_hw_reset(ah, ah->curchan, false);
 882         if (r) {
 883                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 884                           "Unable to reset channel (%u MHz), "
 885                           "reset status %d\n",
 886                           channel->center_freq, r);
 887         }
 888         spin_unlock_bh(&sc->sc_resetlock);
 889
 890         ath9k_hw_phy_disable(ah);
 891         ath9k_hw_configpcipowersave(ah, 1, 1);
 892         ath9k_ps_restore(sc);
 893         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 894 }
 895
 896 int ath_reset(struct ath_softc *sc, bool retry_tx)
 897 {
 898         struct ath_hw *ah = sc->sc_ah;
 899         struct ath_common *common = ath9k_hw_common(ah);
 900         struct ieee80211_hw *hw = sc->hw;
 901         int r;
 902
 903         /* Stop ANI */
 904         del_timer_sync(&common->ani.timer);
 905
 906         ieee80211_stop_queues(hw);
 907
 908         ath9k_hw_set_interrupts(ah, 0);
 909         ath_drain_all_txq(sc, retry_tx);
 910         ath_stoprecv(sc);
 911         ath_flushrecv(sc);
 912
 913         spin_lock_bh(&sc->sc_resetlock);
 914         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 915         if (r)
 916                 ath_print(common, ATH_DBG_FATAL,
 917                           "Unable to reset hardware; reset status %d\n", r);
 918         spin_unlock_bh(&sc->sc_resetlock);
 919
 920         if (ath_startrecv(sc) != 0)
 921                 ath_print(common, ATH_DBG_FATAL,
 922                           "Unable to start recv logic\n");
 923
 924         /*
 925          * We may be doing a reset in response to a request
 926          * that changes the channel so update any state that
 927          * might change as a result.
 928          */
 929         ath_cache_conf_rate(sc, &hw->conf);
 930
 931         ath_update_txpow(sc);
 932
 933         if (sc->sc_flags & SC_OP_BEACONS)
 934                 ath_beacon_config(sc, NULL);    /* restart beacons */
 935
 936         ath9k_hw_set_interrupts(ah, ah->imask);
 937
 938         if (retry_tx) {
 939                 int i;
 940                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 941                         if (ATH_TXQ_SETUP(sc, i)) {
 942                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 943                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 944                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 945                         }
 946                 }
 947         }
 948
 949         ieee80211_wake_queues(hw);
 950
 951         /* Start ANI */
 952         ath_start_ani(common);
 953
 954         return r;
 955 }
 956
 957 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 958 {
 959         int qnum;
 960
 961         switch (queue) {
 962         case 0:
 963                 qnum = sc->tx.hwq_map[WME_AC_VO];
 964                 break;
 965         case 1:
 966                 qnum = sc->tx.hwq_map[WME_AC_VI];
 967                 break;
 968         case 2:
 969                 qnum = sc->tx.hwq_map[WME_AC_BE];
 970                 break;
 971         case 3:
 972                 qnum = sc->tx.hwq_map[WME_AC_BK];
 973                 break;
 974         default:
 975                 qnum = sc->tx.hwq_map[WME_AC_BE];
 976                 break;
 977         }
 978
 979         return qnum;
 980 }
 981
 982 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 983 {
 984         int qnum;
 985
 986         switch (queue) {
 987         case WME_AC_VO:
 988                 qnum = 0;
 989                 break;
 990         case WME_AC_VI:
 991                 qnum = 1;
 992                 break;
 993         case WME_AC_BE:
 994                 qnum = 2;
 995                 break;
 996         case WME_AC_BK:
 997                 qnum = 3;
 998                 break;
 999         default:
1000                 qnum = -1;
1001                 break;
1002         }
1003
1004         return qnum;
1005 }
1006
1007 /* XXX: Remove me once we don't depend on ath9k_channel for all
1008  * this redundant data */
1009 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1010                            struct ath9k_channel *ichan)
1011 {
1012         struct ieee80211_channel *chan = hw->conf.channel;
1013         struct ieee80211_conf *conf = &hw->conf;
1014
1015         ichan->channel = chan->center_freq;
1016         ichan->chan = chan;
1017
1018         if (chan->band == IEEE80211_BAND_2GHZ) {
1019                 ichan->chanmode = CHANNEL_G;
1020                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1021         } else {
1022                 ichan->chanmode = CHANNEL_A;
1023                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1024         }
1025
1026         if (conf_is_ht(conf))
1027                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1028                                             conf->channel_type);
1029 }
1030
1031 /**********************/
1032 /* mac80211 callbacks */
1033 /**********************/
1034
1035 static int ath9k_start(struct ieee80211_hw *hw)
1036 {
1037         struct ath_wiphy *aphy = hw->priv;
1038         struct ath_softc *sc = aphy->sc;
1039         struct ath_hw *ah = sc->sc_ah;
1040         struct ath_common *common = ath9k_hw_common(ah);
1041         struct ieee80211_channel *curchan = hw->conf.channel;
1042         struct ath9k_channel *init_channel;
1043         int r;
1044
1045         ath_print(common, ATH_DBG_CONFIG,
1046                   "Starting driver with initial channel: %d MHz\n",
1047                   curchan->center_freq);
1048
1049         mutex_lock(&sc->mutex);
1050
1051         if (ath9k_wiphy_started(sc)) {
1052                 if (sc->chan_idx == curchan->hw_value) {
1053                         /*
1054                          * Already on the operational channel, the new wiphy
1055                          * can be marked active.
1056                          */
1057                         aphy->state = ATH_WIPHY_ACTIVE;
1058                         ieee80211_wake_queues(hw);
1059                 } else {
1060                         /*
1061                          * Another wiphy is on another channel, start the new
1062                          * wiphy in paused state.
1063                          */
1064                         aphy->state = ATH_WIPHY_PAUSED;
1065                         ieee80211_stop_queues(hw);
1066                 }
1067                 mutex_unlock(&sc->mutex);
1068                 return 0;
1069         }
1070         aphy->state = ATH_WIPHY_ACTIVE;
1071
1072         /* setup initial channel */
1073
1074         sc->chan_idx = curchan->hw_value;
1075
1076         init_channel = ath_get_curchannel(sc, hw);
1077
1078         /* Reset SERDES registers */
1079         ath9k_hw_configpcipowersave(ah, 0, 0);
1080
1081         /*
1082          * The basic interface to setting the hardware in a good
1083          * state is ``reset''.  On return the hardware is known to
1084          * be powered up and with interrupts disabled.  This must
1085          * be followed by initialization of the appropriate bits
1086          * and then setup of the interrupt mask.
1087          */
1088         spin_lock_bh(&sc->sc_resetlock);
1089         r = ath9k_hw_reset(ah, init_channel, false);
1090         if (r) {
1091                 ath_print(common, ATH_DBG_FATAL,
1092                           "Unable to reset hardware; reset status %d "
1093                           "(freq %u MHz)\n", r,
1094                           curchan->center_freq);
1095                 spin_unlock_bh(&sc->sc_resetlock);
1096                 goto mutex_unlock;
1097         }
1098         spin_unlock_bh(&sc->sc_resetlock);
1099
1100         /*
1101          * This is needed only to setup initial state
1102          * but it's best done after a reset.
1103          */
1104         ath_update_txpow(sc);
1105
1106         /*
1107          * Setup the hardware after reset:
1108          * The receive engine is set going.
1109          * Frame transmit is handled entirely
1110          * in the frame output path; there's nothing to do
1111          * here except setup the interrupt mask.
1112          */
1113         if (ath_startrecv(sc) != 0) {
1114                 ath_print(common, ATH_DBG_FATAL,
1115                           "Unable to start recv logic\n");
1116                 r = -EIO;
1117                 goto mutex_unlock;
1118         }
1119
1120         /* Setup our intr mask. */
1121         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1122                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1123                     ATH9K_INT_GLOBAL;
1124
1125         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1126                 ah->imask |= ATH9K_INT_RXHP |
1127                              ATH9K_INT_RXLP |
1128                              ATH9K_INT_BB_WATCHDOG;
1129         else
1130                 ah->imask |= ATH9K_INT_RX;
1131
1132         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1133                 ah->imask |= ATH9K_INT_GTT;
1134
1135         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1136                 ah->imask |= ATH9K_INT_CST;
1137
1138         ath_cache_conf_rate(sc, &hw->conf);
1139
1140         sc->sc_flags &= ~SC_OP_INVALID;
1141
1142         /* Disable BMISS interrupt when we're not associated */
1143         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1144         ath9k_hw_set_interrupts(ah, ah->imask);
1145
1146         ieee80211_wake_queues(hw);
1147
1148         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1149
1150         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1151             !ah->btcoex_hw.enabled) {
1152                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1153                                            AR_STOMP_LOW_WLAN_WGHT);
1154                 ath9k_hw_btcoex_enable(ah);
1155
1156                 if (common->bus_ops->bt_coex_prep)
1157                         common->bus_ops->bt_coex_prep(common);
1158                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1159                         ath9k_btcoex_timer_resume(sc);
1160         }
1161
1162 mutex_unlock:
1163         mutex_unlock(&sc->mutex);
1164
1165         return r;
1166 }
1167
1168 static int ath9k_tx(struct ieee80211_hw *hw,
1169                     struct sk_buff *skb)
1170 {
1171         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1172         struct ath_wiphy *aphy = hw->priv;
1173         struct ath_softc *sc = aphy->sc;
1174         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1175         struct ath_tx_control txctl;
1176         int padpos, padsize;
1177         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1178         int qnum;
1179
1180         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1181                 ath_print(common, ATH_DBG_XMIT,
1182                           "ath9k: %s: TX in unexpected wiphy state "
1183                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1184                 goto exit;
1185         }
1186
1187         if (sc->ps_enabled) {
1188                 /*
1189                  * mac80211 does not set PM field for normal data frames, so we
1190                  * need to update that based on the current PS mode.
1191                  */
1192                 if (ieee80211_is_data(hdr->frame_control) &&
1193                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1194                     !ieee80211_has_pm(hdr->frame_control)) {
1195                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1196                                   "while in PS mode\n");
1197                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1198                 }
1199         }
1200
1201         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1202                 /*
1203                  * We are using PS-Poll and mac80211 can request TX while in
1204                  * power save mode. Need to wake up hardware for the TX to be
1205                  * completed and if needed, also for RX of buffered frames.
1206                  */
1207                 ath9k_ps_wakeup(sc);
1208                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1209                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1210                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1211                         ath_print(common, ATH_DBG_PS,
1212                                   "Sending PS-Poll to pick a buffered frame\n");
1213                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1214                 } else {
1215                         ath_print(common, ATH_DBG_PS,
1216                                   "Wake up to complete TX\n");
1217                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1218                 }
1219                 /*
1220                  * The actual restore operation will happen only after
1221                  * the sc_flags bit is cleared. We are just dropping
1222                  * the ps_usecount here.
1223                  */
1224                 ath9k_ps_restore(sc);
1225         }
1226
1227         memset(&txctl, 0, sizeof(struct ath_tx_control));
1228
1229         /*
1230          * As a temporary workaround, assign seq# here; this will likely need
1231          * to be cleaned up to work better with Beacon transmission and virtual
1232          * BSSes.
1233          */
1234         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1235                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1236                         sc->tx.seq_no += 0x10;
1237                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1238                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1239         }
1240
1241         /* Add the padding after the header if this is not already done */
1242         padpos = ath9k_cmn_padpos(hdr->frame_control);
1243         padsize = padpos & 3;
1244         if (padsize && skb->len>padpos) {
1245                 if (skb_headroom(skb) < padsize)
1246                         return -1;
1247                 skb_push(skb, padsize);
1248                 memmove(skb->data, skb->data + padsize, padpos);
1249         }
1250
1251         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1252         txctl.txq = &sc->tx.txq[qnum];
1253
1254         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1255
1256         if (ath_tx_start(hw, skb, &txctl) != 0) {
1257                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1258                 goto exit;
1259         }
1260
1261         return 0;
1262 exit:
1263         dev_kfree_skb_any(skb);
1264         return 0;
1265 }
1266
1267 static void ath9k_stop(struct ieee80211_hw *hw)
1268 {
1269         struct ath_wiphy *aphy = hw->priv;
1270         struct ath_softc *sc = aphy->sc;
1271         struct ath_hw *ah = sc->sc_ah;
1272         struct ath_common *common = ath9k_hw_common(ah);
1273         int i;
1274
1275         mutex_lock(&sc->mutex);
1276
1277         aphy->state = ATH_WIPHY_INACTIVE;
1278
1279         if (led_blink)
1280                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1281
1282         cancel_delayed_work_sync(&sc->tx_complete_work);
1283         cancel_work_sync(&sc->paprd_work);
1284         cancel_work_sync(&sc->hw_check_work);
1285
1286         for (i = 0; i < sc->num_sec_wiphy; i++) {
1287                 if (sc->sec_wiphy[i])
1288                         break;
1289         }
1290
1291         if (i == sc->num_sec_wiphy) {
1292                 cancel_delayed_work_sync(&sc->wiphy_work);
1293                 cancel_work_sync(&sc->chan_work);
1294         }
1295
1296         if (sc->sc_flags & SC_OP_INVALID) {
1297                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1298                 mutex_unlock(&sc->mutex);
1299                 return;
1300         }
1301
1302         if (ath9k_wiphy_started(sc)) {
1303                 mutex_unlock(&sc->mutex);
1304                 return; /* another wiphy still in use */
1305         }
1306
1307         /* Ensure HW is awake when we try to shut it down. */
1308         ath9k_ps_wakeup(sc);
1309
1310         if (ah->btcoex_hw.enabled) {
1311                 ath9k_hw_btcoex_disable(ah);
1312                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1313                         ath9k_btcoex_timer_pause(sc);
1314         }
1315
1316         /* make sure h/w will not generate any interrupt
1317          * before setting the invalid flag. */
1318         ath9k_hw_set_interrupts(ah, 0);
1319
1320         if (!(sc->sc_flags & SC_OP_INVALID)) {
1321                 ath_drain_all_txq(sc, false);
1322                 ath_stoprecv(sc);
1323                 ath9k_hw_phy_disable(ah);
1324         } else
1325                 sc->rx.rxlink = NULL;
1326
1327         /* disable HAL and put h/w to sleep */
1328         ath9k_hw_disable(ah);
1329         ath9k_hw_configpcipowersave(ah, 1, 1);
1330         ath9k_ps_restore(sc);
1331
1332         /* Finally, put the chip in FULL SLEEP mode */
1333         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1334
1335         sc->sc_flags |= SC_OP_INVALID;
1336
1337         mutex_unlock(&sc->mutex);
1338
1339         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1340 }
1341
1342 static int ath9k_add_interface(struct ieee80211_hw *hw,
1343                                struct ieee80211_vif *vif)
1344 {
1345         struct ath_wiphy *aphy = hw->priv;
1346         struct ath_softc *sc = aphy->sc;
1347         struct ath_hw *ah = sc->sc_ah;
1348         struct ath_common *common = ath9k_hw_common(ah);
1349         struct ath_vif *avp = (void *)vif->drv_priv;
1350         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1351         int ret = 0;
1352
1353         mutex_lock(&sc->mutex);
1354
1355         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1356             sc->nvifs > 0) {
1357                 ret = -ENOBUFS;
1358                 goto out;
1359         }
1360
1361         switch (vif->type) {
1362         case NL80211_IFTYPE_STATION:
1363                 ic_opmode = NL80211_IFTYPE_STATION;
1364                 break;
1365         case NL80211_IFTYPE_ADHOC:
1366         case NL80211_IFTYPE_AP:
1367         case NL80211_IFTYPE_MESH_POINT:
1368                 if (sc->nbcnvifs >= ATH_BCBUF) {
1369                         ret = -ENOBUFS;
1370                         goto out;
1371                 }
1372                 ic_opmode = vif->type;
1373                 break;
1374         default:
1375                 ath_print(common, ATH_DBG_FATAL,
1376                         "Interface type %d not yet supported\n", vif->type);
1377                 ret = -EOPNOTSUPP;
1378                 goto out;
1379         }
1380
1381         ath_print(common, ATH_DBG_CONFIG,
1382                   "Attach a VIF of type: %d\n", ic_opmode);
1383
1384         /* Set the VIF opmode */
1385         avp->av_opmode = ic_opmode;
1386         avp->av_bslot = -1;
1387
1388         sc->nvifs++;
1389
1390         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1391                 ath9k_set_bssid_mask(hw);
1392
1393         if (sc->nvifs > 1)
1394                 goto out; /* skip global settings for secondary vif */
1395
1396         if (ic_opmode == NL80211_IFTYPE_AP) {
1397                 ath9k_hw_set_tsfadjust(ah, 1);
1398                 sc->sc_flags |= SC_OP_TSF_RESET;
1399         }
1400
1401         /* Set the device opmode */
1402         ah->opmode = ic_opmode;
1403
1404         /*
1405          * Enable MIB interrupts when there are hardware phy counters.
1406          * Note we only do this (at the moment) for station mode.
1407          */
1408         if ((vif->type == NL80211_IFTYPE_STATION) ||
1409             (vif->type == NL80211_IFTYPE_ADHOC) ||
1410             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1411                 if (ah->config.enable_ani)
1412                         ah->imask |= ATH9K_INT_MIB;
1413                 ah->imask |= ATH9K_INT_TSFOOR;
1414         }
1415
1416         ath9k_hw_set_interrupts(ah, ah->imask);
1417
1418         if (vif->type == NL80211_IFTYPE_AP    ||
1419             vif->type == NL80211_IFTYPE_ADHOC ||
1420             vif->type == NL80211_IFTYPE_MONITOR) {
1421                 sc->sc_flags |= SC_OP_ANI_RUN;
1422                 ath_start_ani(common);
1423         }
1424
1425 out:
1426         mutex_unlock(&sc->mutex);
1427         return ret;
1428 }
1429
1430 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1431                                    struct ieee80211_vif *vif)
1432 {
1433         struct ath_wiphy *aphy = hw->priv;
1434         struct ath_softc *sc = aphy->sc;
1435         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1436         struct ath_vif *avp = (void *)vif->drv_priv;
1437         int i;
1438
1439         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1440
1441         mutex_lock(&sc->mutex);
1442
1443         /* Stop ANI */
1444         sc->sc_flags &= ~SC_OP_ANI_RUN;
1445         del_timer_sync(&common->ani.timer);
1446
1447         /* Reclaim beacon resources */
1448         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1449             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1450             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1451                 ath9k_ps_wakeup(sc);
1452                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1453                 ath9k_ps_restore(sc);
1454         }
1455
1456         ath_beacon_return(sc, avp);
1457         sc->sc_flags &= ~SC_OP_BEACONS;
1458
1459         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1460                 if (sc->beacon.bslot[i] == vif) {
1461                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1462                                "slot\n", __func__);
1463                         sc->beacon.bslot[i] = NULL;
1464                         sc->beacon.bslot_aphy[i] = NULL;
1465                 }
1466         }
1467
1468         sc->nvifs--;
1469
1470         mutex_unlock(&sc->mutex);
1471 }
1472
1473 void ath9k_enable_ps(struct ath_softc *sc)
1474 {
1475         struct ath_hw *ah = sc->sc_ah;
1476
1477         sc->ps_enabled = true;
1478         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1479                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1480                         ah->imask |= ATH9K_INT_TIM_TIMER;
1481                         ath9k_hw_set_interrupts(ah, ah->imask);
1482                 }
1483                 ath9k_hw_setrxabort(ah, 1);
1484         }
1485 }
1486
1487 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1488 {
1489         struct ath_wiphy *aphy = hw->priv;
1490         struct ath_softc *sc = aphy->sc;
1491         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1492         struct ieee80211_conf *conf = &hw->conf;
1493         struct ath_hw *ah = sc->sc_ah;
1494         bool disable_radio;
1495
1496         mutex_lock(&sc->mutex);
1497
1498         /*
1499          * Leave this as the first check because we need to turn on the
1500          * radio if it was disabled before prior to processing the rest
1501          * of the changes. Likewise we must only disable the radio towards
1502          * the end.
1503          */
1504         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1505                 bool enable_radio;
1506                 bool all_wiphys_idle;
1507                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1508
1509                 spin_lock_bh(&sc->wiphy_lock);
1510                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1511                 ath9k_set_wiphy_idle(aphy, idle);
1512
1513                 enable_radio = (!idle && all_wiphys_idle);
1514
1515                 /*
1516                  * After we unlock here its possible another wiphy
1517                  * can be re-renabled so to account for that we will
1518                  * only disable the radio toward the end of this routine
1519                  * if by then all wiphys are still idle.
1520                  */
1521                 spin_unlock_bh(&sc->wiphy_lock);
1522
1523                 if (enable_radio) {
1524                         sc->ps_idle = false;
1525                         ath_radio_enable(sc, hw);
1526                         ath_print(common, ATH_DBG_CONFIG,
1527                                   "not-idle: enabling radio\n");
1528                 }
1529         }
1530
1531         /*
1532          * We just prepare to enable PS. We have to wait until our AP has
1533          * ACK'd our null data frame to disable RX otherwise we'll ignore
1534          * those ACKs and end up retransmitting the same null data frames.
1535          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1536          */
1537         if (changed & IEEE80211_CONF_CHANGE_PS) {
1538                 if (conf->flags & IEEE80211_CONF_PS) {
1539                         sc->ps_flags |= PS_ENABLED;
1540                         /*
1541                          * At this point we know hardware has received an ACK
1542                          * of a previously sent null data frame.
1543                          */
1544                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1545                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1546                                 ath9k_enable_ps(sc);
1547                         }
1548                 } else {
1549                         sc->ps_enabled = false;
1550                         sc->ps_flags &= ~(PS_ENABLED |
1551                                           PS_NULLFUNC_COMPLETED);
1552                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1553                         if (!(ah->caps.hw_caps &
1554                               ATH9K_HW_CAP_AUTOSLEEP)) {
1555                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1556                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1557                                                   PS_WAIT_FOR_CAB |
1558                                                   PS_WAIT_FOR_PSPOLL_DATA |
1559                                                   PS_WAIT_FOR_TX_ACK);
1560                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1561                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1562                                         ath9k_hw_set_interrupts(sc->sc_ah,
1563                                                         ah->imask);
1564                                 }
1565                         }
1566                 }
1567         }
1568
1569         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1570                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1571                         ath_print(common, ATH_DBG_CONFIG,
1572                                   "HW opmode set to Monitor mode\n");
1573                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1574                 }
1575         }
1576
1577         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1578                 struct ieee80211_channel *curchan = hw->conf.channel;
1579                 int pos = curchan->hw_value;
1580
1581                 aphy->chan_idx = pos;
1582                 aphy->chan_is_ht = conf_is_ht(conf);
1583
1584                 if (aphy->state == ATH_WIPHY_SCAN ||
1585                     aphy->state == ATH_WIPHY_ACTIVE)
1586                         ath9k_wiphy_pause_all_forced(sc, aphy);
1587                 else {
1588                         /*
1589                          * Do not change operational channel based on a paused
1590                          * wiphy changes.
1591                          */
1592                         goto skip_chan_change;
1593                 }
1594
1595                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1596                           curchan->center_freq);
1597
1598                 /* XXX: remove me eventualy */
1599                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1600
1601                 ath_update_chainmask(sc, conf_is_ht(conf));
1602
1603                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1604                         ath_print(common, ATH_DBG_FATAL,
1605                                   "Unable to set channel\n");
1606                         mutex_unlock(&sc->mutex);
1607                         return -EINVAL;
1608                 }
1609         }
1610
1611 skip_chan_change:
1612         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1613                 sc->config.txpowlimit = 2 * conf->power_level;
1614                 ath_update_txpow(sc);
1615         }
1616
1617         spin_lock_bh(&sc->wiphy_lock);
1618         disable_radio = ath9k_all_wiphys_idle(sc);
1619         spin_unlock_bh(&sc->wiphy_lock);
1620
1621         if (disable_radio) {
1622                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1623                 sc->ps_idle = true;
1624                 ath_radio_disable(sc, hw);
1625         }
1626
1627         mutex_unlock(&sc->mutex);
1628
1629         return 0;
1630 }
1631
1632 #define SUPPORTED_FILTERS                       \
1633         (FIF_PROMISC_IN_BSS |                   \
1634         FIF_ALLMULTI |                          \
1635         FIF_CONTROL |                           \
1636         FIF_PSPOLL |                            \
1637         FIF_OTHER_BSS |                         \
1638         FIF_BCN_PRBRESP_PROMISC |               \
1639         FIF_FCSFAIL)
1640
1641 /* FIXME: sc->sc_full_reset ? */
1642 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1643                                    unsigned int changed_flags,
1644                                    unsigned int *total_flags,
1645                                    u64 multicast)
1646 {
1647         struct ath_wiphy *aphy = hw->priv;
1648         struct ath_softc *sc = aphy->sc;
1649         u32 rfilt;
1650
1651         changed_flags &= SUPPORTED_FILTERS;
1652         *total_flags &= SUPPORTED_FILTERS;
1653
1654         sc->rx.rxfilter = *total_flags;
1655         ath9k_ps_wakeup(sc);
1656         rfilt = ath_calcrxfilter(sc);
1657         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1658         ath9k_ps_restore(sc);
1659
1660         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1661                   "Set HW RX filter: 0x%x\n", rfilt);
1662 }
1663
1664 static int ath9k_sta_add(struct ieee80211_hw *hw,
1665                          struct ieee80211_vif *vif,
1666                          struct ieee80211_sta *sta)
1667 {
1668         struct ath_wiphy *aphy = hw->priv;
1669         struct ath_softc *sc = aphy->sc;
1670
1671         ath_node_attach(sc, sta);
1672
1673         return 0;
1674 }
1675
1676 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1677                             struct ieee80211_vif *vif,
1678                             struct ieee80211_sta *sta)
1679 {
1680         struct ath_wiphy *aphy = hw->priv;
1681         struct ath_softc *sc = aphy->sc;
1682
1683         ath_node_detach(sc, sta);
1684
1685         return 0;
1686 }
1687
1688 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1689                          const struct ieee80211_tx_queue_params *params)
1690 {
1691         struct ath_wiphy *aphy = hw->priv;
1692         struct ath_softc *sc = aphy->sc;
1693         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1694         struct ath9k_tx_queue_info qi;
1695         int ret = 0, qnum;
1696
1697         if (queue >= WME_NUM_AC)
1698                 return 0;
1699
1700         mutex_lock(&sc->mutex);
1701
1702         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1703
1704         qi.tqi_aifs = params->aifs;
1705         qi.tqi_cwmin = params->cw_min;
1706         qi.tqi_cwmax = params->cw_max;
1707         qi.tqi_burstTime = params->txop;
1708         qnum = ath_get_hal_qnum(queue, sc);
1709
1710         ath_print(common, ATH_DBG_CONFIG,
1711                   "Configure tx [queue/halq] [%d/%d],  "
1712                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1713                   queue, qnum, params->aifs, params->cw_min,
1714                   params->cw_max, params->txop);
1715
1716         ret = ath_txq_update(sc, qnum, &qi);
1717         if (ret)
1718                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1719
1720         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1721                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1722                         ath_beaconq_config(sc);
1723
1724         mutex_unlock(&sc->mutex);
1725
1726         return ret;
1727 }
1728
1729 static int ath9k_set_key(struct ieee80211_hw *hw,
1730                          enum set_key_cmd cmd,
1731                          struct ieee80211_vif *vif,
1732                          struct ieee80211_sta *sta,
1733                          struct ieee80211_key_conf *key)
1734 {
1735         struct ath_wiphy *aphy = hw->priv;
1736         struct ath_softc *sc = aphy->sc;
1737         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1738         int ret = 0;
1739
1740         if (modparam_nohwcrypt)
1741                 return -ENOSPC;
1742
1743         mutex_lock(&sc->mutex);
1744         ath9k_ps_wakeup(sc);
1745         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1746
1747         switch (cmd) {
1748         case SET_KEY:
1749                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1750                 if (ret >= 0) {
1751                         key->hw_key_idx = ret;
1752                         /* push IV and Michael MIC generation to stack */
1753                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1754                         if (key->alg == ALG_TKIP)
1755                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1756                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1757                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1758                         ret = 0;
1759                 }
1760                 break;
1761         case DISABLE_KEY:
1762                 ath9k_cmn_key_delete(common, key);
1763                 break;
1764         default:
1765                 ret = -EINVAL;
1766         }
1767
1768         ath9k_ps_restore(sc);
1769         mutex_unlock(&sc->mutex);
1770
1771         return ret;
1772 }
1773
1774 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1775                                    struct ieee80211_vif *vif,
1776                                    struct ieee80211_bss_conf *bss_conf,
1777                                    u32 changed)
1778 {
1779         struct ath_wiphy *aphy = hw->priv;
1780         struct ath_softc *sc = aphy->sc;
1781         struct ath_hw *ah = sc->sc_ah;
1782         struct ath_common *common = ath9k_hw_common(ah);
1783         struct ath_vif *avp = (void *)vif->drv_priv;
1784         int slottime;
1785         int error;
1786
1787         mutex_lock(&sc->mutex);
1788
1789         if (changed & BSS_CHANGED_BSSID) {
1790                 /* Set BSSID */
1791                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1792                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1793                 common->curaid = 0;
1794                 ath9k_hw_write_associd(ah);
1795
1796                 /* Set aggregation protection mode parameters */
1797                 sc->config.ath_aggr_prot = 0;
1798
1799                 /* Only legacy IBSS for now */
1800                 if (vif->type == NL80211_IFTYPE_ADHOC)
1801                         ath_update_chainmask(sc, 0);
1802
1803                 ath_print(common, ATH_DBG_CONFIG,
1804                           "BSSID: %pM aid: 0x%x\n",
1805                           common->curbssid, common->curaid);
1806
1807                 /* need to reconfigure the beacon */
1808                 sc->sc_flags &= ~SC_OP_BEACONS ;
1809         }
1810
1811         /* Enable transmission of beacons (AP, IBSS, MESH) */
1812         if ((changed & BSS_CHANGED_BEACON) ||
1813             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1814                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1815                 error = ath_beacon_alloc(aphy, vif);
1816                 if (!error)
1817                         ath_beacon_config(sc, vif);
1818         }
1819
1820         if (changed & BSS_CHANGED_ERP_SLOT) {
1821                 if (bss_conf->use_short_slot)
1822                         slottime = 9;
1823                 else
1824                         slottime = 20;
1825                 if (vif->type == NL80211_IFTYPE_AP) {
1826                         /*
1827                          * Defer update, so that connected stations can adjust
1828                          * their settings at the same time.
1829                          * See beacon.c for more details
1830                          */
1831                         sc->beacon.slottime = slottime;
1832                         sc->beacon.updateslot = UPDATE;
1833                 } else {
1834                         ah->slottime = slottime;
1835                         ath9k_hw_init_global_settings(ah);
1836                 }
1837         }
1838
1839         /* Disable transmission of beacons */
1840         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1841                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1842
1843         if (changed & BSS_CHANGED_BEACON_INT) {
1844                 sc->beacon_interval = bss_conf->beacon_int;
1845                 /*
1846                  * In case of AP mode, the HW TSF has to be reset
1847                  * when the beacon interval changes.
1848                  */
1849                 if (vif->type == NL80211_IFTYPE_AP) {
1850                         sc->sc_flags |= SC_OP_TSF_RESET;
1851                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1852                         error = ath_beacon_alloc(aphy, vif);
1853                         if (!error)
1854                                 ath_beacon_config(sc, vif);
1855                 } else {
1856                         ath_beacon_config(sc, vif);
1857                 }
1858         }
1859
1860         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1861                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1862                           bss_conf->use_short_preamble);
1863                 if (bss_conf->use_short_preamble)
1864                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1865                 else
1866                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1867         }
1868
1869         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1870                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1871                           bss_conf->use_cts_prot);
1872                 if (bss_conf->use_cts_prot &&
1873                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1874                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1875                 else
1876                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1877         }
1878
1879         if (changed & BSS_CHANGED_ASSOC) {
1880                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1881                         bss_conf->assoc);
1882                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1883         }
1884
1885         mutex_unlock(&sc->mutex);
1886 }
1887
1888 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1889 {
1890         u64 tsf;
1891         struct ath_wiphy *aphy = hw->priv;
1892         struct ath_softc *sc = aphy->sc;
1893
1894         mutex_lock(&sc->mutex);
1895         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1896         mutex_unlock(&sc->mutex);
1897
1898         return tsf;
1899 }
1900
1901 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1902 {
1903         struct ath_wiphy *aphy = hw->priv;
1904         struct ath_softc *sc = aphy->sc;
1905
1906         mutex_lock(&sc->mutex);
1907         ath9k_hw_settsf64(sc->sc_ah, tsf);
1908         mutex_unlock(&sc->mutex);
1909 }
1910
1911 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1912 {
1913         struct ath_wiphy *aphy = hw->priv;
1914         struct ath_softc *sc = aphy->sc;
1915
1916         mutex_lock(&sc->mutex);
1917
1918         ath9k_ps_wakeup(sc);
1919         ath9k_hw_reset_tsf(sc->sc_ah);
1920         ath9k_ps_restore(sc);
1921
1922         mutex_unlock(&sc->mutex);
1923 }
1924
1925 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1926                               struct ieee80211_vif *vif,
1927                               enum ieee80211_ampdu_mlme_action action,
1928                               struct ieee80211_sta *sta,
1929                               u16 tid, u16 *ssn)
1930 {
1931         struct ath_wiphy *aphy = hw->priv;
1932         struct ath_softc *sc = aphy->sc;
1933         int ret = 0;
1934
1935         local_bh_disable();
1936
1937         switch (action) {
1938         case IEEE80211_AMPDU_RX_START:
1939                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1940                         ret = -ENOTSUPP;
1941                 break;
1942         case IEEE80211_AMPDU_RX_STOP:
1943                 break;
1944         case IEEE80211_AMPDU_TX_START:
1945                 ath9k_ps_wakeup(sc);
1946                 ath_tx_aggr_start(sc, sta, tid, ssn);
1947                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1948                 ath9k_ps_restore(sc);
1949                 break;
1950         case IEEE80211_AMPDU_TX_STOP:
1951                 ath9k_ps_wakeup(sc);
1952                 ath_tx_aggr_stop(sc, sta, tid);
1953                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1954                 ath9k_ps_restore(sc);
1955                 break;
1956         case IEEE80211_AMPDU_TX_OPERATIONAL:
1957                 ath9k_ps_wakeup(sc);
1958                 ath_tx_aggr_resume(sc, sta, tid);
1959                 ath9k_ps_restore(sc);
1960                 break;
1961         default:
1962                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1963                           "Unknown AMPDU action\n");
1964         }
1965
1966         local_bh_enable();
1967
1968         return ret;
1969 }
1970
1971 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1972                              struct survey_info *survey)
1973 {
1974         struct ath_wiphy *aphy = hw->priv;
1975         struct ath_softc *sc = aphy->sc;
1976         struct ath_hw *ah = sc->sc_ah;
1977         struct ath_common *common = ath9k_hw_common(ah);
1978         struct ieee80211_conf *conf = &hw->conf;
1979
1980          if (idx != 0)
1981                 return -ENOENT;
1982
1983         survey->channel = conf->channel;
1984         survey->filled = SURVEY_INFO_NOISE_DBM;
1985         survey->noise = common->ani.noise_floor;
1986
1987         return 0;
1988 }
1989
1990 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1991 {
1992         struct ath_wiphy *aphy = hw->priv;
1993         struct ath_softc *sc = aphy->sc;
1994         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1995
1996         mutex_lock(&sc->mutex);
1997         if (ath9k_wiphy_scanning(sc)) {
1998                 /*
1999                  * There is a race here in mac80211 but fixing it requires
2000                  * we revisit how we handle the scan complete callback.
2001                  * After mac80211 fixes we will not have configured hardware
2002                  * to the home channel nor would we have configured the RX
2003                  * filter yet.
2004                  */
2005                 mutex_unlock(&sc->mutex);
2006                 return;
2007         }
2008
2009         aphy->state = ATH_WIPHY_SCAN;
2010         ath9k_wiphy_pause_all_forced(sc, aphy);
2011         sc->sc_flags |= SC_OP_SCANNING;
2012         del_timer_sync(&common->ani.timer);
2013         cancel_work_sync(&sc->paprd_work);
2014         cancel_work_sync(&sc->hw_check_work);
2015         cancel_delayed_work_sync(&sc->tx_complete_work);
2016         mutex_unlock(&sc->mutex);
2017 }
2018
2019 /*
2020  * XXX: this requires a revisit after the driver
2021  * scan_complete gets moved to another place/removed in mac80211.
2022  */
2023 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2024 {
2025         struct ath_wiphy *aphy = hw->priv;
2026         struct ath_softc *sc = aphy->sc;
2027         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2028
2029         mutex_lock(&sc->mutex);
2030         aphy->state = ATH_WIPHY_ACTIVE;
2031         sc->sc_flags &= ~SC_OP_SCANNING;
2032         sc->sc_flags |= SC_OP_FULL_RESET;
2033         ath_start_ani(common);
2034         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2035         ath_beacon_config(sc, NULL);
2036         mutex_unlock(&sc->mutex);
2037 }
2038
2039 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2040 {
2041         struct ath_wiphy *aphy = hw->priv;
2042         struct ath_softc *sc = aphy->sc;
2043         struct ath_hw *ah = sc->sc_ah;
2044
2045         mutex_lock(&sc->mutex);
2046         ah->coverage_class = coverage_class;
2047         ath9k_hw_init_global_settings(ah);
2048         mutex_unlock(&sc->mutex);
2049 }
2050
2051 struct ieee80211_ops ath9k_ops = {
2052         .tx                 = ath9k_tx,
2053         .start              = ath9k_start,
2054         .stop               = ath9k_stop,
2055         .add_interface      = ath9k_add_interface,
2056         .remove_interface   = ath9k_remove_interface,
2057         .config             = ath9k_config,
2058         .configure_filter   = ath9k_configure_filter,
2059         .sta_add            = ath9k_sta_add,
2060         .sta_remove         = ath9k_sta_remove,
2061         .conf_tx            = ath9k_conf_tx,
2062         .bss_info_changed   = ath9k_bss_info_changed,
2063         .set_key            = ath9k_set_key,
2064         .get_tsf            = ath9k_get_tsf,
2065         .set_tsf            = ath9k_set_tsf,
2066         .reset_tsf          = ath9k_reset_tsf,
2067         .ampdu_action       = ath9k_ampdu_action,
2068         .get_survey         = ath9k_get_survey,
2069         .sw_scan_start      = ath9k_sw_scan_start,
2070         .sw_scan_complete   = ath9k_sw_scan_complete,
2071         .rfkill_poll        = ath9k_rfkill_poll_state,
2072         .set_coverage_class = ath9k_set_coverage_class,
2073 };