1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
7 #include <linux/module.h>
8 #include <linux/slab.h>
9 #include <linux/remoteproc.h>
10 #include <linux/firmware.h>
19 unsigned int ath11k_debug_mask;
20 EXPORT_SYMBOL(ath11k_debug_mask);
21 module_param_named(debug_mask, ath11k_debug_mask, uint, 0644);
22 MODULE_PARM_DESC(debug_mask, "Debugging mask");
24 static unsigned int ath11k_crypto_mode;
25 module_param_named(crypto_mode, ath11k_crypto_mode, uint, 0644);
26 MODULE_PARM_DESC(crypto_mode, "crypto mode: 0-hardware, 1-software");
28 /* frame mode values are mapped as per enum ath11k_hw_txrx_mode */
29 unsigned int ath11k_frame_mode = ATH11K_HW_TXRX_NATIVE_WIFI;
30 module_param_named(frame_mode, ath11k_frame_mode, uint, 0644);
31 MODULE_PARM_DESC(frame_mode,
32 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
34 static const struct ath11k_hw_params ath11k_hw_params[] = {
36 .hw_rev = ATH11K_HW_IPQ8074,
37 .name = "ipq8074 hw2.0",
39 .dir = "IPQ8074/hw2.0",
40 .board_size = 256 * 1024,
41 .cal_offset = 128 * 1024,
44 .bdf_addr = 0x4B0C0000,
45 .hw_ops = &ipq8074_ops,
46 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
47 .internal_sleep_clock = false,
48 .regs = &ipq8074_regs,
49 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
50 .host_ce_config = ath11k_host_ce_config_ipq8074,
52 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
53 .target_ce_count = 11,
54 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
55 .svc_to_ce_map_len = 21,
59 .single_pdev_only = false,
60 .rxdma1_enable = true,
61 .num_rxmda_per_pdev = 1,
62 .rx_mac_buf_ring = false,
63 .vdev_start_delay = false,
64 .htt_peer_map_v2 = true,
68 /* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes.
69 * so added pad size as 2 bytes to compensate the BIN size
77 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
78 BIT(NL80211_IFTYPE_AP) |
79 BIT(NL80211_IFTYPE_MESH_POINT),
80 .supports_monitor = true,
81 .full_monitor_mode = false,
82 .supports_shadow_regs = false,
84 .supports_sta_ps = false,
85 .cold_boot_calib = true,
89 .supports_suspend = false,
90 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
91 .supports_regdb = false,
94 .max_tx_ring = DP_TCL_NUM_RING_MAX,
95 .hal_params = &ath11k_hw_hal_params_ipq8074,
96 .supports_dynamic_smps_6ghz = false,
97 .alloc_cacheable_memory = true,
99 .supports_rssi_stats = false,
100 .fw_wmi_diag_event = false,
101 .current_cc_support = false,
102 .dbr_debug_support = true,
105 .hw_rev = ATH11K_HW_IPQ6018_HW10,
106 .name = "ipq6018 hw1.0",
108 .dir = "IPQ6018/hw1.0",
109 .board_size = 256 * 1024,
110 .cal_offset = 128 * 1024,
113 .bdf_addr = 0x4ABC0000,
114 .hw_ops = &ipq6018_ops,
115 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
116 .internal_sleep_clock = false,
117 .regs = &ipq8074_regs,
118 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
119 .host_ce_config = ath11k_host_ce_config_ipq8074,
121 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
122 .target_ce_count = 11,
123 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
124 .svc_to_ce_map_len = 19,
127 .rfkill_on_level = 0,
128 .single_pdev_only = false,
129 .rxdma1_enable = true,
130 .num_rxmda_per_pdev = 1,
131 .rx_mac_buf_ring = false,
132 .vdev_start_delay = false,
133 .htt_peer_map_v2 = true,
143 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
144 BIT(NL80211_IFTYPE_AP) |
145 BIT(NL80211_IFTYPE_MESH_POINT),
146 .supports_monitor = true,
147 .full_monitor_mode = false,
148 .supports_shadow_regs = false,
150 .supports_sta_ps = false,
151 .cold_boot_calib = true,
155 .supports_suspend = false,
156 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
157 .supports_regdb = false,
159 .credit_flow = false,
160 .max_tx_ring = DP_TCL_NUM_RING_MAX,
161 .hal_params = &ath11k_hw_hal_params_ipq8074,
162 .supports_dynamic_smps_6ghz = false,
163 .alloc_cacheable_memory = true,
165 .supports_rssi_stats = false,
166 .fw_wmi_diag_event = false,
167 .current_cc_support = false,
168 .dbr_debug_support = true,
171 .name = "qca6390 hw2.0",
172 .hw_rev = ATH11K_HW_QCA6390_HW20,
174 .dir = "QCA6390/hw2.0",
175 .board_size = 256 * 1024,
176 .cal_offset = 128 * 1024,
179 .bdf_addr = 0x4B0C0000,
180 .hw_ops = &qca6390_ops,
181 .ring_mask = &ath11k_hw_ring_mask_qca6390,
182 .internal_sleep_clock = true,
183 .regs = &qca6390_regs,
184 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
185 .host_ce_config = ath11k_host_ce_config_qca6390,
187 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
188 .target_ce_count = 9,
189 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
190 .svc_to_ce_map_len = 14,
193 .rfkill_on_level = 1,
194 .single_pdev_only = true,
195 .rxdma1_enable = false,
196 .num_rxmda_per_pdev = 2,
197 .rx_mac_buf_ring = true,
198 .vdev_start_delay = true,
199 .htt_peer_map_v2 = false,
209 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
210 BIT(NL80211_IFTYPE_AP),
211 .supports_monitor = false,
212 .full_monitor_mode = false,
213 .supports_shadow_regs = true,
215 .supports_sta_ps = true,
216 .cold_boot_calib = false,
220 .supports_suspend = true,
221 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
222 .supports_regdb = false,
225 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
226 .hal_params = &ath11k_hw_hal_params_qca6390,
227 .supports_dynamic_smps_6ghz = false,
228 .alloc_cacheable_memory = false,
230 .supports_rssi_stats = true,
231 .fw_wmi_diag_event = true,
232 .current_cc_support = true,
233 .dbr_debug_support = false,
236 .name = "qcn9074 hw1.0",
237 .hw_rev = ATH11K_HW_QCN9074_HW10,
239 .dir = "QCN9074/hw1.0",
240 .board_size = 256 * 1024,
241 .cal_offset = 128 * 1024,
244 .single_pdev_only = false,
245 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074,
246 .hw_ops = &qcn9074_ops,
247 .ring_mask = &ath11k_hw_ring_mask_qcn9074,
248 .internal_sleep_clock = false,
249 .regs = &qcn9074_regs,
250 .host_ce_config = ath11k_host_ce_config_qcn9074,
252 .target_ce_config = ath11k_target_ce_config_wlan_qcn9074,
253 .target_ce_count = 9,
254 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
255 .svc_to_ce_map_len = 18,
258 .rfkill_on_level = 0,
259 .rxdma1_enable = true,
260 .num_rxmda_per_pdev = 1,
261 .rx_mac_buf_ring = false,
262 .vdev_start_delay = false,
263 .htt_peer_map_v2 = true,
268 .summary_pad_sz = 16,
270 .max_fft_bins = 1024,
273 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
274 BIT(NL80211_IFTYPE_AP) |
275 BIT(NL80211_IFTYPE_MESH_POINT),
276 .supports_monitor = true,
277 .full_monitor_mode = true,
278 .supports_shadow_regs = false,
280 .supports_sta_ps = false,
281 .cold_boot_calib = false,
285 .supports_suspend = false,
286 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
287 .supports_regdb = false,
289 .credit_flow = false,
290 .max_tx_ring = DP_TCL_NUM_RING_MAX,
291 .hal_params = &ath11k_hw_hal_params_ipq8074,
292 .supports_dynamic_smps_6ghz = true,
293 .alloc_cacheable_memory = true,
295 .supports_rssi_stats = false,
296 .fw_wmi_diag_event = false,
297 .current_cc_support = false,
298 .dbr_debug_support = true,
301 .name = "wcn6855 hw2.0",
302 .hw_rev = ATH11K_HW_WCN6855_HW20,
304 .dir = "WCN6855/hw2.0",
305 .board_size = 256 * 1024,
306 .cal_offset = 128 * 1024,
309 .bdf_addr = 0x4B0C0000,
310 .hw_ops = &wcn6855_ops,
311 .ring_mask = &ath11k_hw_ring_mask_qca6390,
312 .internal_sleep_clock = true,
313 .regs = &wcn6855_regs,
314 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
315 .host_ce_config = ath11k_host_ce_config_qca6390,
317 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
318 .target_ce_count = 9,
319 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
320 .svc_to_ce_map_len = 14,
323 .rfkill_on_level = 0,
324 .single_pdev_only = true,
325 .rxdma1_enable = false,
326 .num_rxmda_per_pdev = 2,
327 .rx_mac_buf_ring = true,
328 .vdev_start_delay = true,
329 .htt_peer_map_v2 = false,
339 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
340 BIT(NL80211_IFTYPE_AP),
341 .supports_monitor = false,
342 .full_monitor_mode = false,
343 .supports_shadow_regs = true,
345 .supports_sta_ps = true,
346 .cold_boot_calib = false,
350 .supports_suspend = true,
351 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
352 .supports_regdb = true,
355 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
356 .hal_params = &ath11k_hw_hal_params_qca6390,
357 .supports_dynamic_smps_6ghz = false,
358 .alloc_cacheable_memory = false,
360 .supports_rssi_stats = true,
361 .fw_wmi_diag_event = true,
362 .current_cc_support = true,
363 .dbr_debug_support = false,
366 .name = "wcn6855 hw2.1",
367 .hw_rev = ATH11K_HW_WCN6855_HW21,
369 .dir = "WCN6855/hw2.1",
370 .board_size = 256 * 1024,
371 .cal_offset = 128 * 1024,
374 .bdf_addr = 0x4B0C0000,
375 .hw_ops = &wcn6855_ops,
376 .ring_mask = &ath11k_hw_ring_mask_qca6390,
377 .internal_sleep_clock = true,
378 .regs = &wcn6855_regs,
379 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
380 .host_ce_config = ath11k_host_ce_config_qca6390,
382 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
383 .target_ce_count = 9,
384 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
385 .svc_to_ce_map_len = 14,
388 .rfkill_on_level = 0,
389 .single_pdev_only = true,
390 .rxdma1_enable = false,
391 .num_rxmda_per_pdev = 2,
392 .rx_mac_buf_ring = true,
393 .vdev_start_delay = true,
394 .htt_peer_map_v2 = false,
404 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
405 BIT(NL80211_IFTYPE_AP),
406 .supports_monitor = false,
407 .supports_shadow_regs = true,
409 .supports_sta_ps = true,
410 .cold_boot_calib = false,
414 .supports_suspend = true,
415 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
416 .supports_regdb = true,
419 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
420 .hal_params = &ath11k_hw_hal_params_qca6390,
421 .supports_dynamic_smps_6ghz = false,
422 .alloc_cacheable_memory = false,
424 .supports_rssi_stats = true,
425 .fw_wmi_diag_event = true,
426 .current_cc_support = true,
427 .dbr_debug_support = false,
431 static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
433 WARN_ON(!ab->hw_params.single_pdev_only);
435 return &ab->pdevs[0];
438 int ath11k_core_suspend(struct ath11k_base *ab)
441 struct ath11k_pdev *pdev;
444 if (!ab->hw_params.supports_suspend)
447 /* so far single_pdev_only chips have supports_suspend as true
448 * and only the first pdev is valid.
450 pdev = ath11k_core_get_single_pdev(ab);
452 if (!ar || ar->state != ATH11K_STATE_OFF)
455 /* TODO: there can frames in queues so for now add delay as a hack.
456 * Need to implement to handle and remove this delay.
460 ret = ath11k_dp_rx_pktlog_stop(ab, true);
462 ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n",
467 ret = ath11k_mac_wait_tx_complete(ar);
469 ath11k_warn(ab, "failed to wait tx complete: %d\n", ret);
473 ret = ath11k_wow_enable(ab);
475 ath11k_warn(ab, "failed to enable wow during suspend: %d\n", ret);
479 ret = ath11k_dp_rx_pktlog_stop(ab, false);
481 ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n",
486 ath11k_ce_stop_shadow_timers(ab);
487 ath11k_dp_stop_shadow_timers(ab);
489 ath11k_hif_irq_disable(ab);
490 ath11k_hif_ce_irq_disable(ab);
492 ret = ath11k_hif_suspend(ab);
494 ath11k_warn(ab, "failed to suspend hif: %d\n", ret);
500 EXPORT_SYMBOL(ath11k_core_suspend);
502 int ath11k_core_resume(struct ath11k_base *ab)
505 struct ath11k_pdev *pdev;
508 if (!ab->hw_params.supports_suspend)
511 /* so far signle_pdev_only chips have supports_suspend as true
512 * and only the first pdev is valid.
514 pdev = ath11k_core_get_single_pdev(ab);
516 if (!ar || ar->state != ATH11K_STATE_OFF)
519 ret = ath11k_hif_resume(ab);
521 ath11k_warn(ab, "failed to resume hif during resume: %d\n", ret);
525 ath11k_hif_ce_irq_enable(ab);
526 ath11k_hif_irq_enable(ab);
528 ret = ath11k_dp_rx_pktlog_start(ab);
530 ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n",
535 ret = ath11k_wow_wakeup(ab);
537 ath11k_warn(ab, "failed to wakeup wow during resume: %d\n", ret);
543 EXPORT_SYMBOL(ath11k_core_resume);
545 int ath11k_core_check_dt(struct ath11k_base *ab)
547 size_t max_len = sizeof(ab->qmi.target.bdf_ext);
548 const char *variant = NULL;
549 struct device_node *node;
551 node = ab->dev->of_node;
555 of_property_read_string(node, "qcom,ath11k-calibration-variant",
560 if (strscpy(ab->qmi.target.bdf_ext, variant, max_len) < 0)
561 ath11k_dbg(ab, ATH11K_DBG_BOOT,
562 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
568 static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
571 /* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
572 char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
574 if (ab->qmi.target.bdf_ext[0] != '\0')
575 scnprintf(variant, sizeof(variant), ",variant=%s",
576 ab->qmi.target.bdf_ext);
578 switch (ab->id.bdf_search) {
579 case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
580 scnprintf(name, name_len,
581 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
582 ath11k_bus_str(ab->hif.bus),
583 ab->id.vendor, ab->id.device,
584 ab->id.subsystem_vendor,
585 ab->id.subsystem_device,
586 ab->qmi.target.chip_id,
587 ab->qmi.target.board_id,
591 scnprintf(name, name_len,
592 "bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",
593 ath11k_bus_str(ab->hif.bus),
594 ab->qmi.target.chip_id,
595 ab->qmi.target.board_id, variant);
599 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot using board name '%s'\n", name);
604 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
607 const struct firmware *fw;
612 return ERR_PTR(-ENOENT);
614 ath11k_core_create_firmware_path(ab, file, path, sizeof(path));
616 ret = firmware_request_nowarn(&fw, path, ab->dev);
620 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot firmware request %s size %zu\n",
626 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
629 release_firmware(bd->fw);
631 memset(bd, 0, sizeof(*bd));
634 static int ath11k_core_parse_bd_ie_board(struct ath11k_base *ab,
635 struct ath11k_board_data *bd,
636 const void *buf, size_t buf_len,
637 const char *boardname,
640 const struct ath11k_fw_ie *hdr;
641 bool name_match_found;
642 int ret, board_ie_id;
644 const void *board_ie_data;
646 name_match_found = false;
648 /* go through ATH11K_BD_IE_BOARD_ elements */
649 while (buf_len > sizeof(struct ath11k_fw_ie)) {
651 board_ie_id = le32_to_cpu(hdr->id);
652 board_ie_len = le32_to_cpu(hdr->len);
653 board_ie_data = hdr->data;
655 buf_len -= sizeof(*hdr);
658 if (buf_len < ALIGN(board_ie_len, 4)) {
659 ath11k_err(ab, "invalid ATH11K_BD_IE_BOARD length: %zu < %zu\n",
660 buf_len, ALIGN(board_ie_len, 4));
665 switch (board_ie_id) {
666 case ATH11K_BD_IE_BOARD_NAME:
667 ath11k_dbg_dump(ab, ATH11K_DBG_BOOT, "board name", "",
668 board_ie_data, board_ie_len);
670 if (board_ie_len != strlen(boardname))
673 ret = memcmp(board_ie_data, boardname, strlen(boardname));
677 name_match_found = true;
678 ath11k_dbg(ab, ATH11K_DBG_BOOT,
679 "boot found match for name '%s'",
682 case ATH11K_BD_IE_BOARD_DATA:
683 if (!name_match_found)
687 ath11k_dbg(ab, ATH11K_DBG_BOOT,
688 "boot found board data for '%s'", boardname);
690 bd->data = board_ie_data;
691 bd->len = board_ie_len;
696 ath11k_warn(ab, "unknown ATH11K_BD_IE_BOARD found: %d\n",
701 /* jump over the padding */
702 board_ie_len = ALIGN(board_ie_len, 4);
704 buf_len -= board_ie_len;
715 static int ath11k_core_fetch_board_data_api_n(struct ath11k_base *ab,
716 struct ath11k_board_data *bd,
717 const char *boardname)
719 size_t len, magic_len;
721 char *filename, filepath[100];
723 struct ath11k_fw_ie *hdr;
726 filename = ATH11K_BOARD_API2_FILE;
729 bd->fw = ath11k_core_firmware_request(ab, filename);
732 return PTR_ERR(bd->fw);
737 ath11k_core_create_firmware_path(ab, filename,
738 filepath, sizeof(filepath));
740 /* magic has extra null byte padded */
741 magic_len = strlen(ATH11K_BOARD_MAGIC) + 1;
742 if (len < magic_len) {
743 ath11k_err(ab, "failed to find magic value in %s, file too short: %zu\n",
749 if (memcmp(data, ATH11K_BOARD_MAGIC, magic_len)) {
750 ath11k_err(ab, "found invalid board magic\n");
755 /* magic is padded to 4 bytes */
756 magic_len = ALIGN(magic_len, 4);
757 if (len < magic_len) {
758 ath11k_err(ab, "failed: %s too small to contain board data, len: %zu\n",
767 while (len > sizeof(struct ath11k_fw_ie)) {
768 hdr = (struct ath11k_fw_ie *)data;
769 ie_id = le32_to_cpu(hdr->id);
770 ie_len = le32_to_cpu(hdr->len);
775 if (len < ALIGN(ie_len, 4)) {
776 ath11k_err(ab, "invalid length for board ie_id %d ie_len %zu len %zu\n",
783 case ATH11K_BD_IE_BOARD:
784 ret = ath11k_core_parse_bd_ie_board(ab, bd, data,
789 /* no match found, continue */
792 /* there was an error, bail out */
794 /* either found or error, so stop searching */
798 /* jump over the padding */
799 ie_len = ALIGN(ie_len, 4);
806 if (!bd->data || !bd->len) {
808 "failed to fetch board data for %s from %s\n",
809 boardname, filepath);
817 ath11k_core_free_bdf(ab, bd);
821 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
822 struct ath11k_board_data *bd,
825 bd->fw = ath11k_core_firmware_request(ab, name);
828 return PTR_ERR(bd->fw);
830 bd->data = bd->fw->data;
831 bd->len = bd->fw->size;
836 #define BOARD_NAME_SIZE 200
837 int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
839 char boardname[BOARD_NAME_SIZE];
842 ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
844 ath11k_err(ab, "failed to create board name: %d", ret);
849 ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname);
854 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE);
856 ath11k_err(ab, "failed to fetch board-2.bin or board.bin from %s\n",
857 ab->hw_params.fw.dir);
862 ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api);
866 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
870 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_REGDB_FILE_NAME);
872 ath11k_dbg(ab, ATH11K_DBG_BOOT, "failed to fetch %s from %s\n",
873 ATH11K_REGDB_FILE_NAME, ab->hw_params.fw.dir);
878 static void ath11k_core_stop(struct ath11k_base *ab)
880 if (!test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
881 ath11k_qmi_firmware_stop(ab);
884 ath11k_wmi_detach(ab);
885 ath11k_dp_pdev_reo_cleanup(ab);
887 /* De-Init of components as needed */
890 static int ath11k_core_soc_create(struct ath11k_base *ab)
894 ret = ath11k_qmi_init_service(ab);
896 ath11k_err(ab, "failed to initialize qmi :%d\n", ret);
900 ret = ath11k_debugfs_soc_create(ab);
902 ath11k_err(ab, "failed to create ath11k debugfs\n");
906 ret = ath11k_hif_power_up(ab);
908 ath11k_err(ab, "failed to power up :%d\n", ret);
909 goto err_debugfs_reg;
915 ath11k_debugfs_soc_destroy(ab);
917 ath11k_qmi_deinit_service(ab);
921 static void ath11k_core_soc_destroy(struct ath11k_base *ab)
923 ath11k_debugfs_soc_destroy(ab);
926 ath11k_qmi_deinit_service(ab);
929 static int ath11k_core_pdev_create(struct ath11k_base *ab)
933 ret = ath11k_debugfs_pdev_create(ab);
935 ath11k_err(ab, "failed to create core pdev debugfs: %d\n", ret);
939 ret = ath11k_mac_register(ab);
941 ath11k_err(ab, "failed register the radio with mac80211: %d\n", ret);
945 ret = ath11k_dp_pdev_alloc(ab);
947 ath11k_err(ab, "failed to attach DP pdev: %d\n", ret);
948 goto err_mac_unregister;
951 ret = ath11k_thermal_register(ab);
953 ath11k_err(ab, "could not register thermal device: %d\n",
955 goto err_dp_pdev_free;
958 ret = ath11k_spectral_init(ab);
960 ath11k_err(ab, "failed to init spectral %d\n", ret);
961 goto err_thermal_unregister;
966 err_thermal_unregister:
967 ath11k_thermal_unregister(ab);
969 ath11k_dp_pdev_free(ab);
971 ath11k_mac_unregister(ab);
973 ath11k_debugfs_pdev_destroy(ab);
978 static void ath11k_core_pdev_destroy(struct ath11k_base *ab)
980 ath11k_spectral_deinit(ab);
981 ath11k_thermal_unregister(ab);
982 ath11k_mac_unregister(ab);
983 ath11k_hif_irq_disable(ab);
984 ath11k_dp_pdev_free(ab);
985 ath11k_debugfs_pdev_destroy(ab);
988 static int ath11k_core_start(struct ath11k_base *ab,
989 enum ath11k_firmware_mode mode)
993 ret = ath11k_qmi_firmware_start(ab, mode);
995 ath11k_err(ab, "failed to attach wmi: %d\n", ret);
999 ret = ath11k_wmi_attach(ab);
1001 ath11k_err(ab, "failed to attach wmi: %d\n", ret);
1002 goto err_firmware_stop;
1005 ret = ath11k_htc_init(ab);
1007 ath11k_err(ab, "failed to init htc: %d\n", ret);
1008 goto err_wmi_detach;
1011 ret = ath11k_hif_start(ab);
1013 ath11k_err(ab, "failed to start HIF: %d\n", ret);
1014 goto err_wmi_detach;
1017 ret = ath11k_htc_wait_target(&ab->htc);
1019 ath11k_err(ab, "failed to connect to HTC: %d\n", ret);
1023 ret = ath11k_dp_htt_connect(&ab->dp);
1025 ath11k_err(ab, "failed to connect to HTT: %d\n", ret);
1029 ret = ath11k_wmi_connect(ab);
1031 ath11k_err(ab, "failed to connect wmi: %d\n", ret);
1035 ret = ath11k_htc_start(&ab->htc);
1037 ath11k_err(ab, "failed to start HTC: %d\n", ret);
1041 ret = ath11k_wmi_wait_for_service_ready(ab);
1043 ath11k_err(ab, "failed to receive wmi service ready event: %d\n",
1048 ret = ath11k_mac_allocate(ab);
1050 ath11k_err(ab, "failed to create new hw device with mac80211 :%d\n",
1055 ath11k_dp_pdev_pre_alloc(ab);
1057 ret = ath11k_dp_pdev_reo_setup(ab);
1059 ath11k_err(ab, "failed to initialize reo destination rings: %d\n", ret);
1060 goto err_mac_destroy;
1063 ret = ath11k_wmi_cmd_init(ab);
1065 ath11k_err(ab, "failed to send wmi init cmd: %d\n", ret);
1066 goto err_reo_cleanup;
1069 ret = ath11k_wmi_wait_for_unified_ready(ab);
1071 ath11k_err(ab, "failed to receive wmi unified ready event: %d\n",
1073 goto err_reo_cleanup;
1076 /* put hardware to DBS mode */
1077 if (ab->hw_params.single_pdev_only) {
1078 ret = ath11k_wmi_set_hw_mode(ab, WMI_HOST_HW_MODE_DBS);
1080 ath11k_err(ab, "failed to send dbs mode: %d\n", ret);
1085 ret = ath11k_dp_tx_htt_h2t_ver_req_msg(ab);
1087 ath11k_err(ab, "failed to send htt version request message: %d\n",
1089 goto err_reo_cleanup;
1095 ath11k_dp_pdev_reo_cleanup(ab);
1097 ath11k_mac_destroy(ab);
1099 ath11k_hif_stop(ab);
1101 ath11k_wmi_detach(ab);
1103 ath11k_qmi_firmware_stop(ab);
1108 static int ath11k_core_rfkill_config(struct ath11k_base *ab)
1113 if (!(ab->target_caps.sys_cap_info & WMI_SYS_CAP_INFO_RFKILL))
1116 for (i = 0; i < ab->num_radios; i++) {
1117 ar = ab->pdevs[i].ar;
1119 ret = ath11k_mac_rfkill_config(ar);
1120 if (ret && ret != -EOPNOTSUPP) {
1121 ath11k_warn(ab, "failed to configure rfkill: %d", ret);
1129 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)
1133 ret = ath11k_ce_init_pipes(ab);
1135 ath11k_err(ab, "failed to initialize CE: %d\n", ret);
1139 ret = ath11k_dp_alloc(ab);
1141 ath11k_err(ab, "failed to init DP: %d\n", ret);
1145 switch (ath11k_crypto_mode) {
1146 case ATH11K_CRYPT_MODE_SW:
1147 set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1148 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1150 case ATH11K_CRYPT_MODE_HW:
1151 clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1152 clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1155 ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);
1159 if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW)
1160 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1162 mutex_lock(&ab->core_lock);
1163 ret = ath11k_core_start(ab, ATH11K_FIRMWARE_MODE_NORMAL);
1165 ath11k_err(ab, "failed to start core: %d\n", ret);
1169 ret = ath11k_core_pdev_create(ab);
1171 ath11k_err(ab, "failed to create pdev core: %d\n", ret);
1174 ath11k_hif_irq_enable(ab);
1176 ret = ath11k_core_rfkill_config(ab);
1177 if (ret && ret != -EOPNOTSUPP) {
1178 ath11k_err(ab, "failed to config rfkill: %d\n", ret);
1182 mutex_unlock(&ab->core_lock);
1187 ath11k_core_stop(ab);
1188 ath11k_mac_destroy(ab);
1191 mutex_unlock(&ab->core_lock);
1195 static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)
1199 mutex_lock(&ab->core_lock);
1200 ath11k_thermal_unregister(ab);
1201 ath11k_hif_irq_disable(ab);
1202 ath11k_dp_pdev_free(ab);
1203 ath11k_spectral_deinit(ab);
1204 ath11k_hif_stop(ab);
1205 ath11k_wmi_detach(ab);
1206 ath11k_dp_pdev_reo_cleanup(ab);
1207 mutex_unlock(&ab->core_lock);
1210 ath11k_hal_srng_deinit(ab);
1212 ab->free_vdev_map = (1LL << (ab->num_radios * TARGET_NUM_VDEVS(ab))) - 1;
1214 ret = ath11k_hal_srng_init(ab);
1218 clear_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags);
1220 ret = ath11k_core_qmi_firmware_ready(ab);
1222 goto err_hal_srng_deinit;
1224 clear_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags);
1228 err_hal_srng_deinit:
1229 ath11k_hal_srng_deinit(ab);
1233 void ath11k_core_halt(struct ath11k *ar)
1235 struct ath11k_base *ab = ar->ab;
1237 lockdep_assert_held(&ar->conf_mutex);
1239 ar->num_created_vdevs = 0;
1240 ar->allocated_vdev_map = 0;
1242 ath11k_mac_scan_finish(ar);
1243 ath11k_mac_peer_cleanup_all(ar);
1244 cancel_delayed_work_sync(&ar->scan.timeout);
1245 cancel_work_sync(&ar->regd_update_work);
1246 cancel_work_sync(&ab->update_11d_work);
1247 cancel_work_sync(&ab->rfkill_work);
1249 rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL);
1251 INIT_LIST_HEAD(&ar->arvifs);
1252 idr_init(&ar->txmgmt_idr);
1255 static void ath11k_rfkill_work(struct work_struct *work)
1257 struct ath11k_base *ab = container_of(work, struct ath11k_base, rfkill_work);
1259 bool rfkill_radio_on;
1262 spin_lock_bh(&ab->base_lock);
1263 rfkill_radio_on = ab->rfkill_radio_on;
1264 spin_unlock_bh(&ab->base_lock);
1266 for (i = 0; i < ab->num_radios; i++) {
1267 ar = ab->pdevs[i].ar;
1271 /* notify cfg80211 radio state change */
1272 ath11k_mac_rfkill_enable_radio(ar, rfkill_radio_on);
1273 wiphy_rfkill_set_hw_state(ar->hw->wiphy, !rfkill_radio_on);
1277 static void ath11k_update_11d(struct work_struct *work)
1279 struct ath11k_base *ab = container_of(work, struct ath11k_base, update_11d_work);
1281 struct ath11k_pdev *pdev;
1282 struct wmi_set_current_country_params set_current_param = {};
1285 spin_lock_bh(&ab->base_lock);
1286 memcpy(&set_current_param.alpha2, &ab->new_alpha2, 2);
1287 spin_unlock_bh(&ab->base_lock);
1289 ath11k_dbg(ab, ATH11K_DBG_WMI, "update 11d new cc %c%c\n",
1290 set_current_param.alpha2[0],
1291 set_current_param.alpha2[1]);
1293 for (i = 0; i < ab->num_radios; i++) {
1294 pdev = &ab->pdevs[i];
1297 ret = ath11k_wmi_send_set_current_country_cmd(ar, &set_current_param);
1300 "pdev id %d failed set current country code: %d\n",
1305 static void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
1308 struct ath11k_pdev *pdev;
1311 spin_lock_bh(&ab->base_lock);
1312 ab->stats.fw_crash_counter++;
1313 spin_unlock_bh(&ab->base_lock);
1315 for (i = 0; i < ab->num_radios; i++) {
1316 pdev = &ab->pdevs[i];
1318 if (!ar || ar->state == ATH11K_STATE_OFF)
1321 ieee80211_stop_queues(ar->hw);
1322 ath11k_mac_drain_tx(ar);
1323 complete(&ar->scan.started);
1324 complete(&ar->scan.completed);
1325 complete(&ar->peer_assoc_done);
1326 complete(&ar->peer_delete_done);
1327 complete(&ar->install_key_done);
1328 complete(&ar->vdev_setup_done);
1329 complete(&ar->vdev_delete_done);
1330 complete(&ar->bss_survey_done);
1331 complete(&ar->thermal.wmi_sync);
1333 wake_up(&ar->dp.tx_empty_waitq);
1334 idr_for_each(&ar->txmgmt_idr,
1335 ath11k_mac_tx_mgmt_pending_free, ar);
1336 idr_destroy(&ar->txmgmt_idr);
1337 wake_up(&ar->txmgmt_empty_waitq);
1340 wake_up(&ab->wmi_ab.tx_credits_wq);
1341 wake_up(&ab->peer_mapping_wq);
1344 static void ath11k_core_post_reconfigure_recovery(struct ath11k_base *ab)
1347 struct ath11k_pdev *pdev;
1350 for (i = 0; i < ab->num_radios; i++) {
1351 pdev = &ab->pdevs[i];
1353 if (!ar || ar->state == ATH11K_STATE_OFF)
1356 mutex_lock(&ar->conf_mutex);
1358 switch (ar->state) {
1359 case ATH11K_STATE_ON:
1360 ar->state = ATH11K_STATE_RESTARTING;
1361 ath11k_core_halt(ar);
1362 ieee80211_restart_hw(ar->hw);
1364 case ATH11K_STATE_OFF:
1366 "cannot restart radio %d that hasn't been started\n",
1369 case ATH11K_STATE_RESTARTING:
1371 case ATH11K_STATE_RESTARTED:
1372 ar->state = ATH11K_STATE_WEDGED;
1374 case ATH11K_STATE_WEDGED:
1376 "device is wedged, will not restart radio %d\n", i);
1379 mutex_unlock(&ar->conf_mutex);
1381 complete(&ab->driver_recovery);
1384 static void ath11k_core_restart(struct work_struct *work)
1386 struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work);
1390 ath11k_core_pre_reconfigure_recovery(ab);
1392 ret = ath11k_core_reconfigure_on_crash(ab);
1394 ath11k_err(ab, "failed to reconfigure driver on crash recovery\n");
1399 complete_all(&ab->reconfigure_complete);
1402 ath11k_core_post_reconfigure_recovery(ab);
1405 static void ath11k_core_reset(struct work_struct *work)
1407 struct ath11k_base *ab = container_of(work, struct ath11k_base, reset_work);
1408 int reset_count, fail_cont_count;
1411 if (!(test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags))) {
1412 ath11k_warn(ab, "ignore reset dev flags 0x%lx\n", ab->dev_flags);
1416 /* Sometimes the recovery will fail and then the next all recovery fail,
1417 * this is to avoid infinite recovery since it can not recovery success.
1419 fail_cont_count = atomic_read(&ab->fail_cont_count);
1421 if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FINAL)
1424 if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FIRST &&
1425 time_before(jiffies, ab->reset_fail_timeout))
1428 reset_count = atomic_inc_return(&ab->reset_count);
1430 if (reset_count > 1) {
1431 /* Sometimes it happened another reset worker before the previous one
1432 * completed, then the second reset worker will destroy the previous one,
1433 * thus below is to avoid that.
1435 ath11k_warn(ab, "already reseting count %d\n", reset_count);
1437 reinit_completion(&ab->reset_complete);
1438 time_left = wait_for_completion_timeout(&ab->reset_complete,
1439 ATH11K_RESET_TIMEOUT_HZ);
1442 ath11k_dbg(ab, ATH11K_DBG_BOOT, "to skip reset\n");
1443 atomic_dec(&ab->reset_count);
1447 ab->reset_fail_timeout = jiffies + ATH11K_RESET_FAIL_TIMEOUT_HZ;
1448 /* Record the continuous recovery fail count when recovery failed*/
1449 atomic_inc(&ab->fail_cont_count);
1452 ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset starting\n");
1454 ab->is_reset = true;
1455 atomic_set(&ab->recovery_count, 0);
1456 reinit_completion(&ab->recovery_start);
1457 atomic_set(&ab->recovery_start_count, 0);
1459 ath11k_core_pre_reconfigure_recovery(ab);
1461 reinit_completion(&ab->reconfigure_complete);
1462 ath11k_core_post_reconfigure_recovery(ab);
1464 ath11k_dbg(ab, ATH11K_DBG_BOOT, "waiting recovery start...\n");
1466 time_left = wait_for_completion_timeout(&ab->recovery_start,
1467 ATH11K_RECOVER_START_TIMEOUT_HZ);
1469 ath11k_hif_power_down(ab);
1470 ath11k_qmi_free_resource(ab);
1471 ath11k_hif_power_up(ab);
1473 ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset started\n");
1476 static int ath11k_init_hw_params(struct ath11k_base *ab)
1478 const struct ath11k_hw_params *hw_params = NULL;
1481 for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
1482 hw_params = &ath11k_hw_params[i];
1484 if (hw_params->hw_rev == ab->hw_rev)
1488 if (i == ARRAY_SIZE(ath11k_hw_params)) {
1489 ath11k_err(ab, "Unsupported hardware version: 0x%x\n", ab->hw_rev);
1493 ab->hw_params = *hw_params;
1495 ath11k_info(ab, "%s\n", ab->hw_params.name);
1500 int ath11k_core_pre_init(struct ath11k_base *ab)
1504 ret = ath11k_init_hw_params(ab);
1506 ath11k_err(ab, "failed to get hw params: %d\n", ret);
1512 EXPORT_SYMBOL(ath11k_core_pre_init);
1514 int ath11k_core_init(struct ath11k_base *ab)
1518 ret = ath11k_core_soc_create(ab);
1520 ath11k_err(ab, "failed to create soc core: %d\n", ret);
1526 EXPORT_SYMBOL(ath11k_core_init);
1528 void ath11k_core_deinit(struct ath11k_base *ab)
1530 mutex_lock(&ab->core_lock);
1532 ath11k_core_pdev_destroy(ab);
1533 ath11k_core_stop(ab);
1535 mutex_unlock(&ab->core_lock);
1537 ath11k_hif_power_down(ab);
1538 ath11k_mac_destroy(ab);
1539 ath11k_core_soc_destroy(ab);
1541 EXPORT_SYMBOL(ath11k_core_deinit);
1543 void ath11k_core_free(struct ath11k_base *ab)
1545 destroy_workqueue(ab->workqueue_aux);
1546 destroy_workqueue(ab->workqueue);
1550 EXPORT_SYMBOL(ath11k_core_free);
1552 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1553 enum ath11k_bus bus,
1554 const struct ath11k_bus_params *bus_params)
1556 struct ath11k_base *ab;
1558 ab = kzalloc(sizeof(*ab) + priv_size, GFP_KERNEL);
1562 init_completion(&ab->driver_recovery);
1564 ab->workqueue = create_singlethread_workqueue("ath11k_wq");
1568 ab->workqueue_aux = create_singlethread_workqueue("ath11k_aux_wq");
1569 if (!ab->workqueue_aux)
1572 mutex_init(&ab->core_lock);
1573 spin_lock_init(&ab->base_lock);
1574 mutex_init(&ab->vdev_id_11d_lock);
1575 init_completion(&ab->reset_complete);
1576 init_completion(&ab->reconfigure_complete);
1577 init_completion(&ab->recovery_start);
1579 INIT_LIST_HEAD(&ab->peers);
1580 init_waitqueue_head(&ab->peer_mapping_wq);
1581 init_waitqueue_head(&ab->wmi_ab.tx_credits_wq);
1582 init_waitqueue_head(&ab->qmi.cold_boot_waitq);
1583 INIT_WORK(&ab->restart_work, ath11k_core_restart);
1584 INIT_WORK(&ab->update_11d_work, ath11k_update_11d);
1585 INIT_WORK(&ab->rfkill_work, ath11k_rfkill_work);
1586 INIT_WORK(&ab->reset_work, ath11k_core_reset);
1587 timer_setup(&ab->rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0);
1588 init_completion(&ab->htc_suspend);
1589 init_completion(&ab->wow.wakeup_completed);
1592 ab->bus_params = *bus_params;
1598 destroy_workqueue(ab->workqueue);
1603 EXPORT_SYMBOL(ath11k_core_alloc);
1605 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ax wireless LAN cards.");
1606 MODULE_LICENSE("Dual BSD/GPL");