drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/crc32.h>
  30 #include <linux/usb/usbnet.h>
  31 #include <linux/slab.h>
  32 #include "smsc95xx.h"
  33
  34 #define SMSC_CHIPNAME                   "smsc95xx"
  35 #define SMSC_DRIVER_VERSION             "1.0.4"
  36 #define HS_USB_PKT_SIZE                 (512)
  37 #define FS_USB_PKT_SIZE                 (64)
  38 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  39 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  40 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  41 #define MAX_SINGLE_PACKET_SIZE          (2048)
  42 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  43 #define EEPROM_MAC_OFFSET               (0x01)
  44 #define DEFAULT_TX_CSUM_ENABLE          (true)
  45 #define DEFAULT_RX_CSUM_ENABLE          (true)
  46 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  47 #define SMSC95XX_TX_OVERHEAD            (8)
  48 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  49
  50 struct smsc95xx_priv {
  51         u32 mac_cr;
  52         u32 hash_hi;
  53         u32 hash_lo;
  54         spinlock_t mac_cr_lock;
  55 };
  56
  57 struct usb_context {
  58         struct usb_ctrlrequest req;
  59         struct usbnet *dev;
  60 };
  61
  62 static bool turbo_mode = true;
  63 module_param(turbo_mode, bool, 0644);
  64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  65
  66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
  67 {
  68         u32 *buf = kmalloc(4, GFP_KERNEL);
  69         int ret;
  70
  71         BUG_ON(!dev);
  72
  73         if (!buf)
  74                 return -ENOMEM;
  75
  76         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
  77                 USB_VENDOR_REQUEST_READ_REGISTER,
  78                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  79                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
  80
  81         if (unlikely(ret < 0))
  82                 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
  83
  84         le32_to_cpus(buf);
  85         *data = *buf;
  86         kfree(buf);
  87
  88         return ret;
  89 }
  90
  91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
  92 {
  93         u32 *buf = kmalloc(4, GFP_KERNEL);
  94         int ret;
  95
  96         BUG_ON(!dev);
  97
  98         if (!buf)
  99                 return -ENOMEM;
 100
 101         *buf = data;
 102         cpu_to_le32s(buf);
 103
 104         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 105                 USB_VENDOR_REQUEST_WRITE_REGISTER,
 106                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 107                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
 108
 109         if (unlikely(ret < 0))
 110                 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
 111
 112         kfree(buf);
 113
 114         return ret;
 115 }
 116
 117 /* Loop until the read is completed with timeout
 118  * called with phy_mutex held */
 119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 120 {
 121         unsigned long start_time = jiffies;
 122         u32 val;
 123
 124         do {
 125                 smsc95xx_read_reg(dev, MII_ADDR, &val);
 126                 if (!(val & MII_BUSY_))
 127                         return 0;
 128         } while (!time_after(jiffies, start_time + HZ));
 129
 130         return -EIO;
 131 }
 132
 133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 134 {
 135         struct usbnet *dev = netdev_priv(netdev);
 136         u32 val, addr;
 137
 138         mutex_lock(&dev->phy_mutex);
 139
 140         /* confirm MII not busy */
 141         if (smsc95xx_phy_wait_not_busy(dev)) {
 142                 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
 143                 mutex_unlock(&dev->phy_mutex);
 144                 return -EIO;
 145         }
 146
 147         /* set the address, index & direction (read from PHY) */
 148         phy_id &= dev->mii.phy_id_mask;
 149         idx &= dev->mii.reg_num_mask;
 150         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 151         smsc95xx_write_reg(dev, MII_ADDR, addr);
 152
 153         if (smsc95xx_phy_wait_not_busy(dev)) {
 154                 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
 155                 mutex_unlock(&dev->phy_mutex);
 156                 return -EIO;
 157         }
 158
 159         smsc95xx_read_reg(dev, MII_DATA, &val);
 160
 161         mutex_unlock(&dev->phy_mutex);
 162
 163         return (u16)(val & 0xFFFF);
 164 }
 165
 166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 167                                 int regval)
 168 {
 169         struct usbnet *dev = netdev_priv(netdev);
 170         u32 val, addr;
 171
 172         mutex_lock(&dev->phy_mutex);
 173
 174         /* confirm MII not busy */
 175         if (smsc95xx_phy_wait_not_busy(dev)) {
 176                 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
 177                 mutex_unlock(&dev->phy_mutex);
 178                 return;
 179         }
 180
 181         val = regval;
 182         smsc95xx_write_reg(dev, MII_DATA, val);
 183
 184         /* set the address, index & direction (write to PHY) */
 185         phy_id &= dev->mii.phy_id_mask;
 186         idx &= dev->mii.reg_num_mask;
 187         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 188         smsc95xx_write_reg(dev, MII_ADDR, addr);
 189
 190         if (smsc95xx_phy_wait_not_busy(dev))
 191                 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
 192
 193         mutex_unlock(&dev->phy_mutex);
 194 }
 195
 196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
 197 {
 198         unsigned long start_time = jiffies;
 199         u32 val;
 200
 201         do {
 202                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 203                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 204                         break;
 205                 udelay(40);
 206         } while (!time_after(jiffies, start_time + HZ));
 207
 208         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 209                 netdev_warn(dev->net, "EEPROM read operation timeout\n");
 210                 return -EIO;
 211         }
 212
 213         return 0;
 214 }
 215
 216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 217 {
 218         unsigned long start_time = jiffies;
 219         u32 val;
 220
 221         do {
 222                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 223
 224                 if (!(val & E2P_CMD_BUSY_))
 225                         return 0;
 226
 227                 udelay(40);
 228         } while (!time_after(jiffies, start_time + HZ));
 229
 230         netdev_warn(dev->net, "EEPROM is busy\n");
 231         return -EIO;
 232 }
 233
 234 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 235                                 u8 *data)
 236 {
 237         u32 val;
 238         int i, ret;
 239
 240         BUG_ON(!dev);
 241         BUG_ON(!data);
 242
 243         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 244         if (ret)
 245                 return ret;
 246
 247         for (i = 0; i < length; i++) {
 248                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 249                 smsc95xx_write_reg(dev, E2P_CMD, val);
 250
 251                 ret = smsc95xx_wait_eeprom(dev);
 252                 if (ret < 0)
 253                         return ret;
 254
 255                 smsc95xx_read_reg(dev, E2P_DATA, &val);
 256
 257                 data[i] = val & 0xFF;
 258                 offset++;
 259         }
 260
 261         return 0;
 262 }
 263
 264 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 265                                  u8 *data)
 266 {
 267         u32 val;
 268         int i, ret;
 269
 270         BUG_ON(!dev);
 271         BUG_ON(!data);
 272
 273         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 274         if (ret)
 275                 return ret;
 276
 277         /* Issue write/erase enable command */
 278         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 279         smsc95xx_write_reg(dev, E2P_CMD, val);
 280
 281         ret = smsc95xx_wait_eeprom(dev);
 282         if (ret < 0)
 283                 return ret;
 284
 285         for (i = 0; i < length; i++) {
 286
 287                 /* Fill data register */
 288                 val = data[i];
 289                 smsc95xx_write_reg(dev, E2P_DATA, val);
 290
 291                 /* Send "write" command */
 292                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 293                 smsc95xx_write_reg(dev, E2P_CMD, val);
 294
 295                 ret = smsc95xx_wait_eeprom(dev);
 296                 if (ret < 0)
 297                         return ret;
 298
 299                 offset++;
 300         }
 301
 302         return 0;
 303 }
 304
 305 static void smsc95xx_async_cmd_callback(struct urb *urb)
 306 {
 307         struct usb_context *usb_context = urb->context;
 308         struct usbnet *dev = usb_context->dev;
 309         int status = urb->status;
 310
 311         if (status < 0)
 312                 netdev_warn(dev->net, "async callback failed with %d\n", status);
 313
 314         kfree(usb_context);
 315         usb_free_urb(urb);
 316 }
 317
 318 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
 319 {
 320         struct usb_context *usb_context;
 321         int status;
 322         struct urb *urb;
 323         const u16 size = 4;
 324
 325         urb = usb_alloc_urb(0, GFP_ATOMIC);
 326         if (!urb) {
 327                 netdev_warn(dev->net, "Error allocating URB\n");
 328                 return -ENOMEM;
 329         }
 330
 331         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
 332         if (usb_context == NULL) {
 333                 netdev_warn(dev->net, "Error allocating control msg\n");
 334                 usb_free_urb(urb);
 335                 return -ENOMEM;
 336         }
 337
 338         usb_context->req.bRequestType =
 339                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 340         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
 341         usb_context->req.wValue = 00;
 342         usb_context->req.wIndex = cpu_to_le16(index);
 343         usb_context->req.wLength = cpu_to_le16(size);
 344
 345         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
 346                 (void *)&usb_context->req, data, size,
 347                 smsc95xx_async_cmd_callback,
 348                 (void *)usb_context);
 349
 350         status = usb_submit_urb(urb, GFP_ATOMIC);
 351         if (status < 0) {
 352                 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
 353                             status);
 354                 kfree(usb_context);
 355                 usb_free_urb(urb);
 356         }
 357
 358         return status;
 359 }
 360
 361 /* returns hash bit number for given MAC address
 362  * example:
 363  * 01 00 5E 00 00 01 -> returns bit number 31 */
 364 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 365 {
 366         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 367 }
 368
 369 static void smsc95xx_set_multicast(struct net_device *netdev)
 370 {
 371         struct usbnet *dev = netdev_priv(netdev);
 372         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 373         unsigned long flags;
 374
 375         pdata->hash_hi = 0;
 376         pdata->hash_lo = 0;
 377
 378         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 379
 380         if (dev->net->flags & IFF_PROMISC) {
 381                 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
 382                 pdata->mac_cr |= MAC_CR_PRMS_;
 383                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 384         } else if (dev->net->flags & IFF_ALLMULTI) {
 385                 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
 386                 pdata->mac_cr |= MAC_CR_MCPAS_;
 387                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 388         } else if (!netdev_mc_empty(dev->net)) {
 389                 struct netdev_hw_addr *ha;
 390
 391                 pdata->mac_cr |= MAC_CR_HPFILT_;
 392                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 393
 394                 netdev_for_each_mc_addr(ha, netdev) {
 395                         u32 bitnum = smsc95xx_hash(ha->addr);
 396                         u32 mask = 0x01 << (bitnum & 0x1F);
 397                         if (bitnum & 0x20)
 398                                 pdata->hash_hi |= mask;
 399                         else
 400                                 pdata->hash_lo |= mask;
 401                 }
 402
 403                 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
 404                                    pdata->hash_hi, pdata->hash_lo);
 405         } else {
 406                 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
 407                 pdata->mac_cr &=
 408                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 409         }
 410
 411         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 412
 413         /* Initiate async writes, as we can't wait for completion here */
 414         smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
 415         smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
 416         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 417 }
 418
 419 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 420                                             u16 lcladv, u16 rmtadv)
 421 {
 422         u32 flow, afc_cfg = 0;
 423
 424         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 425         if (ret < 0) {
 426                 netdev_warn(dev->net, "error reading AFC_CFG\n");
 427                 return;
 428         }
 429
 430         if (duplex == DUPLEX_FULL) {
 431                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 432
 433                 if (cap & FLOW_CTRL_RX)
 434                         flow = 0xFFFF0002;
 435                 else
 436                         flow = 0;
 437
 438                 if (cap & FLOW_CTRL_TX)
 439                         afc_cfg |= 0xF;
 440                 else
 441                         afc_cfg &= ~0xF;
 442
 443                 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
 444                                    cap & FLOW_CTRL_RX ? "enabled" : "disabled",
 445                                    cap & FLOW_CTRL_TX ? "enabled" : "disabled");
 446         } else {
 447                 netif_dbg(dev, link, dev->net, "half duplex\n");
 448                 flow = 0;
 449                 afc_cfg |= 0xF;
 450         }
 451
 452         smsc95xx_write_reg(dev, FLOW, flow);
 453         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 454 }
 455
 456 static int smsc95xx_link_reset(struct usbnet *dev)
 457 {
 458         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 459         struct mii_if_info *mii = &dev->mii;
 460         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 461         unsigned long flags;
 462         u16 lcladv, rmtadv;
 463
 464         /* clear interrupt status */
 465         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 466         smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
 467
 468         mii_check_media(mii, 1, 1);
 469         mii_ethtool_gset(&dev->mii, &ecmd);
 470         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 471         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 472
 473         netif_dbg(dev, link, dev->net,
 474                   "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
 475                   ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
 476
 477         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 478         if (ecmd.duplex != DUPLEX_FULL) {
 479                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 480                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 481         } else {
 482                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 483                 pdata->mac_cr |= MAC_CR_FDPX_;
 484         }
 485         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 486
 487         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 488
 489         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 490
 491         return 0;
 492 }
 493
 494 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 495 {
 496         u32 intdata;
 497
 498         if (urb->actual_length != 4) {
 499                 netdev_warn(dev->net, "unexpected urb length %d\n",
 500                             urb->actual_length);
 501                 return;
 502         }
 503
 504         memcpy(&intdata, urb->transfer_buffer, 4);
 505         le32_to_cpus(&intdata);
 506
 507         netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
 508
 509         if (intdata & INT_ENP_PHY_INT_)
 510                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 511         else
 512                 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
 513                             intdata);
 514 }
 515
 516 /* Enable or disable Tx & Rx checksum offload engines */
 517 static int smsc95xx_set_features(struct net_device *netdev,
 518         netdev_features_t features)
 519 {
 520         struct usbnet *dev = netdev_priv(netdev);
 521         u32 read_buf;
 522         int ret;
 523
 524         ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 525         if (ret < 0) {
 526                 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
 527                 return ret;
 528         }
 529
 530         if (features & NETIF_F_HW_CSUM)
 531                 read_buf |= Tx_COE_EN_;
 532         else
 533                 read_buf &= ~Tx_COE_EN_;
 534
 535         if (features & NETIF_F_RXCSUM)
 536                 read_buf |= Rx_COE_EN_;
 537         else
 538                 read_buf &= ~Rx_COE_EN_;
 539
 540         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 541         if (ret < 0) {
 542                 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
 543                 return ret;
 544         }
 545
 546         netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
 547         return 0;
 548 }
 549
 550 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 551 {
 552         return MAX_EEPROM_SIZE;
 553 }
 554
 555 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 556                                        struct ethtool_eeprom *ee, u8 *data)
 557 {
 558         struct usbnet *dev = netdev_priv(netdev);
 559
 560         ee->magic = LAN95XX_EEPROM_MAGIC;
 561
 562         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 563 }
 564
 565 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 566                                        struct ethtool_eeprom *ee, u8 *data)
 567 {
 568         struct usbnet *dev = netdev_priv(netdev);
 569
 570         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 571                 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
 572                             ee->magic);
 573                 return -EINVAL;
 574         }
 575
 576         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 577 }
 578
 579 static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
 580 {
 581         /* all smsc95xx registers */
 582         return COE_CR - ID_REV + 1;
 583 }
 584
 585 static void
 586 smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
 587                          void *buf)
 588 {
 589         struct usbnet *dev = netdev_priv(netdev);
 590         unsigned int i, j;
 591         int retval;
 592         u32 *data = buf;
 593
 594         retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
 595         if (retval < 0) {
 596                 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
 597                 return;
 598         }
 599
 600         for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
 601                 retval = smsc95xx_read_reg(dev, i, &data[j]);
 602                 if (retval < 0) {
 603                         netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
 604                         return;
 605                 }
 606         }
 607 }
 608
 609 static const struct ethtool_ops smsc95xx_ethtool_ops = {
 610         .get_link       = usbnet_get_link,
 611         .nway_reset     = usbnet_nway_reset,
 612         .get_drvinfo    = usbnet_get_drvinfo,
 613         .get_msglevel   = usbnet_get_msglevel,
 614         .set_msglevel   = usbnet_set_msglevel,
 615         .get_settings   = usbnet_get_settings,
 616         .set_settings   = usbnet_set_settings,
 617         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 618         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 619         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 620         .get_regs_len   = smsc95xx_ethtool_getregslen,
 621         .get_regs       = smsc95xx_ethtool_getregs,
 622 };
 623
 624 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 625 {
 626         struct usbnet *dev = netdev_priv(netdev);
 627
 628         if (!netif_running(netdev))
 629                 return -EINVAL;
 630
 631         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 632 }
 633
 634 static void smsc95xx_init_mac_address(struct usbnet *dev)
 635 {
 636         /* try reading mac address from EEPROM */
 637         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 638                         dev->net->dev_addr) == 0) {
 639                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 640                         /* eeprom values are valid so use them */
 641                         netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
 642                         return;
 643                 }
 644         }
 645
 646         /* no eeprom, or eeprom values are invalid. generate random MAC */
 647         eth_hw_addr_random(dev->net);
 648         netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 649 }
 650
 651 static int smsc95xx_set_mac_address(struct usbnet *dev)
 652 {
 653         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 654                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 655         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 656         int ret;
 657
 658         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 659         if (ret < 0) {
 660                 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
 661                 return ret;
 662         }
 663
 664         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 665         if (ret < 0) {
 666                 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
 667                 return ret;
 668         }
 669
 670         return 0;
 671 }
 672
 673 /* starts the TX path */
 674 static void smsc95xx_start_tx_path(struct usbnet *dev)
 675 {
 676         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 677         unsigned long flags;
 678
 679         /* Enable Tx at MAC */
 680         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 681         pdata->mac_cr |= MAC_CR_TXEN_;
 682         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 683
 684         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 685
 686         /* Enable Tx at SCSRs */
 687         smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
 688 }
 689
 690 /* Starts the Receive path */
 691 static void smsc95xx_start_rx_path(struct usbnet *dev)
 692 {
 693         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 694         unsigned long flags;
 695
 696         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 697         pdata->mac_cr |= MAC_CR_RXEN_;
 698         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 699
 700         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 701 }
 702
 703 static int smsc95xx_phy_initialize(struct usbnet *dev)
 704 {
 705         int bmcr, timeout = 0;
 706
 707         /* Initialize MII structure */
 708         dev->mii.dev = dev->net;
 709         dev->mii.mdio_read = smsc95xx_mdio_read;
 710         dev->mii.mdio_write = smsc95xx_mdio_write;
 711         dev->mii.phy_id_mask = 0x1f;
 712         dev->mii.reg_num_mask = 0x1f;
 713         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 714
 715         /* reset phy and wait for reset to complete */
 716         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 717
 718         do {
 719                 msleep(10);
 720                 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
 721                 timeout++;
 722         } while ((bmcr & BMCR_RESET) && (timeout < 100));
 723
 724         if (timeout >= 100) {
 725                 netdev_warn(dev->net, "timeout on PHY Reset");
 726                 return -EIO;
 727         }
 728
 729         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 730                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 731                 ADVERTISE_PAUSE_ASYM);
 732
 733         /* read to clear */
 734         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 735
 736         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 737                 PHY_INT_MASK_DEFAULT_);
 738         mii_nway_restart(&dev->mii);
 739
 740         netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
 741         return 0;
 742 }
 743
 744 static int smsc95xx_reset(struct usbnet *dev)
 745 {
 746         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 747         u32 read_buf, write_buf, burst_cap;
 748         int ret = 0, timeout;
 749
 750         netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
 751
 752         ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
 753         if (ret < 0) {
 754                 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
 755                             ret);
 756                 return ret;
 757         }
 758
 759         timeout = 0;
 760         do {
 761                 msleep(10);
 762                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 763                 if (ret < 0) {
 764                         netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 765                         return ret;
 766                 }
 767                 timeout++;
 768         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 769
 770         if (timeout >= 100) {
 771                 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
 772                 return ret;
 773         }
 774
 775         ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
 776         if (ret < 0) {
 777                 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
 778                 return ret;
 779         }
 780
 781         timeout = 0;
 782         do {
 783                 msleep(10);
 784                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 785                 if (ret < 0) {
 786                         netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
 787                         return ret;
 788                 }
 789                 timeout++;
 790         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 791
 792         if (timeout >= 100) {
 793                 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
 794                 return ret;
 795         }
 796
 797         ret = smsc95xx_set_mac_address(dev);
 798         if (ret < 0)
 799                 return ret;
 800
 801         netif_dbg(dev, ifup, dev->net,
 802                   "MAC Address: %pM\n", dev->net->dev_addr);
 803
 804         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 805         if (ret < 0) {
 806                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 807                 return ret;
 808         }
 809
 810         netif_dbg(dev, ifup, dev->net,
 811                   "Read Value from HW_CFG : 0x%08x\n", read_buf);
 812
 813         read_buf |= HW_CFG_BIR_;
 814
 815         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 816         if (ret < 0) {
 817                 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
 818                             ret);
 819                 return ret;
 820         }
 821
 822         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 823         if (ret < 0) {
 824                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 825                 return ret;
 826         }
 827         netif_dbg(dev, ifup, dev->net,
 828                   "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
 829                   read_buf);
 830
 831         if (!turbo_mode) {
 832                 burst_cap = 0;
 833                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 834         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 835                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 836                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 837         } else {
 838                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 839                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 840         }
 841
 842         netif_dbg(dev, ifup, dev->net,
 843                   "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
 844
 845         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 846         if (ret < 0) {
 847                 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
 848                 return ret;
 849         }
 850
 851         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 852         if (ret < 0) {
 853                 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
 854                 return ret;
 855         }
 856         netif_dbg(dev, ifup, dev->net,
 857                   "Read Value from BURST_CAP after writing: 0x%08x\n",
 858                   read_buf);
 859
 860         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
 861         if (ret < 0) {
 862                 netdev_warn(dev->net, "ret = %d\n", ret);
 863                 return ret;
 864         }
 865
 866         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 867         if (ret < 0) {
 868                 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
 869                 return ret;
 870         }
 871         netif_dbg(dev, ifup, dev->net,
 872                   "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
 873                   read_buf);
 874
 875         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 876         if (ret < 0) {
 877                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 878                 return ret;
 879         }
 880         netif_dbg(dev, ifup, dev->net,
 881                   "Read Value from HW_CFG: 0x%08x\n", read_buf);
 882
 883         if (turbo_mode)
 884                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 885
 886         read_buf &= ~HW_CFG_RXDOFF_;
 887
 888         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 889         read_buf |= NET_IP_ALIGN << 9;
 890
 891         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 892         if (ret < 0) {
 893                 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
 894                             ret);
 895                 return ret;
 896         }
 897
 898         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 899         if (ret < 0) {
 900                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 901                 return ret;
 902         }
 903         netif_dbg(dev, ifup, dev->net,
 904                   "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
 905
 906         ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
 907         if (ret < 0) {
 908                 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
 909                             ret);
 910                 return ret;
 911         }
 912
 913         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 914         if (ret < 0) {
 915                 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
 916                 return ret;
 917         }
 918         netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
 919
 920         /* Configure GPIO pins as LED outputs */
 921         write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
 922                 LED_GPIO_CFG_FDX_LED;
 923         ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
 924         if (ret < 0) {
 925                 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
 926                             ret);
 927                 return ret;
 928         }
 929
 930         /* Init Tx */
 931         ret = smsc95xx_write_reg(dev, FLOW, 0);
 932         if (ret < 0) {
 933                 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
 934                 return ret;
 935         }
 936
 937         ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
 938         if (ret < 0) {
 939                 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
 940                 return ret;
 941         }
 942
 943         /* Don't need mac_cr_lock during initialisation */
 944         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 945         if (ret < 0) {
 946                 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
 947                 return ret;
 948         }
 949
 950         /* Init Rx */
 951         /* Set Vlan */
 952         ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
 953         if (ret < 0) {
 954                 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
 955                 return ret;
 956         }
 957
 958         /* Enable or disable checksum offload engines */
 959         smsc95xx_set_features(dev->net, dev->net->features);
 960
 961         smsc95xx_set_multicast(dev->net);
 962
 963         if (smsc95xx_phy_initialize(dev) < 0)
 964                 return -EIO;
 965
 966         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
 967         if (ret < 0) {
 968                 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
 969                 return ret;
 970         }
 971
 972         /* enable PHY interrupts */
 973         read_buf |= INT_EP_CTL_PHY_INT_;
 974
 975         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
 976         if (ret < 0) {
 977                 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
 978                 return ret;
 979         }
 980
 981         smsc95xx_start_tx_path(dev);
 982         smsc95xx_start_rx_path(dev);
 983
 984         netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
 985         return 0;
 986 }
 987
 988 static const struct net_device_ops smsc95xx_netdev_ops = {
 989         .ndo_open               = usbnet_open,
 990         .ndo_stop               = usbnet_stop,
 991         .ndo_start_xmit         = usbnet_start_xmit,
 992         .ndo_tx_timeout         = usbnet_tx_timeout,
 993         .ndo_change_mtu         = usbnet_change_mtu,
 994         .ndo_set_mac_address    = eth_mac_addr,
 995         .ndo_validate_addr      = eth_validate_addr,
 996         .ndo_do_ioctl           = smsc95xx_ioctl,
 997         .ndo_set_rx_mode        = smsc95xx_set_multicast,
 998         .ndo_set_features       = smsc95xx_set_features,
 999 };
1000
1001 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1002 {
1003         struct smsc95xx_priv *pdata = NULL;
1004         int ret;
1005
1006         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1007
1008         ret = usbnet_get_endpoints(dev, intf);
1009         if (ret < 0) {
1010                 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1011                 return ret;
1012         }
1013
1014         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1015                 GFP_KERNEL);
1016
1017         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1018         if (!pdata) {
1019                 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1020                 return -ENOMEM;
1021         }
1022
1023         spin_lock_init(&pdata->mac_cr_lock);
1024
1025         if (DEFAULT_TX_CSUM_ENABLE)
1026                 dev->net->features |= NETIF_F_HW_CSUM;
1027         if (DEFAULT_RX_CSUM_ENABLE)
1028                 dev->net->features |= NETIF_F_RXCSUM;
1029
1030         dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1031
1032         smsc95xx_init_mac_address(dev);
1033
1034         /* Init all registers */
1035         ret = smsc95xx_reset(dev);
1036
1037         dev->net->netdev_ops = &smsc95xx_netdev_ops;
1038         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1039         dev->net->flags |= IFF_MULTICAST;
1040         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1041         dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1042         return 0;
1043 }
1044
1045 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1046 {
1047         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1048         if (pdata) {
1049                 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1050                 kfree(pdata);
1051                 pdata = NULL;
1052                 dev->data[0] = 0;
1053         }
1054 }
1055
1056 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1057 {
1058         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1059         skb->ip_summed = CHECKSUM_COMPLETE;
1060         skb_trim(skb, skb->len - 2);
1061 }
1062
1063 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1064 {
1065         while (skb->len > 0) {
1066                 u32 header, align_count;
1067                 struct sk_buff *ax_skb;
1068                 unsigned char *packet;
1069                 u16 size;
1070
1071                 memcpy(&header, skb->data, sizeof(header));
1072                 le32_to_cpus(&header);
1073                 skb_pull(skb, 4 + NET_IP_ALIGN);
1074                 packet = skb->data;
1075
1076                 /* get the packet length */
1077                 size = (u16)((header & RX_STS_FL_) >> 16);
1078                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1079
1080                 if (unlikely(header & RX_STS_ES_)) {
1081                         netif_dbg(dev, rx_err, dev->net,
1082                                   "Error header=0x%08x\n", header);
1083                         dev->net->stats.rx_errors++;
1084                         dev->net->stats.rx_dropped++;
1085
1086                         if (header & RX_STS_CRC_) {
1087                                 dev->net->stats.rx_crc_errors++;
1088                         } else {
1089                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1090                                         dev->net->stats.rx_frame_errors++;
1091
1092                                 if ((header & RX_STS_LE_) &&
1093                                         (!(header & RX_STS_FT_)))
1094                                         dev->net->stats.rx_length_errors++;
1095                         }
1096                 } else {
1097                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1098                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1099                                 netif_dbg(dev, rx_err, dev->net,
1100                                           "size err header=0x%08x\n", header);
1101                                 return 0;
1102                         }
1103
1104                         /* last frame in this batch */
1105                         if (skb->len == size) {
1106                                 if (dev->net->features & NETIF_F_RXCSUM)
1107                                         smsc95xx_rx_csum_offload(skb);
1108                                 skb_trim(skb, skb->len - 4); /* remove fcs */
1109                                 skb->truesize = size + sizeof(struct sk_buff);
1110
1111                                 return 1;
1112                         }
1113
1114                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1115                         if (unlikely(!ax_skb)) {
1116                                 netdev_warn(dev->net, "Error allocating skb\n");
1117                                 return 0;
1118                         }
1119
1120                         ax_skb->len = size;
1121                         ax_skb->data = packet;
1122                         skb_set_tail_pointer(ax_skb, size);
1123
1124                         if (dev->net->features & NETIF_F_RXCSUM)
1125                                 smsc95xx_rx_csum_offload(ax_skb);
1126                         skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1127                         ax_skb->truesize = size + sizeof(struct sk_buff);
1128
1129                         usbnet_skb_return(dev, ax_skb);
1130                 }
1131
1132                 skb_pull(skb, size);
1133
1134                 /* padding bytes before the next frame starts */
1135                 if (skb->len)
1136                         skb_pull(skb, align_count);
1137         }
1138
1139         if (unlikely(skb->len < 0)) {
1140                 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1141                 return 0;
1142         }
1143
1144         return 1;
1145 }
1146
1147 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1148 {
1149         u16 low_16 = (u16)skb_checksum_start_offset(skb);
1150         u16 high_16 = low_16 + skb->csum_offset;
1151         return (high_16 << 16) | low_16;
1152 }
1153
1154 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1155                                          struct sk_buff *skb, gfp_t flags)
1156 {
1157         bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
1158         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1159         u32 tx_cmd_a, tx_cmd_b;
1160
1161         /* We do not advertise SG, so skbs should be already linearized */
1162         BUG_ON(skb_shinfo(skb)->nr_frags);
1163
1164         if (skb_headroom(skb) < overhead) {
1165                 struct sk_buff *skb2 = skb_copy_expand(skb,
1166                         overhead, 0, flags);
1167                 dev_kfree_skb_any(skb);
1168                 skb = skb2;
1169                 if (!skb)
1170                         return NULL;
1171         }
1172
1173         if (csum) {
1174                 if (skb->len <= 45) {
1175                         /* workaround - hardware tx checksum does not work
1176                          * properly with extremely small packets */
1177                         long csstart = skb_checksum_start_offset(skb);
1178                         __wsum calc = csum_partial(skb->data + csstart,
1179                                 skb->len - csstart, 0);
1180                         *((__sum16 *)(skb->data + csstart
1181                                 + skb->csum_offset)) = csum_fold(calc);
1182
1183                         csum = false;
1184                 } else {
1185                         u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1186                         skb_push(skb, 4);
1187                         memcpy(skb->data, &csum_preamble, 4);
1188                 }
1189         }
1190
1191         skb_push(skb, 4);
1192         tx_cmd_b = (u32)(skb->len - 4);
1193         if (csum)
1194                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1195         cpu_to_le32s(&tx_cmd_b);
1196         memcpy(skb->data, &tx_cmd_b, 4);
1197
1198         skb_push(skb, 4);
1199         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1200                 TX_CMD_A_LAST_SEG_;
1201         cpu_to_le32s(&tx_cmd_a);
1202         memcpy(skb->data, &tx_cmd_a, 4);
1203
1204         return skb;
1205 }
1206
1207 static const struct driver_info smsc95xx_info = {
1208         .description    = "smsc95xx USB 2.0 Ethernet",
1209         .bind           = smsc95xx_bind,
1210         .unbind         = smsc95xx_unbind,
1211         .link_reset     = smsc95xx_link_reset,
1212         .reset          = smsc95xx_reset,
1213         .rx_fixup       = smsc95xx_rx_fixup,
1214         .tx_fixup       = smsc95xx_tx_fixup,
1215         .status         = smsc95xx_status,
1216         .flags          = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1217 };
1218
1219 static const struct usb_device_id products[] = {
1220         {
1221                 /* SMSC9500 USB Ethernet Device */
1222                 USB_DEVICE(0x0424, 0x9500),
1223                 .driver_info = (unsigned long) &smsc95xx_info,
1224         },
1225         {
1226                 /* SMSC9505 USB Ethernet Device */
1227                 USB_DEVICE(0x0424, 0x9505),
1228                 .driver_info = (unsigned long) &smsc95xx_info,
1229         },
1230         {
1231                 /* SMSC9500A USB Ethernet Device */
1232                 USB_DEVICE(0x0424, 0x9E00),
1233                 .driver_info = (unsigned long) &smsc95xx_info,
1234         },
1235         {
1236                 /* SMSC9505A USB Ethernet Device */
1237                 USB_DEVICE(0x0424, 0x9E01),
1238                 .driver_info = (unsigned long) &smsc95xx_info,
1239         },
1240         {
1241                 /* SMSC9512/9514 USB Hub & Ethernet Device */
1242                 USB_DEVICE(0x0424, 0xec00),
1243                 .driver_info = (unsigned long) &smsc95xx_info,
1244         },
1245         {
1246                 /* SMSC9500 USB Ethernet Device (SAL10) */
1247                 USB_DEVICE(0x0424, 0x9900),
1248                 .driver_info = (unsigned long) &smsc95xx_info,
1249         },
1250         {
1251                 /* SMSC9505 USB Ethernet Device (SAL10) */
1252                 USB_DEVICE(0x0424, 0x9901),
1253                 .driver_info = (unsigned long) &smsc95xx_info,
1254         },
1255         {
1256                 /* SMSC9500A USB Ethernet Device (SAL10) */
1257                 USB_DEVICE(0x0424, 0x9902),
1258                 .driver_info = (unsigned long) &smsc95xx_info,
1259         },
1260         {
1261                 /* SMSC9505A USB Ethernet Device (SAL10) */
1262                 USB_DEVICE(0x0424, 0x9903),
1263                 .driver_info = (unsigned long) &smsc95xx_info,
1264         },
1265         {
1266                 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1267                 USB_DEVICE(0x0424, 0x9904),
1268                 .driver_info = (unsigned long) &smsc95xx_info,
1269         },
1270         {
1271                 /* SMSC9500A USB Ethernet Device (HAL) */
1272                 USB_DEVICE(0x0424, 0x9905),
1273                 .driver_info = (unsigned long) &smsc95xx_info,
1274         },
1275         {
1276                 /* SMSC9505A USB Ethernet Device (HAL) */
1277                 USB_DEVICE(0x0424, 0x9906),
1278                 .driver_info = (unsigned long) &smsc95xx_info,
1279         },
1280         {
1281                 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1282                 USB_DEVICE(0x0424, 0x9907),
1283                 .driver_info = (unsigned long) &smsc95xx_info,
1284         },
1285         {
1286                 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1287                 USB_DEVICE(0x0424, 0x9908),
1288                 .driver_info = (unsigned long) &smsc95xx_info,
1289         },
1290         {
1291                 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1292                 USB_DEVICE(0x0424, 0x9909),
1293                 .driver_info = (unsigned long) &smsc95xx_info,
1294         },
1295         {
1296                 /* SMSC LAN9530 USB Ethernet Device */
1297                 USB_DEVICE(0x0424, 0x9530),
1298                 .driver_info = (unsigned long) &smsc95xx_info,
1299         },
1300         {
1301                 /* SMSC LAN9730 USB Ethernet Device */
1302                 USB_DEVICE(0x0424, 0x9730),
1303                 .driver_info = (unsigned long) &smsc95xx_info,
1304         },
1305         {
1306                 /* SMSC LAN89530 USB Ethernet Device */
1307                 USB_DEVICE(0x0424, 0x9E08),
1308                 .driver_info = (unsigned long) &smsc95xx_info,
1309         },
1310         { },            /* END */
1311 };
1312 MODULE_DEVICE_TABLE(usb, products);
1313
1314 static struct usb_driver smsc95xx_driver = {
1315         .name           = "smsc95xx",
1316         .id_table       = products,
1317         .probe          = usbnet_probe,
1318         .suspend        = usbnet_suspend,
1319         .resume         = usbnet_resume,
1320         .disconnect     = usbnet_disconnect,
1321         .disable_hub_initiated_lpm = 1,
1322 };
1323
1324 module_usb_driver(smsc95xx_driver);
1325
1326 MODULE_AUTHOR("Nancy Lin");
1327 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
1328 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1329 MODULE_LICENSE("GPL");