Merge branch 'for-6.1/logitech' into for-linus
[platform/kernel/linux-starfive.git] / drivers / net / usb / ax88179_178a.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4  *
5  * Copyright (C) 2011-2013 ASIX
6  */
7
8 #include <linux/module.h>
9 #include <linux/etherdevice.h>
10 #include <linux/mii.h>
11 #include <linux/usb.h>
12 #include <linux/crc32.h>
13 #include <linux/usb/usbnet.h>
14 #include <uapi/linux/mdio.h>
15 #include <linux/mdio.h>
16
17 #define AX88179_PHY_ID                          0x03
18 #define AX_EEPROM_LEN                           0x100
19 #define AX88179_EEPROM_MAGIC                    0x17900b95
20 #define AX_MCAST_FLTSIZE                        8
21 #define AX_MAX_MCAST                            64
22 #define AX_INT_PPLS_LINK                        ((u32)BIT(16))
23 #define AX_RXHDR_L4_TYPE_MASK                   0x1c
24 #define AX_RXHDR_L4_TYPE_UDP                    4
25 #define AX_RXHDR_L4_TYPE_TCP                    16
26 #define AX_RXHDR_L3CSUM_ERR                     2
27 #define AX_RXHDR_L4CSUM_ERR                     1
28 #define AX_RXHDR_CRC_ERR                        ((u32)BIT(29))
29 #define AX_RXHDR_DROP_ERR                       ((u32)BIT(31))
30 #define AX_ACCESS_MAC                           0x01
31 #define AX_ACCESS_PHY                           0x02
32 #define AX_ACCESS_EEPROM                        0x04
33 #define AX_ACCESS_EFUS                          0x05
34 #define AX_RELOAD_EEPROM_EFUSE                  0x06
35 #define AX_PAUSE_WATERLVL_HIGH                  0x54
36 #define AX_PAUSE_WATERLVL_LOW                   0x55
37
38 #define PHYSICAL_LINK_STATUS                    0x02
39         #define AX_USB_SS               0x04
40         #define AX_USB_HS               0x02
41
42 #define GENERAL_STATUS                          0x03
43 /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
44         #define AX_SECLD                0x04
45
46 #define AX_SROM_ADDR                            0x07
47 #define AX_SROM_CMD                             0x0a
48         #define EEP_RD                  0x04
49         #define EEP_BUSY                0x10
50
51 #define AX_SROM_DATA_LOW                        0x08
52 #define AX_SROM_DATA_HIGH                       0x09
53
54 #define AX_RX_CTL                               0x0b
55         #define AX_RX_CTL_DROPCRCERR    0x0100
56         #define AX_RX_CTL_IPE           0x0200
57         #define AX_RX_CTL_START         0x0080
58         #define AX_RX_CTL_AP            0x0020
59         #define AX_RX_CTL_AM            0x0010
60         #define AX_RX_CTL_AB            0x0008
61         #define AX_RX_CTL_AMALL         0x0002
62         #define AX_RX_CTL_PRO           0x0001
63         #define AX_RX_CTL_STOP          0x0000
64
65 #define AX_NODE_ID                              0x10
66 #define AX_MULFLTARY                            0x16
67
68 #define AX_MEDIUM_STATUS_MODE                   0x22
69         #define AX_MEDIUM_GIGAMODE      0x01
70         #define AX_MEDIUM_FULL_DUPLEX   0x02
71         #define AX_MEDIUM_EN_125MHZ     0x08
72         #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
73         #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
74         #define AX_MEDIUM_RECEIVE_EN    0x100
75         #define AX_MEDIUM_PS            0x200
76         #define AX_MEDIUM_JUMBO_EN      0x8040
77
78 #define AX_MONITOR_MOD                          0x24
79         #define AX_MONITOR_MODE_RWLC    0x02
80         #define AX_MONITOR_MODE_RWMP    0x04
81         #define AX_MONITOR_MODE_PMEPOL  0x20
82         #define AX_MONITOR_MODE_PMETYPE 0x40
83
84 #define AX_GPIO_CTRL                            0x25
85         #define AX_GPIO_CTRL_GPIO3EN    0x80
86         #define AX_GPIO_CTRL_GPIO2EN    0x40
87         #define AX_GPIO_CTRL_GPIO1EN    0x20
88
89 #define AX_PHYPWR_RSTCTL                        0x26
90         #define AX_PHYPWR_RSTCTL_BZ     0x0010
91         #define AX_PHYPWR_RSTCTL_IPRL   0x0020
92         #define AX_PHYPWR_RSTCTL_AT     0x1000
93
94 #define AX_RX_BULKIN_QCTRL                      0x2e
95 #define AX_CLK_SELECT                           0x33
96         #define AX_CLK_SELECT_BCS       0x01
97         #define AX_CLK_SELECT_ACS       0x02
98         #define AX_CLK_SELECT_ULR       0x08
99
100 #define AX_RXCOE_CTL                            0x34
101         #define AX_RXCOE_IP             0x01
102         #define AX_RXCOE_TCP            0x02
103         #define AX_RXCOE_UDP            0x04
104         #define AX_RXCOE_TCPV6          0x20
105         #define AX_RXCOE_UDPV6          0x40
106
107 #define AX_TXCOE_CTL                            0x35
108         #define AX_TXCOE_IP             0x01
109         #define AX_TXCOE_TCP            0x02
110         #define AX_TXCOE_UDP            0x04
111         #define AX_TXCOE_TCPV6          0x20
112         #define AX_TXCOE_UDPV6          0x40
113
114 #define AX_LEDCTRL                              0x73
115
116 #define GMII_PHY_PHYSR                          0x11
117         #define GMII_PHY_PHYSR_SMASK    0xc000
118         #define GMII_PHY_PHYSR_GIGA     0x8000
119         #define GMII_PHY_PHYSR_100      0x4000
120         #define GMII_PHY_PHYSR_FULL     0x2000
121         #define GMII_PHY_PHYSR_LINK     0x400
122
123 #define GMII_LED_ACT                            0x1a
124         #define GMII_LED_ACTIVE_MASK    0xff8f
125         #define GMII_LED0_ACTIVE        BIT(4)
126         #define GMII_LED1_ACTIVE        BIT(5)
127         #define GMII_LED2_ACTIVE        BIT(6)
128
129 #define GMII_LED_LINK                           0x1c
130         #define GMII_LED_LINK_MASK      0xf888
131         #define GMII_LED0_LINK_10       BIT(0)
132         #define GMII_LED0_LINK_100      BIT(1)
133         #define GMII_LED0_LINK_1000     BIT(2)
134         #define GMII_LED1_LINK_10       BIT(4)
135         #define GMII_LED1_LINK_100      BIT(5)
136         #define GMII_LED1_LINK_1000     BIT(6)
137         #define GMII_LED2_LINK_10       BIT(8)
138         #define GMII_LED2_LINK_100      BIT(9)
139         #define GMII_LED2_LINK_1000     BIT(10)
140         #define LED0_ACTIVE             BIT(0)
141         #define LED0_LINK_10            BIT(1)
142         #define LED0_LINK_100           BIT(2)
143         #define LED0_LINK_1000          BIT(3)
144         #define LED0_FD                 BIT(4)
145         #define LED0_USB3_MASK          0x001f
146         #define LED1_ACTIVE             BIT(5)
147         #define LED1_LINK_10            BIT(6)
148         #define LED1_LINK_100           BIT(7)
149         #define LED1_LINK_1000          BIT(8)
150         #define LED1_FD                 BIT(9)
151         #define LED1_USB3_MASK          0x03e0
152         #define LED2_ACTIVE             BIT(10)
153         #define LED2_LINK_1000          BIT(13)
154         #define LED2_LINK_100           BIT(12)
155         #define LED2_LINK_10            BIT(11)
156         #define LED2_FD                 BIT(14)
157         #define LED_VALID               BIT(15)
158         #define LED2_USB3_MASK          0x7c00
159
160 #define GMII_PHYPAGE                            0x1e
161 #define GMII_PHY_PAGE_SELECT                    0x1f
162         #define GMII_PHY_PGSEL_EXT      0x0007
163         #define GMII_PHY_PGSEL_PAGE0    0x0000
164         #define GMII_PHY_PGSEL_PAGE3    0x0003
165         #define GMII_PHY_PGSEL_PAGE5    0x0005
166
167 static int ax88179_reset(struct usbnet *dev);
168
169 struct ax88179_data {
170         u8  eee_enabled;
171         u8  eee_active;
172         u16 rxctl;
173         u8 in_pm;
174         u32 wol_supported;
175         u32 wolopts;
176 };
177
178 struct ax88179_int_data {
179         __le32 intdata1;
180         __le32 intdata2;
181 };
182
183 static const struct {
184         unsigned char ctrl, timer_l, timer_h, size, ifg;
185 } AX88179_BULKIN_SIZE[] =       {
186         {7, 0x4f, 0,    0x12, 0xff},
187         {7, 0x20, 3,    0x16, 0xff},
188         {7, 0xae, 7,    0x18, 0xff},
189         {7, 0xcc, 0x4c, 0x18, 8},
190 };
191
192 static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
193 {
194         struct ax88179_data *ax179_data = dev->driver_priv;
195
196         ax179_data->in_pm = pm_mode;
197 }
198
199 static int ax88179_in_pm(struct usbnet *dev)
200 {
201         struct ax88179_data *ax179_data = dev->driver_priv;
202
203         return ax179_data->in_pm;
204 }
205
206 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
207                               u16 size, void *data)
208 {
209         int ret;
210         int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
211
212         BUG_ON(!dev);
213
214         if (!ax88179_in_pm(dev))
215                 fn = usbnet_read_cmd;
216         else
217                 fn = usbnet_read_cmd_nopm;
218
219         ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
220                  value, index, data, size);
221
222         if (unlikely(ret < 0))
223                 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
224                             index, ret);
225
226         return ret;
227 }
228
229 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
230                                u16 size, const void *data)
231 {
232         int ret;
233         int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
234
235         BUG_ON(!dev);
236
237         if (!ax88179_in_pm(dev))
238                 fn = usbnet_write_cmd;
239         else
240                 fn = usbnet_write_cmd_nopm;
241
242         ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
243                  value, index, data, size);
244
245         if (unlikely(ret < 0))
246                 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
247                             index, ret);
248
249         return ret;
250 }
251
252 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
253                                     u16 index, u16 size, void *data)
254 {
255         u16 buf;
256
257         if (2 == size) {
258                 buf = *((u16 *)data);
259                 cpu_to_le16s(&buf);
260                 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
261                                        USB_RECIP_DEVICE, value, index, &buf,
262                                        size);
263         } else {
264                 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
265                                        USB_RECIP_DEVICE, value, index, data,
266                                        size);
267         }
268 }
269
270 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
271                             u16 size, void *data)
272 {
273         int ret;
274
275         if (2 == size) {
276                 u16 buf = 0;
277                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
278                 le16_to_cpus(&buf);
279                 *((u16 *)data) = buf;
280         } else if (4 == size) {
281                 u32 buf = 0;
282                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
283                 le32_to_cpus(&buf);
284                 *((u32 *)data) = buf;
285         } else {
286                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
287         }
288
289         return ret;
290 }
291
292 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
293                              u16 size, const void *data)
294 {
295         int ret;
296
297         if (2 == size) {
298                 u16 buf;
299                 buf = *((u16 *)data);
300                 cpu_to_le16s(&buf);
301                 ret = __ax88179_write_cmd(dev, cmd, value, index,
302                                           size, &buf);
303         } else {
304                 ret = __ax88179_write_cmd(dev, cmd, value, index,
305                                           size, data);
306         }
307
308         return ret;
309 }
310
311 static void ax88179_status(struct usbnet *dev, struct urb *urb)
312 {
313         struct ax88179_int_data *event;
314         u32 link;
315
316         if (urb->actual_length < 8)
317                 return;
318
319         event = urb->transfer_buffer;
320         le32_to_cpus((void *)&event->intdata1);
321
322         link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
323
324         if (netif_carrier_ok(dev->net) != link) {
325                 usbnet_link_change(dev, link, 1);
326                 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
327         }
328 }
329
330 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
331 {
332         struct usbnet *dev = netdev_priv(netdev);
333         u16 res;
334
335         ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
336         return res;
337 }
338
339 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
340                                int val)
341 {
342         struct usbnet *dev = netdev_priv(netdev);
343         u16 res = (u16) val;
344
345         ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
346 }
347
348 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
349                                            u16 devad)
350 {
351         u16 tmp16;
352         int ret;
353
354         tmp16 = devad;
355         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
356                                 MII_MMD_CTRL, 2, &tmp16);
357
358         tmp16 = prtad;
359         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
360                                 MII_MMD_DATA, 2, &tmp16);
361
362         tmp16 = devad | MII_MMD_CTRL_NOINCR;
363         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
364                                 MII_MMD_CTRL, 2, &tmp16);
365
366         return ret;
367 }
368
369 static int
370 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
371 {
372         int ret;
373         u16 tmp16;
374
375         ax88179_phy_mmd_indirect(dev, prtad, devad);
376
377         ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
378                                MII_MMD_DATA, 2, &tmp16);
379         if (ret < 0)
380                 return ret;
381
382         return tmp16;
383 }
384
385 static int
386 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
387                                u16 data)
388 {
389         int ret;
390
391         ax88179_phy_mmd_indirect(dev, prtad, devad);
392
393         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
394                                 MII_MMD_DATA, 2, &data);
395
396         if (ret < 0)
397                 return ret;
398
399         return 0;
400 }
401
402 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
403 {
404         struct usbnet *dev = usb_get_intfdata(intf);
405         struct ax88179_data *priv = dev->driver_priv;
406         u16 tmp16;
407         u8 tmp8;
408
409         ax88179_set_pm_mode(dev, true);
410
411         usbnet_suspend(intf, message);
412
413         /* Enable WoL */
414         if (priv->wolopts) {
415                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
416                                  1, 1, &tmp8);
417                 if (priv->wolopts & WAKE_PHY)
418                         tmp8 |= AX_MONITOR_MODE_RWLC;
419                 if (priv->wolopts & WAKE_MAGIC)
420                         tmp8 |= AX_MONITOR_MODE_RWMP;
421
422                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
423                                   1, 1, &tmp8);
424         }
425
426         /* Disable RX path */
427         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
428                          2, 2, &tmp16);
429         tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
430         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
431                           2, 2, &tmp16);
432
433         /* Force bulk-in zero length */
434         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
435                          2, 2, &tmp16);
436
437         tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
438         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
439                           2, 2, &tmp16);
440
441         /* change clock */
442         tmp8 = 0;
443         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
444
445         /* Configure RX control register => stop operation */
446         tmp16 = AX_RX_CTL_STOP;
447         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
448
449         ax88179_set_pm_mode(dev, false);
450
451         return 0;
452 }
453
454 /* This function is used to enable the autodetach function. */
455 /* This function is determined by offset 0x43 of EEPROM */
456 static int ax88179_auto_detach(struct usbnet *dev)
457 {
458         u16 tmp16;
459         u8 tmp8;
460
461         if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
462                 return 0;
463
464         if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
465                 return 0;
466
467         /* Enable Auto Detach bit */
468         tmp8 = 0;
469         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
470         tmp8 |= AX_CLK_SELECT_ULR;
471         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
472
473         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
474         tmp16 |= AX_PHYPWR_RSTCTL_AT;
475         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
476
477         return 0;
478 }
479
480 static int ax88179_resume(struct usb_interface *intf)
481 {
482         struct usbnet *dev = usb_get_intfdata(intf);
483
484         ax88179_set_pm_mode(dev, true);
485
486         usbnet_link_change(dev, 0, 0);
487
488         ax88179_reset(dev);
489
490         ax88179_set_pm_mode(dev, false);
491
492         return usbnet_resume(intf);
493 }
494
495 static void
496 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
497 {
498         struct usbnet *dev = netdev_priv(net);
499         struct ax88179_data *priv = dev->driver_priv;
500
501         wolinfo->supported = priv->wol_supported;
502         wolinfo->wolopts = priv->wolopts;
503 }
504
505 static int
506 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
507 {
508         struct usbnet *dev = netdev_priv(net);
509         struct ax88179_data *priv = dev->driver_priv;
510
511         if (wolinfo->wolopts & ~(priv->wol_supported))
512                 return -EINVAL;
513
514         priv->wolopts = wolinfo->wolopts;
515
516         return 0;
517 }
518
519 static int ax88179_get_eeprom_len(struct net_device *net)
520 {
521         return AX_EEPROM_LEN;
522 }
523
524 static int
525 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
526                    u8 *data)
527 {
528         struct usbnet *dev = netdev_priv(net);
529         u16 *eeprom_buff;
530         int first_word, last_word;
531         int i, ret;
532
533         if (eeprom->len == 0)
534                 return -EINVAL;
535
536         eeprom->magic = AX88179_EEPROM_MAGIC;
537
538         first_word = eeprom->offset >> 1;
539         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
540         eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
541                                     GFP_KERNEL);
542         if (!eeprom_buff)
543                 return -ENOMEM;
544
545         /* ax88179/178A returns 2 bytes from eeprom on read */
546         for (i = first_word; i <= last_word; i++) {
547                 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
548                                          &eeprom_buff[i - first_word]);
549                 if (ret < 0) {
550                         kfree(eeprom_buff);
551                         return -EIO;
552                 }
553         }
554
555         memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
556         kfree(eeprom_buff);
557         return 0;
558 }
559
560 static int
561 ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
562                    u8 *data)
563 {
564         struct usbnet *dev = netdev_priv(net);
565         u16 *eeprom_buff;
566         int first_word;
567         int last_word;
568         int ret;
569         int i;
570
571         netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
572                    eeprom->len, eeprom->offset, eeprom->magic);
573
574         if (eeprom->len == 0)
575                 return -EINVAL;
576
577         if (eeprom->magic != AX88179_EEPROM_MAGIC)
578                 return -EINVAL;
579
580         first_word = eeprom->offset >> 1;
581         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
582
583         eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
584                                     GFP_KERNEL);
585         if (!eeprom_buff)
586                 return -ENOMEM;
587
588         /* align data to 16 bit boundaries, read the missing data from
589            the EEPROM */
590         if (eeprom->offset & 1) {
591                 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
592                                        &eeprom_buff[0]);
593                 if (ret < 0) {
594                         netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
595                         goto free;
596                 }
597         }
598
599         if ((eeprom->offset + eeprom->len) & 1) {
600                 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
601                                        &eeprom_buff[last_word - first_word]);
602                 if (ret < 0) {
603                         netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
604                         goto free;
605                 }
606         }
607
608         memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
609
610         for (i = first_word; i <= last_word; i++) {
611                 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
612                            i, eeprom_buff[i - first_word]);
613                 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
614                                         &eeprom_buff[i - first_word]);
615                 if (ret < 0) {
616                         netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
617                         goto free;
618                 }
619                 msleep(20);
620         }
621
622         /* reload EEPROM data */
623         ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
624         if (ret < 0) {
625                 netdev_err(net, "Failed to reload EEPROM data\n");
626                 goto free;
627         }
628
629         ret = 0;
630 free:
631         kfree(eeprom_buff);
632         return ret;
633 }
634
635 static int ax88179_get_link_ksettings(struct net_device *net,
636                                       struct ethtool_link_ksettings *cmd)
637 {
638         struct usbnet *dev = netdev_priv(net);
639
640         mii_ethtool_get_link_ksettings(&dev->mii, cmd);
641
642         return 0;
643 }
644
645 static int ax88179_set_link_ksettings(struct net_device *net,
646                                       const struct ethtool_link_ksettings *cmd)
647 {
648         struct usbnet *dev = netdev_priv(net);
649         return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
650 }
651
652 static int
653 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
654 {
655         int val;
656
657         /* Get Supported EEE */
658         val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
659                                             MDIO_MMD_PCS);
660         if (val < 0)
661                 return val;
662         data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
663
664         /* Get advertisement EEE */
665         val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
666                                             MDIO_MMD_AN);
667         if (val < 0)
668                 return val;
669         data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
670
671         /* Get LP advertisement EEE */
672         val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
673                                             MDIO_MMD_AN);
674         if (val < 0)
675                 return val;
676         data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
677
678         return 0;
679 }
680
681 static int
682 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
683 {
684         u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
685
686         return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
687                                               MDIO_MMD_AN, tmp16);
688 }
689
690 static int ax88179_chk_eee(struct usbnet *dev)
691 {
692         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
693         struct ax88179_data *priv = dev->driver_priv;
694
695         mii_ethtool_gset(&dev->mii, &ecmd);
696
697         if (ecmd.duplex & DUPLEX_FULL) {
698                 int eee_lp, eee_cap, eee_adv;
699                 u32 lp, cap, adv, supported = 0;
700
701                 eee_cap = ax88179_phy_read_mmd_indirect(dev,
702                                                         MDIO_PCS_EEE_ABLE,
703                                                         MDIO_MMD_PCS);
704                 if (eee_cap < 0) {
705                         priv->eee_active = 0;
706                         return false;
707                 }
708
709                 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
710                 if (!cap) {
711                         priv->eee_active = 0;
712                         return false;
713                 }
714
715                 eee_lp = ax88179_phy_read_mmd_indirect(dev,
716                                                        MDIO_AN_EEE_LPABLE,
717                                                        MDIO_MMD_AN);
718                 if (eee_lp < 0) {
719                         priv->eee_active = 0;
720                         return false;
721                 }
722
723                 eee_adv = ax88179_phy_read_mmd_indirect(dev,
724                                                         MDIO_AN_EEE_ADV,
725                                                         MDIO_MMD_AN);
726
727                 if (eee_adv < 0) {
728                         priv->eee_active = 0;
729                         return false;
730                 }
731
732                 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
733                 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
734                 supported = (ecmd.speed == SPEED_1000) ?
735                              SUPPORTED_1000baseT_Full :
736                              SUPPORTED_100baseT_Full;
737
738                 if (!(lp & adv & supported)) {
739                         priv->eee_active = 0;
740                         return false;
741                 }
742
743                 priv->eee_active = 1;
744                 return true;
745         }
746
747         priv->eee_active = 0;
748         return false;
749 }
750
751 static void ax88179_disable_eee(struct usbnet *dev)
752 {
753         u16 tmp16;
754
755         tmp16 = GMII_PHY_PGSEL_PAGE3;
756         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
757                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
758
759         tmp16 = 0x3246;
760         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
761                           MII_PHYADDR, 2, &tmp16);
762
763         tmp16 = GMII_PHY_PGSEL_PAGE0;
764         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
765                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
766 }
767
768 static void ax88179_enable_eee(struct usbnet *dev)
769 {
770         u16 tmp16;
771
772         tmp16 = GMII_PHY_PGSEL_PAGE3;
773         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
774                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
775
776         tmp16 = 0x3247;
777         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
778                           MII_PHYADDR, 2, &tmp16);
779
780         tmp16 = GMII_PHY_PGSEL_PAGE5;
781         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
782                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
783
784         tmp16 = 0x0680;
785         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
786                           MII_BMSR, 2, &tmp16);
787
788         tmp16 = GMII_PHY_PGSEL_PAGE0;
789         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
790                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
791 }
792
793 static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
794 {
795         struct usbnet *dev = netdev_priv(net);
796         struct ax88179_data *priv = dev->driver_priv;
797
798         edata->eee_enabled = priv->eee_enabled;
799         edata->eee_active = priv->eee_active;
800
801         return ax88179_ethtool_get_eee(dev, edata);
802 }
803
804 static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
805 {
806         struct usbnet *dev = netdev_priv(net);
807         struct ax88179_data *priv = dev->driver_priv;
808         int ret;
809
810         priv->eee_enabled = edata->eee_enabled;
811         if (!priv->eee_enabled) {
812                 ax88179_disable_eee(dev);
813         } else {
814                 priv->eee_enabled = ax88179_chk_eee(dev);
815                 if (!priv->eee_enabled)
816                         return -EOPNOTSUPP;
817
818                 ax88179_enable_eee(dev);
819         }
820
821         ret = ax88179_ethtool_set_eee(dev, edata);
822         if (ret)
823                 return ret;
824
825         mii_nway_restart(&dev->mii);
826
827         usbnet_link_change(dev, 0, 0);
828
829         return ret;
830 }
831
832 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
833 {
834         struct usbnet *dev = netdev_priv(net);
835         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
836 }
837
838 static const struct ethtool_ops ax88179_ethtool_ops = {
839         .get_link               = ethtool_op_get_link,
840         .get_msglevel           = usbnet_get_msglevel,
841         .set_msglevel           = usbnet_set_msglevel,
842         .get_wol                = ax88179_get_wol,
843         .set_wol                = ax88179_set_wol,
844         .get_eeprom_len         = ax88179_get_eeprom_len,
845         .get_eeprom             = ax88179_get_eeprom,
846         .set_eeprom             = ax88179_set_eeprom,
847         .get_eee                = ax88179_get_eee,
848         .set_eee                = ax88179_set_eee,
849         .nway_reset             = usbnet_nway_reset,
850         .get_link_ksettings     = ax88179_get_link_ksettings,
851         .set_link_ksettings     = ax88179_set_link_ksettings,
852         .get_ts_info            = ethtool_op_get_ts_info,
853 };
854
855 static void ax88179_set_multicast(struct net_device *net)
856 {
857         struct usbnet *dev = netdev_priv(net);
858         struct ax88179_data *data = dev->driver_priv;
859         u8 *m_filter = ((u8 *)dev->data);
860
861         data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
862
863         if (net->flags & IFF_PROMISC) {
864                 data->rxctl |= AX_RX_CTL_PRO;
865         } else if (net->flags & IFF_ALLMULTI ||
866                    netdev_mc_count(net) > AX_MAX_MCAST) {
867                 data->rxctl |= AX_RX_CTL_AMALL;
868         } else if (netdev_mc_empty(net)) {
869                 /* just broadcast and directed */
870         } else {
871                 /* We use dev->data for our 8 byte filter buffer
872                  * to avoid allocating memory that is tricky to free later
873                  */
874                 u32 crc_bits;
875                 struct netdev_hw_addr *ha;
876
877                 memset(m_filter, 0, AX_MCAST_FLTSIZE);
878
879                 netdev_for_each_mc_addr(ha, net) {
880                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
881                         *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
882                 }
883
884                 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
885                                         AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
886                                         m_filter);
887
888                 data->rxctl |= AX_RX_CTL_AM;
889         }
890
891         ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
892                                 2, 2, &data->rxctl);
893 }
894
895 static int
896 ax88179_set_features(struct net_device *net, netdev_features_t features)
897 {
898         u8 tmp;
899         struct usbnet *dev = netdev_priv(net);
900         netdev_features_t changed = net->features ^ features;
901
902         if (changed & NETIF_F_IP_CSUM) {
903                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
904                 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
905                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
906         }
907
908         if (changed & NETIF_F_IPV6_CSUM) {
909                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
910                 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
911                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
912         }
913
914         if (changed & NETIF_F_RXCSUM) {
915                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
916                 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
917                        AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
918                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
919         }
920
921         return 0;
922 }
923
924 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
925 {
926         struct usbnet *dev = netdev_priv(net);
927         u16 tmp16;
928
929         net->mtu = new_mtu;
930         dev->hard_mtu = net->mtu + net->hard_header_len;
931
932         if (net->mtu > 1500) {
933                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
934                                  2, 2, &tmp16);
935                 tmp16 |= AX_MEDIUM_JUMBO_EN;
936                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
937                                   2, 2, &tmp16);
938         } else {
939                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
940                                  2, 2, &tmp16);
941                 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
942                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
943                                   2, 2, &tmp16);
944         }
945
946         /* max qlen depend on hard_mtu and rx_urb_size */
947         usbnet_update_max_qlen(dev);
948
949         return 0;
950 }
951
952 static int ax88179_set_mac_addr(struct net_device *net, void *p)
953 {
954         struct usbnet *dev = netdev_priv(net);
955         struct sockaddr *addr = p;
956         int ret;
957
958         if (netif_running(net))
959                 return -EBUSY;
960         if (!is_valid_ether_addr(addr->sa_data))
961                 return -EADDRNOTAVAIL;
962
963         eth_hw_addr_set(net, addr->sa_data);
964
965         /* Set the MAC address */
966         ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
967                                  ETH_ALEN, net->dev_addr);
968         if (ret < 0)
969                 return ret;
970
971         return 0;
972 }
973
974 static const struct net_device_ops ax88179_netdev_ops = {
975         .ndo_open               = usbnet_open,
976         .ndo_stop               = usbnet_stop,
977         .ndo_start_xmit         = usbnet_start_xmit,
978         .ndo_tx_timeout         = usbnet_tx_timeout,
979         .ndo_get_stats64        = dev_get_tstats64,
980         .ndo_change_mtu         = ax88179_change_mtu,
981         .ndo_set_mac_address    = ax88179_set_mac_addr,
982         .ndo_validate_addr      = eth_validate_addr,
983         .ndo_eth_ioctl          = ax88179_ioctl,
984         .ndo_set_rx_mode        = ax88179_set_multicast,
985         .ndo_set_features       = ax88179_set_features,
986 };
987
988 static int ax88179_check_eeprom(struct usbnet *dev)
989 {
990         u8 i, buf, eeprom[20];
991         u16 csum, delay = HZ / 10;
992         unsigned long jtimeout;
993
994         /* Read EEPROM content */
995         for (i = 0; i < 6; i++) {
996                 buf = i;
997                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
998                                       1, 1, &buf) < 0)
999                         return -EINVAL;
1000
1001                 buf = EEP_RD;
1002                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1003                                       1, 1, &buf) < 0)
1004                         return -EINVAL;
1005
1006                 jtimeout = jiffies + delay;
1007                 do {
1008                         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1009                                          1, 1, &buf);
1010
1011                         if (time_after(jiffies, jtimeout))
1012                                 return -EINVAL;
1013
1014                 } while (buf & EEP_BUSY);
1015
1016                 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1017                                    2, 2, &eeprom[i * 2]);
1018
1019                 if ((i == 0) && (eeprom[0] == 0xFF))
1020                         return -EINVAL;
1021         }
1022
1023         csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1024         csum = (csum >> 8) + (csum & 0xff);
1025         if ((csum + eeprom[10]) != 0xff)
1026                 return -EINVAL;
1027
1028         return 0;
1029 }
1030
1031 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1032 {
1033         u8      i;
1034         u8      efuse[64];
1035         u16     csum = 0;
1036
1037         if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1038                 return -EINVAL;
1039
1040         if (*efuse == 0xFF)
1041                 return -EINVAL;
1042
1043         for (i = 0; i < 64; i++)
1044                 csum = csum + efuse[i];
1045
1046         while (csum > 255)
1047                 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1048
1049         if (csum != 0xFF)
1050                 return -EINVAL;
1051
1052         *ledmode = (efuse[51] << 8) | efuse[52];
1053
1054         return 0;
1055 }
1056
1057 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1058 {
1059         u16 led;
1060
1061         /* Loaded the old eFuse LED Mode */
1062         if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1063                 return -EINVAL;
1064
1065         led >>= 8;
1066         switch (led) {
1067         case 0xFF:
1068                 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1069                       LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1070                       LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1071                 break;
1072         case 0xFE:
1073                 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1074                 break;
1075         case 0xFD:
1076                 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1077                       LED2_LINK_10 | LED_VALID;
1078                 break;
1079         case 0xFC:
1080                 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1081                       LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1082                 break;
1083         default:
1084                 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1085                       LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1086                       LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1087                 break;
1088         }
1089
1090         *ledvalue = led;
1091
1092         return 0;
1093 }
1094
1095 static int ax88179_led_setting(struct usbnet *dev)
1096 {
1097         u8 ledfd, value = 0;
1098         u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1099         unsigned long jtimeout;
1100
1101         /* Check AX88179 version. UA1 or UA2*/
1102         ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1103
1104         if (!(value & AX_SECLD)) {      /* UA1 */
1105                 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1106                         AX_GPIO_CTRL_GPIO1EN;
1107                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1108                                       1, 1, &value) < 0)
1109                         return -EINVAL;
1110         }
1111
1112         /* Check EEPROM */
1113         if (!ax88179_check_eeprom(dev)) {
1114                 value = 0x42;
1115                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1116                                       1, 1, &value) < 0)
1117                         return -EINVAL;
1118
1119                 value = EEP_RD;
1120                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1121                                       1, 1, &value) < 0)
1122                         return -EINVAL;
1123
1124                 jtimeout = jiffies + delay;
1125                 do {
1126                         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1127                                          1, 1, &value);
1128
1129                         if (time_after(jiffies, jtimeout))
1130                                 return -EINVAL;
1131
1132                 } while (value & EEP_BUSY);
1133
1134                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1135                                  1, 1, &value);
1136                 ledvalue = (value << 8);
1137
1138                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1139                                  1, 1, &value);
1140                 ledvalue |= value;
1141
1142                 /* load internal ROM for defaule setting */
1143                 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1144                         ax88179_convert_old_led(dev, &ledvalue);
1145
1146         } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1147                 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1148                         ax88179_convert_old_led(dev, &ledvalue);
1149         } else {
1150                 ax88179_convert_old_led(dev, &ledvalue);
1151         }
1152
1153         tmp = GMII_PHY_PGSEL_EXT;
1154         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1155                           GMII_PHY_PAGE_SELECT, 2, &tmp);
1156
1157         tmp = 0x2c;
1158         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1159                           GMII_PHYPAGE, 2, &tmp);
1160
1161         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1162                          GMII_LED_ACT, 2, &ledact);
1163
1164         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1165                          GMII_LED_LINK, 2, &ledlink);
1166
1167         ledact &= GMII_LED_ACTIVE_MASK;
1168         ledlink &= GMII_LED_LINK_MASK;
1169
1170         if (ledvalue & LED0_ACTIVE)
1171                 ledact |= GMII_LED0_ACTIVE;
1172
1173         if (ledvalue & LED1_ACTIVE)
1174                 ledact |= GMII_LED1_ACTIVE;
1175
1176         if (ledvalue & LED2_ACTIVE)
1177                 ledact |= GMII_LED2_ACTIVE;
1178
1179         if (ledvalue & LED0_LINK_10)
1180                 ledlink |= GMII_LED0_LINK_10;
1181
1182         if (ledvalue & LED1_LINK_10)
1183                 ledlink |= GMII_LED1_LINK_10;
1184
1185         if (ledvalue & LED2_LINK_10)
1186                 ledlink |= GMII_LED2_LINK_10;
1187
1188         if (ledvalue & LED0_LINK_100)
1189                 ledlink |= GMII_LED0_LINK_100;
1190
1191         if (ledvalue & LED1_LINK_100)
1192                 ledlink |= GMII_LED1_LINK_100;
1193
1194         if (ledvalue & LED2_LINK_100)
1195                 ledlink |= GMII_LED2_LINK_100;
1196
1197         if (ledvalue & LED0_LINK_1000)
1198                 ledlink |= GMII_LED0_LINK_1000;
1199
1200         if (ledvalue & LED1_LINK_1000)
1201                 ledlink |= GMII_LED1_LINK_1000;
1202
1203         if (ledvalue & LED2_LINK_1000)
1204                 ledlink |= GMII_LED2_LINK_1000;
1205
1206         tmp = ledact;
1207         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1208                           GMII_LED_ACT, 2, &tmp);
1209
1210         tmp = ledlink;
1211         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1212                           GMII_LED_LINK, 2, &tmp);
1213
1214         tmp = GMII_PHY_PGSEL_PAGE0;
1215         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1216                           GMII_PHY_PAGE_SELECT, 2, &tmp);
1217
1218         /* LED full duplex setting */
1219         ledfd = 0;
1220         if (ledvalue & LED0_FD)
1221                 ledfd |= 0x01;
1222         else if ((ledvalue & LED0_USB3_MASK) == 0)
1223                 ledfd |= 0x02;
1224
1225         if (ledvalue & LED1_FD)
1226                 ledfd |= 0x04;
1227         else if ((ledvalue & LED1_USB3_MASK) == 0)
1228                 ledfd |= 0x08;
1229
1230         if (ledvalue & LED2_FD)
1231                 ledfd |= 0x10;
1232         else if ((ledvalue & LED2_USB3_MASK) == 0)
1233                 ledfd |= 0x20;
1234
1235         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1236
1237         return 0;
1238 }
1239
1240 static void ax88179_get_mac_addr(struct usbnet *dev)
1241 {
1242         u8 mac[ETH_ALEN];
1243
1244         memset(mac, 0, sizeof(mac));
1245
1246         /* Maybe the boot loader passed the MAC address via device tree */
1247         if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1248                 netif_dbg(dev, ifup, dev->net,
1249                           "MAC address read from device tree");
1250         } else {
1251                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1252                                  ETH_ALEN, mac);
1253                 netif_dbg(dev, ifup, dev->net,
1254                           "MAC address read from ASIX chip");
1255         }
1256
1257         if (is_valid_ether_addr(mac)) {
1258                 eth_hw_addr_set(dev->net, mac);
1259         } else {
1260                 netdev_info(dev->net, "invalid MAC address, using random\n");
1261                 eth_hw_addr_random(dev->net);
1262         }
1263
1264         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1265                           dev->net->dev_addr);
1266 }
1267
1268 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1269 {
1270         struct ax88179_data *ax179_data;
1271
1272         usbnet_get_endpoints(dev, intf);
1273
1274         ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1275         if (!ax179_data)
1276                 return -ENOMEM;
1277
1278         dev->driver_priv = ax179_data;
1279
1280         dev->net->netdev_ops = &ax88179_netdev_ops;
1281         dev->net->ethtool_ops = &ax88179_ethtool_ops;
1282         dev->net->needed_headroom = 8;
1283         dev->net->max_mtu = 4088;
1284
1285         /* Initialize MII structure */
1286         dev->mii.dev = dev->net;
1287         dev->mii.mdio_read = ax88179_mdio_read;
1288         dev->mii.mdio_write = ax88179_mdio_write;
1289         dev->mii.phy_id_mask = 0xff;
1290         dev->mii.reg_num_mask = 0xff;
1291         dev->mii.phy_id = 0x03;
1292         dev->mii.supports_gmii = 1;
1293
1294         dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
1295                               NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
1296
1297         dev->net->hw_features |= dev->net->features;
1298
1299         netif_set_tso_max_size(dev->net, 16384);
1300
1301         ax88179_reset(dev);
1302
1303         return 0;
1304 }
1305
1306 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1307 {
1308         struct ax88179_data *ax179_data = dev->driver_priv;
1309         u16 tmp16;
1310
1311         /* Configure RX control register => stop operation */
1312         tmp16 = AX_RX_CTL_STOP;
1313         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1314
1315         tmp16 = 0;
1316         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1317
1318         /* Power down ethernet PHY */
1319         tmp16 = 0;
1320         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1321
1322         kfree(ax179_data);
1323 }
1324
1325 static void
1326 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1327 {
1328         skb->ip_summed = CHECKSUM_NONE;
1329
1330         /* checksum error bit is set */
1331         if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1332             (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1333                 return;
1334
1335         /* It must be a TCP or UDP packet with a valid checksum */
1336         if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1337             ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1338                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1339 }
1340
1341 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1342 {
1343         struct sk_buff *ax_skb;
1344         int pkt_cnt;
1345         u32 rx_hdr;
1346         u16 hdr_off;
1347         u32 *pkt_hdr;
1348
1349         /* At the end of the SKB, there's a header telling us how many packets
1350          * are bundled into this buffer and where we can find an array of
1351          * per-packet metadata (which contains elements encoded into u16).
1352          */
1353
1354         /* SKB contents for current firmware:
1355          *   <packet 1> <padding>
1356          *   ...
1357          *   <packet N> <padding>
1358          *   <per-packet metadata entry 1> <dummy header>
1359          *   ...
1360          *   <per-packet metadata entry N> <dummy header>
1361          *   <padding2> <rx_hdr>
1362          *
1363          * where:
1364          *   <packet N> contains pkt_len bytes:
1365          *              2 bytes of IP alignment pseudo header
1366          *              packet received
1367          *   <per-packet metadata entry N> contains 4 bytes:
1368          *              pkt_len and fields AX_RXHDR_*
1369          *   <padding>  0-7 bytes to terminate at
1370          *              8 bytes boundary (64-bit).
1371          *   <padding2> 4 bytes to make rx_hdr terminate at
1372          *              8 bytes boundary (64-bit)
1373          *   <dummy-header> contains 4 bytes:
1374          *              pkt_len=0 and AX_RXHDR_DROP_ERR
1375          *   <rx-hdr>   contains 4 bytes:
1376          *              pkt_cnt and hdr_off (offset of
1377          *                <per-packet metadata entry 1>)
1378          *
1379          * pkt_cnt is number of entrys in the per-packet metadata.
1380          * In current firmware there is 2 entrys per packet.
1381          * The first points to the packet and the
1382          *  second is a dummy header.
1383          * This was done probably to align fields in 64-bit and
1384          *  maintain compatibility with old firmware.
1385          * This code assumes that <dummy header> and <padding2> are
1386          *  optional.
1387          */
1388
1389         if (skb->len < 4)
1390                 return 0;
1391         skb_trim(skb, skb->len - 4);
1392         rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1393         pkt_cnt = (u16)rx_hdr;
1394         hdr_off = (u16)(rx_hdr >> 16);
1395
1396         if (pkt_cnt == 0)
1397                 return 0;
1398
1399         /* Make sure that the bounds of the metadata array are inside the SKB
1400          * (and in front of the counter at the end).
1401          */
1402         if (pkt_cnt * 4 + hdr_off > skb->len)
1403                 return 0;
1404         pkt_hdr = (u32 *)(skb->data + hdr_off);
1405
1406         /* Packets must not overlap the metadata array */
1407         skb_trim(skb, hdr_off);
1408
1409         for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1410                 u16 pkt_len_plus_padd;
1411                 u16 pkt_len;
1412
1413                 le32_to_cpus(pkt_hdr);
1414                 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1415                 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1416
1417                 /* Skip dummy header used for alignment
1418                  */
1419                 if (pkt_len == 0)
1420                         continue;
1421
1422                 if (pkt_len_plus_padd > skb->len)
1423                         return 0;
1424
1425                 /* Check CRC or runt packet */
1426                 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1427                     pkt_len < 2 + ETH_HLEN) {
1428                         dev->net->stats.rx_errors++;
1429                         skb_pull(skb, pkt_len_plus_padd);
1430                         continue;
1431                 }
1432
1433                 /* last packet */
1434                 if (pkt_len_plus_padd == skb->len) {
1435                         skb_trim(skb, pkt_len);
1436
1437                         /* Skip IP alignment pseudo header */
1438                         skb_pull(skb, 2);
1439
1440                         skb->truesize = SKB_TRUESIZE(pkt_len_plus_padd);
1441                         ax88179_rx_checksum(skb, pkt_hdr);
1442                         return 1;
1443                 }
1444
1445                 ax_skb = skb_clone(skb, GFP_ATOMIC);
1446                 if (!ax_skb)
1447                         return 0;
1448                 skb_trim(ax_skb, pkt_len);
1449
1450                 /* Skip IP alignment pseudo header */
1451                 skb_pull(ax_skb, 2);
1452
1453                 skb->truesize = pkt_len_plus_padd +
1454                                 SKB_DATA_ALIGN(sizeof(struct sk_buff));
1455                 ax88179_rx_checksum(ax_skb, pkt_hdr);
1456                 usbnet_skb_return(dev, ax_skb);
1457
1458                 skb_pull(skb, pkt_len_plus_padd);
1459         }
1460
1461         return 0;
1462 }
1463
1464 static struct sk_buff *
1465 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1466 {
1467         u32 tx_hdr1, tx_hdr2;
1468         int frame_size = dev->maxpacket;
1469         int headroom;
1470         void *ptr;
1471
1472         tx_hdr1 = skb->len;
1473         tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
1474         if (((skb->len + 8) % frame_size) == 0)
1475                 tx_hdr2 |= 0x80008000;  /* Enable padding */
1476
1477         headroom = skb_headroom(skb) - 8;
1478
1479         if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
1480                 return NULL;
1481
1482         if ((skb_header_cloned(skb) || headroom < 0) &&
1483             pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1484                 dev_kfree_skb_any(skb);
1485                 return NULL;
1486         }
1487
1488         ptr = skb_push(skb, 8);
1489         put_unaligned_le32(tx_hdr1, ptr);
1490         put_unaligned_le32(tx_hdr2, ptr + 4);
1491
1492         usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
1493
1494         return skb;
1495 }
1496
1497 static int ax88179_link_reset(struct usbnet *dev)
1498 {
1499         struct ax88179_data *ax179_data = dev->driver_priv;
1500         u8 tmp[5], link_sts;
1501         u16 mode, tmp16, delay = HZ / 10;
1502         u32 tmp32 = 0x40000000;
1503         unsigned long jtimeout;
1504
1505         jtimeout = jiffies + delay;
1506         while (tmp32 & 0x40000000) {
1507                 mode = 0;
1508                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1509                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1510                                   &ax179_data->rxctl);
1511
1512                 /*link up, check the usb device control TX FIFO full or empty*/
1513                 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1514
1515                 if (time_after(jiffies, jtimeout))
1516                         return 0;
1517         }
1518
1519         mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1520                AX_MEDIUM_RXFLOW_CTRLEN;
1521
1522         ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1523                          1, 1, &link_sts);
1524
1525         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1526                          GMII_PHY_PHYSR, 2, &tmp16);
1527
1528         if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1529                 return 0;
1530         } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1531                 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1532                 if (dev->net->mtu > 1500)
1533                         mode |= AX_MEDIUM_JUMBO_EN;
1534
1535                 if (link_sts & AX_USB_SS)
1536                         memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1537                 else if (link_sts & AX_USB_HS)
1538                         memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1539                 else
1540                         memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1541         } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1542                 mode |= AX_MEDIUM_PS;
1543
1544                 if (link_sts & (AX_USB_SS | AX_USB_HS))
1545                         memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1546                 else
1547                         memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1548         } else {
1549                 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1550         }
1551
1552         /* RX bulk configuration */
1553         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1554
1555         dev->rx_urb_size = (1024 * (tmp[3] + 2));
1556
1557         if (tmp16 & GMII_PHY_PHYSR_FULL)
1558                 mode |= AX_MEDIUM_FULL_DUPLEX;
1559         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1560                           2, 2, &mode);
1561
1562         ax179_data->eee_enabled = ax88179_chk_eee(dev);
1563
1564         netif_carrier_on(dev->net);
1565
1566         return 0;
1567 }
1568
1569 static int ax88179_reset(struct usbnet *dev)
1570 {
1571         u8 buf[5];
1572         u16 *tmp16;
1573         u8 *tmp;
1574         struct ax88179_data *ax179_data = dev->driver_priv;
1575         struct ethtool_eee eee_data;
1576
1577         tmp16 = (u16 *)buf;
1578         tmp = (u8 *)buf;
1579
1580         /* Power up ethernet PHY */
1581         *tmp16 = 0;
1582         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1583
1584         *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1585         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1586         msleep(200);
1587
1588         *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1589         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1590         msleep(100);
1591
1592         /* Ethernet PHY Auto Detach*/
1593         ax88179_auto_detach(dev);
1594
1595         /* Read MAC address from DTB or asix chip */
1596         ax88179_get_mac_addr(dev);
1597         memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1598
1599         /* RX bulk configuration */
1600         memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1601         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1602
1603         dev->rx_urb_size = 1024 * 20;
1604
1605         *tmp = 0x34;
1606         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1607
1608         *tmp = 0x52;
1609         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1610                           1, 1, tmp);
1611
1612         /* Enable checksum offload */
1613         *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1614                AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1615         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1616
1617         *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1618                AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1619         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1620
1621         /* Configure RX control register => start operation */
1622         *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1623                  AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1624         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1625
1626         *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1627                AX_MONITOR_MODE_RWMP;
1628         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1629
1630         /* Configure default medium type => giga */
1631         *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1632                  AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1633                  AX_MEDIUM_GIGAMODE;
1634         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1635                           2, 2, tmp16);
1636
1637         /* Check if WoL is supported */
1638         ax179_data->wol_supported = 0;
1639         if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1640                              1, 1, &tmp) > 0)
1641                 ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1642
1643         ax88179_led_setting(dev);
1644
1645         ax179_data->eee_enabled = 0;
1646         ax179_data->eee_active = 0;
1647
1648         ax88179_disable_eee(dev);
1649
1650         ax88179_ethtool_get_eee(dev, &eee_data);
1651         eee_data.advertised = 0;
1652         ax88179_ethtool_set_eee(dev, &eee_data);
1653
1654         /* Restart autoneg */
1655         mii_nway_restart(&dev->mii);
1656
1657         usbnet_link_change(dev, 0, 0);
1658
1659         return 0;
1660 }
1661
1662 static int ax88179_stop(struct usbnet *dev)
1663 {
1664         u16 tmp16;
1665
1666         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1667                          2, 2, &tmp16);
1668         tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1669         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1670                           2, 2, &tmp16);
1671
1672         return 0;
1673 }
1674
1675 static const struct driver_info ax88179_info = {
1676         .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1677         .bind = ax88179_bind,
1678         .unbind = ax88179_unbind,
1679         .status = ax88179_status,
1680         .link_reset = ax88179_link_reset,
1681         .reset = ax88179_reset,
1682         .stop = ax88179_stop,
1683         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1684         .rx_fixup = ax88179_rx_fixup,
1685         .tx_fixup = ax88179_tx_fixup,
1686 };
1687
1688 static const struct driver_info ax88178a_info = {
1689         .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1690         .bind = ax88179_bind,
1691         .unbind = ax88179_unbind,
1692         .status = ax88179_status,
1693         .link_reset = ax88179_link_reset,
1694         .reset = ax88179_reset,
1695         .stop = ax88179_stop,
1696         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1697         .rx_fixup = ax88179_rx_fixup,
1698         .tx_fixup = ax88179_tx_fixup,
1699 };
1700
1701 static const struct driver_info cypress_GX3_info = {
1702         .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1703         .bind = ax88179_bind,
1704         .unbind = ax88179_unbind,
1705         .status = ax88179_status,
1706         .link_reset = ax88179_link_reset,
1707         .reset = ax88179_reset,
1708         .stop = ax88179_stop,
1709         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1710         .rx_fixup = ax88179_rx_fixup,
1711         .tx_fixup = ax88179_tx_fixup,
1712 };
1713
1714 static const struct driver_info dlink_dub1312_info = {
1715         .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1716         .bind = ax88179_bind,
1717         .unbind = ax88179_unbind,
1718         .status = ax88179_status,
1719         .link_reset = ax88179_link_reset,
1720         .reset = ax88179_reset,
1721         .stop = ax88179_stop,
1722         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1723         .rx_fixup = ax88179_rx_fixup,
1724         .tx_fixup = ax88179_tx_fixup,
1725 };
1726
1727 static const struct driver_info sitecom_info = {
1728         .description = "Sitecom USB 3.0 to Gigabit Adapter",
1729         .bind = ax88179_bind,
1730         .unbind = ax88179_unbind,
1731         .status = ax88179_status,
1732         .link_reset = ax88179_link_reset,
1733         .reset = ax88179_reset,
1734         .stop = ax88179_stop,
1735         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1736         .rx_fixup = ax88179_rx_fixup,
1737         .tx_fixup = ax88179_tx_fixup,
1738 };
1739
1740 static const struct driver_info samsung_info = {
1741         .description = "Samsung USB Ethernet Adapter",
1742         .bind = ax88179_bind,
1743         .unbind = ax88179_unbind,
1744         .status = ax88179_status,
1745         .link_reset = ax88179_link_reset,
1746         .reset = ax88179_reset,
1747         .stop = ax88179_stop,
1748         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1749         .rx_fixup = ax88179_rx_fixup,
1750         .tx_fixup = ax88179_tx_fixup,
1751 };
1752
1753 static const struct driver_info lenovo_info = {
1754         .description = "Lenovo OneLinkDock Gigabit LAN",
1755         .bind = ax88179_bind,
1756         .unbind = ax88179_unbind,
1757         .status = ax88179_status,
1758         .link_reset = ax88179_link_reset,
1759         .reset = ax88179_reset,
1760         .stop = ax88179_stop,
1761         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1762         .rx_fixup = ax88179_rx_fixup,
1763         .tx_fixup = ax88179_tx_fixup,
1764 };
1765
1766 static const struct driver_info belkin_info = {
1767         .description = "Belkin USB Ethernet Adapter",
1768         .bind   = ax88179_bind,
1769         .unbind = ax88179_unbind,
1770         .status = ax88179_status,
1771         .link_reset = ax88179_link_reset,
1772         .reset  = ax88179_reset,
1773         .stop   = ax88179_stop,
1774         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1775         .rx_fixup = ax88179_rx_fixup,
1776         .tx_fixup = ax88179_tx_fixup,
1777 };
1778
1779 static const struct driver_info toshiba_info = {
1780         .description = "Toshiba USB Ethernet Adapter",
1781         .bind   = ax88179_bind,
1782         .unbind = ax88179_unbind,
1783         .status = ax88179_status,
1784         .link_reset = ax88179_link_reset,
1785         .reset  = ax88179_reset,
1786         .stop = ax88179_stop,
1787         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1788         .rx_fixup = ax88179_rx_fixup,
1789         .tx_fixup = ax88179_tx_fixup,
1790 };
1791
1792 static const struct driver_info mct_info = {
1793         .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1794         .bind   = ax88179_bind,
1795         .unbind = ax88179_unbind,
1796         .status = ax88179_status,
1797         .link_reset = ax88179_link_reset,
1798         .reset  = ax88179_reset,
1799         .stop   = ax88179_stop,
1800         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1801         .rx_fixup = ax88179_rx_fixup,
1802         .tx_fixup = ax88179_tx_fixup,
1803 };
1804
1805 static const struct driver_info at_umc2000_info = {
1806         .description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1807         .bind   = ax88179_bind,
1808         .unbind = ax88179_unbind,
1809         .status = ax88179_status,
1810         .link_reset = ax88179_link_reset,
1811         .reset  = ax88179_reset,
1812         .stop   = ax88179_stop,
1813         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1814         .rx_fixup = ax88179_rx_fixup,
1815         .tx_fixup = ax88179_tx_fixup,
1816 };
1817
1818 static const struct driver_info at_umc200_info = {
1819         .description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
1820         .bind   = ax88179_bind,
1821         .unbind = ax88179_unbind,
1822         .status = ax88179_status,
1823         .link_reset = ax88179_link_reset,
1824         .reset  = ax88179_reset,
1825         .stop   = ax88179_stop,
1826         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1827         .rx_fixup = ax88179_rx_fixup,
1828         .tx_fixup = ax88179_tx_fixup,
1829 };
1830
1831 static const struct driver_info at_umc2000sp_info = {
1832         .description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1833         .bind   = ax88179_bind,
1834         .unbind = ax88179_unbind,
1835         .status = ax88179_status,
1836         .link_reset = ax88179_link_reset,
1837         .reset  = ax88179_reset,
1838         .stop   = ax88179_stop,
1839         .flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1840         .rx_fixup = ax88179_rx_fixup,
1841         .tx_fixup = ax88179_tx_fixup,
1842 };
1843
1844 static const struct usb_device_id products[] = {
1845 {
1846         /* ASIX AX88179 10/100/1000 */
1847         USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
1848         .driver_info = (unsigned long)&ax88179_info,
1849 }, {
1850         /* ASIX AX88178A 10/100/1000 */
1851         USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
1852         .driver_info = (unsigned long)&ax88178a_info,
1853 }, {
1854         /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1855         USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
1856         .driver_info = (unsigned long)&cypress_GX3_info,
1857 }, {
1858         /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1859         USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
1860         .driver_info = (unsigned long)&dlink_dub1312_info,
1861 }, {
1862         /* Sitecom USB 3.0 to Gigabit Adapter */
1863         USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
1864         .driver_info = (unsigned long)&sitecom_info,
1865 }, {
1866         /* Samsung USB Ethernet Adapter */
1867         USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
1868         .driver_info = (unsigned long)&samsung_info,
1869 }, {
1870         /* Lenovo OneLinkDock Gigabit LAN */
1871         USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
1872         .driver_info = (unsigned long)&lenovo_info,
1873 }, {
1874         /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1875         USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
1876         .driver_info = (unsigned long)&belkin_info,
1877 }, {
1878         /* Toshiba USB 3.0 GBit Ethernet Adapter */
1879         USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
1880         .driver_info = (unsigned long)&toshiba_info,
1881 }, {
1882         /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1883         USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
1884         .driver_info = (unsigned long)&mct_info,
1885 }, {
1886         /* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1887         USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
1888         .driver_info = (unsigned long)&at_umc2000_info,
1889 }, {
1890         /* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
1891         USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
1892         .driver_info = (unsigned long)&at_umc200_info,
1893 }, {
1894         /* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1895         USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
1896         .driver_info = (unsigned long)&at_umc2000sp_info,
1897 },
1898         { },
1899 };
1900 MODULE_DEVICE_TABLE(usb, products);
1901
1902 static struct usb_driver ax88179_178a_driver = {
1903         .name =         "ax88179_178a",
1904         .id_table =     products,
1905         .probe =        usbnet_probe,
1906         .suspend =      ax88179_suspend,
1907         .resume =       ax88179_resume,
1908         .reset_resume = ax88179_resume,
1909         .disconnect =   usbnet_disconnect,
1910         .supports_autosuspend = 1,
1911         .disable_hub_initiated_lpm = 1,
1912 };
1913
1914 module_usb_driver(ax88179_178a_driver);
1915
1916 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1917 MODULE_LICENSE("GPL");