2 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 * Copyright (C) 2011-2013 ASIX
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #include <linux/module.h>
22 #include <linux/etherdevice.h>
23 #include <linux/mii.h>
24 #include <linux/usb.h>
25 #include <linux/crc32.h>
26 #include <linux/usb/usbnet.h>
28 #define AX88179_PHY_ID 0x03
29 #define AX_EEPROM_LEN 0x100
30 #define AX88179_EEPROM_MAGIC 0x17900b95
31 #define AX_MCAST_FLTSIZE 8
32 #define AX_MAX_MCAST 64
33 #define AX_INT_PPLS_LINK ((u32)BIT(16))
34 #define AX_RXHDR_L4_TYPE_MASK 0x1c
35 #define AX_RXHDR_L4_TYPE_UDP 4
36 #define AX_RXHDR_L4_TYPE_TCP 16
37 #define AX_RXHDR_L3CSUM_ERR 2
38 #define AX_RXHDR_L4CSUM_ERR 1
39 #define AX_RXHDR_CRC_ERR ((u32)BIT(29))
40 #define AX_RXHDR_DROP_ERR ((u32)BIT(31))
41 #define AX_ACCESS_MAC 0x01
42 #define AX_ACCESS_PHY 0x02
43 #define AX_ACCESS_EEPROM 0x04
44 #define AX_ACCESS_EFUS 0x05
45 #define AX_PAUSE_WATERLVL_HIGH 0x54
46 #define AX_PAUSE_WATERLVL_LOW 0x55
48 #define PHYSICAL_LINK_STATUS 0x02
49 #define AX_USB_SS 0x04
50 #define AX_USB_HS 0x02
52 #define GENERAL_STATUS 0x03
53 /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
56 #define AX_SROM_ADDR 0x07
57 #define AX_SROM_CMD 0x0a
61 #define AX_SROM_DATA_LOW 0x08
62 #define AX_SROM_DATA_HIGH 0x09
64 #define AX_RX_CTL 0x0b
65 #define AX_RX_CTL_DROPCRCERR 0x0100
66 #define AX_RX_CTL_IPE 0x0200
67 #define AX_RX_CTL_START 0x0080
68 #define AX_RX_CTL_AP 0x0020
69 #define AX_RX_CTL_AM 0x0010
70 #define AX_RX_CTL_AB 0x0008
71 #define AX_RX_CTL_AMALL 0x0002
72 #define AX_RX_CTL_PRO 0x0001
73 #define AX_RX_CTL_STOP 0x0000
75 #define AX_NODE_ID 0x10
76 #define AX_MULFLTARY 0x16
78 #define AX_MEDIUM_STATUS_MODE 0x22
79 #define AX_MEDIUM_GIGAMODE 0x01
80 #define AX_MEDIUM_FULL_DUPLEX 0x02
81 #define AX_MEDIUM_EN_125MHZ 0x08
82 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
83 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
84 #define AX_MEDIUM_RECEIVE_EN 0x100
85 #define AX_MEDIUM_PS 0x200
86 #define AX_MEDIUM_JUMBO_EN 0x8040
88 #define AX_MONITOR_MOD 0x24
89 #define AX_MONITOR_MODE_RWLC 0x02
90 #define AX_MONITOR_MODE_RWMP 0x04
91 #define AX_MONITOR_MODE_PMEPOL 0x20
92 #define AX_MONITOR_MODE_PMETYPE 0x40
94 #define AX_GPIO_CTRL 0x25
95 #define AX_GPIO_CTRL_GPIO3EN 0x80
96 #define AX_GPIO_CTRL_GPIO2EN 0x40
97 #define AX_GPIO_CTRL_GPIO1EN 0x20
99 #define AX_PHYPWR_RSTCTL 0x26
100 #define AX_PHYPWR_RSTCTL_BZ 0x0010
101 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
102 #define AX_PHYPWR_RSTCTL_AT 0x1000
104 #define AX_RX_BULKIN_QCTRL 0x2e
105 #define AX_CLK_SELECT 0x33
106 #define AX_CLK_SELECT_BCS 0x01
107 #define AX_CLK_SELECT_ACS 0x02
108 #define AX_CLK_SELECT_ULR 0x08
110 #define AX_RXCOE_CTL 0x34
111 #define AX_RXCOE_IP 0x01
112 #define AX_RXCOE_TCP 0x02
113 #define AX_RXCOE_UDP 0x04
114 #define AX_RXCOE_TCPV6 0x20
115 #define AX_RXCOE_UDPV6 0x40
117 #define AX_TXCOE_CTL 0x35
118 #define AX_TXCOE_IP 0x01
119 #define AX_TXCOE_TCP 0x02
120 #define AX_TXCOE_UDP 0x04
121 #define AX_TXCOE_TCPV6 0x20
122 #define AX_TXCOE_UDPV6 0x40
124 #define AX_LEDCTRL 0x73
126 #define GMII_PHY_PHYSR 0x11
127 #define GMII_PHY_PHYSR_SMASK 0xc000
128 #define GMII_PHY_PHYSR_GIGA 0x8000
129 #define GMII_PHY_PHYSR_100 0x4000
130 #define GMII_PHY_PHYSR_FULL 0x2000
131 #define GMII_PHY_PHYSR_LINK 0x400
133 #define GMII_LED_ACT 0x1a
134 #define GMII_LED_ACTIVE_MASK 0xff8f
135 #define GMII_LED0_ACTIVE BIT(4)
136 #define GMII_LED1_ACTIVE BIT(5)
137 #define GMII_LED2_ACTIVE BIT(6)
139 #define GMII_LED_LINK 0x1c
140 #define GMII_LED_LINK_MASK 0xf888
141 #define GMII_LED0_LINK_10 BIT(0)
142 #define GMII_LED0_LINK_100 BIT(1)
143 #define GMII_LED0_LINK_1000 BIT(2)
144 #define GMII_LED1_LINK_10 BIT(4)
145 #define GMII_LED1_LINK_100 BIT(5)
146 #define GMII_LED1_LINK_1000 BIT(6)
147 #define GMII_LED2_LINK_10 BIT(8)
148 #define GMII_LED2_LINK_100 BIT(9)
149 #define GMII_LED2_LINK_1000 BIT(10)
150 #define LED0_ACTIVE BIT(0)
151 #define LED0_LINK_10 BIT(1)
152 #define LED0_LINK_100 BIT(2)
153 #define LED0_LINK_1000 BIT(3)
154 #define LED0_FD BIT(4)
155 #define LED0_USB3_MASK 0x001f
156 #define LED1_ACTIVE BIT(5)
157 #define LED1_LINK_10 BIT(6)
158 #define LED1_LINK_100 BIT(7)
159 #define LED1_LINK_1000 BIT(8)
160 #define LED1_FD BIT(9)
161 #define LED1_USB3_MASK 0x03e0
162 #define LED2_ACTIVE BIT(10)
163 #define LED2_LINK_1000 BIT(13)
164 #define LED2_LINK_100 BIT(12)
165 #define LED2_LINK_10 BIT(11)
166 #define LED2_FD BIT(14)
167 #define LED_VALID BIT(15)
168 #define LED2_USB3_MASK 0x7c00
170 #define GMII_PHYPAGE 0x1e
171 #define GMII_PHY_PAGE_SELECT 0x1f
172 #define GMII_PHY_PGSEL_EXT 0x0007
173 #define GMII_PHY_PGSEL_PAGE0 0x0000
175 struct ax88179_data {
180 struct ax88179_int_data {
185 static const struct {
186 unsigned char ctrl, timer_l, timer_h, size, ifg;
187 } AX88179_BULKIN_SIZE[] = {
188 {7, 0x4f, 0, 0x12, 0xff},
189 {7, 0x20, 3, 0x16, 0xff},
190 {7, 0xae, 7, 0x18, 0xff},
191 {7, 0xcc, 0x4c, 0x18, 8},
194 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
195 u16 size, void *data, int in_pm)
198 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
203 fn = usbnet_read_cmd;
205 fn = usbnet_read_cmd_nopm;
207 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
208 value, index, data, size);
210 if (unlikely(ret < 0))
211 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
217 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
218 u16 size, void *data, int in_pm)
221 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
226 fn = usbnet_write_cmd;
228 fn = usbnet_write_cmd_nopm;
230 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
231 value, index, data, size);
233 if (unlikely(ret < 0))
234 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
240 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
241 u16 index, u16 size, void *data)
246 buf = *((u16 *)data);
248 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
249 USB_RECIP_DEVICE, value, index, &buf,
252 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
253 USB_RECIP_DEVICE, value, index, data,
258 static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
259 u16 index, u16 size, void *data)
265 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
267 *((u16 *)data) = buf;
268 } else if (4 == size) {
270 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
272 *((u32 *)data) = buf;
274 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
280 static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
281 u16 index, u16 size, void *data)
287 buf = *((u16 *)data);
289 ret = __ax88179_write_cmd(dev, cmd, value, index,
292 ret = __ax88179_write_cmd(dev, cmd, value, index,
299 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
300 u16 size, void *data)
306 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
308 *((u16 *)data) = buf;
309 } else if (4 == size) {
311 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
313 *((u32 *)data) = buf;
315 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
321 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
322 u16 size, void *data)
328 buf = *((u16 *)data);
330 ret = __ax88179_write_cmd(dev, cmd, value, index,
333 ret = __ax88179_write_cmd(dev, cmd, value, index,
340 static void ax88179_status(struct usbnet *dev, struct urb *urb)
342 struct ax88179_int_data *event;
345 if (urb->actual_length < 8)
348 event = urb->transfer_buffer;
349 le32_to_cpus((void *)&event->intdata1);
351 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
353 if (netif_carrier_ok(dev->net) != link) {
354 usbnet_link_change(dev, link, 1);
355 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
359 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
361 struct usbnet *dev = netdev_priv(netdev);
364 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
368 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
371 struct usbnet *dev = netdev_priv(netdev);
374 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
377 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
379 struct usbnet *dev = usb_get_intfdata(intf);
383 usbnet_suspend(intf, message);
385 /* Disable RX path */
386 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
388 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
389 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
392 /* Force bulk-in zero length */
393 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
396 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
397 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
402 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
404 /* Configure RX control register => stop operation */
405 tmp16 = AX_RX_CTL_STOP;
406 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
411 /* This function is used to enable the autodetach function. */
412 /* This function is determined by offset 0x43 of EEPROM */
413 static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
417 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
418 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
421 fnr = ax88179_read_cmd;
422 fnw = ax88179_write_cmd;
424 fnr = ax88179_read_cmd_nopm;
425 fnw = ax88179_write_cmd_nopm;
428 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
431 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
434 /* Enable Auto Detach bit */
436 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
437 tmp8 |= AX_CLK_SELECT_ULR;
438 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
440 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
441 tmp16 |= AX_PHYPWR_RSTCTL_AT;
442 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
447 static int ax88179_resume(struct usb_interface *intf)
449 struct usbnet *dev = usb_get_intfdata(intf);
453 usbnet_link_change(dev, 0, 0);
455 /* Power up ethernet PHY */
457 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
461 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
462 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
466 /* Ethernet PHY Auto Detach*/
467 ax88179_auto_detach(dev, 1);
470 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
471 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
472 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
475 /* Configure RX control register => start operation */
476 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
477 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
478 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
480 return usbnet_resume(intf);
484 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
486 struct usbnet *dev = netdev_priv(net);
489 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
491 wolinfo->supported = 0;
492 wolinfo->wolopts = 0;
496 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
497 wolinfo->wolopts = 0;
498 if (opt & AX_MONITOR_MODE_RWLC)
499 wolinfo->wolopts |= WAKE_PHY;
500 if (opt & AX_MONITOR_MODE_RWMP)
501 wolinfo->wolopts |= WAKE_MAGIC;
505 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
507 struct usbnet *dev = netdev_priv(net);
510 if (wolinfo->wolopts & WAKE_PHY)
511 opt |= AX_MONITOR_MODE_RWLC;
512 if (wolinfo->wolopts & WAKE_MAGIC)
513 opt |= AX_MONITOR_MODE_RWMP;
515 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
522 static int ax88179_get_eeprom_len(struct net_device *net)
524 return AX_EEPROM_LEN;
528 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
531 struct usbnet *dev = netdev_priv(net);
533 int first_word, last_word;
536 if (eeprom->len == 0)
539 eeprom->magic = AX88179_EEPROM_MAGIC;
541 first_word = eeprom->offset >> 1;
542 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
543 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
548 /* ax88179/178A returns 2 bytes from eeprom on read */
549 for (i = first_word; i <= last_word; i++) {
550 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
551 &eeprom_buff[i - first_word],
559 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
564 static int ax88179_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
566 struct usbnet *dev = netdev_priv(net);
567 return mii_ethtool_gset(&dev->mii, cmd);
570 static int ax88179_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
572 struct usbnet *dev = netdev_priv(net);
573 return mii_ethtool_sset(&dev->mii, cmd);
577 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
579 struct usbnet *dev = netdev_priv(net);
580 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
583 static const struct ethtool_ops ax88179_ethtool_ops = {
584 .get_link = ethtool_op_get_link,
585 .get_msglevel = usbnet_get_msglevel,
586 .set_msglevel = usbnet_set_msglevel,
587 .get_wol = ax88179_get_wol,
588 .set_wol = ax88179_set_wol,
589 .get_eeprom_len = ax88179_get_eeprom_len,
590 .get_eeprom = ax88179_get_eeprom,
591 .get_settings = ax88179_get_settings,
592 .set_settings = ax88179_set_settings,
593 .nway_reset = usbnet_nway_reset,
596 static void ax88179_set_multicast(struct net_device *net)
598 struct usbnet *dev = netdev_priv(net);
599 struct ax88179_data *data = (struct ax88179_data *)dev->data;
600 u8 *m_filter = ((u8 *)dev->data) + 12;
602 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
604 if (net->flags & IFF_PROMISC) {
605 data->rxctl |= AX_RX_CTL_PRO;
606 } else if (net->flags & IFF_ALLMULTI ||
607 netdev_mc_count(net) > AX_MAX_MCAST) {
608 data->rxctl |= AX_RX_CTL_AMALL;
609 } else if (netdev_mc_empty(net)) {
610 /* just broadcast and directed */
612 /* We use the 20 byte dev->data for our 8 byte filter buffer
613 * to avoid allocating memory that is tricky to free later
616 struct netdev_hw_addr *ha;
618 memset(m_filter, 0, AX_MCAST_FLTSIZE);
620 netdev_for_each_mc_addr(ha, net) {
621 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
622 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
625 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
626 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
629 data->rxctl |= AX_RX_CTL_AM;
632 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
637 ax88179_set_features(struct net_device *net, netdev_features_t features)
640 struct usbnet *dev = netdev_priv(net);
641 netdev_features_t changed = net->features ^ features;
643 if (changed & NETIF_F_IP_CSUM) {
644 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
645 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
646 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
649 if (changed & NETIF_F_IPV6_CSUM) {
650 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
651 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
652 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
655 if (changed & NETIF_F_RXCSUM) {
656 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
657 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
658 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
659 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
665 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
667 struct usbnet *dev = netdev_priv(net);
670 if (new_mtu <= 0 || new_mtu > 4088)
674 dev->hard_mtu = net->mtu + net->hard_header_len;
676 if (net->mtu > 1500) {
677 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
679 tmp16 |= AX_MEDIUM_JUMBO_EN;
680 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
683 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
685 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
686 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
690 /* max qlen depend on hard_mtu and rx_urb_size */
691 usbnet_update_max_qlen(dev);
696 static int ax88179_set_mac_addr(struct net_device *net, void *p)
698 struct usbnet *dev = netdev_priv(net);
699 struct sockaddr *addr = p;
701 if (netif_running(net))
703 if (!is_valid_ether_addr(addr->sa_data))
704 return -EADDRNOTAVAIL;
706 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
708 /* Set the MAC address */
709 return ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
710 ETH_ALEN, net->dev_addr);
713 static const struct net_device_ops ax88179_netdev_ops = {
714 .ndo_open = usbnet_open,
715 .ndo_stop = usbnet_stop,
716 .ndo_start_xmit = usbnet_start_xmit,
717 .ndo_tx_timeout = usbnet_tx_timeout,
718 .ndo_change_mtu = ax88179_change_mtu,
719 .ndo_set_mac_address = ax88179_set_mac_addr,
720 .ndo_validate_addr = eth_validate_addr,
721 .ndo_do_ioctl = ax88179_ioctl,
722 .ndo_set_rx_mode = ax88179_set_multicast,
723 .ndo_set_features = ax88179_set_features,
726 static int ax88179_check_eeprom(struct usbnet *dev)
728 u8 i, buf, eeprom[20];
729 u16 csum, delay = HZ / 10;
730 unsigned long jtimeout;
732 /* Read EEPROM content */
733 for (i = 0; i < 6; i++) {
735 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
740 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
744 jtimeout = jiffies + delay;
746 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
749 if (time_after(jiffies, jtimeout))
752 } while (buf & EEP_BUSY);
754 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
755 2, 2, &eeprom[i * 2], 0);
757 if ((i == 0) && (eeprom[0] == 0xFF))
761 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
762 csum = (csum >> 8) + (csum & 0xff);
763 if ((csum + eeprom[10]) != 0xff)
769 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
775 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
781 for (i = 0; i < 64; i++)
782 csum = csum + efuse[i];
785 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
790 *ledmode = (efuse[51] << 8) | efuse[52];
795 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
799 /* Loaded the old eFuse LED Mode */
800 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
806 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
807 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
808 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
811 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
814 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
815 LED2_LINK_10 | LED_VALID;
818 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
819 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
822 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
823 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
824 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
833 static int ax88179_led_setting(struct usbnet *dev)
836 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
837 unsigned long jtimeout;
839 /* Check AX88179 version. UA1 or UA2*/
840 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
842 if (!(value & AX_SECLD)) { /* UA1 */
843 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
844 AX_GPIO_CTRL_GPIO1EN;
845 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
851 if (!ax88179_check_eeprom(dev)) {
853 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
858 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
862 jtimeout = jiffies + delay;
864 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
867 if (time_after(jiffies, jtimeout))
870 } while (value & EEP_BUSY);
872 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
874 ledvalue = (value << 8);
876 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
880 /* load internal ROM for defaule setting */
881 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
882 ax88179_convert_old_led(dev, &ledvalue);
884 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
885 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
886 ax88179_convert_old_led(dev, &ledvalue);
888 ax88179_convert_old_led(dev, &ledvalue);
891 tmp = GMII_PHY_PGSEL_EXT;
892 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
893 GMII_PHY_PAGE_SELECT, 2, &tmp);
896 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
897 GMII_PHYPAGE, 2, &tmp);
899 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
900 GMII_LED_ACT, 2, &ledact);
902 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
903 GMII_LED_LINK, 2, &ledlink);
905 ledact &= GMII_LED_ACTIVE_MASK;
906 ledlink &= GMII_LED_LINK_MASK;
908 if (ledvalue & LED0_ACTIVE)
909 ledact |= GMII_LED0_ACTIVE;
911 if (ledvalue & LED1_ACTIVE)
912 ledact |= GMII_LED1_ACTIVE;
914 if (ledvalue & LED2_ACTIVE)
915 ledact |= GMII_LED2_ACTIVE;
917 if (ledvalue & LED0_LINK_10)
918 ledlink |= GMII_LED0_LINK_10;
920 if (ledvalue & LED1_LINK_10)
921 ledlink |= GMII_LED1_LINK_10;
923 if (ledvalue & LED2_LINK_10)
924 ledlink |= GMII_LED2_LINK_10;
926 if (ledvalue & LED0_LINK_100)
927 ledlink |= GMII_LED0_LINK_100;
929 if (ledvalue & LED1_LINK_100)
930 ledlink |= GMII_LED1_LINK_100;
932 if (ledvalue & LED2_LINK_100)
933 ledlink |= GMII_LED2_LINK_100;
935 if (ledvalue & LED0_LINK_1000)
936 ledlink |= GMII_LED0_LINK_1000;
938 if (ledvalue & LED1_LINK_1000)
939 ledlink |= GMII_LED1_LINK_1000;
941 if (ledvalue & LED2_LINK_1000)
942 ledlink |= GMII_LED2_LINK_1000;
945 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
946 GMII_LED_ACT, 2, &tmp);
949 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
950 GMII_LED_LINK, 2, &tmp);
952 tmp = GMII_PHY_PGSEL_PAGE0;
953 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
954 GMII_PHY_PAGE_SELECT, 2, &tmp);
956 /* LED full duplex setting */
958 if (ledvalue & LED0_FD)
960 else if ((ledvalue & LED0_USB3_MASK) == 0)
963 if (ledvalue & LED1_FD)
965 else if ((ledvalue & LED1_USB3_MASK) == 0)
968 if (ledvalue & LED2_FD)
970 else if ((ledvalue & LED2_USB3_MASK) == 0)
973 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
978 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
983 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
985 usbnet_get_endpoints(dev, intf);
990 memset(ax179_data, 0, sizeof(*ax179_data));
992 /* Power up ethernet PHY */
994 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
995 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
996 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
999 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1000 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1003 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1004 ETH_ALEN, dev->net->dev_addr);
1005 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1007 /* RX bulk configuration */
1008 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1009 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1011 dev->rx_urb_size = 1024 * 20;
1014 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1017 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1020 dev->net->netdev_ops = &ax88179_netdev_ops;
1021 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1022 dev->net->needed_headroom = 8;
1024 /* Initialize MII structure */
1025 dev->mii.dev = dev->net;
1026 dev->mii.mdio_read = ax88179_mdio_read;
1027 dev->mii.mdio_write = ax88179_mdio_write;
1028 dev->mii.phy_id_mask = 0xff;
1029 dev->mii.reg_num_mask = 0xff;
1030 dev->mii.phy_id = 0x03;
1031 dev->mii.supports_gmii = 1;
1033 if (usb_device_no_sg_constraint(dev->udev))
1034 dev->can_dma_sg = 1;
1036 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1039 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1042 if (dev->can_dma_sg) {
1043 dev->net->features |= NETIF_F_SG | NETIF_F_TSO;
1044 dev->net->hw_features |= NETIF_F_SG | NETIF_F_TSO;
1047 /* Enable checksum offload */
1048 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1049 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1050 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1052 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1053 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1054 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1056 /* Configure RX control register => start operation */
1057 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1058 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1059 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1061 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1062 AX_MONITOR_MODE_RWMP;
1063 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1065 /* Configure default medium type => giga */
1066 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1067 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1069 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1072 ax88179_led_setting(dev);
1074 /* Restart autoneg */
1075 mii_nway_restart(&dev->mii);
1077 usbnet_link_change(dev, 0, 0);
1082 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1086 /* Configure RX control register => stop operation */
1087 tmp16 = AX_RX_CTL_STOP;
1088 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1091 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1093 /* Power down ethernet PHY */
1095 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1099 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1101 skb->ip_summed = CHECKSUM_NONE;
1103 /* checksum error bit is set */
1104 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1105 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1108 /* It must be a TCP or UDP packet with a valid checksum */
1109 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1110 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1111 skb->ip_summed = CHECKSUM_UNNECESSARY;
1114 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1116 struct sk_buff *ax_skb;
1122 skb_trim(skb, skb->len - 4);
1123 memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1124 le32_to_cpus(&rx_hdr);
1126 pkt_cnt = (u16)rx_hdr;
1127 hdr_off = (u16)(rx_hdr >> 16);
1128 pkt_hdr = (u32 *)(skb->data + hdr_off);
1133 le32_to_cpus(pkt_hdr);
1134 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1136 /* Check CRC or runt packet */
1137 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1138 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1139 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1145 /* Skip IP alignment psudo header */
1148 skb_set_tail_pointer(skb, pkt_len);
1149 skb->truesize = pkt_len + sizeof(struct sk_buff);
1150 ax88179_rx_checksum(skb, pkt_hdr);
1154 ax_skb = skb_clone(skb, GFP_ATOMIC);
1156 ax_skb->len = pkt_len;
1157 ax_skb->data = skb->data + 2;
1158 skb_set_tail_pointer(ax_skb, pkt_len);
1159 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1160 ax88179_rx_checksum(ax_skb, pkt_hdr);
1161 usbnet_skb_return(dev, ax_skb);
1166 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1172 static struct sk_buff *
1173 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1175 u32 tx_hdr1, tx_hdr2;
1176 int frame_size = dev->maxpacket;
1177 int mss = skb_shinfo(skb)->gso_size;
1182 if (((skb->len + 8) % frame_size) == 0)
1183 tx_hdr2 |= 0x80008000; /* Enable padding */
1185 headroom = skb_headroom(skb) - 8;
1187 if ((skb_header_cloned(skb) || headroom < 0) &&
1188 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1189 dev_kfree_skb_any(skb);
1194 cpu_to_le32s(&tx_hdr2);
1195 skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1198 cpu_to_le32s(&tx_hdr1);
1199 skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1204 static int ax88179_link_reset(struct usbnet *dev)
1206 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1207 u8 tmp[5], link_sts;
1208 u16 mode, tmp16, delay = HZ / 10;
1209 u32 tmp32 = 0x40000000;
1210 unsigned long jtimeout;
1212 jtimeout = jiffies + delay;
1213 while (tmp32 & 0x40000000) {
1215 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1216 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1217 &ax179_data->rxctl);
1219 /*link up, check the usb device control TX FIFO full or empty*/
1220 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1222 if (time_after(jiffies, jtimeout))
1226 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1227 AX_MEDIUM_RXFLOW_CTRLEN;
1229 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1232 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1233 GMII_PHY_PHYSR, 2, &tmp16);
1235 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1237 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1238 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1239 if (dev->net->mtu > 1500)
1240 mode |= AX_MEDIUM_JUMBO_EN;
1242 if (link_sts & AX_USB_SS)
1243 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1244 else if (link_sts & AX_USB_HS)
1245 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1247 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1248 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1249 mode |= AX_MEDIUM_PS;
1251 if (link_sts & (AX_USB_SS | AX_USB_HS))
1252 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1254 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1256 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1259 /* RX bulk configuration */
1260 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1262 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1264 if (tmp16 & GMII_PHY_PHYSR_FULL)
1265 mode |= AX_MEDIUM_FULL_DUPLEX;
1266 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1269 netif_carrier_on(dev->net);
1274 static int ax88179_reset(struct usbnet *dev)
1283 /* Power up ethernet PHY */
1285 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1287 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1288 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1291 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1292 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1295 /* Ethernet PHY Auto Detach*/
1296 ax88179_auto_detach(dev, 0);
1298 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1299 dev->net->dev_addr);
1300 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1302 /* RX bulk configuration */
1303 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1304 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1306 dev->rx_urb_size = 1024 * 20;
1309 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1312 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1315 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1318 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1321 /* Enable checksum offload */
1322 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1323 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1324 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1326 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1327 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1328 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1330 /* Configure RX control register => start operation */
1331 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1332 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1333 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1335 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1336 AX_MONITOR_MODE_RWMP;
1337 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1339 /* Configure default medium type => giga */
1340 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1341 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1343 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1346 ax88179_led_setting(dev);
1348 /* Restart autoneg */
1349 mii_nway_restart(&dev->mii);
1351 usbnet_link_change(dev, 0, 0);
1356 static int ax88179_stop(struct usbnet *dev)
1360 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1362 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1363 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1369 static const struct driver_info ax88179_info = {
1370 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1371 .bind = ax88179_bind,
1372 .unbind = ax88179_unbind,
1373 .status = ax88179_status,
1374 .link_reset = ax88179_link_reset,
1375 .reset = ax88179_reset,
1376 .stop = ax88179_stop,
1377 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1378 .rx_fixup = ax88179_rx_fixup,
1379 .tx_fixup = ax88179_tx_fixup,
1382 static const struct driver_info ax88178a_info = {
1383 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1384 .bind = ax88179_bind,
1385 .unbind = ax88179_unbind,
1386 .status = ax88179_status,
1387 .link_reset = ax88179_link_reset,
1388 .reset = ax88179_reset,
1389 .stop = ax88179_stop,
1390 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1391 .rx_fixup = ax88179_rx_fixup,
1392 .tx_fixup = ax88179_tx_fixup,
1395 static const struct driver_info sitecom_info = {
1396 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1397 .bind = ax88179_bind,
1398 .unbind = ax88179_unbind,
1399 .status = ax88179_status,
1400 .link_reset = ax88179_link_reset,
1401 .reset = ax88179_reset,
1402 .stop = ax88179_stop,
1403 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1404 .rx_fixup = ax88179_rx_fixup,
1405 .tx_fixup = ax88179_tx_fixup,
1408 static const struct driver_info samsung_info = {
1409 .description = "Samsung USB Ethernet Adapter",
1410 .bind = ax88179_bind,
1411 .unbind = ax88179_unbind,
1412 .status = ax88179_status,
1413 .link_reset = ax88179_link_reset,
1414 .reset = ax88179_reset,
1415 .stop = ax88179_stop,
1416 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1417 .rx_fixup = ax88179_rx_fixup,
1418 .tx_fixup = ax88179_tx_fixup,
1421 static const struct usb_device_id products[] = {
1423 /* ASIX AX88179 10/100/1000 */
1424 USB_DEVICE(0x0b95, 0x1790),
1425 .driver_info = (unsigned long)&ax88179_info,
1427 /* ASIX AX88178A 10/100/1000 */
1428 USB_DEVICE(0x0b95, 0x178a),
1429 .driver_info = (unsigned long)&ax88178a_info,
1431 /* Sitecom USB 3.0 to Gigabit Adapter */
1432 USB_DEVICE(0x0df6, 0x0072),
1433 .driver_info = (unsigned long)&sitecom_info,
1435 /* Samsung USB Ethernet Adapter */
1436 USB_DEVICE(0x04e8, 0xa100),
1437 .driver_info = (unsigned long)&samsung_info,
1441 MODULE_DEVICE_TABLE(usb, products);
1443 static struct usb_driver ax88179_178a_driver = {
1444 .name = "ax88179_178a",
1445 .id_table = products,
1446 .probe = usbnet_probe,
1447 .suspend = ax88179_suspend,
1448 .resume = ax88179_resume,
1449 .reset_resume = ax88179_resume,
1450 .disconnect = usbnet_disconnect,
1451 .supports_autosuspend = 1,
1452 .disable_hub_initiated_lpm = 1,
1455 module_usb_driver(ax88179_178a_driver);
1457 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1458 MODULE_LICENSE("GPL");