drivers/net/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/dma-mapping.h>
  47 #include <linux/slab.h>
  48 #include "stmmac.h"
  49
  50 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  51 #define PHY_RESOURCE_NAME       "stmmacphy"
  52
  53 #undef STMMAC_DEBUG
  54 /*#define STMMAC_DEBUG*/
  55 #ifdef STMMAC_DEBUG
  56 #define DBG(nlevel, klevel, fmt, args...) \
  57                 ((void)(netif_msg_##nlevel(priv) && \
  58                 printk(KERN_##klevel fmt, ## args)))
  59 #else
  60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  61 #endif
  62
  63 #undef STMMAC_RX_DEBUG
  64 /*#define STMMAC_RX_DEBUG*/
  65 #ifdef STMMAC_RX_DEBUG
  66 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  67 #else
  68 #define RX_DBG(fmt, args...)  do { } while (0)
  69 #endif
  70
  71 #undef STMMAC_XMIT_DEBUG
  72 /*#define STMMAC_XMIT_DEBUG*/
  73 #ifdef STMMAC_TX_DEBUG
  74 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  75 #else
  76 #define TX_DBG(fmt, args...)  do { } while (0)
  77 #endif
  78
  79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  80 #define JUMBO_LEN       9000
  81
  82 /* Module parameters */
  83 #define TX_TIMEO 5000 /* default 5 seconds */
  84 static int watchdog = TX_TIMEO;
  85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  87
  88 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  89 module_param(debug, int, S_IRUGO | S_IWUSR);
  90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  91
  92 static int phyaddr = -1;
  93 module_param(phyaddr, int, S_IRUGO);
  94 MODULE_PARM_DESC(phyaddr, "Physical device address");
  95
  96 #define DMA_TX_SIZE 256
  97 static int dma_txsize = DMA_TX_SIZE;
  98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
  99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 100
 101 #define DMA_RX_SIZE 256
 102 static int dma_rxsize = DMA_RX_SIZE;
 103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 105
 106 static int flow_ctrl = FLOW_OFF;
 107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 109
 110 static int pause = PAUSE_TIME;
 111 module_param(pause, int, S_IRUGO | S_IWUSR);
 112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 113
 114 #define TC_DEFAULT 64
 115 static int tc = TC_DEFAULT;
 116 module_param(tc, int, S_IRUGO | S_IWUSR);
 117 MODULE_PARM_DESC(tc, "DMA threshold control value");
 118
 119 #define RX_NO_COALESCE  1       /* Always interrupt on completion */
 120 #define TX_NO_COALESCE  -1      /* No moderation by default */
 121
 122 /* Pay attention to tune this parameter; take care of both
 123  * hardware capability and network stabitily/performance impact.
 124  * Many tests showed that ~4ms latency seems to be good enough. */
 125 #ifdef CONFIG_STMMAC_TIMER
 126 #define DEFAULT_PERIODIC_RATE   256
 127 static int tmrate = DEFAULT_PERIODIC_RATE;
 128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 130 #endif
 131
 132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 133 static int buf_sz = DMA_BUFFER_SIZE;
 134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 136
 137 /* In case of Giga ETH, we can enable/disable the COE for the
 138  * transmit HW checksum computation.
 139  * Note that, if tx csum is off in HW, SG will be still supported. */
 140 static int tx_coe = HW_CSUM;
 141 module_param(tx_coe, int, S_IRUGO | S_IWUSR);
 142 MODULE_PARM_DESC(tx_coe, "GMAC COE type 2 [on/off]");
 143
 144 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 145                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 146                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 147
 148 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 149 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
 150
 151 /**
 152  * stmmac_verify_args - verify the driver parameters.
 153  * Description: it verifies if some wrong parameter is passed to the driver.
 154  * Note that wrong parameters are replaced with the default values.
 155  */
 156 static void stmmac_verify_args(void)
 157 {
 158         if (unlikely(watchdog < 0))
 159                 watchdog = TX_TIMEO;
 160         if (unlikely(dma_rxsize < 0))
 161                 dma_rxsize = DMA_RX_SIZE;
 162         if (unlikely(dma_txsize < 0))
 163                 dma_txsize = DMA_TX_SIZE;
 164         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 165                 buf_sz = DMA_BUFFER_SIZE;
 166         if (unlikely(flow_ctrl > 1))
 167                 flow_ctrl = FLOW_AUTO;
 168         else if (likely(flow_ctrl < 0))
 169                 flow_ctrl = FLOW_OFF;
 170         if (unlikely((pause < 0) || (pause > 0xffff)))
 171                 pause = PAUSE_TIME;
 172 }
 173
 174 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 175 static void print_pkt(unsigned char *buf, int len)
 176 {
 177         int j;
 178         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 179         for (j = 0; j < len; j++) {
 180                 if ((j % 16) == 0)
 181                         pr_info("\n %03x:", j);
 182                 pr_info(" %02x", buf[j]);
 183         }
 184         pr_info("\n");
 185 }
 186 #endif
 187
 188 /* minimum number of free TX descriptors required to wake up TX process */
 189 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 190
 191 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 192 {
 193         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 194 }
 195
 196 /**
 197  * stmmac_adjust_link
 198  * @dev: net device structure
 199  * Description: it adjusts the link parameters.
 200  */
 201 static void stmmac_adjust_link(struct net_device *dev)
 202 {
 203         struct stmmac_priv *priv = netdev_priv(dev);
 204         struct phy_device *phydev = priv->phydev;
 205         unsigned long ioaddr = dev->base_addr;
 206         unsigned long flags;
 207         int new_state = 0;
 208         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 209
 210         if (phydev == NULL)
 211                 return;
 212
 213         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 214             phydev->addr, phydev->link);
 215
 216         spin_lock_irqsave(&priv->lock, flags);
 217         if (phydev->link) {
 218                 u32 ctrl = readl(ioaddr + MAC_CTRL_REG);
 219
 220                 /* Now we make sure that we can be in full duplex mode.
 221                  * If not, we operate in half-duplex mode. */
 222                 if (phydev->duplex != priv->oldduplex) {
 223                         new_state = 1;
 224                         if (!(phydev->duplex))
 225                                 ctrl &= ~priv->hw->link.duplex;
 226                         else
 227                                 ctrl |= priv->hw->link.duplex;
 228                         priv->oldduplex = phydev->duplex;
 229                 }
 230                 /* Flow Control operation */
 231                 if (phydev->pause)
 232                         priv->hw->mac->flow_ctrl(ioaddr, phydev->duplex,
 233                                                  fc, pause_time);
 234
 235                 if (phydev->speed != priv->speed) {
 236                         new_state = 1;
 237                         switch (phydev->speed) {
 238                         case 1000:
 239                                 if (likely(priv->is_gmac))
 240                                         ctrl &= ~priv->hw->link.port;
 241                                 if (likely(priv->fix_mac_speed))
 242                                         priv->fix_mac_speed(priv->bsp_priv,
 243                                                             phydev->speed);
 244                                 break;
 245                         case 100:
 246                         case 10:
 247                                 if (priv->is_gmac) {
 248                                         ctrl |= priv->hw->link.port;
 249                                         if (phydev->speed == SPEED_100) {
 250                                                 ctrl |= priv->hw->link.speed;
 251                                         } else {
 252                                                 ctrl &= ~(priv->hw->link.speed);
 253                                         }
 254                                 } else {
 255                                         ctrl &= ~priv->hw->link.port;
 256                                 }
 257                                 if (likely(priv->fix_mac_speed))
 258                                         priv->fix_mac_speed(priv->bsp_priv,
 259                                                             phydev->speed);
 260                                 break;
 261                         default:
 262                                 if (netif_msg_link(priv))
 263                                         pr_warning("%s: Speed (%d) is not 10"
 264                                        " or 100!\n", dev->name, phydev->speed);
 265                                 break;
 266                         }
 267
 268                         priv->speed = phydev->speed;
 269                 }
 270
 271                 writel(ctrl, ioaddr + MAC_CTRL_REG);
 272
 273                 if (!priv->oldlink) {
 274                         new_state = 1;
 275                         priv->oldlink = 1;
 276                 }
 277         } else if (priv->oldlink) {
 278                 new_state = 1;
 279                 priv->oldlink = 0;
 280                 priv->speed = 0;
 281                 priv->oldduplex = -1;
 282         }
 283
 284         if (new_state && netif_msg_link(priv))
 285                 phy_print_status(phydev);
 286
 287         spin_unlock_irqrestore(&priv->lock, flags);
 288
 289         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 290 }
 291
 292 /**
 293  * stmmac_init_phy - PHY initialization
 294  * @dev: net device structure
 295  * Description: it initializes the driver's PHY state, and attaches the PHY
 296  * to the mac driver.
 297  *  Return value:
 298  *  0 on success
 299  */
 300 static int stmmac_init_phy(struct net_device *dev)
 301 {
 302         struct stmmac_priv *priv = netdev_priv(dev);
 303         struct phy_device *phydev;
 304         char phy_id[MII_BUS_ID_SIZE + 3];
 305         char bus_id[MII_BUS_ID_SIZE];
 306
 307         priv->oldlink = 0;
 308         priv->speed = 0;
 309         priv->oldduplex = -1;
 310
 311         if (priv->phy_addr == -1) {
 312                 /* We don't have a PHY, so do nothing */
 313                 return 0;
 314         }
 315
 316         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
 317         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 318                  priv->phy_addr);
 319         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 320
 321         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 322                         priv->phy_interface);
 323
 324         if (IS_ERR(phydev)) {
 325                 pr_err("%s: Could not attach to PHY\n", dev->name);
 326                 return PTR_ERR(phydev);
 327         }
 328
 329         /*
 330          * Broken HW is sometimes missing the pull-up resistor on the
 331          * MDIO line, which results in reads to non-existent devices returning
 332          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 333          * device as well.
 334          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 335          */
 336         if (phydev->phy_id == 0) {
 337                 phy_disconnect(phydev);
 338                 return -ENODEV;
 339         }
 340         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 341                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 342
 343         priv->phydev = phydev;
 344
 345         return 0;
 346 }
 347
 348 static inline void stmmac_mac_enable_rx(unsigned long ioaddr)
 349 {
 350         u32 value = readl(ioaddr + MAC_CTRL_REG);
 351         value |= MAC_RNABLE_RX;
 352         /* Set the RE (receive enable bit into the MAC CTRL register).  */
 353         writel(value, ioaddr + MAC_CTRL_REG);
 354 }
 355
 356 static inline void stmmac_mac_enable_tx(unsigned long ioaddr)
 357 {
 358         u32 value = readl(ioaddr + MAC_CTRL_REG);
 359         value |= MAC_ENABLE_TX;
 360         /* Set the TE (transmit enable bit into the MAC CTRL register).  */
 361         writel(value, ioaddr + MAC_CTRL_REG);
 362 }
 363
 364 static inline void stmmac_mac_disable_rx(unsigned long ioaddr)
 365 {
 366         u32 value = readl(ioaddr + MAC_CTRL_REG);
 367         value &= ~MAC_RNABLE_RX;
 368         writel(value, ioaddr + MAC_CTRL_REG);
 369 }
 370
 371 static inline void stmmac_mac_disable_tx(unsigned long ioaddr)
 372 {
 373         u32 value = readl(ioaddr + MAC_CTRL_REG);
 374         value &= ~MAC_ENABLE_TX;
 375         writel(value, ioaddr + MAC_CTRL_REG);
 376 }
 377
 378 /**
 379  * display_ring
 380  * @p: pointer to the ring.
 381  * @size: size of the ring.
 382  * Description: display all the descriptors within the ring.
 383  */
 384 static void display_ring(struct dma_desc *p, int size)
 385 {
 386         struct tmp_s {
 387                 u64 a;
 388                 unsigned int b;
 389                 unsigned int c;
 390         };
 391         int i;
 392         for (i = 0; i < size; i++) {
 393                 struct tmp_s *x = (struct tmp_s *)(p + i);
 394                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 395                        i, (unsigned int)virt_to_phys(&p[i]),
 396                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 397                        x->b, x->c);
 398                 pr_info("\n");
 399         }
 400 }
 401
 402 /**
 403  * init_dma_desc_rings - init the RX/TX descriptor rings
 404  * @dev: net device structure
 405  * Description:  this function initializes the DMA RX/TX descriptors
 406  * and allocates the socket buffers.
 407  */
 408 static void init_dma_desc_rings(struct net_device *dev)
 409 {
 410         int i;
 411         struct stmmac_priv *priv = netdev_priv(dev);
 412         struct sk_buff *skb;
 413         unsigned int txsize = priv->dma_tx_size;
 414         unsigned int rxsize = priv->dma_rx_size;
 415         unsigned int bfsize = priv->dma_buf_sz;
 416         int buff2_needed = 0, dis_ic = 0;
 417
 418         /* Set the Buffer size according to the MTU;
 419          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 420          */
 421         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 422                 bfsize = BUF_SIZE_16KiB;
 423         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 424                 bfsize = BUF_SIZE_8KiB;
 425         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 426                 bfsize = BUF_SIZE_4KiB;
 427         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 428                 bfsize = BUF_SIZE_2KiB;
 429         else
 430                 bfsize = DMA_BUFFER_SIZE;
 431
 432 #ifdef CONFIG_STMMAC_TIMER
 433         /* Disable interrupts on completion for the reception if timer is on */
 434         if (likely(priv->tm->enable))
 435                 dis_ic = 1;
 436 #endif
 437         /* If the MTU exceeds 8k so use the second buffer in the chain */
 438         if (bfsize >= BUF_SIZE_8KiB)
 439                 buff2_needed = 1;
 440
 441         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 442             txsize, rxsize, bfsize);
 443
 444         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 445         priv->rx_skbuff =
 446             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 447         priv->dma_rx =
 448             (struct dma_desc *)dma_alloc_coherent(priv->device,
 449                                                   rxsize *
 450                                                   sizeof(struct dma_desc),
 451                                                   &priv->dma_rx_phy,
 452                                                   GFP_KERNEL);
 453         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 454                                        GFP_KERNEL);
 455         priv->dma_tx =
 456             (struct dma_desc *)dma_alloc_coherent(priv->device,
 457                                                   txsize *
 458                                                   sizeof(struct dma_desc),
 459                                                   &priv->dma_tx_phy,
 460                                                   GFP_KERNEL);
 461
 462         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 463                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 464                 return;
 465         }
 466
 467         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 468             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 469             dev->name, priv->dma_rx, priv->dma_tx,
 470             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 471
 472         /* RX INITIALIZATION */
 473         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 474                          "skb\t\tskb data\tdma data\n");
 475
 476         for (i = 0; i < rxsize; i++) {
 477                 struct dma_desc *p = priv->dma_rx + i;
 478
 479                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 480                 if (unlikely(skb == NULL)) {
 481                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 482                         break;
 483                 }
 484                 priv->rx_skbuff[i] = skb;
 485                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 486                                                 bfsize, DMA_FROM_DEVICE);
 487
 488                 p->des2 = priv->rx_skbuff_dma[i];
 489                 if (unlikely(buff2_needed))
 490                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 491                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 492                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 493         }
 494         priv->cur_rx = 0;
 495         priv->dirty_rx = (unsigned int)(i - rxsize);
 496         priv->dma_buf_sz = bfsize;
 497         buf_sz = bfsize;
 498
 499         /* TX INITIALIZATION */
 500         for (i = 0; i < txsize; i++) {
 501                 priv->tx_skbuff[i] = NULL;
 502                 priv->dma_tx[i].des2 = 0;
 503         }
 504         priv->dirty_tx = 0;
 505         priv->cur_tx = 0;
 506
 507         /* Clear the Rx/Tx descriptors */
 508         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 509         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 510
 511         if (netif_msg_hw(priv)) {
 512                 pr_info("RX descriptor ring:\n");
 513                 display_ring(priv->dma_rx, rxsize);
 514                 pr_info("TX descriptor ring:\n");
 515                 display_ring(priv->dma_tx, txsize);
 516         }
 517 }
 518
 519 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 520 {
 521         int i;
 522
 523         for (i = 0; i < priv->dma_rx_size; i++) {
 524                 if (priv->rx_skbuff[i]) {
 525                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 526                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 527                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 528                 }
 529                 priv->rx_skbuff[i] = NULL;
 530         }
 531 }
 532
 533 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 534 {
 535         int i;
 536
 537         for (i = 0; i < priv->dma_tx_size; i++) {
 538                 if (priv->tx_skbuff[i] != NULL) {
 539                         struct dma_desc *p = priv->dma_tx + i;
 540                         if (p->des2)
 541                                 dma_unmap_single(priv->device, p->des2,
 542                                                  priv->hw->desc->get_tx_len(p),
 543                                                  DMA_TO_DEVICE);
 544                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 545                         priv->tx_skbuff[i] = NULL;
 546                 }
 547         }
 548 }
 549
 550 static void free_dma_desc_resources(struct stmmac_priv *priv)
 551 {
 552         /* Release the DMA TX/RX socket buffers */
 553         dma_free_rx_skbufs(priv);
 554         dma_free_tx_skbufs(priv);
 555
 556         /* Free the region of consistent memory previously allocated for
 557          * the DMA */
 558         dma_free_coherent(priv->device,
 559                           priv->dma_tx_size * sizeof(struct dma_desc),
 560                           priv->dma_tx, priv->dma_tx_phy);
 561         dma_free_coherent(priv->device,
 562                           priv->dma_rx_size * sizeof(struct dma_desc),
 563                           priv->dma_rx, priv->dma_rx_phy);
 564         kfree(priv->rx_skbuff_dma);
 565         kfree(priv->rx_skbuff);
 566         kfree(priv->tx_skbuff);
 567 }
 568
 569 /**
 570  *  stmmac_dma_operation_mode - HW DMA operation mode
 571  *  @priv : pointer to the private device structure.
 572  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 573  *  or Store-And-Forward capability. It also verifies the COE for the
 574  *  transmission in case of Giga ETH.
 575  */
 576 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 577 {
 578         if (!priv->is_gmac) {
 579                 /* MAC 10/100 */
 580                 priv->hw->dma->dma_mode(priv->dev->base_addr, tc, 0);
 581                 priv->tx_coe = NO_HW_CSUM;
 582         } else {
 583                 if ((priv->dev->mtu <= ETH_DATA_LEN) && (tx_coe)) {
 584                         priv->hw->dma->dma_mode(priv->dev->base_addr,
 585                                                 SF_DMA_MODE, SF_DMA_MODE);
 586                         tc = SF_DMA_MODE;
 587                         priv->tx_coe = HW_CSUM;
 588                 } else {
 589                         /* Checksum computation is performed in software. */
 590                         priv->hw->dma->dma_mode(priv->dev->base_addr, tc,
 591                                                 SF_DMA_MODE);
 592                         priv->tx_coe = NO_HW_CSUM;
 593                 }
 594         }
 595         tx_coe = priv->tx_coe;
 596 }
 597
 598 /**
 599  * stmmac_tx:
 600  * @priv: private driver structure
 601  * Description: it reclaims resources after transmission completes.
 602  */
 603 static void stmmac_tx(struct stmmac_priv *priv)
 604 {
 605         unsigned int txsize = priv->dma_tx_size;
 606         unsigned long ioaddr = priv->dev->base_addr;
 607
 608         while (priv->dirty_tx != priv->cur_tx) {
 609                 int last;
 610                 unsigned int entry = priv->dirty_tx % txsize;
 611                 struct sk_buff *skb = priv->tx_skbuff[entry];
 612                 struct dma_desc *p = priv->dma_tx + entry;
 613
 614                 /* Check if the descriptor is owned by the DMA. */
 615                 if (priv->hw->desc->get_tx_owner(p))
 616                         break;
 617
 618                 /* Verify tx error by looking at the last segment */
 619                 last = priv->hw->desc->get_tx_ls(p);
 620                 if (likely(last)) {
 621                         int tx_error =
 622                                 priv->hw->desc->tx_status(&priv->dev->stats,
 623                                                           &priv->xstats, p,
 624                                                           ioaddr);
 625                         if (likely(tx_error == 0)) {
 626                                 priv->dev->stats.tx_packets++;
 627                                 priv->xstats.tx_pkt_n++;
 628                         } else
 629                                 priv->dev->stats.tx_errors++;
 630                 }
 631                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 632                         priv->cur_tx, priv->dirty_tx);
 633
 634                 if (likely(p->des2))
 635                         dma_unmap_single(priv->device, p->des2,
 636                                          priv->hw->desc->get_tx_len(p),
 637                                          DMA_TO_DEVICE);
 638                 if (unlikely(p->des3))
 639                         p->des3 = 0;
 640
 641                 if (likely(skb != NULL)) {
 642                         /*
 643                          * If there's room in the queue (limit it to size)
 644                          * we add this skb back into the pool,
 645                          * if it's the right size.
 646                          */
 647                         if ((skb_queue_len(&priv->rx_recycle) <
 648                                 priv->dma_rx_size) &&
 649                                 skb_recycle_check(skb, priv->dma_buf_sz))
 650                                 __skb_queue_head(&priv->rx_recycle, skb);
 651                         else
 652                                 dev_kfree_skb(skb);
 653
 654                         priv->tx_skbuff[entry] = NULL;
 655                 }
 656
 657                 priv->hw->desc->release_tx_desc(p);
 658
 659                 entry = (++priv->dirty_tx) % txsize;
 660         }
 661         if (unlikely(netif_queue_stopped(priv->dev) &&
 662                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 663                 netif_tx_lock(priv->dev);
 664                 if (netif_queue_stopped(priv->dev) &&
 665                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 666                         TX_DBG("%s: restart transmit\n", __func__);
 667                         netif_wake_queue(priv->dev);
 668                 }
 669                 netif_tx_unlock(priv->dev);
 670         }
 671 }
 672
 673 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 674 {
 675 #ifdef CONFIG_STMMAC_TIMER
 676         if (likely(priv->tm->enable))
 677                 priv->tm->timer_start(tmrate);
 678         else
 679 #endif
 680                 priv->hw->dma->enable_dma_irq(priv->dev->base_addr);
 681 }
 682
 683 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 684 {
 685 #ifdef CONFIG_STMMAC_TIMER
 686         if (likely(priv->tm->enable))
 687                 priv->tm->timer_stop();
 688         else
 689 #endif
 690                 priv->hw->dma->disable_dma_irq(priv->dev->base_addr);
 691 }
 692
 693 static int stmmac_has_work(struct stmmac_priv *priv)
 694 {
 695         unsigned int has_work = 0;
 696         int rxret, tx_work = 0;
 697
 698         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 699                 (priv->cur_rx % priv->dma_rx_size));
 700
 701         if (priv->dirty_tx != priv->cur_tx)
 702                 tx_work = 1;
 703
 704         if (likely(!rxret || tx_work))
 705                 has_work = 1;
 706
 707         return has_work;
 708 }
 709
 710 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 711 {
 712         if (likely(stmmac_has_work(priv))) {
 713                 stmmac_disable_irq(priv);
 714                 napi_schedule(&priv->napi);
 715         }
 716 }
 717
 718 #ifdef CONFIG_STMMAC_TIMER
 719 void stmmac_schedule(struct net_device *dev)
 720 {
 721         struct stmmac_priv *priv = netdev_priv(dev);
 722
 723         priv->xstats.sched_timer_n++;
 724
 725         _stmmac_schedule(priv);
 726 }
 727
 728 static void stmmac_no_timer_started(unsigned int x)
 729 {;
 730 };
 731
 732 static void stmmac_no_timer_stopped(void)
 733 {;
 734 };
 735 #endif
 736
 737 /**
 738  * stmmac_tx_err:
 739  * @priv: pointer to the private device structure
 740  * Description: it cleans the descriptors and restarts the transmission
 741  * in case of errors.
 742  */
 743 static void stmmac_tx_err(struct stmmac_priv *priv)
 744 {
 745         netif_stop_queue(priv->dev);
 746
 747         priv->hw->dma->stop_tx(priv->dev->base_addr);
 748         dma_free_tx_skbufs(priv);
 749         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 750         priv->dirty_tx = 0;
 751         priv->cur_tx = 0;
 752         priv->hw->dma->start_tx(priv->dev->base_addr);
 753
 754         priv->dev->stats.tx_errors++;
 755         netif_wake_queue(priv->dev);
 756 }
 757
 758
 759 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 760 {
 761         unsigned long ioaddr = priv->dev->base_addr;
 762         int status;
 763
 764         status = priv->hw->dma->dma_interrupt(priv->dev->base_addr,
 765                                               &priv->xstats);
 766         if (likely(status == handle_tx_rx))
 767                 _stmmac_schedule(priv);
 768
 769         else if (unlikely(status == tx_hard_error_bump_tc)) {
 770                 /* Try to bump up the dma threshold on this failure */
 771                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 772                         tc += 64;
 773                         priv->hw->dma->dma_mode(ioaddr, tc, SF_DMA_MODE);
 774                         priv->xstats.threshold = tc;
 775                 }
 776                 stmmac_tx_err(priv);
 777         } else if (unlikely(status == tx_hard_error))
 778                 stmmac_tx_err(priv);
 779 }
 780
 781 /**
 782  *  stmmac_open - open entry point of the driver
 783  *  @dev : pointer to the device structure.
 784  *  Description:
 785  *  This function is the open entry point of the driver.
 786  *  Return value:
 787  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 788  *  file on failure.
 789  */
 790 static int stmmac_open(struct net_device *dev)
 791 {
 792         struct stmmac_priv *priv = netdev_priv(dev);
 793         unsigned long ioaddr = dev->base_addr;
 794         int ret;
 795
 796         /* Check that the MAC address is valid.  If its not, refuse
 797          * to bring the device up. The user must specify an
 798          * address using the following linux command:
 799          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 800         if (!is_valid_ether_addr(dev->dev_addr)) {
 801                 random_ether_addr(dev->dev_addr);
 802                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 803                         dev->dev_addr);
 804         }
 805
 806         stmmac_verify_args();
 807
 808         ret = stmmac_init_phy(dev);
 809         if (unlikely(ret)) {
 810                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 811                 return ret;
 812         }
 813
 814         /* Request the IRQ lines */
 815         ret = request_irq(dev->irq, stmmac_interrupt,
 816                           IRQF_SHARED, dev->name, dev);
 817         if (unlikely(ret < 0)) {
 818                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 819                        __func__, dev->irq, ret);
 820                 return ret;
 821         }
 822
 823 #ifdef CONFIG_STMMAC_TIMER
 824         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 825         if (unlikely(priv->tm == NULL)) {
 826                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 827                 return -ENOMEM;
 828         }
 829         priv->tm->freq = tmrate;
 830
 831         /* Test if the external timer can be actually used.
 832          * In case of failure continue without timer. */
 833         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 834                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 835                 priv->tm->freq = 0;
 836                 priv->tm->timer_start = stmmac_no_timer_started;
 837                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 838         } else
 839                 priv->tm->enable = 1;
 840 #endif
 841
 842         /* Create and initialize the TX/RX descriptors chains. */
 843         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 844         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 845         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 846         init_dma_desc_rings(dev);
 847
 848         /* DMA initialization and SW reset */
 849         if (unlikely(priv->hw->dma->init(ioaddr, priv->pbl, priv->dma_tx_phy,
 850                                          priv->dma_rx_phy) < 0)) {
 851
 852                 pr_err("%s: DMA initialization failed\n", __func__);
 853                 return -1;
 854         }
 855
 856         /* Copy the MAC addr into the HW  */
 857         priv->hw->mac->set_umac_addr(ioaddr, dev->dev_addr, 0);
 858         /* If required, perform hw setup of the bus. */
 859         if (priv->bus_setup)
 860                 priv->bus_setup(ioaddr);
 861         /* Initialize the MAC Core */
 862         priv->hw->mac->core_init(ioaddr);
 863
 864         priv->shutdown = 0;
 865
 866         /* Initialise the MMC (if present) to disable all interrupts. */
 867         writel(0xffffffff, ioaddr + MMC_HIGH_INTR_MASK);
 868         writel(0xffffffff, ioaddr + MMC_LOW_INTR_MASK);
 869
 870         /* Enable the MAC Rx/Tx */
 871         stmmac_mac_enable_rx(ioaddr);
 872         stmmac_mac_enable_tx(ioaddr);
 873
 874         /* Set the HW DMA mode and the COE */
 875         stmmac_dma_operation_mode(priv);
 876
 877         /* Extra statistics */
 878         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 879         priv->xstats.threshold = tc;
 880
 881         /* Start the ball rolling... */
 882         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 883         priv->hw->dma->start_tx(ioaddr);
 884         priv->hw->dma->start_rx(ioaddr);
 885
 886 #ifdef CONFIG_STMMAC_TIMER
 887         priv->tm->timer_start(tmrate);
 888 #endif
 889         /* Dump DMA/MAC registers */
 890         if (netif_msg_hw(priv)) {
 891                 priv->hw->mac->dump_regs(ioaddr);
 892                 priv->hw->dma->dump_regs(ioaddr);
 893         }
 894
 895         if (priv->phydev)
 896                 phy_start(priv->phydev);
 897
 898         napi_enable(&priv->napi);
 899         skb_queue_head_init(&priv->rx_recycle);
 900         netif_start_queue(dev);
 901         return 0;
 902 }
 903
 904 /**
 905  *  stmmac_release - close entry point of the driver
 906  *  @dev : device pointer.
 907  *  Description:
 908  *  This is the stop entry point of the driver.
 909  */
 910 static int stmmac_release(struct net_device *dev)
 911 {
 912         struct stmmac_priv *priv = netdev_priv(dev);
 913
 914         /* Stop and disconnect the PHY */
 915         if (priv->phydev) {
 916                 phy_stop(priv->phydev);
 917                 phy_disconnect(priv->phydev);
 918                 priv->phydev = NULL;
 919         }
 920
 921         netif_stop_queue(dev);
 922
 923 #ifdef CONFIG_STMMAC_TIMER
 924         /* Stop and release the timer */
 925         stmmac_close_ext_timer();
 926         if (priv->tm != NULL)
 927                 kfree(priv->tm);
 928 #endif
 929         napi_disable(&priv->napi);
 930         skb_queue_purge(&priv->rx_recycle);
 931
 932         /* Free the IRQ lines */
 933         free_irq(dev->irq, dev);
 934
 935         /* Stop TX/RX DMA and clear the descriptors */
 936         priv->hw->dma->stop_tx(dev->base_addr);
 937         priv->hw->dma->stop_rx(dev->base_addr);
 938
 939         /* Release and free the Rx/Tx resources */
 940         free_dma_desc_resources(priv);
 941
 942         /* Disable the MAC core */
 943         stmmac_mac_disable_tx(dev->base_addr);
 944         stmmac_mac_disable_rx(dev->base_addr);
 945
 946         netif_carrier_off(dev);
 947
 948         return 0;
 949 }
 950
 951 /*
 952  * To perform emulated hardware segmentation on skb.
 953  */
 954 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
 955 {
 956         struct sk_buff *segs, *curr_skb;
 957         int gso_segs = skb_shinfo(skb)->gso_segs;
 958
 959         /* Estimate the number of fragments in the worst case */
 960         if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
 961                 netif_stop_queue(priv->dev);
 962                 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
 963                        __func__);
 964                 if (stmmac_tx_avail(priv) < gso_segs)
 965                         return NETDEV_TX_BUSY;
 966
 967                 netif_wake_queue(priv->dev);
 968         }
 969         TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
 970                skb, skb->len);
 971
 972         segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
 973         if (unlikely(IS_ERR(segs)))
 974                 goto sw_tso_end;
 975
 976         do {
 977                 curr_skb = segs;
 978                 segs = segs->next;
 979                 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
 980                        "*next %p\n", curr_skb->len, curr_skb, segs);
 981                 curr_skb->next = NULL;
 982                 stmmac_xmit(curr_skb, priv->dev);
 983         } while (segs);
 984
 985 sw_tso_end:
 986         dev_kfree_skb(skb);
 987
 988         return NETDEV_TX_OK;
 989 }
 990
 991 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
 992                                                struct net_device *dev,
 993                                                int csum_insertion)
 994 {
 995         struct stmmac_priv *priv = netdev_priv(dev);
 996         unsigned int nopaged_len = skb_headlen(skb);
 997         unsigned int txsize = priv->dma_tx_size;
 998         unsigned int entry = priv->cur_tx % txsize;
 999         struct dma_desc *desc = priv->dma_tx + entry;
1000
1001         if (nopaged_len > BUF_SIZE_8KiB) {
1002
1003                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
1004
1005                 desc->des2 = dma_map_single(priv->device, skb->data,
1006                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
1007                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1008                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
1009                                                 csum_insertion);
1010
1011                 entry = (++priv->cur_tx) % txsize;
1012                 desc = priv->dma_tx + entry;
1013
1014                 desc->des2 = dma_map_single(priv->device,
1015                                         skb->data + BUF_SIZE_8KiB,
1016                                         buf2_size, DMA_TO_DEVICE);
1017                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1018                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1019                                                 csum_insertion);
1020                 priv->hw->desc->set_tx_owner(desc);
1021                 priv->tx_skbuff[entry] = NULL;
1022         } else {
1023                 desc->des2 = dma_map_single(priv->device, skb->data,
1024                                         nopaged_len, DMA_TO_DEVICE);
1025                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1026                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1027                                                 csum_insertion);
1028         }
1029         return entry;
1030 }
1031
1032 /**
1033  *  stmmac_xmit:
1034  *  @skb : the socket buffer
1035  *  @dev : device pointer
1036  *  Description : Tx entry point of the driver.
1037  */
1038 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1039 {
1040         struct stmmac_priv *priv = netdev_priv(dev);
1041         unsigned int txsize = priv->dma_tx_size;
1042         unsigned int entry;
1043         int i, csum_insertion = 0;
1044         int nfrags = skb_shinfo(skb)->nr_frags;
1045         struct dma_desc *desc, *first;
1046
1047         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1048                 if (!netif_queue_stopped(dev)) {
1049                         netif_stop_queue(dev);
1050                         /* This is a hard error, log it. */
1051                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1052                                 __func__);
1053                 }
1054                 return NETDEV_TX_BUSY;
1055         }
1056
1057         entry = priv->cur_tx % txsize;
1058
1059 #ifdef STMMAC_XMIT_DEBUG
1060         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1061                 pr_info("stmmac xmit:\n"
1062                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1063                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1064                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1065                        !skb_is_gso(skb) ? "isn't" : "is");
1066 #endif
1067
1068         if (unlikely(skb_is_gso(skb)))
1069                 return stmmac_sw_tso(priv, skb);
1070
1071         if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1072                 if (likely(priv->tx_coe == NO_HW_CSUM))
1073                         skb_checksum_help(skb);
1074                 else
1075                         csum_insertion = 1;
1076         }
1077
1078         desc = priv->dma_tx + entry;
1079         first = desc;
1080
1081 #ifdef STMMAC_XMIT_DEBUG
1082         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1083                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1084                        "\t\tn_frags: %d, ip_summed: %d\n",
1085                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1086 #endif
1087         priv->tx_skbuff[entry] = skb;
1088         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1089                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1090                 desc = priv->dma_tx + entry;
1091         } else {
1092                 unsigned int nopaged_len = skb_headlen(skb);
1093                 desc->des2 = dma_map_single(priv->device, skb->data,
1094                                         nopaged_len, DMA_TO_DEVICE);
1095                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1096                                                 csum_insertion);
1097         }
1098
1099         for (i = 0; i < nfrags; i++) {
1100                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1101                 int len = frag->size;
1102
1103                 entry = (++priv->cur_tx) % txsize;
1104                 desc = priv->dma_tx + entry;
1105
1106                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1107                 desc->des2 = dma_map_page(priv->device, frag->page,
1108                                           frag->page_offset,
1109                                           len, DMA_TO_DEVICE);
1110                 priv->tx_skbuff[entry] = NULL;
1111                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1112                 priv->hw->desc->set_tx_owner(desc);
1113         }
1114
1115         /* Interrupt on completition only for the latest segment */
1116         priv->hw->desc->close_tx_desc(desc);
1117
1118 #ifdef CONFIG_STMMAC_TIMER
1119         /* Clean IC while using timer */
1120         if (likely(priv->tm->enable))
1121                 priv->hw->desc->clear_tx_ic(desc);
1122 #endif
1123         /* To avoid raise condition */
1124         priv->hw->desc->set_tx_owner(first);
1125
1126         priv->cur_tx++;
1127
1128 #ifdef STMMAC_XMIT_DEBUG
1129         if (netif_msg_pktdata(priv)) {
1130                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1131                        "first=%p, nfrags=%d\n",
1132                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1133                        entry, first, nfrags);
1134                 display_ring(priv->dma_tx, txsize);
1135                 pr_info(">>> frame to be transmitted: ");
1136                 print_pkt(skb->data, skb->len);
1137         }
1138 #endif
1139         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1140                 TX_DBG("%s: stop transmitted packets\n", __func__);
1141                 netif_stop_queue(dev);
1142         }
1143
1144         dev->stats.tx_bytes += skb->len;
1145
1146         priv->hw->dma->enable_dma_transmission(dev->base_addr);
1147
1148         return NETDEV_TX_OK;
1149 }
1150
1151 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1152 {
1153         unsigned int rxsize = priv->dma_rx_size;
1154         int bfsize = priv->dma_buf_sz;
1155         struct dma_desc *p = priv->dma_rx;
1156
1157         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1158                 unsigned int entry = priv->dirty_rx % rxsize;
1159                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1160                         struct sk_buff *skb;
1161
1162                         skb = __skb_dequeue(&priv->rx_recycle);
1163                         if (skb == NULL)
1164                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1165                                                                 bfsize);
1166
1167                         if (unlikely(skb == NULL))
1168                                 break;
1169
1170                         priv->rx_skbuff[entry] = skb;
1171                         priv->rx_skbuff_dma[entry] =
1172                             dma_map_single(priv->device, skb->data, bfsize,
1173                                            DMA_FROM_DEVICE);
1174
1175                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1176                         if (unlikely(priv->is_gmac)) {
1177                                 if (bfsize >= BUF_SIZE_8KiB)
1178                                         (p + entry)->des3 =
1179                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1180                         }
1181                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1182                 }
1183                 priv->hw->desc->set_rx_owner(p + entry);
1184         }
1185 }
1186
1187 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1188 {
1189         unsigned int rxsize = priv->dma_rx_size;
1190         unsigned int entry = priv->cur_rx % rxsize;
1191         unsigned int next_entry;
1192         unsigned int count = 0;
1193         struct dma_desc *p = priv->dma_rx + entry;
1194         struct dma_desc *p_next;
1195
1196 #ifdef STMMAC_RX_DEBUG
1197         if (netif_msg_hw(priv)) {
1198                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1199                 display_ring(priv->dma_rx, rxsize);
1200         }
1201 #endif
1202         count = 0;
1203         while (!priv->hw->desc->get_rx_owner(p)) {
1204                 int status;
1205
1206                 if (count >= limit)
1207                         break;
1208
1209                 count++;
1210
1211                 next_entry = (++priv->cur_rx) % rxsize;
1212                 p_next = priv->dma_rx + next_entry;
1213                 prefetch(p_next);
1214
1215                 /* read the status of the incoming frame */
1216                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1217                                                     &priv->xstats, p));
1218                 if (unlikely(status == discard_frame))
1219                         priv->dev->stats.rx_errors++;
1220                 else {
1221                         struct sk_buff *skb;
1222                         int frame_len;
1223
1224                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1225                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1226                          * Type frames (LLC/LLC-SNAP) */
1227                         if (unlikely(status != llc_snap))
1228                                 frame_len -= ETH_FCS_LEN;
1229 #ifdef STMMAC_RX_DEBUG
1230                         if (frame_len > ETH_FRAME_LEN)
1231                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1232                                         frame_len, status);
1233
1234                         if (netif_msg_hw(priv))
1235                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1236                                         p, entry, p->des2);
1237 #endif
1238                         skb = priv->rx_skbuff[entry];
1239                         if (unlikely(!skb)) {
1240                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1241                                         priv->dev->name);
1242                                 priv->dev->stats.rx_dropped++;
1243                                 break;
1244                         }
1245                         prefetch(skb->data - NET_IP_ALIGN);
1246                         priv->rx_skbuff[entry] = NULL;
1247
1248                         skb_put(skb, frame_len);
1249                         dma_unmap_single(priv->device,
1250                                          priv->rx_skbuff_dma[entry],
1251                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1252 #ifdef STMMAC_RX_DEBUG
1253                         if (netif_msg_pktdata(priv)) {
1254                                 pr_info(" frame received (%dbytes)", frame_len);
1255                                 print_pkt(skb->data, frame_len);
1256                         }
1257 #endif
1258                         skb->protocol = eth_type_trans(skb, priv->dev);
1259
1260                         if (unlikely(status == csum_none)) {
1261                                 /* always for the old mac 10/100 */
1262                                 skb->ip_summed = CHECKSUM_NONE;
1263                                 netif_receive_skb(skb);
1264                         } else {
1265                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1266                                 napi_gro_receive(&priv->napi, skb);
1267                         }
1268
1269                         priv->dev->stats.rx_packets++;
1270                         priv->dev->stats.rx_bytes += frame_len;
1271                 }
1272                 entry = next_entry;
1273                 p = p_next;     /* use prefetched values */
1274         }
1275
1276         stmmac_rx_refill(priv);
1277
1278         priv->xstats.rx_pkt_n += count;
1279
1280         return count;
1281 }
1282
1283 /**
1284  *  stmmac_poll - stmmac poll method (NAPI)
1285  *  @napi : pointer to the napi structure.
1286  *  @budget : maximum number of packets that the current CPU can receive from
1287  *            all interfaces.
1288  *  Description :
1289  *   This function implements the the reception process.
1290  *   Also it runs the TX completion thread
1291  */
1292 static int stmmac_poll(struct napi_struct *napi, int budget)
1293 {
1294         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1295         int work_done = 0;
1296
1297         priv->xstats.poll_n++;
1298         stmmac_tx(priv);
1299         work_done = stmmac_rx(priv, budget);
1300
1301         if (work_done < budget) {
1302                 napi_complete(napi);
1303                 stmmac_enable_irq(priv);
1304         }
1305         return work_done;
1306 }
1307
1308 /**
1309  *  stmmac_tx_timeout
1310  *  @dev : Pointer to net device structure
1311  *  Description: this function is called when a packet transmission fails to
1312  *   complete within a reasonable tmrate. The driver will mark the error in the
1313  *   netdev structure and arrange for the device to be reset to a sane state
1314  *   in order to transmit a new packet.
1315  */
1316 static void stmmac_tx_timeout(struct net_device *dev)
1317 {
1318         struct stmmac_priv *priv = netdev_priv(dev);
1319
1320         /* Clear Tx resources and restart transmitting again */
1321         stmmac_tx_err(priv);
1322 }
1323
1324 /* Configuration changes (passed on by ifconfig) */
1325 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1326 {
1327         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1328                 return -EBUSY;
1329
1330         /* Don't allow changing the I/O address */
1331         if (map->base_addr != dev->base_addr) {
1332                 pr_warning("%s: can't change I/O address\n", dev->name);
1333                 return -EOPNOTSUPP;
1334         }
1335
1336         /* Don't allow changing the IRQ */
1337         if (map->irq != dev->irq) {
1338                 pr_warning("%s: can't change IRQ number %d\n",
1339                        dev->name, dev->irq);
1340                 return -EOPNOTSUPP;
1341         }
1342
1343         /* ignore other fields */
1344         return 0;
1345 }
1346
1347 /**
1348  *  stmmac_multicast_list - entry point for multicast addressing
1349  *  @dev : pointer to the device structure
1350  *  Description:
1351  *  This function is a driver entry point which gets called by the kernel
1352  *  whenever multicast addresses must be enabled/disabled.
1353  *  Return value:
1354  *  void.
1355  */
1356 static void stmmac_multicast_list(struct net_device *dev)
1357 {
1358         struct stmmac_priv *priv = netdev_priv(dev);
1359
1360         spin_lock(&priv->lock);
1361         priv->hw->mac->set_filter(dev);
1362         spin_unlock(&priv->lock);
1363 }
1364
1365 /**
1366  *  stmmac_change_mtu - entry point to change MTU size for the device.
1367  *  @dev : device pointer.
1368  *  @new_mtu : the new MTU size for the device.
1369  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1370  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1371  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1372  *  Return value:
1373  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1374  *  file on failure.
1375  */
1376 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1377 {
1378         struct stmmac_priv *priv = netdev_priv(dev);
1379         int max_mtu;
1380
1381         if (netif_running(dev)) {
1382                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1383                 return -EBUSY;
1384         }
1385
1386         if (priv->is_gmac)
1387                 max_mtu = JUMBO_LEN;
1388         else
1389                 max_mtu = ETH_DATA_LEN;
1390
1391         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1392                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1393                 return -EINVAL;
1394         }
1395
1396         dev->mtu = new_mtu;
1397
1398         return 0;
1399 }
1400
1401 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1402 {
1403         struct net_device *dev = (struct net_device *)dev_id;
1404         struct stmmac_priv *priv = netdev_priv(dev);
1405
1406         if (unlikely(!dev)) {
1407                 pr_err("%s: invalid dev pointer\n", __func__);
1408                 return IRQ_NONE;
1409         }
1410
1411         if (priv->is_gmac) {
1412                 unsigned long ioaddr = dev->base_addr;
1413                 /* To handle GMAC own interrupts */
1414                 priv->hw->mac->host_irq_status(ioaddr);
1415         }
1416
1417         stmmac_dma_interrupt(priv);
1418
1419         return IRQ_HANDLED;
1420 }
1421
1422 #ifdef CONFIG_NET_POLL_CONTROLLER
1423 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1424  * to allow network I/O with interrupts disabled. */
1425 static void stmmac_poll_controller(struct net_device *dev)
1426 {
1427         disable_irq(dev->irq);
1428         stmmac_interrupt(dev->irq, dev);
1429         enable_irq(dev->irq);
1430 }
1431 #endif
1432
1433 /**
1434  *  stmmac_ioctl - Entry point for the Ioctl
1435  *  @dev: Device pointer.
1436  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1437  *  a proprietary structure used to pass information to the driver.
1438  *  @cmd: IOCTL command
1439  *  Description:
1440  *  Currently there are no special functionality supported in IOCTL, just the
1441  *  phy_mii_ioctl(...) can be invoked.
1442  */
1443 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1444 {
1445         struct stmmac_priv *priv = netdev_priv(dev);
1446         int ret;
1447
1448         if (!netif_running(dev))
1449                 return -EINVAL;
1450
1451         if (!priv->phydev)
1452                 return -EINVAL;
1453
1454         spin_lock(&priv->lock);
1455         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1456         spin_unlock(&priv->lock);
1457
1458         return ret;
1459 }
1460
1461 #ifdef STMMAC_VLAN_TAG_USED
1462 static void stmmac_vlan_rx_register(struct net_device *dev,
1463                                     struct vlan_group *grp)
1464 {
1465         struct stmmac_priv *priv = netdev_priv(dev);
1466
1467         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1468
1469         spin_lock(&priv->lock);
1470         priv->vlgrp = grp;
1471         spin_unlock(&priv->lock);
1472 }
1473 #endif
1474
1475 static const struct net_device_ops stmmac_netdev_ops = {
1476         .ndo_open = stmmac_open,
1477         .ndo_start_xmit = stmmac_xmit,
1478         .ndo_stop = stmmac_release,
1479         .ndo_change_mtu = stmmac_change_mtu,
1480         .ndo_set_multicast_list = stmmac_multicast_list,
1481         .ndo_tx_timeout = stmmac_tx_timeout,
1482         .ndo_do_ioctl = stmmac_ioctl,
1483         .ndo_set_config = stmmac_config,
1484 #ifdef STMMAC_VLAN_TAG_USED
1485         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1486 #endif
1487 #ifdef CONFIG_NET_POLL_CONTROLLER
1488         .ndo_poll_controller = stmmac_poll_controller,
1489 #endif
1490         .ndo_set_mac_address = eth_mac_addr,
1491 };
1492
1493 /**
1494  * stmmac_probe - Initialization of the adapter .
1495  * @dev : device pointer
1496  * Description: The function initializes the network device structure for
1497  * the STMMAC driver. It also calls the low level routines
1498  * in order to init the HW (i.e. the DMA engine)
1499  */
1500 static int stmmac_probe(struct net_device *dev)
1501 {
1502         int ret = 0;
1503         struct stmmac_priv *priv = netdev_priv(dev);
1504
1505         ether_setup(dev);
1506
1507         dev->netdev_ops = &stmmac_netdev_ops;
1508         stmmac_set_ethtool_ops(dev);
1509
1510         dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1511         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1512 #ifdef STMMAC_VLAN_TAG_USED
1513         /* Both mac100 and gmac support receive VLAN tag detection */
1514         dev->features |= NETIF_F_HW_VLAN_RX;
1515 #endif
1516         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1517
1518         if (priv->is_gmac)
1519                 priv->rx_csum = 1;
1520
1521         if (flow_ctrl)
1522                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1523
1524         priv->pause = pause;
1525         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1526
1527         /* Get the MAC address */
1528         priv->hw->mac->get_umac_addr(dev->base_addr, dev->dev_addr, 0);
1529
1530         if (!is_valid_ether_addr(dev->dev_addr))
1531                 pr_warning("\tno valid MAC address;"
1532                         "please, use ifconfig or nwhwconfig!\n");
1533
1534         ret = register_netdev(dev);
1535         if (ret) {
1536                 pr_err("%s: ERROR %i registering the device\n",
1537                        __func__, ret);
1538                 return -ENODEV;
1539         }
1540
1541         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1542             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1543             (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1544
1545         spin_lock_init(&priv->lock);
1546
1547         return ret;
1548 }
1549
1550 /**
1551  * stmmac_mac_device_setup
1552  * @dev : device pointer
1553  * Description: select and initialise the mac device (mac100 or Gmac).
1554  */
1555 static int stmmac_mac_device_setup(struct net_device *dev)
1556 {
1557         struct stmmac_priv *priv = netdev_priv(dev);
1558         unsigned long ioaddr = dev->base_addr;
1559
1560         struct mac_device_info *device;
1561
1562         if (priv->is_gmac)
1563                 device = dwmac1000_setup(ioaddr);
1564         else
1565                 device = dwmac100_setup(ioaddr);
1566
1567         if (!device)
1568                 return -ENOMEM;
1569
1570         if (priv->enh_desc) {
1571                 device->desc = &enh_desc_ops;
1572                 pr_info("\tEnhanced descriptor structure\n");
1573         } else
1574                 device->desc = &ndesc_ops;
1575
1576         priv->hw = device;
1577
1578         priv->wolenabled = priv->hw->pmt;       /* PMT supported */
1579         if (priv->wolenabled == PMT_SUPPORTED)
1580                 priv->wolopts = WAKE_MAGIC;             /* Magic Frame */
1581
1582         return 0;
1583 }
1584
1585 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1586 {
1587         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1588
1589         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1590                plat_dat->bus_id);
1591
1592         return 0;
1593 }
1594
1595 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1596 {
1597         return 0;
1598 }
1599
1600 static struct platform_driver stmmacphy_driver = {
1601         .driver = {
1602                    .name = PHY_RESOURCE_NAME,
1603                    },
1604         .probe = stmmacphy_dvr_probe,
1605         .remove = stmmacphy_dvr_remove,
1606 };
1607
1608 /**
1609  * stmmac_associate_phy
1610  * @dev: pointer to device structure
1611  * @data: points to the private structure.
1612  * Description: Scans through all the PHYs we have registered and checks if
1613  * any are associated with our MAC.  If so, then just fill in
1614  * the blanks in our local context structure
1615  */
1616 static int stmmac_associate_phy(struct device *dev, void *data)
1617 {
1618         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1619         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1620
1621         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1622                 plat_dat->bus_id);
1623
1624         /* Check that this phy is for the MAC being initialised */
1625         if (priv->bus_id != plat_dat->bus_id)
1626                 return 0;
1627
1628         /* OK, this PHY is connected to the MAC.
1629            Go ahead and get the parameters */
1630         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1631         priv->phy_irq =
1632             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1633         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1634             plat_dat->bus_id, priv->phy_irq);
1635
1636         /* Override with kernel parameters if supplied XXX CRS XXX
1637          * this needs to have multiple instances */
1638         if ((phyaddr >= 0) && (phyaddr <= 31))
1639                 plat_dat->phy_addr = phyaddr;
1640
1641         priv->phy_addr = plat_dat->phy_addr;
1642         priv->phy_mask = plat_dat->phy_mask;
1643         priv->phy_interface = plat_dat->interface;
1644         priv->phy_reset = plat_dat->phy_reset;
1645
1646         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1647         return 1;       /* forces exit of driver_for_each_device() */
1648 }
1649
1650 /**
1651  * stmmac_dvr_probe
1652  * @pdev: platform device pointer
1653  * Description: the driver is initialized through platform_device.
1654  */
1655 static int stmmac_dvr_probe(struct platform_device *pdev)
1656 {
1657         int ret = 0;
1658         struct resource *res;
1659         unsigned int *addr = NULL;
1660         struct net_device *ndev = NULL;
1661         struct stmmac_priv *priv;
1662         struct plat_stmmacenet_data *plat_dat;
1663
1664         pr_info("STMMAC driver:\n\tplatform registration... ");
1665         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1666         if (!res) {
1667                 ret = -ENODEV;
1668                 goto out;
1669         }
1670         pr_info("done!\n");
1671
1672         if (!request_mem_region(res->start, resource_size(res),
1673                                 pdev->name)) {
1674                 pr_err("%s: ERROR: memory allocation failed"
1675                        "cannot get the I/O addr 0x%x\n",
1676                        __func__, (unsigned int)res->start);
1677                 ret = -EBUSY;
1678                 goto out;
1679         }
1680
1681         addr = ioremap(res->start, resource_size(res));
1682         if (!addr) {
1683                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1684                 ret = -ENOMEM;
1685                 goto out;
1686         }
1687
1688         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1689         if (!ndev) {
1690                 pr_err("%s: ERROR: allocating the device\n", __func__);
1691                 ret = -ENOMEM;
1692                 goto out;
1693         }
1694
1695         SET_NETDEV_DEV(ndev, &pdev->dev);
1696
1697         /* Get the MAC information */
1698         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1699         if (ndev->irq == -ENXIO) {
1700                 pr_err("%s: ERROR: MAC IRQ configuration "
1701                        "information not found\n", __func__);
1702                 ret = -ENODEV;
1703                 goto out;
1704         }
1705
1706         priv = netdev_priv(ndev);
1707         priv->device = &(pdev->dev);
1708         priv->dev = ndev;
1709         plat_dat = pdev->dev.platform_data;
1710         priv->bus_id = plat_dat->bus_id;
1711         priv->pbl = plat_dat->pbl;      /* TLI */
1712         priv->is_gmac = plat_dat->has_gmac;     /* GMAC is on board */
1713         priv->enh_desc = plat_dat->enh_desc;
1714
1715         platform_set_drvdata(pdev, ndev);
1716
1717         /* Set the I/O base addr */
1718         ndev->base_addr = (unsigned long)addr;
1719
1720         /* Verify embedded resource for the platform */
1721         ret = stmmac_claim_resource(pdev);
1722         if (ret < 0)
1723                 goto out;
1724
1725         /* MAC HW revice detection */
1726         ret = stmmac_mac_device_setup(ndev);
1727         if (ret < 0)
1728                 goto out;
1729
1730         /* Network Device Registration */
1731         ret = stmmac_probe(ndev);
1732         if (ret < 0)
1733                 goto out;
1734
1735         /* associate a PHY - it is provided by another platform bus */
1736         if (!driver_for_each_device
1737             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1738              stmmac_associate_phy)) {
1739                 pr_err("No PHY device is associated with this MAC!\n");
1740                 ret = -ENODEV;
1741                 goto out;
1742         }
1743
1744         priv->fix_mac_speed = plat_dat->fix_mac_speed;
1745         priv->bus_setup = plat_dat->bus_setup;
1746         priv->bsp_priv = plat_dat->bsp_priv;
1747
1748         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1749                "\tIO base addr: 0x%08x)\n", ndev->name, pdev->name,
1750                pdev->id, ndev->irq, (unsigned int)addr);
1751
1752         /* MDIO bus Registration */
1753         pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
1754         ret = stmmac_mdio_register(ndev);
1755         if (ret < 0)
1756                 goto out;
1757         pr_debug("registered!\n");
1758
1759 out:
1760         if (ret < 0) {
1761                 platform_set_drvdata(pdev, NULL);
1762                 release_mem_region(res->start, resource_size(res));
1763                 if (addr != NULL)
1764                         iounmap(addr);
1765         }
1766
1767         return ret;
1768 }
1769
1770 /**
1771  * stmmac_dvr_remove
1772  * @pdev: platform device pointer
1773  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1774  * changes the link status, releases the DMA descriptor rings,
1775  * unregisters the MDIO bus and unmaps the allocated memory.
1776  */
1777 static int stmmac_dvr_remove(struct platform_device *pdev)
1778 {
1779         struct net_device *ndev = platform_get_drvdata(pdev);
1780         struct stmmac_priv *priv = netdev_priv(ndev);
1781         struct resource *res;
1782
1783         pr_info("%s:\n\tremoving driver", __func__);
1784
1785         priv->hw->dma->stop_rx(ndev->base_addr);
1786         priv->hw->dma->stop_tx(ndev->base_addr);
1787
1788         stmmac_mac_disable_rx(ndev->base_addr);
1789         stmmac_mac_disable_tx(ndev->base_addr);
1790
1791         netif_carrier_off(ndev);
1792
1793         stmmac_mdio_unregister(ndev);
1794
1795         platform_set_drvdata(pdev, NULL);
1796         unregister_netdev(ndev);
1797
1798         iounmap((void *)ndev->base_addr);
1799         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1800         release_mem_region(res->start, resource_size(res));
1801
1802         free_netdev(ndev);
1803
1804         return 0;
1805 }
1806
1807 #ifdef CONFIG_PM
1808 static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1809 {
1810         struct net_device *dev = platform_get_drvdata(pdev);
1811         struct stmmac_priv *priv = netdev_priv(dev);
1812         int dis_ic = 0;
1813
1814         if (!dev || !netif_running(dev))
1815                 return 0;
1816
1817         spin_lock(&priv->lock);
1818
1819         if (state.event == PM_EVENT_SUSPEND) {
1820                 netif_device_detach(dev);
1821                 netif_stop_queue(dev);
1822                 if (priv->phydev)
1823                         phy_stop(priv->phydev);
1824
1825 #ifdef CONFIG_STMMAC_TIMER
1826                 priv->tm->timer_stop();
1827                 if (likely(priv->tm->enable))
1828                         dis_ic = 1;
1829 #endif
1830                 napi_disable(&priv->napi);
1831
1832                 /* Stop TX/RX DMA */
1833                 priv->hw->dma->stop_tx(dev->base_addr);
1834                 priv->hw->dma->stop_rx(dev->base_addr);
1835                 /* Clear the Rx/Tx descriptors */
1836                 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1837                                              dis_ic);
1838                 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1839
1840                 stmmac_mac_disable_tx(dev->base_addr);
1841
1842                 if (device_may_wakeup(&(pdev->dev))) {
1843                         /* Enable Power down mode by programming the PMT regs */
1844                         if (priv->wolenabled == PMT_SUPPORTED)
1845                                 priv->hw->mac->pmt(dev->base_addr,
1846                                                    priv->wolopts);
1847                 } else {
1848                         stmmac_mac_disable_rx(dev->base_addr);
1849                 }
1850         } else {
1851                 priv->shutdown = 1;
1852                 /* Although this can appear slightly redundant it actually
1853                  * makes fast the standby operation and guarantees the driver
1854                  * working if hibernation is on media. */
1855                 stmmac_release(dev);
1856         }
1857
1858         spin_unlock(&priv->lock);
1859         return 0;
1860 }
1861
1862 static int stmmac_resume(struct platform_device *pdev)
1863 {
1864         struct net_device *dev = platform_get_drvdata(pdev);
1865         struct stmmac_priv *priv = netdev_priv(dev);
1866         unsigned long ioaddr = dev->base_addr;
1867
1868         if (!netif_running(dev))
1869                 return 0;
1870
1871         spin_lock(&priv->lock);
1872
1873         if (priv->shutdown) {
1874                 /* Re-open the interface and re-init the MAC/DMA
1875                    and the rings. */
1876                 stmmac_open(dev);
1877                 goto out_resume;
1878         }
1879
1880         /* Power Down bit, into the PM register, is cleared
1881          * automatically as soon as a magic packet or a Wake-up frame
1882          * is received. Anyway, it's better to manually clear
1883          * this bit because it can generate problems while resuming
1884          * from another devices (e.g. serial console). */
1885         if (device_may_wakeup(&(pdev->dev)))
1886                 if (priv->wolenabled == PMT_SUPPORTED)
1887                         priv->hw->mac->pmt(dev->base_addr, 0);
1888
1889         netif_device_attach(dev);
1890
1891         /* Enable the MAC and DMA */
1892         stmmac_mac_enable_rx(ioaddr);
1893         stmmac_mac_enable_tx(ioaddr);
1894         priv->hw->dma->start_tx(ioaddr);
1895         priv->hw->dma->start_rx(ioaddr);
1896
1897 #ifdef CONFIG_STMMAC_TIMER
1898         priv->tm->timer_start(tmrate);
1899 #endif
1900         napi_enable(&priv->napi);
1901
1902         if (priv->phydev)
1903                 phy_start(priv->phydev);
1904
1905         netif_start_queue(dev);
1906
1907 out_resume:
1908         spin_unlock(&priv->lock);
1909         return 0;
1910 }
1911 #endif
1912
1913 static struct platform_driver stmmac_driver = {
1914         .driver = {
1915                    .name = STMMAC_RESOURCE_NAME,
1916                    },
1917         .probe = stmmac_dvr_probe,
1918         .remove = stmmac_dvr_remove,
1919 #ifdef CONFIG_PM
1920         .suspend = stmmac_suspend,
1921         .resume = stmmac_resume,
1922 #endif
1923
1924 };
1925
1926 /**
1927  * stmmac_init_module - Entry point for the driver
1928  * Description: This function is the entry point for the driver.
1929  */
1930 static int __init stmmac_init_module(void)
1931 {
1932         int ret;
1933
1934         if (platform_driver_register(&stmmacphy_driver)) {
1935                 pr_err("No PHY devices registered!\n");
1936                 return -ENODEV;
1937         }
1938
1939         ret = platform_driver_register(&stmmac_driver);
1940         return ret;
1941 }
1942
1943 /**
1944  * stmmac_cleanup_module - Cleanup routine for the driver
1945  * Description: This function is the cleanup routine for the driver.
1946  */
1947 static void __exit stmmac_cleanup_module(void)
1948 {
1949         platform_driver_unregister(&stmmacphy_driver);
1950         platform_driver_unregister(&stmmac_driver);
1951 }
1952
1953 #ifndef MODULE
1954 static int __init stmmac_cmdline_opt(char *str)
1955 {
1956         char *opt;
1957
1958         if (!str || !*str)
1959                 return -EINVAL;
1960         while ((opt = strsep(&str, ",")) != NULL) {
1961                 if (!strncmp(opt, "debug:", 6))
1962                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1963                 else if (!strncmp(opt, "phyaddr:", 8))
1964                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1965                 else if (!strncmp(opt, "dma_txsize:", 11))
1966                         strict_strtoul(opt + 11, 0,
1967                                        (unsigned long *)&dma_txsize);
1968                 else if (!strncmp(opt, "dma_rxsize:", 11))
1969                         strict_strtoul(opt + 11, 0,
1970                                        (unsigned long *)&dma_rxsize);
1971                 else if (!strncmp(opt, "buf_sz:", 7))
1972                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1973                 else if (!strncmp(opt, "tc:", 3))
1974                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1975                 else if (!strncmp(opt, "tx_coe:", 7))
1976                         strict_strtoul(opt + 7, 0, (unsigned long *)&tx_coe);
1977                 else if (!strncmp(opt, "watchdog:", 9))
1978                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1979                 else if (!strncmp(opt, "flow_ctrl:", 10))
1980                         strict_strtoul(opt + 10, 0,
1981                                        (unsigned long *)&flow_ctrl);
1982                 else if (!strncmp(opt, "pause:", 6))
1983                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1984 #ifdef CONFIG_STMMAC_TIMER
1985                 else if (!strncmp(opt, "tmrate:", 7))
1986                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1987 #endif
1988         }
1989         return 0;
1990 }
1991
1992 __setup("stmmaceth=", stmmac_cmdline_opt);
1993 #endif
1994
1995 module_init(stmmac_init_module);
1996 module_exit(stmmac_cleanup_module);
1997
1998 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1999 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2000 MODULE_LICENSE("GPL");