1 // SPDX-License-Identifier: GPL-2.0+
3 * SMSC LAN9[12]1[567] Network driver
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
14 #include <linux/types.h>
24 struct eth_device dev;
26 const struct chip_id *chipid;
27 unsigned char enetaddr[6];
30 static const struct chip_id chip_ids[] = {
31 { CHIP_89218, "LAN89218" },
32 { CHIP_9115, "LAN9115" },
33 { CHIP_9116, "LAN9116" },
34 { CHIP_9117, "LAN9117" },
35 { CHIP_9118, "LAN9118" },
36 { CHIP_9211, "LAN9211" },
37 { CHIP_9215, "LAN9215" },
38 { CHIP_9216, "LAN9216" },
39 { CHIP_9217, "LAN9217" },
40 { CHIP_9218, "LAN9218" },
41 { CHIP_9220, "LAN9220" },
42 { CHIP_9221, "LAN9221" },
46 #define DRIVERNAME "smc911x"
48 #if defined (CONFIG_SMC911X_32_BIT) && \
49 defined (CONFIG_SMC911X_16_BIT)
50 #error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
51 CONFIG_SMC911X_16_BIT shall be set"
54 #if defined (CONFIG_SMC911X_32_BIT)
55 static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
57 return readl(priv->iobase + offset);
60 static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
62 writel(val, priv->iobase + offset);
64 #elif defined (CONFIG_SMC911X_16_BIT)
65 static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
67 return (readw(priv->iobase + offset) & 0xffff) |
68 (readw(priv->iobase + offset + 2) << 16);
70 static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
72 writew(val & 0xffff, priv->iobase + offset);
73 writew(val >> 16, priv->iobase + offset + 2);
76 #error "SMC911X: undefined bus width"
77 #endif /* CONFIG_SMC911X_16_BIT */
79 static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
81 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
83 smc911x_reg_write(priv, MAC_CSR_CMD,
84 MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
85 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
88 return smc911x_reg_read(priv, MAC_CSR_DATA);
91 static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
93 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
95 smc911x_reg_write(priv, MAC_CSR_DATA, data);
96 smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
97 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
101 static int smc911x_detect_chip(struct smc911x_priv *priv)
103 unsigned long val, i;
105 val = smc911x_reg_read(priv, BYTE_TEST);
106 if (val == 0xffffffff) {
107 /* Special case -- no chip present */
109 } else if (val != 0x87654321) {
110 printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
114 val = smc911x_reg_read(priv, ID_REV) >> 16;
115 for (i = 0; chip_ids[i].id != 0; i++) {
116 if (chip_ids[i].id == val) break;
118 if (!chip_ids[i].id) {
119 printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
123 priv->chipid = &chip_ids[i];
128 static void smc911x_reset(struct smc911x_priv *priv)
133 * Take out of PM setting first
134 * Device is already wake up if PMT_CTRL_READY bit is set
136 if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
137 /* Write to the bytetest will take out of powerdown */
138 smc911x_reg_write(priv, BYTE_TEST, 0x0);
143 !(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
147 ": timeout waiting for PM restore\n");
152 /* Disable interrupts */
153 smc911x_reg_write(priv, INT_EN, 0);
155 smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
158 while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
162 printf(DRIVERNAME ": reset timeout\n");
166 /* Reset the FIFO level and flow control settings */
167 smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
168 smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
170 /* Set to LED outputs */
171 smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
174 static void smc911x_handle_mac_address(struct smc911x_priv *priv)
176 unsigned long addrh, addrl;
177 unsigned char *m = priv->enetaddr;
179 addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
180 addrh = m[4] | (m[5] << 8);
181 smc911x_set_mac_csr(priv, ADDRL, addrl);
182 smc911x_set_mac_csr(priv, ADDRH, addrh);
184 printf(DRIVERNAME ": MAC %pM\n", m);
187 static int smc911x_eth_phy_read(struct smc911x_priv *priv,
188 u8 phy, u8 reg, u16 *val)
190 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
193 smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
196 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
199 *val = smc911x_get_mac_csr(priv, MII_DATA);
204 static int smc911x_eth_phy_write(struct smc911x_priv *priv,
205 u8 phy, u8 reg, u16 val)
207 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
210 smc911x_set_mac_csr(priv, MII_DATA, val);
211 smc911x_set_mac_csr(priv, MII_ACC,
212 phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
214 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
219 static int smc911x_phy_reset(struct smc911x_priv *priv)
223 reg = smc911x_reg_read(priv, PMT_CTRL);
225 reg |= PMT_CTRL_PHY_RST;
226 smc911x_reg_write(priv, PMT_CTRL, reg);
233 static void smc911x_phy_configure(struct smc911x_priv *priv)
238 smc911x_phy_reset(priv);
240 smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
242 smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
243 smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
249 if ((timeout--) == 0)
252 if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
254 } while (!(status & BMSR_LSTATUS));
256 printf(DRIVERNAME ": phy initialized\n");
261 printf(DRIVERNAME ": autonegotiation timed out\n");
264 static void smc911x_enable(struct smc911x_priv *priv)
267 smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
269 smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
271 smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
273 /* no padding to start of packets */
274 smc911x_reg_write(priv, RX_CFG, 0);
276 smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
280 static int smc911x_init(struct eth_device *dev, bd_t * bd)
282 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
283 const struct chip_id *id = priv->chipid;
285 printf(DRIVERNAME ": detected %s controller\n", id->name);
289 /* Configure the PHY, initialize the link state */
290 smc911x_phy_configure(priv);
292 smc911x_handle_mac_address(priv);
294 /* Turn on Tx + Rx */
295 smc911x_enable(priv);
300 static int smc911x_send(struct eth_device *dev, void *packet, int length)
302 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
303 u32 *data = (u32*)packet;
307 smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
308 TX_CMD_A_INT_LAST_SEG | length);
309 smc911x_reg_write(priv, TX_DATA_FIFO, length);
311 tmplen = (length + 3) / 4;
314 smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
316 /* wait for transmission */
317 while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
318 TX_FIFO_INF_TSUSED) >> 16));
320 /* get status. Ignore 'no carrier' error, it has no meaning for
321 * full duplex operation
323 status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
324 (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
325 TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
330 printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
331 status & TX_STS_LOC ? "TX_STS_LOC " : "",
332 status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
333 status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
334 status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
335 status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
340 static void smc911x_halt(struct eth_device *dev)
342 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
345 smc911x_handle_mac_address(priv);
348 static int smc911x_recv(struct eth_device *dev)
350 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
351 u32 *data = (u32 *)net_rx_packets[0];
355 status = smc911x_reg_read(priv, RX_FIFO_INF);
356 if (!(status & RX_FIFO_INF_RXSUSED))
359 status = smc911x_reg_read(priv, RX_STATUS_FIFO);
360 pktlen = (status & RX_STS_PKT_LEN) >> 16;
362 smc911x_reg_write(priv, RX_CFG, 0);
364 tmplen = (pktlen + 3) / 4;
366 *data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
368 if (status & RX_STS_ES)
370 ": dropped bad packet. Status: 0x%08x\n",
373 net_process_received_packet(net_rx_packets[0], pktlen);
378 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
379 /* wrapper for smc911x_eth_phy_read */
380 static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
383 struct eth_device *dev = eth_get_dev_by_name(bus->name);
384 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
391 ret = smc911x_eth_phy_read(priv, phy, reg, &val);
398 /* wrapper for smc911x_eth_phy_write */
399 static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
402 struct eth_device *dev = eth_get_dev_by_name(bus->name);
403 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
408 return smc911x_eth_phy_write(priv, phy, reg, val);
411 static int smc911x_initialize_mii(struct smc911x_priv *priv)
413 struct mii_dev *mdiodev = mdio_alloc();
419 strncpy(mdiodev->name, priv->dev.name, MDIO_NAME_LEN);
420 mdiodev->read = smc911x_miiphy_read;
421 mdiodev->write = smc911x_miiphy_write;
423 ret = mdio_register(mdiodev);
432 static int smc911x_initialize_mii(struct smc911x_priv *priv)
438 int smc911x_initialize(u8 dev_num, int base_addr)
440 unsigned long addrl, addrh;
441 struct smc911x_priv *priv;
444 priv = calloc(1, sizeof(*priv));
448 priv->iobase = base_addr;
449 priv->dev.iobase = base_addr;
451 /* Try to detect chip. Will fail if not present. */
452 ret = smc911x_detect_chip(priv);
454 ret = 0; /* Card not detected is not an error */
458 addrh = smc911x_get_mac_csr(priv, ADDRH);
459 addrl = smc911x_get_mac_csr(priv, ADDRL);
460 if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
461 /* address is obtained from optional eeprom */
462 priv->enetaddr[0] = addrl;
463 priv->enetaddr[1] = addrl >> 8;
464 priv->enetaddr[2] = addrl >> 16;
465 priv->enetaddr[3] = addrl >> 24;
466 priv->enetaddr[4] = addrh;
467 priv->enetaddr[5] = addrh >> 8;
470 priv->dev.init = smc911x_init;
471 priv->dev.halt = smc911x_halt;
472 priv->dev.send = smc911x_send;
473 priv->dev.recv = smc911x_recv;
474 sprintf(priv->dev.name, "%s-%hu", DRIVERNAME, dev_num);
476 eth_register(&priv->dev);
478 ret = smc911x_initialize_mii(priv);
485 eth_unregister(&priv->dev);