1 // SPDX-License-Identifier: GPL-2.0+
3 * SMSC LAN9[12]1[567] Network driver
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
14 #include <linux/delay.h>
15 #include <linux/types.h>
26 struct eth_device dev;
29 const struct chip_id *chipid;
30 unsigned char enetaddr[6];
33 static const struct chip_id chip_ids[] = {
34 { CHIP_89218, "LAN89218" },
35 { CHIP_9115, "LAN9115" },
36 { CHIP_9116, "LAN9116" },
37 { CHIP_9117, "LAN9117" },
38 { CHIP_9118, "LAN9118" },
39 { CHIP_9211, "LAN9211" },
40 { CHIP_9215, "LAN9215" },
41 { CHIP_9216, "LAN9216" },
42 { CHIP_9217, "LAN9217" },
43 { CHIP_9218, "LAN9218" },
44 { CHIP_9220, "LAN9220" },
45 { CHIP_9221, "LAN9221" },
49 #define DRIVERNAME "smc911x"
51 #if defined (CONFIG_SMC911X_32_BIT) && \
52 defined (CONFIG_SMC911X_16_BIT)
53 #error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
54 CONFIG_SMC911X_16_BIT shall be set"
57 #if defined (CONFIG_SMC911X_32_BIT)
58 static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
60 return readl(priv->iobase + offset);
63 static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
65 writel(val, priv->iobase + offset);
67 #elif defined (CONFIG_SMC911X_16_BIT)
68 static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
70 return (readw(priv->iobase + offset) & 0xffff) |
71 (readw(priv->iobase + offset + 2) << 16);
73 static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
75 writew(val & 0xffff, priv->iobase + offset);
76 writew(val >> 16, priv->iobase + offset + 2);
79 #error "SMC911X: undefined bus width"
80 #endif /* CONFIG_SMC911X_16_BIT */
82 static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
84 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
86 smc911x_reg_write(priv, MAC_CSR_CMD,
87 MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
88 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
91 return smc911x_reg_read(priv, MAC_CSR_DATA);
94 static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
96 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
98 smc911x_reg_write(priv, MAC_CSR_DATA, data);
99 smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
100 while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
104 static int smc911x_detect_chip(struct smc911x_priv *priv)
106 unsigned long val, i;
108 val = smc911x_reg_read(priv, BYTE_TEST);
109 if (val == 0xffffffff) {
110 /* Special case -- no chip present */
112 } else if (val != 0x87654321) {
113 printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
117 val = smc911x_reg_read(priv, ID_REV) >> 16;
118 for (i = 0; chip_ids[i].id != 0; i++) {
119 if (chip_ids[i].id == val) break;
121 if (!chip_ids[i].id) {
122 printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
126 priv->chipid = &chip_ids[i];
131 static void smc911x_reset(struct smc911x_priv *priv)
136 * Take out of PM setting first
137 * Device is already wake up if PMT_CTRL_READY bit is set
139 if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
140 /* Write to the bytetest will take out of powerdown */
141 smc911x_reg_write(priv, BYTE_TEST, 0x0);
146 !(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
150 ": timeout waiting for PM restore\n");
155 /* Disable interrupts */
156 smc911x_reg_write(priv, INT_EN, 0);
158 smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
161 while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
165 printf(DRIVERNAME ": reset timeout\n");
169 /* Reset the FIFO level and flow control settings */
170 smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
171 smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
173 /* Set to LED outputs */
174 smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
177 static void smc911x_handle_mac_address(struct smc911x_priv *priv)
179 unsigned long addrh, addrl;
180 unsigned char *m = priv->enetaddr;
182 addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
183 addrh = m[4] | (m[5] << 8);
184 smc911x_set_mac_csr(priv, ADDRL, addrl);
185 smc911x_set_mac_csr(priv, ADDRH, addrh);
187 printf(DRIVERNAME ": MAC %pM\n", m);
190 static bool smc911x_read_mac_address(struct smc911x_priv *priv)
194 /* address is obtained from optional eeprom */
195 addrh = smc911x_get_mac_csr(priv, ADDRH);
196 addrl = smc911x_get_mac_csr(priv, ADDRL);
197 if (addrl == 0xffffffff && addrh == 0x0000ffff)
200 priv->enetaddr[0] = addrl;
201 priv->enetaddr[1] = addrl >> 8;
202 priv->enetaddr[2] = addrl >> 16;
203 priv->enetaddr[3] = addrl >> 24;
204 priv->enetaddr[4] = addrh;
205 priv->enetaddr[5] = addrh >> 8;
210 static int smc911x_eth_phy_read(struct smc911x_priv *priv,
211 u8 phy, u8 reg, u16 *val)
213 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
216 smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
219 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
222 *val = smc911x_get_mac_csr(priv, MII_DATA);
227 static int smc911x_eth_phy_write(struct smc911x_priv *priv,
228 u8 phy, u8 reg, u16 val)
230 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
233 smc911x_set_mac_csr(priv, MII_DATA, val);
234 smc911x_set_mac_csr(priv, MII_ACC,
235 phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
237 while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
242 static int smc911x_phy_reset(struct smc911x_priv *priv)
246 reg = smc911x_reg_read(priv, PMT_CTRL);
248 reg |= PMT_CTRL_PHY_RST;
249 smc911x_reg_write(priv, PMT_CTRL, reg);
256 static void smc911x_phy_configure(struct smc911x_priv *priv)
261 smc911x_phy_reset(priv);
263 smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
265 smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
266 smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
272 if ((timeout--) == 0)
275 if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
277 } while (!(status & BMSR_LSTATUS));
279 printf(DRIVERNAME ": phy initialized\n");
284 printf(DRIVERNAME ": autonegotiation timed out\n");
287 static void smc911x_enable(struct smc911x_priv *priv)
290 smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
292 smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
294 smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
296 /* no padding to start of packets */
297 smc911x_reg_write(priv, RX_CFG, 0);
299 smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
303 static int smc911x_init_common(struct smc911x_priv *priv)
305 const struct chip_id *id = priv->chipid;
307 printf(DRIVERNAME ": detected %s controller\n", id->name);
311 /* Configure the PHY, initialize the link state */
312 smc911x_phy_configure(priv);
314 smc911x_handle_mac_address(priv);
316 /* Turn on Tx + Rx */
317 smc911x_enable(priv);
322 static int smc911x_send_common(struct smc911x_priv *priv,
323 void *packet, int length)
325 u32 *data = (u32*)packet;
329 smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
330 TX_CMD_A_INT_LAST_SEG | length);
331 smc911x_reg_write(priv, TX_DATA_FIFO, length);
333 tmplen = (length + 3) / 4;
336 smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
338 /* wait for transmission */
339 while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
340 TX_FIFO_INF_TSUSED) >> 16));
342 /* get status. Ignore 'no carrier' error, it has no meaning for
343 * full duplex operation
345 status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
346 (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
347 TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
352 printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
353 status & TX_STS_LOC ? "TX_STS_LOC " : "",
354 status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
355 status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
356 status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
357 status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
362 static void smc911x_halt_common(struct smc911x_priv *priv)
365 smc911x_handle_mac_address(priv);
368 static int smc911x_recv_common(struct smc911x_priv *priv, u32 *data)
373 status = smc911x_reg_read(priv, RX_FIFO_INF);
374 if (!(status & RX_FIFO_INF_RXSUSED))
377 status = smc911x_reg_read(priv, RX_STATUS_FIFO);
378 pktlen = (status & RX_STS_PKT_LEN) >> 16;
380 smc911x_reg_write(priv, RX_CFG, 0);
382 tmplen = (pktlen + 3) / 4;
384 *data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
386 if (status & RX_STS_ES) {
388 ": dropped bad packet. Status: 0x%08x\n",
396 #ifndef CONFIG_DM_ETH
398 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
399 /* wrapper for smc911x_eth_phy_read */
400 static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
403 struct eth_device *dev = eth_get_dev_by_name(bus->name);
404 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
411 ret = smc911x_eth_phy_read(priv, phy, reg, &val);
418 /* wrapper for smc911x_eth_phy_write */
419 static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
422 struct eth_device *dev = eth_get_dev_by_name(bus->name);
423 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
428 return smc911x_eth_phy_write(priv, phy, reg, val);
431 static int smc911x_initialize_mii(struct smc911x_priv *priv)
433 struct mii_dev *mdiodev = mdio_alloc();
439 strncpy(mdiodev->name, priv->dev.name, MDIO_NAME_LEN);
440 mdiodev->read = smc911x_miiphy_read;
441 mdiodev->write = smc911x_miiphy_write;
443 ret = mdio_register(mdiodev);
452 static int smc911x_initialize_mii(struct smc911x_priv *priv)
458 static int smc911x_init(struct eth_device *dev, struct bd_info *bd)
460 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
462 return smc911x_init_common(priv);
465 static void smc911x_halt(struct eth_device *dev)
467 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
469 smc911x_halt_common(priv);
472 static int smc911x_send(struct eth_device *dev, void *packet, int length)
474 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
476 return smc911x_send_common(priv, packet, length);
479 static int smc911x_recv(struct eth_device *dev)
481 struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
482 u32 *data = (u32 *)net_rx_packets[0];
485 ret = smc911x_recv_common(priv, data);
487 net_process_received_packet(net_rx_packets[0], ret);
492 int smc911x_initialize(u8 dev_num, int base_addr)
494 struct smc911x_priv *priv;
497 priv = calloc(1, sizeof(*priv));
501 priv->iobase = base_addr;
502 priv->dev.iobase = base_addr;
504 /* Try to detect chip. Will fail if not present. */
505 ret = smc911x_detect_chip(priv);
507 ret = 0; /* Card not detected is not an error */
511 if (smc911x_read_mac_address(priv))
512 memcpy(priv->dev.enetaddr, priv->enetaddr, 6);
514 priv->dev.init = smc911x_init;
515 priv->dev.halt = smc911x_halt;
516 priv->dev.send = smc911x_send;
517 priv->dev.recv = smc911x_recv;
518 sprintf(priv->dev.name, "%s-%hu", DRIVERNAME, dev_num);
520 eth_register(&priv->dev);
522 ret = smc911x_initialize_mii(priv);
529 eth_unregister(&priv->dev);
535 #else /* ifdef CONFIG_DM_ETH */
537 static int smc911x_start(struct udevice *dev)
539 struct eth_pdata *plat = dev_get_platdata(dev);
540 struct smc911x_priv *priv = dev_get_priv(dev);
542 memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
544 return smc911x_init_common(priv);
547 static void smc911x_stop(struct udevice *dev)
549 struct smc911x_priv *priv = dev_get_priv(dev);
551 smc911x_halt_common(priv);
554 static int smc911x_send(struct udevice *dev, void *packet, int length)
556 struct smc911x_priv *priv = dev_get_priv(dev);
559 ret = smc911x_send_common(priv, packet, length);
561 return ret ? 0 : -ETIMEDOUT;
564 static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
566 struct smc911x_priv *priv = dev_get_priv(dev);
567 u32 *data = (u32 *)net_rx_packets[0];
570 ret = smc911x_recv_common(priv, data);
572 *packetp = (void *)data;
574 return ret ? ret : -EAGAIN;
577 static int smc911x_read_rom_hwaddr(struct udevice *dev)
579 struct smc911x_priv *priv = dev_get_priv(dev);
580 struct eth_pdata *pdata = dev_get_platdata(dev);
582 if (!smc911x_read_mac_address(priv))
585 memcpy(pdata->enetaddr, priv->enetaddr, sizeof(pdata->enetaddr));
590 static int smc911x_bind(struct udevice *dev)
592 return device_set_name(dev, dev->name);
595 static int smc911x_probe(struct udevice *dev)
597 struct smc911x_priv *priv = dev_get_priv(dev);
600 /* Try to detect chip. Will fail if not present. */
601 ret = smc911x_detect_chip(priv);
605 smc911x_read_rom_hwaddr(dev);
610 static int smc911x_ofdata_to_platdata(struct udevice *dev)
612 struct smc911x_priv *priv = dev_get_priv(dev);
613 struct eth_pdata *pdata = dev_get_platdata(dev);
615 pdata->iobase = devfdt_get_addr(dev);
616 priv->iobase = pdata->iobase;
621 static const struct eth_ops smc911x_ops = {
622 .start = smc911x_start,
623 .send = smc911x_send,
624 .recv = smc911x_recv,
625 .stop = smc911x_stop,
626 .read_rom_hwaddr = smc911x_read_rom_hwaddr,
629 static const struct udevice_id smc911x_ids[] = {
630 { .compatible = "smsc,lan9115" },
634 U_BOOT_DRIVER(smc911x) = {
635 .name = "eth_smc911x",
637 .of_match = smc911x_ids,
638 .bind = smc911x_bind,
639 .ofdata_to_platdata = smc911x_ofdata_to_platdata,
640 .probe = smc911x_probe,
642 .priv_auto_alloc_size = sizeof(struct smc911x_priv),
643 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
644 .flags = DM_FLAG_ALLOC_PRIV_DMA,