1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
29 #include "workarounds.h"
31 /**************************************************************************
35 **************************************************************************
38 /* Loopback mode names (see LOOPBACK_MODE()) */
39 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
40 const char *efx_loopback_mode_names[] = {
41 [LOOPBACK_NONE] = "NONE",
42 [LOOPBACK_DATA] = "DATAPATH",
43 [LOOPBACK_GMAC] = "GMAC",
44 [LOOPBACK_XGMII] = "XGMII",
45 [LOOPBACK_XGXS] = "XGXS",
46 [LOOPBACK_XAUI] = "XAUI",
47 [LOOPBACK_GMII] = "GMII",
48 [LOOPBACK_SGMII] = "SGMII",
49 [LOOPBACK_XGBR] = "XGBR",
50 [LOOPBACK_XFI] = "XFI",
51 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
52 [LOOPBACK_GMII_FAR] = "GMII_FAR",
53 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
54 [LOOPBACK_XFI_FAR] = "XFI_FAR",
55 [LOOPBACK_GPHY] = "GPHY",
56 [LOOPBACK_PHYXS] = "PHYXS",
57 [LOOPBACK_PCS] = "PCS",
58 [LOOPBACK_PMAPMD] = "PMA/PMD",
59 [LOOPBACK_XPORT] = "XPORT",
60 [LOOPBACK_XGMII_WS] = "XGMII_WS",
61 [LOOPBACK_XAUI_WS] = "XAUI_WS",
62 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
63 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
64 [LOOPBACK_GMII_WS] = "GMII_WS",
65 [LOOPBACK_XFI_WS] = "XFI_WS",
66 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
67 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
70 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
71 const char *efx_reset_type_names[] = {
72 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
73 [RESET_TYPE_ALL] = "ALL",
74 [RESET_TYPE_WORLD] = "WORLD",
75 [RESET_TYPE_DISABLE] = "DISABLE",
76 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
77 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
78 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
79 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
80 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
81 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
82 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
85 #define EFX_MAX_MTU (9 * 1024)
87 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
88 * queued onto this work queue. This is not a per-nic work queue, because
89 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 static struct workqueue_struct *reset_workqueue;
93 /**************************************************************************
97 *************************************************************************/
100 * Use separate channels for TX and RX events
102 * Set this to 1 to use separate channels for TX and RX. It allows us
103 * to control interrupt affinity separately for TX and RX.
105 * This is only used in MSI-X interrupt mode
107 static unsigned int separate_tx_channels;
108 module_param(separate_tx_channels, uint, 0444);
109 MODULE_PARM_DESC(separate_tx_channels,
110 "Use separate channels for TX and RX");
112 /* This is the weight assigned to each of the (per-channel) virtual
115 static int napi_weight = 64;
117 /* This is the time (in jiffies) between invocations of the hardware
118 * monitor. On Falcon-based NICs, this will:
119 * - Check the on-board hardware monitor;
120 * - Poll the link state and reconfigure the hardware as necessary.
122 static unsigned int efx_monitor_interval = 1 * HZ;
124 /* This controls whether or not the driver will initialise devices
125 * with invalid MAC addresses stored in the EEPROM or flash. If true,
126 * such devices will be initialised with a random locally-generated
127 * MAC address. This allows for loading the sfc_mtd driver to
128 * reprogram the flash, even if the flash contents (including the MAC
129 * address) have previously been erased.
131 static unsigned int allow_bad_hwaddr;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * The default for RX should strike a balance between increasing the
137 * round-trip latency and reducing overhead.
139 static unsigned int rx_irq_mod_usec = 60;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * This default is chosen to ensure that a 10G link does not go idle
145 * while a TX queue is stopped after it has become full. A queue is
146 * restarted when it drops below half full. The time this takes (assuming
147 * worst case 3 descriptors per packet and 1024 descriptors) is
148 * 512 / 3 * 1.2 = 205 usec.
150 static unsigned int tx_irq_mod_usec = 150;
152 /* This is the first interrupt mode to try out of:
157 static unsigned int interrupt_mode;
159 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
160 * i.e. the number of CPUs among which we may distribute simultaneous
161 * interrupt handling.
163 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
164 * The default (0) means to assign an interrupt to each package (level II cache)
166 static unsigned int rss_cpus;
167 module_param(rss_cpus, uint, 0444);
168 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
170 static int phy_flash_cfg;
171 module_param(phy_flash_cfg, int, 0644);
172 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
174 static unsigned irq_adapt_low_thresh = 10000;
175 module_param(irq_adapt_low_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_low_thresh,
177 "Threshold score for reducing IRQ moderation");
179 static unsigned irq_adapt_high_thresh = 20000;
180 module_param(irq_adapt_high_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_high_thresh,
182 "Threshold score for increasing IRQ moderation");
184 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
185 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
186 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
187 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
188 module_param(debug, uint, 0);
189 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
191 /**************************************************************************
193 * Utility functions and prototypes
195 *************************************************************************/
197 static void efx_remove_channels(struct efx_nic *efx);
198 static void efx_remove_port(struct efx_nic *efx);
199 static void efx_init_napi(struct efx_nic *efx);
200 static void efx_fini_napi(struct efx_nic *efx);
201 static void efx_fini_napi_channel(struct efx_channel *channel);
202 static void efx_fini_struct(struct efx_nic *efx);
203 static void efx_start_all(struct efx_nic *efx);
204 static void efx_stop_all(struct efx_nic *efx);
206 #define EFX_ASSERT_RESET_SERIALISED(efx) \
208 if ((efx->state == STATE_RUNNING) || \
209 (efx->state == STATE_DISABLED)) \
213 /**************************************************************************
215 * Event queue processing
217 *************************************************************************/
219 /* Process channel's event queue
221 * This function is responsible for processing the event queue of a
222 * single channel. The caller must guarantee that this function will
223 * never be concurrently called more than once on the same channel,
224 * though different channels may be being processed concurrently.
226 static int efx_process_channel(struct efx_channel *channel, int budget)
228 struct efx_nic *efx = channel->efx;
231 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
235 spent = efx_nic_process_eventq(channel, budget);
239 /* Deliver last RX packet. */
240 if (channel->rx_pkt) {
241 __efx_rx_packet(channel, channel->rx_pkt,
242 channel->rx_pkt_csummed);
243 channel->rx_pkt = NULL;
246 efx_rx_strategy(channel);
248 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
253 /* Mark channel as finished processing
255 * Note that since we will not receive further interrupts for this
256 * channel before we finish processing and call the eventq_read_ack()
257 * method, there is no need to use the interrupt hold-off timers.
259 static inline void efx_channel_processed(struct efx_channel *channel)
261 /* The interrupt handler for this channel may set work_pending
262 * as soon as we acknowledge the events we've seen. Make sure
263 * it's cleared before then. */
264 channel->work_pending = false;
267 efx_nic_eventq_read_ack(channel);
272 * NAPI guarantees serialisation of polls of the same device, which
273 * provides the guarantee required by efx_process_channel().
275 static int efx_poll(struct napi_struct *napi, int budget)
277 struct efx_channel *channel =
278 container_of(napi, struct efx_channel, napi_str);
279 struct efx_nic *efx = channel->efx;
282 netif_vdbg(efx, intr, efx->net_dev,
283 "channel %d NAPI poll executing on CPU %d\n",
284 channel->channel, raw_smp_processor_id());
286 spent = efx_process_channel(channel, budget);
288 if (spent < budget) {
289 if (channel->channel < efx->n_rx_channels &&
290 efx->irq_rx_adaptive &&
291 unlikely(++channel->irq_count == 1000)) {
292 if (unlikely(channel->irq_mod_score <
293 irq_adapt_low_thresh)) {
294 if (channel->irq_moderation > 1) {
295 channel->irq_moderation -= 1;
296 efx->type->push_irq_moderation(channel);
298 } else if (unlikely(channel->irq_mod_score >
299 irq_adapt_high_thresh)) {
300 if (channel->irq_moderation <
301 efx->irq_rx_moderation) {
302 channel->irq_moderation += 1;
303 efx->type->push_irq_moderation(channel);
306 channel->irq_count = 0;
307 channel->irq_mod_score = 0;
310 /* There is no race here; although napi_disable() will
311 * only wait for napi_complete(), this isn't a problem
312 * since efx_channel_processed() will have no effect if
313 * interrupts have already been disabled.
316 efx_channel_processed(channel);
322 /* Process the eventq of the specified channel immediately on this CPU
324 * Disable hardware generated interrupts, wait for any existing
325 * processing to finish, then directly poll (and ack ) the eventq.
326 * Finally reenable NAPI and interrupts.
328 * Since we are touching interrupts the caller should hold the suspend lock
330 void efx_process_channel_now(struct efx_channel *channel)
332 struct efx_nic *efx = channel->efx;
334 BUG_ON(channel->channel >= efx->n_channels);
335 BUG_ON(!channel->enabled);
337 /* Disable interrupts and wait for ISRs to complete */
338 efx_nic_disable_interrupts(efx);
339 if (efx->legacy_irq) {
340 synchronize_irq(efx->legacy_irq);
341 efx->legacy_irq_enabled = false;
344 synchronize_irq(channel->irq);
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel->napi_str);
349 /* Poll the channel */
350 efx_process_channel(channel, channel->eventq_mask + 1);
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel);
356 napi_enable(&channel->napi_str);
358 efx->legacy_irq_enabled = true;
359 efx_nic_enable_interrupts(efx);
362 /* Create event queue
363 * Event queue memory allocations are done only once. If the channel
364 * is reset, the memory buffer will be reused; this guards against
365 * errors during channel reset and also simplifies interrupt handling.
367 static int efx_probe_eventq(struct efx_channel *channel)
369 struct efx_nic *efx = channel->efx;
370 unsigned long entries;
372 netif_dbg(channel->efx, probe, channel->efx->net_dev,
373 "chan %d create event queue\n", channel->channel);
375 /* Build an event queue with room for one event per tx and rx buffer,
376 * plus some extra for link state events and MCDI completions. */
377 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
378 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
379 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
381 return efx_nic_probe_eventq(channel);
384 /* Prepare channel's event queue */
385 static void efx_init_eventq(struct efx_channel *channel)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d init event queue\n", channel->channel);
390 channel->eventq_read_ptr = 0;
392 efx_nic_init_eventq(channel);
395 static void efx_fini_eventq(struct efx_channel *channel)
397 netif_dbg(channel->efx, drv, channel->efx->net_dev,
398 "chan %d fini event queue\n", channel->channel);
400 efx_nic_fini_eventq(channel);
403 static void efx_remove_eventq(struct efx_channel *channel)
405 netif_dbg(channel->efx, drv, channel->efx->net_dev,
406 "chan %d remove event queue\n", channel->channel);
408 efx_nic_remove_eventq(channel);
411 /**************************************************************************
415 *************************************************************************/
417 /* Allocate and initialise a channel structure, optionally copying
418 * parameters (but not resources) from an old channel structure. */
419 static struct efx_channel *
420 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
422 struct efx_channel *channel;
423 struct efx_rx_queue *rx_queue;
424 struct efx_tx_queue *tx_queue;
428 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
432 *channel = *old_channel;
434 channel->napi_dev = NULL;
435 memset(&channel->eventq, 0, sizeof(channel->eventq));
437 rx_queue = &channel->rx_queue;
438 rx_queue->buffer = NULL;
439 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
441 for (j = 0; j < EFX_TXQ_TYPES; j++) {
442 tx_queue = &channel->tx_queue[j];
443 if (tx_queue->channel)
444 tx_queue->channel = channel;
445 tx_queue->buffer = NULL;
446 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
449 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
454 channel->channel = i;
456 for (j = 0; j < EFX_TXQ_TYPES; j++) {
457 tx_queue = &channel->tx_queue[j];
459 tx_queue->queue = i * EFX_TXQ_TYPES + j;
460 tx_queue->channel = channel;
464 spin_lock_init(&channel->tx_stop_lock);
465 atomic_set(&channel->tx_stop_count, 1);
467 rx_queue = &channel->rx_queue;
469 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
470 (unsigned long)rx_queue);
475 static int efx_probe_channel(struct efx_channel *channel)
477 struct efx_tx_queue *tx_queue;
478 struct efx_rx_queue *rx_queue;
481 netif_dbg(channel->efx, probe, channel->efx->net_dev,
482 "creating channel %d\n", channel->channel);
484 rc = efx_probe_eventq(channel);
488 efx_for_each_channel_tx_queue(tx_queue, channel) {
489 rc = efx_probe_tx_queue(tx_queue);
494 efx_for_each_channel_rx_queue(rx_queue, channel) {
495 rc = efx_probe_rx_queue(rx_queue);
500 channel->n_rx_frm_trunc = 0;
505 efx_for_each_channel_rx_queue(rx_queue, channel)
506 efx_remove_rx_queue(rx_queue);
508 efx_for_each_channel_tx_queue(tx_queue, channel)
509 efx_remove_tx_queue(tx_queue);
515 static void efx_set_channel_names(struct efx_nic *efx)
517 struct efx_channel *channel;
518 const char *type = "";
521 efx_for_each_channel(channel, efx) {
522 number = channel->channel;
523 if (efx->n_channels > efx->n_rx_channels) {
524 if (channel->channel < efx->n_rx_channels) {
528 number -= efx->n_rx_channels;
531 snprintf(efx->channel_name[channel->channel],
532 sizeof(efx->channel_name[0]),
533 "%s%s-%d", efx->name, type, number);
537 static int efx_probe_channels(struct efx_nic *efx)
539 struct efx_channel *channel;
542 /* Restart special buffer allocation */
543 efx->next_buffer_table = 0;
545 efx_for_each_channel(channel, efx) {
546 rc = efx_probe_channel(channel);
548 netif_err(efx, probe, efx->net_dev,
549 "failed to create channel %d\n",
554 efx_set_channel_names(efx);
559 efx_remove_channels(efx);
563 /* Channels are shutdown and reinitialised whilst the NIC is running
564 * to propagate configuration changes (mtu, checksum offload), or
565 * to clear hardware error conditions
567 static void efx_init_channels(struct efx_nic *efx)
569 struct efx_tx_queue *tx_queue;
570 struct efx_rx_queue *rx_queue;
571 struct efx_channel *channel;
573 /* Calculate the rx buffer allocation parameters required to
574 * support the current MTU, including padding for header
575 * alignment and overruns.
577 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
578 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
579 efx->type->rx_buffer_hash_size +
580 efx->type->rx_buffer_padding);
581 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
582 sizeof(struct efx_rx_page_state));
584 /* Initialise the channels */
585 efx_for_each_channel(channel, efx) {
586 netif_dbg(channel->efx, drv, channel->efx->net_dev,
587 "init chan %d\n", channel->channel);
589 efx_init_eventq(channel);
591 efx_for_each_channel_tx_queue(tx_queue, channel)
592 efx_init_tx_queue(tx_queue);
594 /* The rx buffer allocation strategy is MTU dependent */
595 efx_rx_strategy(channel);
597 efx_for_each_channel_rx_queue(rx_queue, channel)
598 efx_init_rx_queue(rx_queue);
600 WARN_ON(channel->rx_pkt != NULL);
601 efx_rx_strategy(channel);
605 /* This enables event queue processing and packet transmission.
607 * Note that this function is not allowed to fail, since that would
608 * introduce too much complexity into the suspend/resume path.
610 static void efx_start_channel(struct efx_channel *channel)
612 struct efx_rx_queue *rx_queue;
614 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
615 "starting chan %d\n", channel->channel);
617 /* The interrupt handler for this channel may set work_pending
618 * as soon as we enable it. Make sure it's cleared before
619 * then. Similarly, make sure it sees the enabled flag set. */
620 channel->work_pending = false;
621 channel->enabled = true;
624 /* Fill the queues before enabling NAPI */
625 efx_for_each_channel_rx_queue(rx_queue, channel)
626 efx_fast_push_rx_descriptors(rx_queue);
628 napi_enable(&channel->napi_str);
631 /* This disables event queue processing and packet transmission.
632 * This function does not guarantee that all queue processing
633 * (e.g. RX refill) is complete.
635 static void efx_stop_channel(struct efx_channel *channel)
637 if (!channel->enabled)
640 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
641 "stop chan %d\n", channel->channel);
643 channel->enabled = false;
644 napi_disable(&channel->napi_str);
647 static void efx_fini_channels(struct efx_nic *efx)
649 struct efx_channel *channel;
650 struct efx_tx_queue *tx_queue;
651 struct efx_rx_queue *rx_queue;
654 EFX_ASSERT_RESET_SERIALISED(efx);
655 BUG_ON(efx->port_enabled);
657 rc = efx_nic_flush_queues(efx);
658 if (rc && EFX_WORKAROUND_7803(efx)) {
659 /* Schedule a reset to recover from the flush failure. The
660 * descriptor caches reference memory we're about to free,
661 * but falcon_reconfigure_mac_wrapper() won't reconnect
662 * the MACs because of the pending reset. */
663 netif_err(efx, drv, efx->net_dev,
664 "Resetting to recover from flush failure\n");
665 efx_schedule_reset(efx, RESET_TYPE_ALL);
667 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
669 netif_dbg(efx, drv, efx->net_dev,
670 "successfully flushed all queues\n");
673 efx_for_each_channel(channel, efx) {
674 netif_dbg(channel->efx, drv, channel->efx->net_dev,
675 "shut down chan %d\n", channel->channel);
677 efx_for_each_channel_rx_queue(rx_queue, channel)
678 efx_fini_rx_queue(rx_queue);
679 efx_for_each_channel_tx_queue(tx_queue, channel)
680 efx_fini_tx_queue(tx_queue);
681 efx_fini_eventq(channel);
685 static void efx_remove_channel(struct efx_channel *channel)
687 struct efx_tx_queue *tx_queue;
688 struct efx_rx_queue *rx_queue;
690 netif_dbg(channel->efx, drv, channel->efx->net_dev,
691 "destroy chan %d\n", channel->channel);
693 efx_for_each_channel_rx_queue(rx_queue, channel)
694 efx_remove_rx_queue(rx_queue);
695 efx_for_each_channel_tx_queue(tx_queue, channel)
696 efx_remove_tx_queue(tx_queue);
697 efx_remove_eventq(channel);
700 static void efx_remove_channels(struct efx_nic *efx)
702 struct efx_channel *channel;
704 efx_for_each_channel(channel, efx)
705 efx_remove_channel(channel);
709 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
711 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
712 u32 old_rxq_entries, old_txq_entries;
717 efx_fini_channels(efx);
720 memset(other_channel, 0, sizeof(other_channel));
721 for (i = 0; i < efx->n_channels; i++) {
722 channel = efx_alloc_channel(efx, i, efx->channel[i]);
727 other_channel[i] = channel;
730 /* Swap entry counts and channel pointers */
731 old_rxq_entries = efx->rxq_entries;
732 old_txq_entries = efx->txq_entries;
733 efx->rxq_entries = rxq_entries;
734 efx->txq_entries = txq_entries;
735 for (i = 0; i < efx->n_channels; i++) {
736 channel = efx->channel[i];
737 efx->channel[i] = other_channel[i];
738 other_channel[i] = channel;
741 rc = efx_probe_channels(efx);
747 /* Destroy old channels */
748 for (i = 0; i < efx->n_channels; i++) {
749 efx_fini_napi_channel(other_channel[i]);
750 efx_remove_channel(other_channel[i]);
753 /* Free unused channel structures */
754 for (i = 0; i < efx->n_channels; i++)
755 kfree(other_channel[i]);
757 efx_init_channels(efx);
763 efx->rxq_entries = old_rxq_entries;
764 efx->txq_entries = old_txq_entries;
765 for (i = 0; i < efx->n_channels; i++) {
766 channel = efx->channel[i];
767 efx->channel[i] = other_channel[i];
768 other_channel[i] = channel;
773 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
775 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
778 /**************************************************************************
782 **************************************************************************/
784 /* This ensures that the kernel is kept informed (via
785 * netif_carrier_on/off) of the link status, and also maintains the
786 * link status's stop on the port's TX queue.
788 void efx_link_status_changed(struct efx_nic *efx)
790 struct efx_link_state *link_state = &efx->link_state;
792 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
793 * that no events are triggered between unregister_netdev() and the
794 * driver unloading. A more general condition is that NETDEV_CHANGE
795 * can only be generated between NETDEV_UP and NETDEV_DOWN */
796 if (!netif_running(efx->net_dev))
799 if (efx->port_inhibited) {
800 netif_carrier_off(efx->net_dev);
804 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
805 efx->n_link_state_changes++;
808 netif_carrier_on(efx->net_dev);
810 netif_carrier_off(efx->net_dev);
813 /* Status message for kernel log */
814 if (link_state->up) {
815 netif_info(efx, link, efx->net_dev,
816 "link up at %uMbps %s-duplex (MTU %d)%s\n",
817 link_state->speed, link_state->fd ? "full" : "half",
819 (efx->promiscuous ? " [PROMISC]" : ""));
821 netif_info(efx, link, efx->net_dev, "link down\n");
826 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
828 efx->link_advertising = advertising;
830 if (advertising & ADVERTISED_Pause)
831 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
833 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
834 if (advertising & ADVERTISED_Asym_Pause)
835 efx->wanted_fc ^= EFX_FC_TX;
839 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
841 efx->wanted_fc = wanted_fc;
842 if (efx->link_advertising) {
843 if (wanted_fc & EFX_FC_RX)
844 efx->link_advertising |= (ADVERTISED_Pause |
845 ADVERTISED_Asym_Pause);
847 efx->link_advertising &= ~(ADVERTISED_Pause |
848 ADVERTISED_Asym_Pause);
849 if (wanted_fc & EFX_FC_TX)
850 efx->link_advertising ^= ADVERTISED_Asym_Pause;
854 static void efx_fini_port(struct efx_nic *efx);
856 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
857 * the MAC appropriately. All other PHY configuration changes are pushed
858 * through phy_op->set_settings(), and pushed asynchronously to the MAC
859 * through efx_monitor().
861 * Callers must hold the mac_lock
863 int __efx_reconfigure_port(struct efx_nic *efx)
865 enum efx_phy_mode phy_mode;
868 WARN_ON(!mutex_is_locked(&efx->mac_lock));
870 /* Serialise the promiscuous flag with efx_set_multicast_list. */
871 if (efx_dev_registered(efx)) {
872 netif_addr_lock_bh(efx->net_dev);
873 netif_addr_unlock_bh(efx->net_dev);
876 /* Disable PHY transmit in mac level loopbacks */
877 phy_mode = efx->phy_mode;
878 if (LOOPBACK_INTERNAL(efx))
879 efx->phy_mode |= PHY_MODE_TX_DISABLED;
881 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
883 rc = efx->type->reconfigure_port(efx);
886 efx->phy_mode = phy_mode;
891 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
893 int efx_reconfigure_port(struct efx_nic *efx)
897 EFX_ASSERT_RESET_SERIALISED(efx);
899 mutex_lock(&efx->mac_lock);
900 rc = __efx_reconfigure_port(efx);
901 mutex_unlock(&efx->mac_lock);
906 /* Asynchronous work item for changing MAC promiscuity and multicast
907 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
909 static void efx_mac_work(struct work_struct *data)
911 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
913 mutex_lock(&efx->mac_lock);
914 if (efx->port_enabled) {
915 efx->type->push_multicast_hash(efx);
916 efx->mac_op->reconfigure(efx);
918 mutex_unlock(&efx->mac_lock);
921 static int efx_probe_port(struct efx_nic *efx)
923 unsigned char *perm_addr;
926 netif_dbg(efx, probe, efx->net_dev, "create port\n");
929 efx->phy_mode = PHY_MODE_SPECIAL;
931 /* Connect up MAC/PHY operations table */
932 rc = efx->type->probe_port(efx);
936 /* Sanity check MAC address */
937 perm_addr = efx->net_dev->perm_addr;
938 if (is_valid_ether_addr(perm_addr)) {
939 memcpy(efx->net_dev->dev_addr, perm_addr, ETH_ALEN);
941 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
943 if (!allow_bad_hwaddr) {
947 random_ether_addr(efx->net_dev->dev_addr);
948 netif_info(efx, probe, efx->net_dev,
949 "using locally-generated MAC %pM\n",
950 efx->net_dev->dev_addr);
956 efx->type->remove_port(efx);
960 static int efx_init_port(struct efx_nic *efx)
964 netif_dbg(efx, drv, efx->net_dev, "init port\n");
966 mutex_lock(&efx->mac_lock);
968 rc = efx->phy_op->init(efx);
972 efx->port_initialized = true;
974 /* Reconfigure the MAC before creating dma queues (required for
975 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
976 efx->mac_op->reconfigure(efx);
978 /* Ensure the PHY advertises the correct flow control settings */
979 rc = efx->phy_op->reconfigure(efx);
983 mutex_unlock(&efx->mac_lock);
987 efx->phy_op->fini(efx);
989 mutex_unlock(&efx->mac_lock);
993 static void efx_start_port(struct efx_nic *efx)
995 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
996 BUG_ON(efx->port_enabled);
998 mutex_lock(&efx->mac_lock);
999 efx->port_enabled = true;
1001 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1002 * and then cancelled by efx_flush_all() */
1003 efx->type->push_multicast_hash(efx);
1004 efx->mac_op->reconfigure(efx);
1006 mutex_unlock(&efx->mac_lock);
1009 /* Prevent efx_mac_work() and efx_monitor() from working */
1010 static void efx_stop_port(struct efx_nic *efx)
1012 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1014 mutex_lock(&efx->mac_lock);
1015 efx->port_enabled = false;
1016 mutex_unlock(&efx->mac_lock);
1018 /* Serialise against efx_set_multicast_list() */
1019 if (efx_dev_registered(efx)) {
1020 netif_addr_lock_bh(efx->net_dev);
1021 netif_addr_unlock_bh(efx->net_dev);
1025 static void efx_fini_port(struct efx_nic *efx)
1027 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1029 if (!efx->port_initialized)
1032 efx->phy_op->fini(efx);
1033 efx->port_initialized = false;
1035 efx->link_state.up = false;
1036 efx_link_status_changed(efx);
1039 static void efx_remove_port(struct efx_nic *efx)
1041 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1043 efx->type->remove_port(efx);
1046 /**************************************************************************
1050 **************************************************************************/
1052 /* This configures the PCI device to enable I/O and DMA. */
1053 static int efx_init_io(struct efx_nic *efx)
1055 struct pci_dev *pci_dev = efx->pci_dev;
1056 dma_addr_t dma_mask = efx->type->max_dma_mask;
1059 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1061 rc = pci_enable_device(pci_dev);
1063 netif_err(efx, probe, efx->net_dev,
1064 "failed to enable PCI device\n");
1068 pci_set_master(pci_dev);
1070 /* Set the PCI DMA mask. Try all possibilities from our
1071 * genuine mask down to 32 bits, because some architectures
1072 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1073 * masks event though they reject 46 bit masks.
1075 while (dma_mask > 0x7fffffffUL) {
1076 if (pci_dma_supported(pci_dev, dma_mask) &&
1077 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1082 netif_err(efx, probe, efx->net_dev,
1083 "could not find a suitable DMA mask\n");
1086 netif_dbg(efx, probe, efx->net_dev,
1087 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1088 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1090 /* pci_set_consistent_dma_mask() is not *allowed* to
1091 * fail with a mask that pci_set_dma_mask() accepted,
1092 * but just in case...
1094 netif_err(efx, probe, efx->net_dev,
1095 "failed to set consistent DMA mask\n");
1099 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1100 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1102 netif_err(efx, probe, efx->net_dev,
1103 "request for memory BAR failed\n");
1107 efx->membase = ioremap_nocache(efx->membase_phys,
1108 efx->type->mem_map_size);
1109 if (!efx->membase) {
1110 netif_err(efx, probe, efx->net_dev,
1111 "could not map memory BAR at %llx+%x\n",
1112 (unsigned long long)efx->membase_phys,
1113 efx->type->mem_map_size);
1117 netif_dbg(efx, probe, efx->net_dev,
1118 "memory BAR at %llx+%x (virtual %p)\n",
1119 (unsigned long long)efx->membase_phys,
1120 efx->type->mem_map_size, efx->membase);
1125 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1127 efx->membase_phys = 0;
1129 pci_disable_device(efx->pci_dev);
1134 static void efx_fini_io(struct efx_nic *efx)
1136 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1139 iounmap(efx->membase);
1140 efx->membase = NULL;
1143 if (efx->membase_phys) {
1144 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1145 efx->membase_phys = 0;
1148 pci_disable_device(efx->pci_dev);
1151 /* Get number of channels wanted. Each channel will have its own IRQ,
1152 * 1 RX queue and/or 2 TX queues. */
1153 static int efx_wanted_channels(void)
1155 cpumask_var_t core_mask;
1159 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1161 "sfc: RSS disabled due to allocation failure\n");
1166 for_each_online_cpu(cpu) {
1167 if (!cpumask_test_cpu(cpu, core_mask)) {
1169 cpumask_or(core_mask, core_mask,
1170 topology_core_cpumask(cpu));
1174 free_cpumask_var(core_mask);
1178 /* Probe the number and type of interrupts we are able to obtain, and
1179 * the resulting numbers of channels and RX queues.
1181 static void efx_probe_interrupts(struct efx_nic *efx)
1184 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1187 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1188 struct msix_entry xentries[EFX_MAX_CHANNELS];
1191 n_channels = efx_wanted_channels();
1192 if (separate_tx_channels)
1194 n_channels = min(n_channels, max_channels);
1196 for (i = 0; i < n_channels; i++)
1197 xentries[i].entry = i;
1198 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1200 netif_err(efx, drv, efx->net_dev,
1201 "WARNING: Insufficient MSI-X vectors"
1202 " available (%d < %d).\n", rc, n_channels);
1203 netif_err(efx, drv, efx->net_dev,
1204 "WARNING: Performance may be reduced.\n");
1205 EFX_BUG_ON_PARANOID(rc >= n_channels);
1207 rc = pci_enable_msix(efx->pci_dev, xentries,
1212 efx->n_channels = n_channels;
1213 if (separate_tx_channels) {
1214 efx->n_tx_channels =
1215 max(efx->n_channels / 2, 1U);
1216 efx->n_rx_channels =
1217 max(efx->n_channels -
1218 efx->n_tx_channels, 1U);
1220 efx->n_tx_channels = efx->n_channels;
1221 efx->n_rx_channels = efx->n_channels;
1223 for (i = 0; i < n_channels; i++)
1224 efx_get_channel(efx, i)->irq =
1227 /* Fall back to single channel MSI */
1228 efx->interrupt_mode = EFX_INT_MODE_MSI;
1229 netif_err(efx, drv, efx->net_dev,
1230 "could not enable MSI-X\n");
1234 /* Try single interrupt MSI */
1235 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1236 efx->n_channels = 1;
1237 efx->n_rx_channels = 1;
1238 efx->n_tx_channels = 1;
1239 rc = pci_enable_msi(efx->pci_dev);
1241 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1243 netif_err(efx, drv, efx->net_dev,
1244 "could not enable MSI\n");
1245 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1249 /* Assume legacy interrupts */
1250 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1251 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1252 efx->n_rx_channels = 1;
1253 efx->n_tx_channels = 1;
1254 efx->legacy_irq = efx->pci_dev->irq;
1258 static void efx_remove_interrupts(struct efx_nic *efx)
1260 struct efx_channel *channel;
1262 /* Remove MSI/MSI-X interrupts */
1263 efx_for_each_channel(channel, efx)
1265 pci_disable_msi(efx->pci_dev);
1266 pci_disable_msix(efx->pci_dev);
1268 /* Remove legacy interrupt */
1269 efx->legacy_irq = 0;
1272 struct efx_tx_queue *
1273 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1275 unsigned tx_channel_offset =
1276 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1277 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1278 type >= EFX_TXQ_TYPES);
1279 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1282 static void efx_set_channels(struct efx_nic *efx)
1284 struct efx_channel *channel;
1285 struct efx_tx_queue *tx_queue;
1286 unsigned tx_channel_offset =
1287 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1289 /* Channel pointers were set in efx_init_struct() but we now
1290 * need to clear them for TX queues in any RX-only channels. */
1291 efx_for_each_channel(channel, efx) {
1292 if (channel->channel - tx_channel_offset >=
1293 efx->n_tx_channels) {
1294 efx_for_each_channel_tx_queue(tx_queue, channel)
1295 tx_queue->channel = NULL;
1300 static int efx_probe_nic(struct efx_nic *efx)
1305 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1307 /* Carry out hardware-type specific initialisation */
1308 rc = efx->type->probe(efx);
1312 /* Determine the number of channels and queues by trying to hook
1313 * in MSI-X interrupts. */
1314 efx_probe_interrupts(efx);
1316 if (efx->n_channels > 1)
1317 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1318 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1319 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1321 efx_set_channels(efx);
1322 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1323 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1325 /* Initialise the interrupt moderation settings */
1326 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1331 static void efx_remove_nic(struct efx_nic *efx)
1333 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1335 efx_remove_interrupts(efx);
1336 efx->type->remove(efx);
1339 /**************************************************************************
1341 * NIC startup/shutdown
1343 *************************************************************************/
1345 static int efx_probe_all(struct efx_nic *efx)
1349 rc = efx_probe_nic(efx);
1351 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1355 rc = efx_probe_port(efx);
1357 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1361 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1362 rc = efx_probe_channels(efx);
1366 rc = efx_probe_filters(efx);
1368 netif_err(efx, probe, efx->net_dev,
1369 "failed to create filter tables\n");
1376 efx_remove_channels(efx);
1378 efx_remove_port(efx);
1380 efx_remove_nic(efx);
1385 /* Called after previous invocation(s) of efx_stop_all, restarts the
1386 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1387 * and ensures that the port is scheduled to be reconfigured.
1388 * This function is safe to call multiple times when the NIC is in any
1390 static void efx_start_all(struct efx_nic *efx)
1392 struct efx_channel *channel;
1394 EFX_ASSERT_RESET_SERIALISED(efx);
1396 /* Check that it is appropriate to restart the interface. All
1397 * of these flags are safe to read under just the rtnl lock */
1398 if (efx->port_enabled)
1400 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1402 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1405 /* Mark the port as enabled so port reconfigurations can start, then
1406 * restart the transmit interface early so the watchdog timer stops */
1407 efx_start_port(efx);
1409 efx_for_each_channel(channel, efx) {
1410 if (efx_dev_registered(efx))
1411 efx_wake_queue(channel);
1412 efx_start_channel(channel);
1415 if (efx->legacy_irq)
1416 efx->legacy_irq_enabled = true;
1417 efx_nic_enable_interrupts(efx);
1419 /* Switch to event based MCDI completions after enabling interrupts.
1420 * If a reset has been scheduled, then we need to stay in polled mode.
1421 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1422 * reset_pending [modified from an atomic context], we instead guarantee
1423 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1424 efx_mcdi_mode_event(efx);
1425 if (efx->reset_pending != RESET_TYPE_NONE)
1426 efx_mcdi_mode_poll(efx);
1428 /* Start the hardware monitor if there is one. Otherwise (we're link
1429 * event driven), we have to poll the PHY because after an event queue
1430 * flush, we could have a missed a link state change */
1431 if (efx->type->monitor != NULL) {
1432 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1433 efx_monitor_interval);
1435 mutex_lock(&efx->mac_lock);
1436 if (efx->phy_op->poll(efx))
1437 efx_link_status_changed(efx);
1438 mutex_unlock(&efx->mac_lock);
1441 efx->type->start_stats(efx);
1444 /* Flush all delayed work. Should only be called when no more delayed work
1445 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1446 * since we're holding the rtnl_lock at this point. */
1447 static void efx_flush_all(struct efx_nic *efx)
1449 /* Make sure the hardware monitor is stopped */
1450 cancel_delayed_work_sync(&efx->monitor_work);
1451 /* Stop scheduled port reconfigurations */
1452 cancel_work_sync(&efx->mac_work);
1455 /* Quiesce hardware and software without bringing the link down.
1456 * Safe to call multiple times, when the nic and interface is in any
1457 * state. The caller is guaranteed to subsequently be in a position
1458 * to modify any hardware and software state they see fit without
1460 static void efx_stop_all(struct efx_nic *efx)
1462 struct efx_channel *channel;
1464 EFX_ASSERT_RESET_SERIALISED(efx);
1466 /* port_enabled can be read safely under the rtnl lock */
1467 if (!efx->port_enabled)
1470 efx->type->stop_stats(efx);
1472 /* Switch to MCDI polling on Siena before disabling interrupts */
1473 efx_mcdi_mode_poll(efx);
1475 /* Disable interrupts and wait for ISR to complete */
1476 efx_nic_disable_interrupts(efx);
1477 if (efx->legacy_irq) {
1478 synchronize_irq(efx->legacy_irq);
1479 efx->legacy_irq_enabled = false;
1481 efx_for_each_channel(channel, efx) {
1483 synchronize_irq(channel->irq);
1486 /* Stop all NAPI processing and synchronous rx refills */
1487 efx_for_each_channel(channel, efx)
1488 efx_stop_channel(channel);
1490 /* Stop all asynchronous port reconfigurations. Since all
1491 * event processing has already been stopped, there is no
1492 * window to loose phy events */
1495 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1498 /* Stop the kernel transmit interface late, so the watchdog
1499 * timer isn't ticking over the flush */
1500 if (efx_dev_registered(efx)) {
1501 struct efx_channel *channel;
1502 efx_for_each_channel(channel, efx)
1503 efx_stop_queue(channel);
1504 netif_tx_lock_bh(efx->net_dev);
1505 netif_tx_unlock_bh(efx->net_dev);
1509 static void efx_remove_all(struct efx_nic *efx)
1511 efx_remove_filters(efx);
1512 efx_remove_channels(efx);
1513 efx_remove_port(efx);
1514 efx_remove_nic(efx);
1517 /**************************************************************************
1519 * Interrupt moderation
1521 **************************************************************************/
1523 static unsigned irq_mod_ticks(int usecs, int resolution)
1526 return 0; /* cannot receive interrupts ahead of time :-) */
1527 if (usecs < resolution)
1528 return 1; /* never round down to 0 */
1529 return usecs / resolution;
1532 /* Set interrupt moderation parameters */
1533 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1536 struct efx_channel *channel;
1537 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1538 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1540 EFX_ASSERT_RESET_SERIALISED(efx);
1542 efx->irq_rx_adaptive = rx_adaptive;
1543 efx->irq_rx_moderation = rx_ticks;
1544 efx_for_each_channel(channel, efx) {
1545 if (efx_channel_get_rx_queue(channel))
1546 channel->irq_moderation = rx_ticks;
1547 else if (efx_channel_get_tx_queue(channel, 0))
1548 channel->irq_moderation = tx_ticks;
1552 /**************************************************************************
1556 **************************************************************************/
1558 /* Run periodically off the general workqueue */
1559 static void efx_monitor(struct work_struct *data)
1561 struct efx_nic *efx = container_of(data, struct efx_nic,
1564 netif_vdbg(efx, timer, efx->net_dev,
1565 "hardware monitor executing on CPU %d\n",
1566 raw_smp_processor_id());
1567 BUG_ON(efx->type->monitor == NULL);
1569 /* If the mac_lock is already held then it is likely a port
1570 * reconfiguration is already in place, which will likely do
1571 * most of the work of monitor() anyway. */
1572 if (mutex_trylock(&efx->mac_lock)) {
1573 if (efx->port_enabled)
1574 efx->type->monitor(efx);
1575 mutex_unlock(&efx->mac_lock);
1578 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1579 efx_monitor_interval);
1582 /**************************************************************************
1586 *************************************************************************/
1589 * Context: process, rtnl_lock() held.
1591 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1593 struct efx_nic *efx = netdev_priv(net_dev);
1594 struct mii_ioctl_data *data = if_mii(ifr);
1596 EFX_ASSERT_RESET_SERIALISED(efx);
1598 /* Convert phy_id from older PRTAD/DEVAD format */
1599 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1600 (data->phy_id & 0xfc00) == 0x0400)
1601 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1603 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1606 /**************************************************************************
1610 **************************************************************************/
1612 static void efx_init_napi(struct efx_nic *efx)
1614 struct efx_channel *channel;
1616 efx_for_each_channel(channel, efx) {
1617 channel->napi_dev = efx->net_dev;
1618 netif_napi_add(channel->napi_dev, &channel->napi_str,
1619 efx_poll, napi_weight);
1623 static void efx_fini_napi_channel(struct efx_channel *channel)
1625 if (channel->napi_dev)
1626 netif_napi_del(&channel->napi_str);
1627 channel->napi_dev = NULL;
1630 static void efx_fini_napi(struct efx_nic *efx)
1632 struct efx_channel *channel;
1634 efx_for_each_channel(channel, efx)
1635 efx_fini_napi_channel(channel);
1638 /**************************************************************************
1640 * Kernel netpoll interface
1642 *************************************************************************/
1644 #ifdef CONFIG_NET_POLL_CONTROLLER
1646 /* Although in the common case interrupts will be disabled, this is not
1647 * guaranteed. However, all our work happens inside the NAPI callback,
1648 * so no locking is required.
1650 static void efx_netpoll(struct net_device *net_dev)
1652 struct efx_nic *efx = netdev_priv(net_dev);
1653 struct efx_channel *channel;
1655 efx_for_each_channel(channel, efx)
1656 efx_schedule_channel(channel);
1661 /**************************************************************************
1663 * Kernel net device interface
1665 *************************************************************************/
1667 /* Context: process, rtnl_lock() held. */
1668 static int efx_net_open(struct net_device *net_dev)
1670 struct efx_nic *efx = netdev_priv(net_dev);
1671 EFX_ASSERT_RESET_SERIALISED(efx);
1673 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1674 raw_smp_processor_id());
1676 if (efx->state == STATE_DISABLED)
1678 if (efx->phy_mode & PHY_MODE_SPECIAL)
1680 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1683 /* Notify the kernel of the link state polled during driver load,
1684 * before the monitor starts running */
1685 efx_link_status_changed(efx);
1691 /* Context: process, rtnl_lock() held.
1692 * Note that the kernel will ignore our return code; this method
1693 * should really be a void.
1695 static int efx_net_stop(struct net_device *net_dev)
1697 struct efx_nic *efx = netdev_priv(net_dev);
1699 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1700 raw_smp_processor_id());
1702 if (efx->state != STATE_DISABLED) {
1703 /* Stop the device and flush all the channels */
1705 efx_fini_channels(efx);
1706 efx_init_channels(efx);
1712 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1713 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1715 struct efx_nic *efx = netdev_priv(net_dev);
1716 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1718 spin_lock_bh(&efx->stats_lock);
1719 efx->type->update_stats(efx);
1720 spin_unlock_bh(&efx->stats_lock);
1722 stats->rx_packets = mac_stats->rx_packets;
1723 stats->tx_packets = mac_stats->tx_packets;
1724 stats->rx_bytes = mac_stats->rx_bytes;
1725 stats->tx_bytes = mac_stats->tx_bytes;
1726 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1727 stats->multicast = mac_stats->rx_multicast;
1728 stats->collisions = mac_stats->tx_collision;
1729 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1730 mac_stats->rx_length_error);
1731 stats->rx_crc_errors = mac_stats->rx_bad;
1732 stats->rx_frame_errors = mac_stats->rx_align_error;
1733 stats->rx_fifo_errors = mac_stats->rx_overflow;
1734 stats->rx_missed_errors = mac_stats->rx_missed;
1735 stats->tx_window_errors = mac_stats->tx_late_collision;
1737 stats->rx_errors = (stats->rx_length_errors +
1738 stats->rx_crc_errors +
1739 stats->rx_frame_errors +
1740 mac_stats->rx_symbol_error);
1741 stats->tx_errors = (stats->tx_window_errors +
1747 /* Context: netif_tx_lock held, BHs disabled. */
1748 static void efx_watchdog(struct net_device *net_dev)
1750 struct efx_nic *efx = netdev_priv(net_dev);
1752 netif_err(efx, tx_err, efx->net_dev,
1753 "TX stuck with port_enabled=%d: resetting channels\n",
1756 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1760 /* Context: process, rtnl_lock() held. */
1761 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1763 struct efx_nic *efx = netdev_priv(net_dev);
1766 EFX_ASSERT_RESET_SERIALISED(efx);
1768 if (new_mtu > EFX_MAX_MTU)
1773 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1775 efx_fini_channels(efx);
1777 mutex_lock(&efx->mac_lock);
1778 /* Reconfigure the MAC before enabling the dma queues so that
1779 * the RX buffers don't overflow */
1780 net_dev->mtu = new_mtu;
1781 efx->mac_op->reconfigure(efx);
1782 mutex_unlock(&efx->mac_lock);
1784 efx_init_channels(efx);
1790 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1792 struct efx_nic *efx = netdev_priv(net_dev);
1793 struct sockaddr *addr = data;
1794 char *new_addr = addr->sa_data;
1796 EFX_ASSERT_RESET_SERIALISED(efx);
1798 if (!is_valid_ether_addr(new_addr)) {
1799 netif_err(efx, drv, efx->net_dev,
1800 "invalid ethernet MAC address requested: %pM\n",
1805 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1807 /* Reconfigure the MAC */
1808 mutex_lock(&efx->mac_lock);
1809 efx->mac_op->reconfigure(efx);
1810 mutex_unlock(&efx->mac_lock);
1815 /* Context: netif_addr_lock held, BHs disabled. */
1816 static void efx_set_multicast_list(struct net_device *net_dev)
1818 struct efx_nic *efx = netdev_priv(net_dev);
1819 struct netdev_hw_addr *ha;
1820 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1824 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1826 /* Build multicast hash table */
1827 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1828 memset(mc_hash, 0xff, sizeof(*mc_hash));
1830 memset(mc_hash, 0x00, sizeof(*mc_hash));
1831 netdev_for_each_mc_addr(ha, net_dev) {
1832 crc = ether_crc_le(ETH_ALEN, ha->addr);
1833 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1834 set_bit_le(bit, mc_hash->byte);
1837 /* Broadcast packets go through the multicast hash filter.
1838 * ether_crc_le() of the broadcast address is 0xbe2612ff
1839 * so we always add bit 0xff to the mask.
1841 set_bit_le(0xff, mc_hash->byte);
1844 if (efx->port_enabled)
1845 queue_work(efx->workqueue, &efx->mac_work);
1846 /* Otherwise efx_start_port() will do this */
1849 static const struct net_device_ops efx_netdev_ops = {
1850 .ndo_open = efx_net_open,
1851 .ndo_stop = efx_net_stop,
1852 .ndo_get_stats64 = efx_net_stats,
1853 .ndo_tx_timeout = efx_watchdog,
1854 .ndo_start_xmit = efx_hard_start_xmit,
1855 .ndo_validate_addr = eth_validate_addr,
1856 .ndo_do_ioctl = efx_ioctl,
1857 .ndo_change_mtu = efx_change_mtu,
1858 .ndo_set_mac_address = efx_set_mac_address,
1859 .ndo_set_multicast_list = efx_set_multicast_list,
1860 #ifdef CONFIG_NET_POLL_CONTROLLER
1861 .ndo_poll_controller = efx_netpoll,
1865 static void efx_update_name(struct efx_nic *efx)
1867 strcpy(efx->name, efx->net_dev->name);
1868 efx_mtd_rename(efx);
1869 efx_set_channel_names(efx);
1872 static int efx_netdev_event(struct notifier_block *this,
1873 unsigned long event, void *ptr)
1875 struct net_device *net_dev = ptr;
1877 if (net_dev->netdev_ops == &efx_netdev_ops &&
1878 event == NETDEV_CHANGENAME)
1879 efx_update_name(netdev_priv(net_dev));
1884 static struct notifier_block efx_netdev_notifier = {
1885 .notifier_call = efx_netdev_event,
1889 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1891 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1892 return sprintf(buf, "%d\n", efx->phy_type);
1894 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1896 static int efx_register_netdev(struct efx_nic *efx)
1898 struct net_device *net_dev = efx->net_dev;
1901 net_dev->watchdog_timeo = 5 * HZ;
1902 net_dev->irq = efx->pci_dev->irq;
1903 net_dev->netdev_ops = &efx_netdev_ops;
1904 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1906 /* Clear MAC statistics */
1907 efx->mac_op->update_stats(efx);
1908 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1912 rc = dev_alloc_name(net_dev, net_dev->name);
1915 efx_update_name(efx);
1917 rc = register_netdevice(net_dev);
1921 /* Always start with carrier off; PHY events will detect the link */
1922 netif_carrier_off(efx->net_dev);
1926 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1928 netif_err(efx, drv, efx->net_dev,
1929 "failed to init net dev attributes\n");
1930 goto fail_registered;
1937 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1941 unregister_netdev(net_dev);
1945 static void efx_unregister_netdev(struct efx_nic *efx)
1947 struct efx_channel *channel;
1948 struct efx_tx_queue *tx_queue;
1953 BUG_ON(netdev_priv(efx->net_dev) != efx);
1955 /* Free up any skbs still remaining. This has to happen before
1956 * we try to unregister the netdev as running their destructors
1957 * may be needed to get the device ref. count to 0. */
1958 efx_for_each_channel(channel, efx) {
1959 efx_for_each_channel_tx_queue(tx_queue, channel)
1960 efx_release_tx_buffers(tx_queue);
1963 if (efx_dev_registered(efx)) {
1964 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1965 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1966 unregister_netdev(efx->net_dev);
1970 /**************************************************************************
1972 * Device reset and suspend
1974 **************************************************************************/
1976 /* Tears down the entire software state and most of the hardware state
1978 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1980 EFX_ASSERT_RESET_SERIALISED(efx);
1983 mutex_lock(&efx->mac_lock);
1985 efx_fini_channels(efx);
1986 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1987 efx->phy_op->fini(efx);
1988 efx->type->fini(efx);
1991 /* This function will always ensure that the locks acquired in
1992 * efx_reset_down() are released. A failure return code indicates
1993 * that we were unable to reinitialise the hardware, and the
1994 * driver should be disabled. If ok is false, then the rx and tx
1995 * engines are not restarted, pending a RESET_DISABLE. */
1996 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2000 EFX_ASSERT_RESET_SERIALISED(efx);
2002 rc = efx->type->init(efx);
2004 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2011 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2012 rc = efx->phy_op->init(efx);
2015 if (efx->phy_op->reconfigure(efx))
2016 netif_err(efx, drv, efx->net_dev,
2017 "could not restore PHY settings\n");
2020 efx->mac_op->reconfigure(efx);
2022 efx_init_channels(efx);
2023 efx_restore_filters(efx);
2025 mutex_unlock(&efx->mac_lock);
2032 efx->port_initialized = false;
2034 mutex_unlock(&efx->mac_lock);
2039 /* Reset the NIC using the specified method. Note that the reset may
2040 * fail, in which case the card will be left in an unusable state.
2042 * Caller must hold the rtnl_lock.
2044 int efx_reset(struct efx_nic *efx, enum reset_type method)
2049 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2050 RESET_TYPE(method));
2052 efx_reset_down(efx, method);
2054 rc = efx->type->reset(efx, method);
2056 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2060 /* Allow resets to be rescheduled. */
2061 efx->reset_pending = RESET_TYPE_NONE;
2063 /* Reinitialise bus-mastering, which may have been turned off before
2064 * the reset was scheduled. This is still appropriate, even in the
2065 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2066 * can respond to requests. */
2067 pci_set_master(efx->pci_dev);
2070 /* Leave device stopped if necessary */
2071 disabled = rc || method == RESET_TYPE_DISABLE;
2072 rc2 = efx_reset_up(efx, method, !disabled);
2080 dev_close(efx->net_dev);
2081 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2082 efx->state = STATE_DISABLED;
2084 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2089 /* The worker thread exists so that code that cannot sleep can
2090 * schedule a reset for later.
2092 static void efx_reset_work(struct work_struct *data)
2094 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2096 if (efx->reset_pending == RESET_TYPE_NONE)
2099 /* If we're not RUNNING then don't reset. Leave the reset_pending
2100 * flag set so that efx_pci_probe_main will be retried */
2101 if (efx->state != STATE_RUNNING) {
2102 netif_info(efx, drv, efx->net_dev,
2103 "scheduled reset quenched. NIC not RUNNING\n");
2108 (void)efx_reset(efx, efx->reset_pending);
2112 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2114 enum reset_type method;
2116 if (efx->reset_pending != RESET_TYPE_NONE) {
2117 netif_info(efx, drv, efx->net_dev,
2118 "quenching already scheduled reset\n");
2123 case RESET_TYPE_INVISIBLE:
2124 case RESET_TYPE_ALL:
2125 case RESET_TYPE_WORLD:
2126 case RESET_TYPE_DISABLE:
2129 case RESET_TYPE_RX_RECOVERY:
2130 case RESET_TYPE_RX_DESC_FETCH:
2131 case RESET_TYPE_TX_DESC_FETCH:
2132 case RESET_TYPE_TX_SKIP:
2133 method = RESET_TYPE_INVISIBLE;
2135 case RESET_TYPE_MC_FAILURE:
2137 method = RESET_TYPE_ALL;
2142 netif_dbg(efx, drv, efx->net_dev,
2143 "scheduling %s reset for %s\n",
2144 RESET_TYPE(method), RESET_TYPE(type));
2146 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2147 RESET_TYPE(method));
2149 efx->reset_pending = method;
2151 /* efx_process_channel() will no longer read events once a
2152 * reset is scheduled. So switch back to poll'd MCDI completions. */
2153 efx_mcdi_mode_poll(efx);
2155 queue_work(reset_workqueue, &efx->reset_work);
2158 /**************************************************************************
2160 * List of NICs we support
2162 **************************************************************************/
2164 /* PCI device ID table */
2165 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2166 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2167 .driver_data = (unsigned long) &falcon_a1_nic_type},
2168 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2169 .driver_data = (unsigned long) &falcon_b0_nic_type},
2170 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2171 .driver_data = (unsigned long) &siena_a0_nic_type},
2172 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2173 .driver_data = (unsigned long) &siena_a0_nic_type},
2174 {0} /* end of list */
2177 /**************************************************************************
2179 * Dummy PHY/MAC operations
2181 * Can be used for some unimplemented operations
2182 * Needed so all function pointers are valid and do not have to be tested
2185 **************************************************************************/
2186 int efx_port_dummy_op_int(struct efx_nic *efx)
2190 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2192 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2197 static struct efx_phy_operations efx_dummy_phy_operations = {
2198 .init = efx_port_dummy_op_int,
2199 .reconfigure = efx_port_dummy_op_int,
2200 .poll = efx_port_dummy_op_poll,
2201 .fini = efx_port_dummy_op_void,
2204 /**************************************************************************
2208 **************************************************************************/
2210 /* This zeroes out and then fills in the invariants in a struct
2211 * efx_nic (including all sub-structures).
2213 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2214 struct pci_dev *pci_dev, struct net_device *net_dev)
2218 /* Initialise common structures */
2219 memset(efx, 0, sizeof(*efx));
2220 spin_lock_init(&efx->biu_lock);
2221 #ifdef CONFIG_SFC_MTD
2222 INIT_LIST_HEAD(&efx->mtd_list);
2224 INIT_WORK(&efx->reset_work, efx_reset_work);
2225 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2226 efx->pci_dev = pci_dev;
2227 efx->msg_enable = debug;
2228 efx->state = STATE_INIT;
2229 efx->reset_pending = RESET_TYPE_NONE;
2230 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2232 efx->net_dev = net_dev;
2233 efx->rx_checksum_enabled = true;
2234 spin_lock_init(&efx->stats_lock);
2235 mutex_init(&efx->mac_lock);
2236 efx->mac_op = type->default_mac_ops;
2237 efx->phy_op = &efx_dummy_phy_operations;
2238 efx->mdio.dev = net_dev;
2239 INIT_WORK(&efx->mac_work, efx_mac_work);
2241 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2242 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2243 if (!efx->channel[i])
2249 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2251 /* Higher numbered interrupt modes are less capable! */
2252 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2255 /* Would be good to use the net_dev name, but we're too early */
2256 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2258 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2259 if (!efx->workqueue)
2265 efx_fini_struct(efx);
2269 static void efx_fini_struct(struct efx_nic *efx)
2273 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2274 kfree(efx->channel[i]);
2276 if (efx->workqueue) {
2277 destroy_workqueue(efx->workqueue);
2278 efx->workqueue = NULL;
2282 /**************************************************************************
2286 **************************************************************************/
2288 /* Main body of final NIC shutdown code
2289 * This is called only at module unload (or hotplug removal).
2291 static void efx_pci_remove_main(struct efx_nic *efx)
2293 efx_nic_fini_interrupt(efx);
2294 efx_fini_channels(efx);
2296 efx->type->fini(efx);
2298 efx_remove_all(efx);
2301 /* Final NIC shutdown
2302 * This is called only at module unload (or hotplug removal).
2304 static void efx_pci_remove(struct pci_dev *pci_dev)
2306 struct efx_nic *efx;
2308 efx = pci_get_drvdata(pci_dev);
2312 /* Mark the NIC as fini, then stop the interface */
2314 efx->state = STATE_FINI;
2315 dev_close(efx->net_dev);
2317 /* Allow any queued efx_resets() to complete */
2320 efx_unregister_netdev(efx);
2322 efx_mtd_remove(efx);
2324 /* Wait for any scheduled resets to complete. No more will be
2325 * scheduled from this point because efx_stop_all() has been
2326 * called, we are no longer registered with driverlink, and
2327 * the net_device's have been removed. */
2328 cancel_work_sync(&efx->reset_work);
2330 efx_pci_remove_main(efx);
2333 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2335 pci_set_drvdata(pci_dev, NULL);
2336 efx_fini_struct(efx);
2337 free_netdev(efx->net_dev);
2340 /* Main body of NIC initialisation
2341 * This is called at module load (or hotplug insertion, theoretically).
2343 static int efx_pci_probe_main(struct efx_nic *efx)
2347 /* Do start-of-day initialisation */
2348 rc = efx_probe_all(efx);
2354 rc = efx->type->init(efx);
2356 netif_err(efx, probe, efx->net_dev,
2357 "failed to initialise NIC\n");
2361 rc = efx_init_port(efx);
2363 netif_err(efx, probe, efx->net_dev,
2364 "failed to initialise port\n");
2368 efx_init_channels(efx);
2370 rc = efx_nic_init_interrupt(efx);
2377 efx_fini_channels(efx);
2380 efx->type->fini(efx);
2383 efx_remove_all(efx);
2388 /* NIC initialisation
2390 * This is called at module load (or hotplug insertion,
2391 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2392 * sets up and registers the network devices with the kernel and hooks
2393 * the interrupt service routine. It does not prepare the device for
2394 * transmission; this is left to the first time one of the network
2395 * interfaces is brought up (i.e. efx_net_open).
2397 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2398 const struct pci_device_id *entry)
2400 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2401 struct net_device *net_dev;
2402 struct efx_nic *efx;
2405 /* Allocate and initialise a struct net_device and struct efx_nic */
2406 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2409 net_dev->features |= (type->offload_features | NETIF_F_SG |
2410 NETIF_F_HIGHDMA | NETIF_F_TSO |
2412 if (type->offload_features & NETIF_F_V6_CSUM)
2413 net_dev->features |= NETIF_F_TSO6;
2414 /* Mask for features that also apply to VLAN devices */
2415 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2416 NETIF_F_HIGHDMA | NETIF_F_TSO);
2417 efx = netdev_priv(net_dev);
2418 pci_set_drvdata(pci_dev, efx);
2419 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2420 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2424 netif_info(efx, probe, efx->net_dev,
2425 "Solarflare Communications NIC detected\n");
2427 /* Set up basic I/O (BAR mappings etc) */
2428 rc = efx_init_io(efx);
2432 /* No serialisation is required with the reset path because
2433 * we're in STATE_INIT. */
2434 for (i = 0; i < 5; i++) {
2435 rc = efx_pci_probe_main(efx);
2437 /* Serialise against efx_reset(). No more resets will be
2438 * scheduled since efx_stop_all() has been called, and we
2439 * have not and never have been registered with either
2440 * the rtnetlink or driverlink layers. */
2441 cancel_work_sync(&efx->reset_work);
2444 if (efx->reset_pending != RESET_TYPE_NONE) {
2445 /* If there was a scheduled reset during
2446 * probe, the NIC is probably hosed anyway */
2447 efx_pci_remove_main(efx);
2454 /* Retry if a recoverably reset event has been scheduled */
2455 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2456 (efx->reset_pending != RESET_TYPE_ALL))
2459 efx->reset_pending = RESET_TYPE_NONE;
2463 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2467 /* Switch to the running state before we expose the device to the OS,
2468 * so that dev_open()|efx_start_all() will actually start the device */
2469 efx->state = STATE_RUNNING;
2471 rc = efx_register_netdev(efx);
2475 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2478 efx_mtd_probe(efx); /* allowed to fail */
2483 efx_pci_remove_main(efx);
2488 efx_fini_struct(efx);
2491 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2492 free_netdev(net_dev);
2496 static int efx_pm_freeze(struct device *dev)
2498 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2500 efx->state = STATE_FINI;
2502 netif_device_detach(efx->net_dev);
2505 efx_fini_channels(efx);
2510 static int efx_pm_thaw(struct device *dev)
2512 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2514 efx->state = STATE_INIT;
2516 efx_init_channels(efx);
2518 mutex_lock(&efx->mac_lock);
2519 efx->phy_op->reconfigure(efx);
2520 mutex_unlock(&efx->mac_lock);
2524 netif_device_attach(efx->net_dev);
2526 efx->state = STATE_RUNNING;
2528 efx->type->resume_wol(efx);
2530 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2531 queue_work(reset_workqueue, &efx->reset_work);
2536 static int efx_pm_poweroff(struct device *dev)
2538 struct pci_dev *pci_dev = to_pci_dev(dev);
2539 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2541 efx->type->fini(efx);
2543 efx->reset_pending = RESET_TYPE_NONE;
2545 pci_save_state(pci_dev);
2546 return pci_set_power_state(pci_dev, PCI_D3hot);
2549 /* Used for both resume and restore */
2550 static int efx_pm_resume(struct device *dev)
2552 struct pci_dev *pci_dev = to_pci_dev(dev);
2553 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2556 rc = pci_set_power_state(pci_dev, PCI_D0);
2559 pci_restore_state(pci_dev);
2560 rc = pci_enable_device(pci_dev);
2563 pci_set_master(efx->pci_dev);
2564 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2567 rc = efx->type->init(efx);
2574 static int efx_pm_suspend(struct device *dev)
2579 rc = efx_pm_poweroff(dev);
2585 static struct dev_pm_ops efx_pm_ops = {
2586 .suspend = efx_pm_suspend,
2587 .resume = efx_pm_resume,
2588 .freeze = efx_pm_freeze,
2589 .thaw = efx_pm_thaw,
2590 .poweroff = efx_pm_poweroff,
2591 .restore = efx_pm_resume,
2594 static struct pci_driver efx_pci_driver = {
2595 .name = KBUILD_MODNAME,
2596 .id_table = efx_pci_table,
2597 .probe = efx_pci_probe,
2598 .remove = efx_pci_remove,
2599 .driver.pm = &efx_pm_ops,
2602 /**************************************************************************
2604 * Kernel module interface
2606 *************************************************************************/
2608 module_param(interrupt_mode, uint, 0444);
2609 MODULE_PARM_DESC(interrupt_mode,
2610 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2612 static int __init efx_init_module(void)
2616 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2618 rc = register_netdevice_notifier(&efx_netdev_notifier);
2622 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2623 if (!reset_workqueue) {
2628 rc = pci_register_driver(&efx_pci_driver);
2635 destroy_workqueue(reset_workqueue);
2637 unregister_netdevice_notifier(&efx_netdev_notifier);
2642 static void __exit efx_exit_module(void)
2644 printk(KERN_INFO "Solarflare NET driver unloading\n");
2646 pci_unregister_driver(&efx_pci_driver);
2647 destroy_workqueue(reset_workqueue);
2648 unregister_netdevice_notifier(&efx_netdev_notifier);
2652 module_init(efx_init_module);
2653 module_exit(efx_exit_module);
2655 MODULE_AUTHOR("Solarflare Communications and "
2656 "Michael Brown <mbrown@fensystems.co.uk>");
2657 MODULE_DESCRIPTION("Solarflare Communications network driver");
2658 MODULE_LICENSE("GPL");
2659 MODULE_DEVICE_TABLE(pci, efx_pci_table);