drivers/net/phy/xilinx_gmii2rgmii.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Xilinx GMII2RGMII phy driver
   4  *
   5  * Copyright (C) 2018 Xilinx, Inc.
   6  */
   7
   8 #include <dm.h>
   9 #include <phy.h>
  10 #include <config.h>
  11 #include <common.h>
  12
  13 DECLARE_GLOBAL_DATA_PTR;
  14
  15 #define ZYNQ_GMII2RGMII_REG             0x10
  16 #define ZYNQ_GMII2RGMII_SPEED_MASK      (BMCR_SPEED1000 | BMCR_SPEED100)
  17
  18 static int xilinxgmiitorgmii_config(struct phy_device *phydev)
  19 {
  20         struct phy_device *ext_phydev = phydev->priv;
  21
  22         debug("%s\n", __func__);
  23         if (ext_phydev->drv->config)
  24                 ext_phydev->drv->config(ext_phydev);
  25
  26         return 0;
  27 }
  28
  29 static int xilinxgmiitorgmii_extread(struct phy_device *phydev, int addr,
  30                                      int devaddr, int regnum)
  31 {
  32         struct phy_device *ext_phydev = phydev->priv;
  33
  34         debug("%s\n", __func__);
  35         if (ext_phydev->drv->readext)
  36                 ext_phydev->drv->readext(ext_phydev, addr, devaddr, regnum);
  37
  38         return 0;
  39 }
  40
  41 static int xilinxgmiitorgmii_extwrite(struct phy_device *phydev, int addr,
  42                                       int devaddr, int regnum, u16 val)
  43
  44 {
  45         struct phy_device *ext_phydev = phydev->priv;
  46
  47         debug("%s\n", __func__);
  48         if (ext_phydev->drv->writeext)
  49                 ext_phydev->drv->writeext(ext_phydev, addr, devaddr, regnum,
  50                                           val);
  51
  52         return 0;
  53 }
  54
  55 static int xilinxgmiitorgmii_startup(struct phy_device *phydev)
  56 {
  57         u16 val = 0;
  58         struct phy_device *ext_phydev = phydev->priv;
  59
  60         debug("%s\n", __func__);
  61         ext_phydev->dev = phydev->dev;
  62         if (ext_phydev->drv->startup)
  63                 ext_phydev->drv->startup(ext_phydev);
  64
  65         val = phy_read(phydev, phydev->addr, ZYNQ_GMII2RGMII_REG);
  66         val &= ~ZYNQ_GMII2RGMII_SPEED_MASK;
  67
  68         if (ext_phydev->speed == SPEED_1000)
  69                 val |= BMCR_SPEED1000;
  70         else if (ext_phydev->speed == SPEED_100)
  71                 val |= BMCR_SPEED100;
  72
  73         phy_write(phydev, phydev->addr, ZYNQ_GMII2RGMII_REG, val |
  74                   BMCR_FULLDPLX);
  75
  76         phydev->duplex = ext_phydev->duplex;
  77         phydev->speed = ext_phydev->speed;
  78         phydev->link = ext_phydev->link;
  79
  80         return 0;
  81 }
  82
  83 static int xilinxgmiitorgmii_probe(struct phy_device *phydev)
  84 {
  85         int ofnode = phydev->addr;
  86         u32 phy_of_handle;
  87         int ext_phyaddr = -1;
  88         struct phy_device *ext_phydev;
  89
  90         debug("%s\n", __func__);
  91
  92         if (phydev->interface != PHY_INTERFACE_MODE_GMII) {
  93                 printf("Incorrect interface type\n");
  94                 return -EINVAL;
  95         }
  96
  97         /*
  98          * Read the phy address again as the one we read in ethernet driver
  99          * was overwritten for the purpose of storing the ofnode
 100          */
 101         phydev->addr = fdtdec_get_int(gd->fdt_blob, ofnode, "reg", -1);
 102         phy_of_handle = fdtdec_lookup_phandle(gd->fdt_blob, ofnode,
 103                                               "phy-handle");
 104         if (phy_of_handle > 0)
 105                 ext_phyaddr = fdtdec_get_int(gd->fdt_blob,
 106                                              phy_of_handle,
 107                                              "reg", -1);
 108         ext_phydev = phy_find_by_mask(phydev->bus,
 109                                       1 << ext_phyaddr,
 110                                       PHY_INTERFACE_MODE_RGMII);
 111         if (!ext_phydev) {
 112                 printf("%s, No external phy device found\n", __func__);
 113                 return -EINVAL;
 114         }
 115
 116         ext_phydev->node = offset_to_ofnode(phy_of_handle);
 117         phydev->priv = ext_phydev;
 118
 119         debug("%s, gmii2rgmmi:0x%x, extphy:0x%x\n", __func__, phydev->addr,
 120               ext_phyaddr);
 121
 122         phydev->flags |= PHY_FLAG_BROKEN_RESET;
 123
 124         return 0;
 125 }
 126
 127 static struct phy_driver gmii2rgmii_driver = {
 128         .name = "XILINX GMII2RGMII",
 129         .uid = PHY_GMII2RGMII_ID,
 130         .mask = 0xffffffff,
 131         .features = PHY_GBIT_FEATURES,
 132         .probe = xilinxgmiitorgmii_probe,
 133         .config = xilinxgmiitorgmii_config,
 134         .startup = xilinxgmiitorgmii_startup,
 135         .writeext = xilinxgmiitorgmii_extwrite,
 136         .readext = xilinxgmiitorgmii_extread,
 137 };
 138
 139 int phy_xilinx_gmii2rgmii_init(void)
 140 {
 141         phy_register(&gmii2rgmii_driver);
 142
 143         return 0;
 144 }