drivers/net/phy/phylink.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * phylink models the MAC to optional PHY connection, supporting
   4  * technologies such as SFP cages where the PHY is hot-pluggable.
   5  *
   6  * Copyright (C) 2015 Russell King
   7  */
   8 #include <linux/acpi.h>
   9 #include <linux/ethtool.h>
  10 #include <linux/export.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/of.h>
  14 #include <linux/of_mdio.h>
  15 #include <linux/phy.h>
  16 #include <linux/phy_fixed.h>
  17 #include <linux/phylink.h>
  18 #include <linux/rtnetlink.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/timer.h>
  21 #include <linux/workqueue.h>
  22
  23 #include "sfp.h"
  24 #include "swphy.h"
  25
  26 #define SUPPORTED_INTERFACES \
  27         (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28          SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29 #define ADVERTISED_INTERFACES \
  30         (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31          ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33 enum {
  34         PHYLINK_DISABLE_STOPPED,
  35         PHYLINK_DISABLE_LINK,
  36         PHYLINK_DISABLE_MAC_WOL,
  37
  38         PCS_STATE_DOWN = 0,
  39         PCS_STATE_STARTING,
  40         PCS_STATE_STARTED,
  41 };
  42
  43 /**
  44  * struct phylink - internal data type for phylink
  45  */
  46 struct phylink {
  47         /* private: */
  48         struct net_device *netdev;
  49         const struct phylink_mac_ops *mac_ops;
  50         struct phylink_config *config;
  51         struct phylink_pcs *pcs;
  52         struct device *dev;
  53         unsigned int old_link_state:1;
  54
  55         unsigned long phylink_disable_state; /* bitmask of disables */
  56         struct phy_device *phydev;
  57         phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  58         u8 cfg_link_an_mode;            /* MLO_AN_xxx */
  59         u8 cur_link_an_mode;
  60         u8 link_port;                   /* The current non-phy ethtool port */
  61         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62
  63         /* The link configuration settings */
  64         struct phylink_link_state link_config;
  65
  66         /* The current settings */
  67         phy_interface_t cur_interface;
  68
  69         struct gpio_desc *link_gpio;
  70         unsigned int link_irq;
  71         struct timer_list link_poll;
  72         void (*get_fixed_state)(struct net_device *dev,
  73                                 struct phylink_link_state *s);
  74
  75         struct mutex state_mutex;
  76         struct phylink_link_state phy_state;
  77         struct work_struct resolve;
  78         unsigned int pcs_neg_mode;
  79         unsigned int pcs_state;
  80
  81         bool mac_link_dropped;
  82         bool using_mac_select_pcs;
  83
  84         struct sfp_bus *sfp_bus;
  85         bool sfp_may_have_phy;
  86         DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  87         __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  88         u8 sfp_port;
  89 };
  90
  91 #define phylink_printk(level, pl, fmt, ...) \
  92         do { \
  93                 if ((pl)->config->type == PHYLINK_NETDEV) \
  94                         netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  95                 else if ((pl)->config->type == PHYLINK_DEV) \
  96                         dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  97         } while (0)
  98
  99 #define phylink_err(pl, fmt, ...) \
 100         phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
 101 #define phylink_warn(pl, fmt, ...) \
 102         phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
 103 #define phylink_info(pl, fmt, ...) \
 104         phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 105 #if defined(CONFIG_DYNAMIC_DEBUG)
 106 #define phylink_dbg(pl, fmt, ...) \
 107 do {                                                                    \
 108         if ((pl)->config->type == PHYLINK_NETDEV)                       \
 109                 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);           \
 110         else if ((pl)->config->type == PHYLINK_DEV)                     \
 111                 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);                 \
 112 } while (0)
 113 #elif defined(DEBUG)
 114 #define phylink_dbg(pl, fmt, ...)                                       \
 115         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 116 #else
 117 #define phylink_dbg(pl, fmt, ...)                                       \
 118 ({                                                                      \
 119         if (0)                                                          \
 120                 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);     \
 121 })
 122 #endif
 123
 124 /**
 125  * phylink_set_port_modes() - set the port type modes in the ethtool mask
 126  * @mask: ethtool link mode mask
 127  *
 128  * Sets all the port type modes in the ethtool mask.  MAC drivers should
 129  * use this in their 'validate' callback.
 130  */
 131 void phylink_set_port_modes(unsigned long *mask)
 132 {
 133         phylink_set(mask, TP);
 134         phylink_set(mask, AUI);
 135         phylink_set(mask, MII);
 136         phylink_set(mask, FIBRE);
 137         phylink_set(mask, BNC);
 138         phylink_set(mask, Backplane);
 139 }
 140 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 141
 142 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 143 {
 144         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 145
 146         phylink_set_port_modes(tmp);
 147         phylink_set(tmp, Autoneg);
 148         phylink_set(tmp, Pause);
 149         phylink_set(tmp, Asym_Pause);
 150
 151         return linkmode_subset(linkmode, tmp);
 152 }
 153
 154 static const char *phylink_an_mode_str(unsigned int mode)
 155 {
 156         static const char *modestr[] = {
 157                 [MLO_AN_PHY] = "phy",
 158                 [MLO_AN_FIXED] = "fixed",
 159                 [MLO_AN_INBAND] = "inband",
 160         };
 161
 162         return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 163 }
 164
 165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 166 {
 167         switch (interface) {
 168         case PHY_INTERFACE_MODE_SGMII:
 169         case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 170                 return 1250;
 171         case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 172                 return 3125;
 173         case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 174                 return 5156;
 175         case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 176                 return 10313;
 177         default:
 178                 return 0;
 179         }
 180 }
 181
 182 /**
 183  * phylink_interface_max_speed() - get the maximum speed of a phy interface
 184  * @interface: phy interface mode defined by &typedef phy_interface_t
 185  *
 186  * Determine the maximum speed of a phy interface. This is intended to help
 187  * determine the correct speed to pass to the MAC when the phy is performing
 188  * rate matching.
 189  *
 190  * Return: The maximum speed of @interface
 191  */
 192 static int phylink_interface_max_speed(phy_interface_t interface)
 193 {
 194         switch (interface) {
 195         case PHY_INTERFACE_MODE_100BASEX:
 196         case PHY_INTERFACE_MODE_REVRMII:
 197         case PHY_INTERFACE_MODE_RMII:
 198         case PHY_INTERFACE_MODE_SMII:
 199         case PHY_INTERFACE_MODE_REVMII:
 200         case PHY_INTERFACE_MODE_MII:
 201                 return SPEED_100;
 202
 203         case PHY_INTERFACE_MODE_TBI:
 204         case PHY_INTERFACE_MODE_MOCA:
 205         case PHY_INTERFACE_MODE_RTBI:
 206         case PHY_INTERFACE_MODE_1000BASEX:
 207         case PHY_INTERFACE_MODE_1000BASEKX:
 208         case PHY_INTERFACE_MODE_TRGMII:
 209         case PHY_INTERFACE_MODE_RGMII_TXID:
 210         case PHY_INTERFACE_MODE_RGMII_RXID:
 211         case PHY_INTERFACE_MODE_RGMII_ID:
 212         case PHY_INTERFACE_MODE_RGMII:
 213         case PHY_INTERFACE_MODE_QSGMII:
 214         case PHY_INTERFACE_MODE_QUSGMII:
 215         case PHY_INTERFACE_MODE_SGMII:
 216         case PHY_INTERFACE_MODE_GMII:
 217                 return SPEED_1000;
 218
 219         case PHY_INTERFACE_MODE_2500BASEX:
 220                 return SPEED_2500;
 221
 222         case PHY_INTERFACE_MODE_5GBASER:
 223                 return SPEED_5000;
 224
 225         case PHY_INTERFACE_MODE_XGMII:
 226         case PHY_INTERFACE_MODE_RXAUI:
 227         case PHY_INTERFACE_MODE_XAUI:
 228         case PHY_INTERFACE_MODE_10GBASER:
 229         case PHY_INTERFACE_MODE_10GKR:
 230         case PHY_INTERFACE_MODE_USXGMII:
 231                 return SPEED_10000;
 232
 233         case PHY_INTERFACE_MODE_25GBASER:
 234                 return SPEED_25000;
 235
 236         case PHY_INTERFACE_MODE_XLGMII:
 237                 return SPEED_40000;
 238
 239         case PHY_INTERFACE_MODE_INTERNAL:
 240         case PHY_INTERFACE_MODE_NA:
 241         case PHY_INTERFACE_MODE_MAX:
 242                 /* No idea! Garbage in, unknown out */
 243                 return SPEED_UNKNOWN;
 244         }
 245
 246         /* If we get here, someone forgot to add an interface mode above */
 247         WARN_ON_ONCE(1);
 248         return SPEED_UNKNOWN;
 249 }
 250
 251 /**
 252  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 253  * @linkmodes: ethtool linkmode mask (must be already initialised)
 254  * @caps: bitmask of MAC capabilities
 255  *
 256  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 257  * supported by the @caps. @linkmodes must have been initialised previously.
 258  */
 259 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
 260 {
 261         if (caps & MAC_SYM_PAUSE)
 262                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 263
 264         if (caps & MAC_ASYM_PAUSE)
 265                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 266
 267         if (caps & MAC_10HD) {
 268                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 269                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 270                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 271         }
 272
 273         if (caps & MAC_10FD) {
 274                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 275                 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 276                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 277         }
 278
 279         if (caps & MAC_100HD) {
 280                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 281                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 282         }
 283
 284         if (caps & MAC_100FD) {
 285                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 286                 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 287                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 288         }
 289
 290         if (caps & MAC_1000HD)
 291                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 292
 293         if (caps & MAC_1000FD) {
 294                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 295                 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 296                 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 297                 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 298         }
 299
 300         if (caps & MAC_2500FD) {
 301                 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 302                 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 303         }
 304
 305         if (caps & MAC_5000FD)
 306                 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 307
 308         if (caps & MAC_10000FD) {
 309                 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 310                 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 311                 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 312                 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 313                 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 314                 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 315                 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 316                 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 317                 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 318         }
 319
 320         if (caps & MAC_25000FD) {
 321                 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 322                 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 323                 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 324         }
 325
 326         if (caps & MAC_40000FD) {
 327                 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 328                 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 329                 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 330                 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 331         }
 332
 333         if (caps & MAC_50000FD) {
 334                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 335                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 336                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 337                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 338                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 339                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 340                 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 341                           linkmodes);
 342                 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 343         }
 344
 345         if (caps & MAC_56000FD) {
 346                 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 347                 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 348                 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 349                 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 350         }
 351
 352         if (caps & MAC_100000FD) {
 353                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 354                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 355                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 356                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 357                           linkmodes);
 358                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 359                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 360                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 361                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 362                           linkmodes);
 363                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 364                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 365                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 366                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 367                           linkmodes);
 368                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 369                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 370         }
 371
 372         if (caps & MAC_200000FD) {
 373                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 374                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 375                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 376                           linkmodes);
 377                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 378                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 379                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 380                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 381                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 382                           linkmodes);
 383                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 384                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 385         }
 386
 387         if (caps & MAC_400000FD) {
 388                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 389                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 390                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 391                           linkmodes);
 392                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 393                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 394                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 395                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 396                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 397                           linkmodes);
 398                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 399                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 400         }
 401 }
 402 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
 403
 404 static struct {
 405         unsigned long mask;
 406         int speed;
 407         unsigned int duplex;
 408 } phylink_caps_params[] = {
 409         { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 410         { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 411         { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 412         { MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 413         { MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 414         { MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 415         { MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 416         { MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 417         { MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 418         { MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 419         { MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 420         { MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 421         { MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 422         { MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 423         { MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 424         { MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 425         { MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 426 };
 427
 428 /**
 429  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 430  * @speed: the speed to search for
 431  * @duplex: the duplex to search for
 432  *
 433  * Find the mac capability for a given speed and duplex.
 434  *
 435  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 436  *         there were no matches.
 437  */
 438 static unsigned long phylink_cap_from_speed_duplex(int speed,
 439                                                    unsigned int duplex)
 440 {
 441         int i;
 442
 443         for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 444                 if (speed == phylink_caps_params[i].speed &&
 445                     duplex == phylink_caps_params[i].duplex)
 446                         return phylink_caps_params[i].mask;
 447         }
 448
 449         return 0;
 450 }
 451
 452 /**
 453  * phylink_get_capabilities() - get capabilities for a given MAC
 454  * @interface: phy interface mode defined by &typedef phy_interface_t
 455  * @mac_capabilities: bitmask of MAC capabilities
 456  * @rate_matching: type of rate matching being performed
 457  *
 458  * Get the MAC capabilities that are supported by the @interface mode and
 459  * @mac_capabilities.
 460  */
 461 unsigned long phylink_get_capabilities(phy_interface_t interface,
 462                                        unsigned long mac_capabilities,
 463                                        int rate_matching)
 464 {
 465         int max_speed = phylink_interface_max_speed(interface);
 466         unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 467         unsigned long matched_caps = 0;
 468
 469         switch (interface) {
 470         case PHY_INTERFACE_MODE_USXGMII:
 471                 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
 472                 fallthrough;
 473
 474         case PHY_INTERFACE_MODE_RGMII_TXID:
 475         case PHY_INTERFACE_MODE_RGMII_RXID:
 476         case PHY_INTERFACE_MODE_RGMII_ID:
 477         case PHY_INTERFACE_MODE_RGMII:
 478         case PHY_INTERFACE_MODE_QSGMII:
 479         case PHY_INTERFACE_MODE_QUSGMII:
 480         case PHY_INTERFACE_MODE_SGMII:
 481         case PHY_INTERFACE_MODE_GMII:
 482                 caps |= MAC_1000HD | MAC_1000FD;
 483                 fallthrough;
 484
 485         case PHY_INTERFACE_MODE_REVRMII:
 486         case PHY_INTERFACE_MODE_RMII:
 487         case PHY_INTERFACE_MODE_SMII:
 488         case PHY_INTERFACE_MODE_REVMII:
 489         case PHY_INTERFACE_MODE_MII:
 490                 caps |= MAC_10HD | MAC_10FD;
 491                 fallthrough;
 492
 493         case PHY_INTERFACE_MODE_100BASEX:
 494                 caps |= MAC_100HD | MAC_100FD;
 495                 break;
 496
 497         case PHY_INTERFACE_MODE_TBI:
 498         case PHY_INTERFACE_MODE_MOCA:
 499         case PHY_INTERFACE_MODE_RTBI:
 500         case PHY_INTERFACE_MODE_1000BASEX:
 501                 caps |= MAC_1000HD;
 502                 fallthrough;
 503         case PHY_INTERFACE_MODE_1000BASEKX:
 504         case PHY_INTERFACE_MODE_TRGMII:
 505                 caps |= MAC_1000FD;
 506                 break;
 507
 508         case PHY_INTERFACE_MODE_2500BASEX:
 509                 caps |= MAC_2500FD;
 510                 break;
 511
 512         case PHY_INTERFACE_MODE_5GBASER:
 513                 caps |= MAC_5000FD;
 514                 break;
 515
 516         case PHY_INTERFACE_MODE_XGMII:
 517         case PHY_INTERFACE_MODE_RXAUI:
 518         case PHY_INTERFACE_MODE_XAUI:
 519         case PHY_INTERFACE_MODE_10GBASER:
 520         case PHY_INTERFACE_MODE_10GKR:
 521                 caps |= MAC_10000FD;
 522                 break;
 523
 524         case PHY_INTERFACE_MODE_25GBASER:
 525                 caps |= MAC_25000FD;
 526                 break;
 527
 528         case PHY_INTERFACE_MODE_XLGMII:
 529                 caps |= MAC_40000FD;
 530                 break;
 531
 532         case PHY_INTERFACE_MODE_INTERNAL:
 533                 caps |= ~0;
 534                 break;
 535
 536         case PHY_INTERFACE_MODE_NA:
 537         case PHY_INTERFACE_MODE_MAX:
 538                 break;
 539         }
 540
 541         switch (rate_matching) {
 542         case RATE_MATCH_OPEN_LOOP:
 543                 /* TODO */
 544                 fallthrough;
 545         case RATE_MATCH_NONE:
 546                 matched_caps = 0;
 547                 break;
 548         case RATE_MATCH_PAUSE: {
 549                 /* The MAC must support asymmetric pause towards the local
 550                  * device for this. We could allow just symmetric pause, but
 551                  * then we might have to renegotiate if the link partner
 552                  * doesn't support pause. This is because there's no way to
 553                  * accept pause frames without transmitting them if we only
 554                  * support symmetric pause.
 555                  */
 556                 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 557                     !(mac_capabilities & MAC_ASYM_PAUSE))
 558                         break;
 559
 560                 /* We can't adapt if the MAC doesn't support the interface's
 561                  * max speed at full duplex.
 562                  */
 563                 if (mac_capabilities &
 564                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 565                         /* Although a duplex-matching phy might exist, we
 566                          * conservatively remove these modes because the MAC
 567                          * will not be aware of the half-duplex nature of the
 568                          * link.
 569                          */
 570                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 571                         matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 572                 }
 573                 break;
 574         }
 575         case RATE_MATCH_CRS:
 576                 /* The MAC must support half duplex at the interface's max
 577                  * speed.
 578                  */
 579                 if (mac_capabilities &
 580                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 581                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 582                         matched_caps &= mac_capabilities;
 583                 }
 584                 break;
 585         }
 586
 587         return (caps & mac_capabilities) | matched_caps;
 588 }
 589 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
 590
 591 /**
 592  * phylink_validate_mask_caps() - Restrict link modes based on caps
 593  * @supported: ethtool bitmask for supported link modes.
 594  * @state: pointer to a &struct phylink_link_state.
 595  * @mac_capabilities: bitmask of MAC capabilities
 596  *
 597  * Calculate the supported link modes based on @mac_capabilities, and restrict
 598  * @supported and @state based on that. Use this function if your capabiliies
 599  * aren't constant, such as if they vary depending on the interface.
 600  */
 601 void phylink_validate_mask_caps(unsigned long *supported,
 602                                 struct phylink_link_state *state,
 603                                 unsigned long mac_capabilities)
 604 {
 605         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 606         unsigned long caps;
 607
 608         phylink_set_port_modes(mask);
 609         phylink_set(mask, Autoneg);
 610         caps = phylink_get_capabilities(state->interface, mac_capabilities,
 611                                         state->rate_matching);
 612         phylink_caps_to_linkmodes(mask, caps);
 613
 614         linkmode_and(supported, supported, mask);
 615         linkmode_and(state->advertising, state->advertising, mask);
 616 }
 617 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
 618
 619 /**
 620  * phylink_generic_validate() - generic validate() callback implementation
 621  * @config: a pointer to a &struct phylink_config.
 622  * @supported: ethtool bitmask for supported link modes.
 623  * @state: a pointer to a &struct phylink_link_state.
 624  *
 625  * Generic implementation of the validate() callback that MAC drivers can
 626  * use when they pass the range of supported interfaces and MAC capabilities.
 627  */
 628 void phylink_generic_validate(struct phylink_config *config,
 629                               unsigned long *supported,
 630                               struct phylink_link_state *state)
 631 {
 632         phylink_validate_mask_caps(supported, state, config->mac_capabilities);
 633 }
 634 EXPORT_SYMBOL_GPL(phylink_generic_validate);
 635
 636 static int phylink_validate_mac_and_pcs(struct phylink *pl,
 637                                         unsigned long *supported,
 638                                         struct phylink_link_state *state)
 639 {
 640         struct phylink_pcs *pcs;
 641         int ret;
 642
 643         /* Get the PCS for this interface mode */
 644         if (pl->using_mac_select_pcs) {
 645                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 646                 if (IS_ERR(pcs))
 647                         return PTR_ERR(pcs);
 648         } else {
 649                 pcs = pl->pcs;
 650         }
 651
 652         if (pcs) {
 653                 /* The PCS, if present, must be setup before phylink_create()
 654                  * has been called. If the ops is not initialised, print an
 655                  * error and backtrace rather than oopsing the kernel.
 656                  */
 657                 if (!pcs->ops) {
 658                         phylink_err(pl, "interface %s: uninitialised PCS\n",
 659                                     phy_modes(state->interface));
 660                         dump_stack();
 661                         return -EINVAL;
 662                 }
 663
 664                 /* Validate the link parameters with the PCS */
 665                 if (pcs->ops->pcs_validate) {
 666                         ret = pcs->ops->pcs_validate(pcs, supported, state);
 667                         if (ret < 0 || phylink_is_empty_linkmode(supported))
 668                                 return -EINVAL;
 669
 670                         /* Ensure the advertising mask is a subset of the
 671                          * supported mask.
 672                          */
 673                         linkmode_and(state->advertising, state->advertising,
 674                                      supported);
 675                 }
 676         }
 677
 678         /* Then validate the link parameters with the MAC */
 679         if (pl->mac_ops->validate)
 680                 pl->mac_ops->validate(pl->config, supported, state);
 681         else
 682                 phylink_generic_validate(pl->config, supported, state);
 683
 684         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 685 }
 686
 687 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
 688                                  struct phylink_link_state *state,
 689                                  const unsigned long *interfaces)
 690 {
 691         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 692         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 693         __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
 694         struct phylink_link_state t;
 695         int intf;
 696
 697         for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
 698                 if (test_bit(intf, interfaces)) {
 699                         linkmode_copy(s, supported);
 700
 701                         t = *state;
 702                         t.interface = intf;
 703                         if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
 704                                 linkmode_or(all_s, all_s, s);
 705                                 linkmode_or(all_adv, all_adv, t.advertising);
 706                         }
 707                 }
 708         }
 709
 710         linkmode_copy(supported, all_s);
 711         linkmode_copy(state->advertising, all_adv);
 712
 713         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 714 }
 715
 716 static int phylink_validate(struct phylink *pl, unsigned long *supported,
 717                             struct phylink_link_state *state)
 718 {
 719         const unsigned long *interfaces = pl->config->supported_interfaces;
 720
 721         if (state->interface == PHY_INTERFACE_MODE_NA)
 722                 return phylink_validate_mask(pl, supported, state, interfaces);
 723
 724         if (!test_bit(state->interface, interfaces))
 725                 return -EINVAL;
 726
 727         return phylink_validate_mac_and_pcs(pl, supported, state);
 728 }
 729
 730 static int phylink_parse_fixedlink(struct phylink *pl,
 731                                    const struct fwnode_handle *fwnode)
 732 {
 733         struct fwnode_handle *fixed_node;
 734         bool pause, asym_pause, autoneg;
 735         const struct phy_setting *s;
 736         struct gpio_desc *desc;
 737         u32 speed;
 738         int ret;
 739
 740         fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 741         if (fixed_node) {
 742                 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 743
 744                 pl->link_config.speed = speed;
 745                 pl->link_config.duplex = DUPLEX_HALF;
 746
 747                 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 748                         pl->link_config.duplex = DUPLEX_FULL;
 749
 750                 /* We treat the "pause" and "asym-pause" terminology as
 751                  * defining the link partner's ability.
 752                  */
 753                 if (fwnode_property_read_bool(fixed_node, "pause"))
 754                         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 755                                   pl->link_config.lp_advertising);
 756                 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 757                         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 758                                   pl->link_config.lp_advertising);
 759
 760                 if (ret == 0) {
 761                         desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 762                                                       GPIOD_IN, "?");
 763
 764                         if (!IS_ERR(desc))
 765                                 pl->link_gpio = desc;
 766                         else if (desc == ERR_PTR(-EPROBE_DEFER))
 767                                 ret = -EPROBE_DEFER;
 768                 }
 769                 fwnode_handle_put(fixed_node);
 770
 771                 if (ret)
 772                         return ret;
 773         } else {
 774                 u32 prop[5];
 775
 776                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 777                                                      NULL, 0);
 778                 if (ret != ARRAY_SIZE(prop)) {
 779                         phylink_err(pl, "broken fixed-link?\n");
 780                         return -EINVAL;
 781                 }
 782
 783                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 784                                                      prop, ARRAY_SIZE(prop));
 785                 if (!ret) {
 786                         pl->link_config.duplex = prop[1] ?
 787                                                 DUPLEX_FULL : DUPLEX_HALF;
 788                         pl->link_config.speed = prop[2];
 789                         if (prop[3])
 790                                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 791                                           pl->link_config.lp_advertising);
 792                         if (prop[4])
 793                                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 794                                           pl->link_config.lp_advertising);
 795                 }
 796         }
 797
 798         if (pl->link_config.speed > SPEED_1000 &&
 799             pl->link_config.duplex != DUPLEX_FULL)
 800                 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 801                              pl->link_config.speed);
 802
 803         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
 804         linkmode_copy(pl->link_config.advertising, pl->supported);
 805         phylink_validate(pl, pl->supported, &pl->link_config);
 806
 807         pause = phylink_test(pl->supported, Pause);
 808         asym_pause = phylink_test(pl->supported, Asym_Pause);
 809         autoneg = phylink_test(pl->supported, Autoneg);
 810         s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 811                                pl->supported, true);
 812         linkmode_zero(pl->supported);
 813         phylink_set(pl->supported, MII);
 814
 815         if (pause)
 816                 phylink_set(pl->supported, Pause);
 817
 818         if (asym_pause)
 819                 phylink_set(pl->supported, Asym_Pause);
 820
 821         if (autoneg)
 822                 phylink_set(pl->supported, Autoneg);
 823
 824         if (s) {
 825                 __set_bit(s->bit, pl->supported);
 826                 __set_bit(s->bit, pl->link_config.lp_advertising);
 827         } else {
 828                 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 829                              pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 830                              pl->link_config.speed);
 831         }
 832
 833         linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 834                      pl->supported);
 835
 836         pl->link_config.link = 1;
 837         pl->link_config.an_complete = 1;
 838
 839         return 0;
 840 }
 841
 842 static int phylink_parse_mode(struct phylink *pl,
 843                               const struct fwnode_handle *fwnode)
 844 {
 845         struct fwnode_handle *dn;
 846         const char *managed;
 847
 848         dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 849         if (dn || fwnode_property_present(fwnode, "fixed-link"))
 850                 pl->cfg_link_an_mode = MLO_AN_FIXED;
 851         fwnode_handle_put(dn);
 852
 853         if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 854              strcmp(managed, "in-band-status") == 0) ||
 855             pl->config->ovr_an_inband) {
 856                 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 857                         phylink_err(pl,
 858                                     "can't use both fixed-link and in-band-status\n");
 859                         return -EINVAL;
 860                 }
 861
 862                 linkmode_zero(pl->supported);
 863                 phylink_set(pl->supported, MII);
 864                 phylink_set(pl->supported, Autoneg);
 865                 phylink_set(pl->supported, Asym_Pause);
 866                 phylink_set(pl->supported, Pause);
 867                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 868
 869                 switch (pl->link_config.interface) {
 870                 case PHY_INTERFACE_MODE_SGMII:
 871                 case PHY_INTERFACE_MODE_QSGMII:
 872                 case PHY_INTERFACE_MODE_QUSGMII:
 873                 case PHY_INTERFACE_MODE_RGMII:
 874                 case PHY_INTERFACE_MODE_RGMII_ID:
 875                 case PHY_INTERFACE_MODE_RGMII_RXID:
 876                 case PHY_INTERFACE_MODE_RGMII_TXID:
 877                 case PHY_INTERFACE_MODE_RTBI:
 878                         phylink_set(pl->supported, 10baseT_Half);
 879                         phylink_set(pl->supported, 10baseT_Full);
 880                         phylink_set(pl->supported, 100baseT_Half);
 881                         phylink_set(pl->supported, 100baseT_Full);
 882                         phylink_set(pl->supported, 1000baseT_Half);
 883                         phylink_set(pl->supported, 1000baseT_Full);
 884                         break;
 885
 886                 case PHY_INTERFACE_MODE_1000BASEX:
 887                         phylink_set(pl->supported, 1000baseX_Full);
 888                         break;
 889
 890                 case PHY_INTERFACE_MODE_2500BASEX:
 891                         phylink_set(pl->supported, 2500baseX_Full);
 892                         break;
 893
 894                 case PHY_INTERFACE_MODE_5GBASER:
 895                         phylink_set(pl->supported, 5000baseT_Full);
 896                         break;
 897
 898                 case PHY_INTERFACE_MODE_25GBASER:
 899                         phylink_set(pl->supported, 25000baseCR_Full);
 900                         phylink_set(pl->supported, 25000baseKR_Full);
 901                         phylink_set(pl->supported, 25000baseSR_Full);
 902                         fallthrough;
 903                 case PHY_INTERFACE_MODE_USXGMII:
 904                 case PHY_INTERFACE_MODE_10GKR:
 905                 case PHY_INTERFACE_MODE_10GBASER:
 906                         phylink_set(pl->supported, 10baseT_Half);
 907                         phylink_set(pl->supported, 10baseT_Full);
 908                         phylink_set(pl->supported, 100baseT_Half);
 909                         phylink_set(pl->supported, 100baseT_Full);
 910                         phylink_set(pl->supported, 1000baseT_Half);
 911                         phylink_set(pl->supported, 1000baseT_Full);
 912                         phylink_set(pl->supported, 1000baseX_Full);
 913                         phylink_set(pl->supported, 1000baseKX_Full);
 914                         phylink_set(pl->supported, 2500baseT_Full);
 915                         phylink_set(pl->supported, 2500baseX_Full);
 916                         phylink_set(pl->supported, 5000baseT_Full);
 917                         phylink_set(pl->supported, 10000baseT_Full);
 918                         phylink_set(pl->supported, 10000baseKR_Full);
 919                         phylink_set(pl->supported, 10000baseKX4_Full);
 920                         phylink_set(pl->supported, 10000baseCR_Full);
 921                         phylink_set(pl->supported, 10000baseSR_Full);
 922                         phylink_set(pl->supported, 10000baseLR_Full);
 923                         phylink_set(pl->supported, 10000baseLRM_Full);
 924                         phylink_set(pl->supported, 10000baseER_Full);
 925                         break;
 926
 927                 case PHY_INTERFACE_MODE_XLGMII:
 928                         phylink_set(pl->supported, 25000baseCR_Full);
 929                         phylink_set(pl->supported, 25000baseKR_Full);
 930                         phylink_set(pl->supported, 25000baseSR_Full);
 931                         phylink_set(pl->supported, 40000baseKR4_Full);
 932                         phylink_set(pl->supported, 40000baseCR4_Full);
 933                         phylink_set(pl->supported, 40000baseSR4_Full);
 934                         phylink_set(pl->supported, 40000baseLR4_Full);
 935                         phylink_set(pl->supported, 50000baseCR2_Full);
 936                         phylink_set(pl->supported, 50000baseKR2_Full);
 937                         phylink_set(pl->supported, 50000baseSR2_Full);
 938                         phylink_set(pl->supported, 50000baseKR_Full);
 939                         phylink_set(pl->supported, 50000baseSR_Full);
 940                         phylink_set(pl->supported, 50000baseCR_Full);
 941                         phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
 942                         phylink_set(pl->supported, 50000baseDR_Full);
 943                         phylink_set(pl->supported, 100000baseKR4_Full);
 944                         phylink_set(pl->supported, 100000baseSR4_Full);
 945                         phylink_set(pl->supported, 100000baseCR4_Full);
 946                         phylink_set(pl->supported, 100000baseLR4_ER4_Full);
 947                         phylink_set(pl->supported, 100000baseKR2_Full);
 948                         phylink_set(pl->supported, 100000baseSR2_Full);
 949                         phylink_set(pl->supported, 100000baseCR2_Full);
 950                         phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
 951                         phylink_set(pl->supported, 100000baseDR2_Full);
 952                         break;
 953
 954                 default:
 955                         phylink_err(pl,
 956                                     "incorrect link mode %s for in-band status\n",
 957                                     phy_modes(pl->link_config.interface));
 958                         return -EINVAL;
 959                 }
 960
 961                 linkmode_copy(pl->link_config.advertising, pl->supported);
 962
 963                 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 964                         phylink_err(pl,
 965                                     "failed to validate link configuration for in-band status\n");
 966                         return -EINVAL;
 967                 }
 968         }
 969
 970         return 0;
 971 }
 972
 973 static void phylink_apply_manual_flow(struct phylink *pl,
 974                                       struct phylink_link_state *state)
 975 {
 976         /* If autoneg is disabled, pause AN is also disabled */
 977         if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 978                                state->advertising))
 979                 state->pause &= ~MLO_PAUSE_AN;
 980
 981         /* Manual configuration of pause modes */
 982         if (!(pl->link_config.pause & MLO_PAUSE_AN))
 983                 state->pause = pl->link_config.pause;
 984 }
 985
 986 static void phylink_resolve_an_pause(struct phylink_link_state *state)
 987 {
 988         bool tx_pause, rx_pause;
 989
 990         if (state->duplex == DUPLEX_FULL) {
 991                 linkmode_resolve_pause(state->advertising,
 992                                        state->lp_advertising,
 993                                        &tx_pause, &rx_pause);
 994                 if (tx_pause)
 995                         state->pause |= MLO_PAUSE_TX;
 996                 if (rx_pause)
 997                         state->pause |= MLO_PAUSE_RX;
 998         }
 999 }
1000
1001 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1002 {
1003         if (pcs && pcs->ops->pcs_disable)
1004                 pcs->ops->pcs_disable(pcs);
1005 }
1006
1007 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1008 {
1009         int err = 0;
1010
1011         if (pcs && pcs->ops->pcs_enable)
1012                 err = pcs->ops->pcs_enable(pcs);
1013
1014         return err;
1015 }
1016
1017 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1018                               const struct phylink_link_state *state,
1019                               bool permit_pause_to_mac)
1020 {
1021         if (!pcs)
1022                 return 0;
1023
1024         return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1025                                     state->advertising, permit_pause_to_mac);
1026 }
1027
1028 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1029                                 phy_interface_t interface, int speed,
1030                                 int duplex)
1031 {
1032         if (pcs && pcs->ops->pcs_link_up)
1033                 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1034 }
1035
1036 static void phylink_pcs_poll_stop(struct phylink *pl)
1037 {
1038         if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1039                 del_timer(&pl->link_poll);
1040 }
1041
1042 static void phylink_pcs_poll_start(struct phylink *pl)
1043 {
1044         if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1045                 mod_timer(&pl->link_poll, jiffies + HZ);
1046 }
1047
1048 static void phylink_mac_config(struct phylink *pl,
1049                                const struct phylink_link_state *state)
1050 {
1051         phylink_dbg(pl,
1052                     "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n",
1053                     __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1054                     phy_modes(state->interface),
1055                     phy_speed_to_str(state->speed),
1056                     phy_duplex_to_str(state->duplex),
1057                     phy_rate_matching_to_str(state->rate_matching),
1058                     __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
1059                     state->pause, state->link);
1060
1061         pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
1062 }
1063
1064 static void phylink_mac_pcs_an_restart(struct phylink *pl)
1065 {
1066         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1067                               pl->link_config.advertising) &&
1068             phy_interface_mode_is_8023z(pl->link_config.interface) &&
1069             phylink_autoneg_inband(pl->cur_link_an_mode)) {
1070                 if (pl->pcs)
1071                         pl->pcs->ops->pcs_an_restart(pl->pcs);
1072                 else if (pl->config->legacy_pre_march2020)
1073                         pl->mac_ops->mac_an_restart(pl->config);
1074         }
1075 }
1076
1077 static void phylink_major_config(struct phylink *pl, bool restart,
1078                                   const struct phylink_link_state *state)
1079 {
1080         struct phylink_pcs *pcs = NULL;
1081         bool pcs_changed = false;
1082         unsigned int rate_kbd;
1083         unsigned int neg_mode;
1084         int err;
1085
1086         phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1087
1088         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1089                                                 state->interface,
1090                                                 state->advertising);
1091
1092         if (pl->using_mac_select_pcs) {
1093                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1094                 if (IS_ERR(pcs)) {
1095                         phylink_err(pl,
1096                                     "mac_select_pcs unexpectedly failed: %pe\n",
1097                                     pcs);
1098                         return;
1099                 }
1100
1101                 pcs_changed = pcs && pl->pcs != pcs;
1102         }
1103
1104         phylink_pcs_poll_stop(pl);
1105
1106         if (pl->mac_ops->mac_prepare) {
1107                 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1108                                                state->interface);
1109                 if (err < 0) {
1110                         phylink_err(pl, "mac_prepare failed: %pe\n",
1111                                     ERR_PTR(err));
1112                         return;
1113                 }
1114         }
1115
1116         /* If we have a new PCS, switch to the new PCS after preparing the MAC
1117          * for the change.
1118          */
1119         if (pcs_changed) {
1120                 phylink_pcs_disable(pl->pcs);
1121
1122                 pl->pcs = pcs;
1123         }
1124
1125         phylink_mac_config(pl, state);
1126
1127         if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1128                 phylink_pcs_enable(pl->pcs);
1129
1130         neg_mode = pl->cur_link_an_mode;
1131         if (pl->pcs && pl->pcs->neg_mode)
1132                 neg_mode = pl->pcs_neg_mode;
1133
1134         err = phylink_pcs_config(pl->pcs, neg_mode, state,
1135                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1136         if (err < 0)
1137                 phylink_err(pl, "pcs_config failed: %pe\n",
1138                             ERR_PTR(err));
1139         else if (err > 0)
1140                 restart = true;
1141
1142         if (restart)
1143                 phylink_mac_pcs_an_restart(pl);
1144
1145         if (pl->mac_ops->mac_finish) {
1146                 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1147                                               state->interface);
1148                 if (err < 0)
1149                         phylink_err(pl, "mac_finish failed: %pe\n",
1150                                     ERR_PTR(err));
1151         }
1152
1153         if (pl->sfp_bus) {
1154                 rate_kbd = phylink_interface_signal_rate(state->interface);
1155                 if (rate_kbd)
1156                         sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1157         }
1158
1159         phylink_pcs_poll_start(pl);
1160 }
1161
1162 /*
1163  * Reconfigure for a change of inband advertisement.
1164  * If we have a separate PCS, we only need to call its pcs_config() method,
1165  * and then restart AN if it indicates something changed. Otherwise, we do
1166  * the full MAC reconfiguration.
1167  */
1168 static int phylink_change_inband_advert(struct phylink *pl)
1169 {
1170         unsigned int neg_mode;
1171         int ret;
1172
1173         if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1174                 return 0;
1175
1176         if (!pl->pcs && pl->config->legacy_pre_march2020) {
1177                 /* Legacy method */
1178                 phylink_mac_config(pl, &pl->link_config);
1179                 phylink_mac_pcs_an_restart(pl);
1180                 return 0;
1181         }
1182
1183         phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1184                     phylink_an_mode_str(pl->cur_link_an_mode),
1185                     phy_modes(pl->link_config.interface),
1186                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1187                     pl->link_config.pause);
1188
1189         /* Recompute the PCS neg mode */
1190         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1191                                         pl->link_config.interface,
1192                                         pl->link_config.advertising);
1193
1194         neg_mode = pl->cur_link_an_mode;
1195         if (pl->pcs->neg_mode)
1196                 neg_mode = pl->pcs_neg_mode;
1197
1198         /* Modern PCS-based method; update the advert at the PCS, and
1199          * restart negotiation if the pcs_config() helper indicates that
1200          * the programmed advertisement has changed.
1201          */
1202         ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1203                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1204         if (ret < 0)
1205                 return ret;
1206
1207         if (ret > 0)
1208                 phylink_mac_pcs_an_restart(pl);
1209
1210         return 0;
1211 }
1212
1213 static void phylink_mac_pcs_get_state(struct phylink *pl,
1214                                       struct phylink_link_state *state)
1215 {
1216         linkmode_copy(state->advertising, pl->link_config.advertising);
1217         linkmode_zero(state->lp_advertising);
1218         state->interface = pl->link_config.interface;
1219         state->rate_matching = pl->link_config.rate_matching;
1220         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1221                               state->advertising)) {
1222                 state->speed = SPEED_UNKNOWN;
1223                 state->duplex = DUPLEX_UNKNOWN;
1224                 state->pause = MLO_PAUSE_NONE;
1225         } else {
1226                 state->speed =  pl->link_config.speed;
1227                 state->duplex = pl->link_config.duplex;
1228                 state->pause = pl->link_config.pause;
1229         }
1230         state->an_complete = 0;
1231         state->link = 1;
1232
1233         if (pl->pcs)
1234                 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1235         else if (pl->mac_ops->mac_pcs_get_state &&
1236                  pl->config->legacy_pre_march2020)
1237                 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1238         else
1239                 state->link = 0;
1240 }
1241
1242 /* The fixed state is... fixed except for the link state,
1243  * which may be determined by a GPIO or a callback.
1244  */
1245 static void phylink_get_fixed_state(struct phylink *pl,
1246                                     struct phylink_link_state *state)
1247 {
1248         *state = pl->link_config;
1249         if (pl->config->get_fixed_state)
1250                 pl->config->get_fixed_state(pl->config, state);
1251         else if (pl->link_gpio)
1252                 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1253
1254         state->pause = MLO_PAUSE_NONE;
1255         phylink_resolve_an_pause(state);
1256 }
1257
1258 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1259 {
1260         struct phylink_link_state link_state;
1261
1262         switch (pl->cur_link_an_mode) {
1263         case MLO_AN_PHY:
1264                 link_state = pl->phy_state;
1265                 break;
1266
1267         case MLO_AN_FIXED:
1268                 phylink_get_fixed_state(pl, &link_state);
1269                 break;
1270
1271         case MLO_AN_INBAND:
1272                 link_state = pl->link_config;
1273                 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1274                         link_state.pause = MLO_PAUSE_NONE;
1275                 break;
1276
1277         default: /* can't happen */
1278                 return;
1279         }
1280
1281         link_state.link = false;
1282
1283         phylink_apply_manual_flow(pl, &link_state);
1284         phylink_major_config(pl, force_restart, &link_state);
1285 }
1286
1287 static const char *phylink_pause_to_str(int pause)
1288 {
1289         switch (pause & MLO_PAUSE_TXRX_MASK) {
1290         case MLO_PAUSE_TX | MLO_PAUSE_RX:
1291                 return "rx/tx";
1292         case MLO_PAUSE_TX:
1293                 return "tx";
1294         case MLO_PAUSE_RX:
1295                 return "rx";
1296         default:
1297                 return "off";
1298         }
1299 }
1300
1301 static void phylink_link_up(struct phylink *pl,
1302                             struct phylink_link_state link_state)
1303 {
1304         struct net_device *ndev = pl->netdev;
1305         unsigned int neg_mode;
1306         int speed, duplex;
1307         bool rx_pause;
1308
1309         speed = link_state.speed;
1310         duplex = link_state.duplex;
1311         rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1312
1313         switch (link_state.rate_matching) {
1314         case RATE_MATCH_PAUSE:
1315                 /* The PHY is doing rate matchion from the media rate (in
1316                  * the link_state) to the interface speed, and will send
1317                  * pause frames to the MAC to limit its transmission speed.
1318                  */
1319                 speed = phylink_interface_max_speed(link_state.interface);
1320                 duplex = DUPLEX_FULL;
1321                 rx_pause = true;
1322                 break;
1323
1324         case RATE_MATCH_CRS:
1325                 /* The PHY is doing rate matchion from the media rate (in
1326                  * the link_state) to the interface speed, and will cause
1327                  * collisions to the MAC to limit its transmission speed.
1328                  */
1329                 speed = phylink_interface_max_speed(link_state.interface);
1330                 duplex = DUPLEX_HALF;
1331                 break;
1332         }
1333
1334         pl->cur_interface = link_state.interface;
1335
1336         neg_mode = pl->cur_link_an_mode;
1337         if (pl->pcs && pl->pcs->neg_mode)
1338                 neg_mode = pl->pcs_neg_mode;
1339
1340         phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1341                             duplex);
1342
1343         pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1344                                  pl->cur_interface, speed, duplex,
1345                                  !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1346
1347         if (ndev)
1348                 netif_carrier_on(ndev);
1349
1350         phylink_info(pl,
1351                      "Link is Up - %s/%s - flow control %s\n",
1352                      phy_speed_to_str(link_state.speed),
1353                      phy_duplex_to_str(link_state.duplex),
1354                      phylink_pause_to_str(link_state.pause));
1355 }
1356
1357 static void phylink_link_down(struct phylink *pl)
1358 {
1359         struct net_device *ndev = pl->netdev;
1360
1361         if (ndev)
1362                 netif_carrier_off(ndev);
1363         pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1364                                    pl->cur_interface);
1365         phylink_info(pl, "Link is Down\n");
1366 }
1367
1368 static void phylink_resolve(struct work_struct *w)
1369 {
1370         struct phylink *pl = container_of(w, struct phylink, resolve);
1371         struct phylink_link_state link_state;
1372         struct net_device *ndev = pl->netdev;
1373         bool mac_config = false;
1374         bool retrigger = false;
1375         bool cur_link_state;
1376
1377         mutex_lock(&pl->state_mutex);
1378         if (pl->netdev)
1379                 cur_link_state = netif_carrier_ok(ndev);
1380         else
1381                 cur_link_state = pl->old_link_state;
1382
1383         if (pl->phylink_disable_state) {
1384                 pl->mac_link_dropped = false;
1385                 link_state.link = false;
1386         } else if (pl->mac_link_dropped) {
1387                 link_state.link = false;
1388                 retrigger = true;
1389         } else {
1390                 switch (pl->cur_link_an_mode) {
1391                 case MLO_AN_PHY:
1392                         link_state = pl->phy_state;
1393                         phylink_apply_manual_flow(pl, &link_state);
1394                         mac_config = link_state.link;
1395                         break;
1396
1397                 case MLO_AN_FIXED:
1398                         phylink_get_fixed_state(pl, &link_state);
1399                         mac_config = link_state.link;
1400                         break;
1401
1402                 case MLO_AN_INBAND:
1403                         phylink_mac_pcs_get_state(pl, &link_state);
1404
1405                         /* The PCS may have a latching link-fail indicator.
1406                          * If the link was up, bring the link down and
1407                          * re-trigger the resolve. Otherwise, re-read the
1408                          * PCS state to get the current status of the link.
1409                          */
1410                         if (!link_state.link) {
1411                                 if (cur_link_state)
1412                                         retrigger = true;
1413                                 else
1414                                         phylink_mac_pcs_get_state(pl,
1415                                                                   &link_state);
1416                         }
1417
1418                         /* If we have a phy, the "up" state is the union of
1419                          * both the PHY and the MAC
1420                          */
1421                         if (pl->phydev)
1422                                 link_state.link &= pl->phy_state.link;
1423
1424                         /* Only update if the PHY link is up */
1425                         if (pl->phydev && pl->phy_state.link) {
1426                                 /* If the interface has changed, force a
1427                                  * link down event if the link isn't already
1428                                  * down, and re-resolve.
1429                                  */
1430                                 if (link_state.interface !=
1431                                     pl->phy_state.interface) {
1432                                         retrigger = true;
1433                                         link_state.link = false;
1434                                 }
1435                                 link_state.interface = pl->phy_state.interface;
1436
1437                                 /* If we are doing rate matching, then the
1438                                  * link speed/duplex comes from the PHY
1439                                  */
1440                                 if (pl->phy_state.rate_matching) {
1441                                         link_state.rate_matching =
1442                                                 pl->phy_state.rate_matching;
1443                                         link_state.speed = pl->phy_state.speed;
1444                                         link_state.duplex =
1445                                                 pl->phy_state.duplex;
1446                                 }
1447
1448                                 /* If we have a PHY, we need to update with
1449                                  * the PHY flow control bits.
1450                                  */
1451                                 link_state.pause = pl->phy_state.pause;
1452                                 mac_config = true;
1453                         }
1454                         phylink_apply_manual_flow(pl, &link_state);
1455                         break;
1456                 }
1457         }
1458
1459         if (mac_config) {
1460                 if (link_state.interface != pl->link_config.interface) {
1461                         /* The interface has changed, force the link down and
1462                          * then reconfigure.
1463                          */
1464                         if (cur_link_state) {
1465                                 phylink_link_down(pl);
1466                                 cur_link_state = false;
1467                         }
1468                         phylink_major_config(pl, false, &link_state);
1469                         pl->link_config.interface = link_state.interface;
1470                 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1471                         /* The interface remains unchanged, only the speed,
1472                          * duplex or pause settings have changed. Call the
1473                          * old mac_config() method to configure the MAC/PCS
1474                          * only if we do not have a legacy MAC driver.
1475                          */
1476                         phylink_mac_config(pl, &link_state);
1477                 }
1478         }
1479
1480         if (link_state.link != cur_link_state) {
1481                 pl->old_link_state = link_state.link;
1482                 if (!link_state.link)
1483                         phylink_link_down(pl);
1484                 else
1485                         phylink_link_up(pl, link_state);
1486         }
1487         if (!link_state.link && retrigger) {
1488                 pl->mac_link_dropped = false;
1489                 queue_work(system_power_efficient_wq, &pl->resolve);
1490         }
1491         mutex_unlock(&pl->state_mutex);
1492 }
1493
1494 static void phylink_run_resolve(struct phylink *pl)
1495 {
1496         if (!pl->phylink_disable_state)
1497                 queue_work(system_power_efficient_wq, &pl->resolve);
1498 }
1499
1500 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1501 {
1502         unsigned long state = pl->phylink_disable_state;
1503
1504         set_bit(bit, &pl->phylink_disable_state);
1505         if (state == 0) {
1506                 queue_work(system_power_efficient_wq, &pl->resolve);
1507                 flush_work(&pl->resolve);
1508         }
1509 }
1510
1511 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1512 {
1513         clear_bit(bit, &pl->phylink_disable_state);
1514         phylink_run_resolve(pl);
1515 }
1516
1517 static void phylink_fixed_poll(struct timer_list *t)
1518 {
1519         struct phylink *pl = container_of(t, struct phylink, link_poll);
1520
1521         mod_timer(t, jiffies + HZ);
1522
1523         phylink_run_resolve(pl);
1524 }
1525
1526 static const struct sfp_upstream_ops sfp_phylink_ops;
1527
1528 static int phylink_register_sfp(struct phylink *pl,
1529                                 const struct fwnode_handle *fwnode)
1530 {
1531         struct sfp_bus *bus;
1532         int ret;
1533
1534         if (!fwnode)
1535                 return 0;
1536
1537         bus = sfp_bus_find_fwnode(fwnode);
1538         if (IS_ERR(bus)) {
1539                 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1540                 return PTR_ERR(bus);
1541         }
1542
1543         pl->sfp_bus = bus;
1544
1545         ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1546         sfp_bus_put(bus);
1547
1548         return ret;
1549 }
1550
1551 /**
1552  * phylink_create() - create a phylink instance
1553  * @config: a pointer to the target &struct phylink_config
1554  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1555  *      interface
1556  * @iface: the desired link mode defined by &typedef phy_interface_t
1557  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1558  *
1559  * Create a new phylink instance, and parse the link parameters found in @np.
1560  * This will parse in-band modes, fixed-link or SFP configuration.
1561  *
1562  * Note: the rtnl lock must not be held when calling this function.
1563  *
1564  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1565  * must use IS_ERR() to check for errors from this function.
1566  */
1567 struct phylink *phylink_create(struct phylink_config *config,
1568                                const struct fwnode_handle *fwnode,
1569                                phy_interface_t iface,
1570                                const struct phylink_mac_ops *mac_ops)
1571 {
1572         bool using_mac_select_pcs = false;
1573         struct phylink *pl;
1574         int ret;
1575
1576         /* Validate the supplied configuration */
1577         if (phy_interface_empty(config->supported_interfaces)) {
1578                 dev_err(config->dev,
1579                         "phylink: error: empty supported_interfaces\n");
1580                 return ERR_PTR(-EINVAL);
1581         }
1582
1583         if (mac_ops->mac_select_pcs &&
1584             mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1585               ERR_PTR(-EOPNOTSUPP))
1586                 using_mac_select_pcs = true;
1587
1588         pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1589         if (!pl)
1590                 return ERR_PTR(-ENOMEM);
1591
1592         mutex_init(&pl->state_mutex);
1593         INIT_WORK(&pl->resolve, phylink_resolve);
1594
1595         pl->config = config;
1596         if (config->type == PHYLINK_NETDEV) {
1597                 pl->netdev = to_net_dev(config->dev);
1598         } else if (config->type == PHYLINK_DEV) {
1599                 pl->dev = config->dev;
1600         } else {
1601                 kfree(pl);
1602                 return ERR_PTR(-EINVAL);
1603         }
1604
1605         pl->using_mac_select_pcs = using_mac_select_pcs;
1606         pl->phy_state.interface = iface;
1607         pl->link_interface = iface;
1608         if (iface == PHY_INTERFACE_MODE_MOCA)
1609                 pl->link_port = PORT_BNC;
1610         else
1611                 pl->link_port = PORT_MII;
1612         pl->link_config.interface = iface;
1613         pl->link_config.pause = MLO_PAUSE_AN;
1614         pl->link_config.speed = SPEED_UNKNOWN;
1615         pl->link_config.duplex = DUPLEX_UNKNOWN;
1616         pl->pcs_state = PCS_STATE_DOWN;
1617         pl->mac_ops = mac_ops;
1618         __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1619         timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1620
1621         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1622         linkmode_copy(pl->link_config.advertising, pl->supported);
1623         phylink_validate(pl, pl->supported, &pl->link_config);
1624
1625         ret = phylink_parse_mode(pl, fwnode);
1626         if (ret < 0) {
1627                 kfree(pl);
1628                 return ERR_PTR(ret);
1629         }
1630
1631         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1632                 ret = phylink_parse_fixedlink(pl, fwnode);
1633                 if (ret < 0) {
1634                         kfree(pl);
1635                         return ERR_PTR(ret);
1636                 }
1637         }
1638
1639         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1640
1641         ret = phylink_register_sfp(pl, fwnode);
1642         if (ret < 0) {
1643                 kfree(pl);
1644                 return ERR_PTR(ret);
1645         }
1646
1647         return pl;
1648 }
1649 EXPORT_SYMBOL_GPL(phylink_create);
1650
1651 /**
1652  * phylink_destroy() - cleanup and destroy the phylink instance
1653  * @pl: a pointer to a &struct phylink returned from phylink_create()
1654  *
1655  * Destroy a phylink instance. Any PHY that has been attached must have been
1656  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1657  *
1658  * Note: the rtnl lock must not be held when calling this function.
1659  */
1660 void phylink_destroy(struct phylink *pl)
1661 {
1662         sfp_bus_del_upstream(pl->sfp_bus);
1663         if (pl->link_gpio)
1664                 gpiod_put(pl->link_gpio);
1665
1666         cancel_work_sync(&pl->resolve);
1667         kfree(pl);
1668 }
1669 EXPORT_SYMBOL_GPL(phylink_destroy);
1670
1671 /**
1672  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1673  * @pl: a pointer to a &struct phylink returned from phylink_create()
1674  *
1675  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1676  * no PHY is needed.
1677  *
1678  * Returns true if phylink will be expecting a PHY.
1679  */
1680 bool phylink_expects_phy(struct phylink *pl)
1681 {
1682         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1683             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1684              phy_interface_mode_is_8023z(pl->link_config.interface)))
1685                 return false;
1686         return true;
1687 }
1688 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1689
1690 static void phylink_phy_change(struct phy_device *phydev, bool up)
1691 {
1692         struct phylink *pl = phydev->phylink;
1693         bool tx_pause, rx_pause;
1694
1695         phy_get_pause(phydev, &tx_pause, &rx_pause);
1696
1697         mutex_lock(&pl->state_mutex);
1698         pl->phy_state.speed = phydev->speed;
1699         pl->phy_state.duplex = phydev->duplex;
1700         pl->phy_state.rate_matching = phydev->rate_matching;
1701         pl->phy_state.pause = MLO_PAUSE_NONE;
1702         if (tx_pause)
1703                 pl->phy_state.pause |= MLO_PAUSE_TX;
1704         if (rx_pause)
1705                 pl->phy_state.pause |= MLO_PAUSE_RX;
1706         pl->phy_state.interface = phydev->interface;
1707         pl->phy_state.link = up;
1708         mutex_unlock(&pl->state_mutex);
1709
1710         phylink_run_resolve(pl);
1711
1712         phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1713                     phy_modes(phydev->interface),
1714                     phy_speed_to_str(phydev->speed),
1715                     phy_duplex_to_str(phydev->duplex),
1716                     phy_rate_matching_to_str(phydev->rate_matching),
1717                     phylink_pause_to_str(pl->phy_state.pause));
1718 }
1719
1720 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1721                                phy_interface_t interface)
1722 {
1723         struct phylink_link_state config;
1724         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1725         char *irq_str;
1726         int ret;
1727
1728         /*
1729          * This is the new way of dealing with flow control for PHYs,
1730          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1731          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1732          * using our validate call to the MAC, we rely upon the MAC
1733          * clearing the bits from both supported and advertising fields.
1734          */
1735         phy_support_asym_pause(phy);
1736
1737         memset(&config, 0, sizeof(config));
1738         linkmode_copy(supported, phy->supported);
1739         linkmode_copy(config.advertising, phy->advertising);
1740
1741         /* Check whether we would use rate matching for the proposed interface
1742          * mode.
1743          */
1744         config.rate_matching = phy_get_rate_matching(phy, interface);
1745
1746         /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1747          * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1748          * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1749          * their Serdes is either unnecessary or not reasonable.
1750          *
1751          * For these which switch interface modes, we really need to know which
1752          * interface modes the PHY supports to properly work out which ethtool
1753          * linkmodes can be supported. For now, as a work-around, we validate
1754          * against all interface modes, which may lead to more ethtool link
1755          * modes being advertised than are actually supported.
1756          */
1757         if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1758             interface != PHY_INTERFACE_MODE_RXAUI &&
1759             interface != PHY_INTERFACE_MODE_XAUI &&
1760             interface != PHY_INTERFACE_MODE_USXGMII)
1761                 config.interface = PHY_INTERFACE_MODE_NA;
1762         else
1763                 config.interface = interface;
1764
1765         ret = phylink_validate(pl, supported, &config);
1766         if (ret) {
1767                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1768                              phy_modes(config.interface),
1769                              __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1770                              __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1771                              ERR_PTR(ret));
1772                 return ret;
1773         }
1774
1775         phy->phylink = pl;
1776         phy->phy_link_change = phylink_phy_change;
1777
1778         irq_str = phy_attached_info_irq(phy);
1779         phylink_info(pl,
1780                      "PHY [%s] driver [%s] (irq=%s)\n",
1781                      dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1782         kfree(irq_str);
1783
1784         mutex_lock(&phy->lock);
1785         mutex_lock(&pl->state_mutex);
1786         pl->phydev = phy;
1787         pl->phy_state.interface = interface;
1788         pl->phy_state.pause = MLO_PAUSE_NONE;
1789         pl->phy_state.speed = SPEED_UNKNOWN;
1790         pl->phy_state.duplex = DUPLEX_UNKNOWN;
1791         pl->phy_state.rate_matching = RATE_MATCH_NONE;
1792         linkmode_copy(pl->supported, supported);
1793         linkmode_copy(pl->link_config.advertising, config.advertising);
1794
1795         /* Restrict the phy advertisement according to the MAC support. */
1796         linkmode_copy(phy->advertising, config.advertising);
1797         mutex_unlock(&pl->state_mutex);
1798         mutex_unlock(&phy->lock);
1799
1800         phylink_dbg(pl,
1801                     "phy: %s setting supported %*pb advertising %*pb\n",
1802                     phy_modes(interface),
1803                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1804                     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1805
1806         if (phy_interrupt_is_valid(phy))
1807                 phy_request_interrupt(phy);
1808
1809         if (pl->config->mac_managed_pm)
1810                 phy->mac_managed_pm = true;
1811
1812         return 0;
1813 }
1814
1815 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1816                               phy_interface_t interface)
1817 {
1818         if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1819                     (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1820                      phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1821                 return -EINVAL;
1822
1823         if (pl->phydev)
1824                 return -EBUSY;
1825
1826         return phy_attach_direct(pl->netdev, phy, 0, interface);
1827 }
1828
1829 /**
1830  * phylink_connect_phy() - connect a PHY to the phylink instance
1831  * @pl: a pointer to a &struct phylink returned from phylink_create()
1832  * @phy: a pointer to a &struct phy_device.
1833  *
1834  * Connect @phy to the phylink instance specified by @pl by calling
1835  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1836  * capabilities, start the PHYLIB state machine and enable any interrupts
1837  * that the PHY supports.
1838  *
1839  * This updates the phylink's ethtool supported and advertising link mode
1840  * masks.
1841  *
1842  * Returns 0 on success or a negative errno.
1843  */
1844 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1845 {
1846         int ret;
1847
1848         /* Use PHY device/driver interface */
1849         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1850                 pl->link_interface = phy->interface;
1851                 pl->link_config.interface = pl->link_interface;
1852         }
1853
1854         ret = phylink_attach_phy(pl, phy, pl->link_interface);
1855         if (ret < 0)
1856                 return ret;
1857
1858         ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1859         if (ret)
1860                 phy_detach(phy);
1861
1862         return ret;
1863 }
1864 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1865
1866 /**
1867  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1868  * @pl: a pointer to a &struct phylink returned from phylink_create()
1869  * @dn: a pointer to a &struct device_node.
1870  * @flags: PHY-specific flags to communicate to the PHY device driver
1871  *
1872  * Connect the phy specified in the device node @dn to the phylink instance
1873  * specified by @pl. Actions specified in phylink_connect_phy() will be
1874  * performed.
1875  *
1876  * Returns 0 on success or a negative errno.
1877  */
1878 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1879                            u32 flags)
1880 {
1881         return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1882 }
1883 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1884
1885 /**
1886  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1887  * @pl: a pointer to a &struct phylink returned from phylink_create()
1888  * @fwnode: a pointer to a &struct fwnode_handle.
1889  * @flags: PHY-specific flags to communicate to the PHY device driver
1890  *
1891  * Connect the phy specified @fwnode to the phylink instance specified
1892  * by @pl.
1893  *
1894  * Returns 0 on success or a negative errno.
1895  */
1896 int phylink_fwnode_phy_connect(struct phylink *pl,
1897                                const struct fwnode_handle *fwnode,
1898                                u32 flags)
1899 {
1900         struct fwnode_handle *phy_fwnode;
1901         struct phy_device *phy_dev;
1902         int ret;
1903
1904         /* Fixed links and 802.3z are handled without needing a PHY */
1905         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1906             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1907              phy_interface_mode_is_8023z(pl->link_interface)))
1908                 return 0;
1909
1910         phy_fwnode = fwnode_get_phy_node(fwnode);
1911         if (IS_ERR(phy_fwnode)) {
1912                 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1913                         return -ENODEV;
1914                 return 0;
1915         }
1916
1917         phy_dev = fwnode_phy_find_device(phy_fwnode);
1918         /* We're done with the phy_node handle */
1919         fwnode_handle_put(phy_fwnode);
1920         if (!phy_dev)
1921                 return -ENODEV;
1922
1923         /* Use PHY device/driver interface */
1924         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1925                 pl->link_interface = phy_dev->interface;
1926                 pl->link_config.interface = pl->link_interface;
1927         }
1928
1929         ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1930                                 pl->link_interface);
1931         phy_device_free(phy_dev);
1932         if (ret)
1933                 return ret;
1934
1935         ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1936         if (ret)
1937                 phy_detach(phy_dev);
1938
1939         return ret;
1940 }
1941 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1942
1943 /**
1944  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1945  *   instance.
1946  * @pl: a pointer to a &struct phylink returned from phylink_create()
1947  *
1948  * Disconnect any current PHY from the phylink instance described by @pl.
1949  */
1950 void phylink_disconnect_phy(struct phylink *pl)
1951 {
1952         struct phy_device *phy;
1953
1954         ASSERT_RTNL();
1955
1956         phy = pl->phydev;
1957         if (phy) {
1958                 mutex_lock(&phy->lock);
1959                 mutex_lock(&pl->state_mutex);
1960                 pl->phydev = NULL;
1961                 mutex_unlock(&pl->state_mutex);
1962                 mutex_unlock(&phy->lock);
1963                 flush_work(&pl->resolve);
1964
1965                 phy_disconnect(phy);
1966         }
1967 }
1968 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1969
1970 /**
1971  * phylink_mac_change() - notify phylink of a change in MAC state
1972  * @pl: a pointer to a &struct phylink returned from phylink_create()
1973  * @up: indicates whether the link is currently up.
1974  *
1975  * The MAC driver should call this driver when the state of its link
1976  * changes (eg, link failure, new negotiation results, etc.)
1977  */
1978 void phylink_mac_change(struct phylink *pl, bool up)
1979 {
1980         if (!up)
1981                 pl->mac_link_dropped = true;
1982         phylink_run_resolve(pl);
1983         phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1984 }
1985 EXPORT_SYMBOL_GPL(phylink_mac_change);
1986
1987 static irqreturn_t phylink_link_handler(int irq, void *data)
1988 {
1989         struct phylink *pl = data;
1990
1991         phylink_run_resolve(pl);
1992
1993         return IRQ_HANDLED;
1994 }
1995
1996 /**
1997  * phylink_start() - start a phylink instance
1998  * @pl: a pointer to a &struct phylink returned from phylink_create()
1999  *
2000  * Start the phylink instance specified by @pl, configuring the MAC for the
2001  * desired link mode(s) and negotiation style. This should be called from the
2002  * network device driver's &struct net_device_ops ndo_open() method.
2003  */
2004 void phylink_start(struct phylink *pl)
2005 {
2006         bool poll = false;
2007
2008         ASSERT_RTNL();
2009
2010         phylink_info(pl, "configuring for %s/%s link mode\n",
2011                      phylink_an_mode_str(pl->cur_link_an_mode),
2012                      phy_modes(pl->link_config.interface));
2013
2014         /* Always set the carrier off */
2015         if (pl->netdev)
2016                 netif_carrier_off(pl->netdev);
2017
2018         pl->pcs_state = PCS_STATE_STARTING;
2019
2020         /* Apply the link configuration to the MAC when starting. This allows
2021          * a fixed-link to start with the correct parameters, and also
2022          * ensures that we set the appropriate advertisement for Serdes links.
2023          *
2024          * Restart autonegotiation if using 802.3z to ensure that the link
2025          * parameters are properly negotiated.  This is necessary for DSA
2026          * switches using 802.3z negotiation to ensure they see our modes.
2027          */
2028         phylink_mac_initial_config(pl, true);
2029
2030         pl->pcs_state = PCS_STATE_STARTED;
2031
2032         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2033
2034         if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2035                 int irq = gpiod_to_irq(pl->link_gpio);
2036
2037                 if (irq > 0) {
2038                         if (!request_irq(irq, phylink_link_handler,
2039                                          IRQF_TRIGGER_RISING |
2040                                          IRQF_TRIGGER_FALLING,
2041                                          "netdev link", pl))
2042                                 pl->link_irq = irq;
2043                         else
2044                                 irq = 0;
2045                 }
2046                 if (irq <= 0)
2047                         poll = true;
2048         }
2049
2050         if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2051                 poll |= pl->config->poll_fixed_state;
2052
2053         if (poll)
2054                 mod_timer(&pl->link_poll, jiffies + HZ);
2055         if (pl->phydev)
2056                 phy_start(pl->phydev);
2057         if (pl->sfp_bus)
2058                 sfp_upstream_start(pl->sfp_bus);
2059 }
2060 EXPORT_SYMBOL_GPL(phylink_start);
2061
2062 /**
2063  * phylink_stop() - stop a phylink instance
2064  * @pl: a pointer to a &struct phylink returned from phylink_create()
2065  *
2066  * Stop the phylink instance specified by @pl. This should be called from the
2067  * network device driver's &struct net_device_ops ndo_stop() method.  The
2068  * network device's carrier state should not be changed prior to calling this
2069  * function.
2070  *
2071  * This will synchronously bring down the link if the link is not already
2072  * down (in other words, it will trigger a mac_link_down() method call.)
2073  */
2074 void phylink_stop(struct phylink *pl)
2075 {
2076         ASSERT_RTNL();
2077
2078         if (pl->sfp_bus)
2079                 sfp_upstream_stop(pl->sfp_bus);
2080         if (pl->phydev)
2081                 phy_stop(pl->phydev);
2082         del_timer_sync(&pl->link_poll);
2083         if (pl->link_irq) {
2084                 free_irq(pl->link_irq, pl);
2085                 pl->link_irq = 0;
2086         }
2087
2088         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2089
2090         pl->pcs_state = PCS_STATE_DOWN;
2091
2092         phylink_pcs_disable(pl->pcs);
2093 }
2094 EXPORT_SYMBOL_GPL(phylink_stop);
2095
2096 /**
2097  * phylink_suspend() - handle a network device suspend event
2098  * @pl: a pointer to a &struct phylink returned from phylink_create()
2099  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2100  *
2101  * Handle a network device suspend event. There are several cases:
2102  *
2103  * - If Wake-on-Lan is not active, we can bring down the link between
2104  *   the MAC and PHY by calling phylink_stop().
2105  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2106  *   can also bring down the link between the MAC and PHY.
2107  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2108  *   still needs to receive packets, so we can not bring the link down.
2109  */
2110 void phylink_suspend(struct phylink *pl, bool mac_wol)
2111 {
2112         ASSERT_RTNL();
2113
2114         if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2115                 /* Wake-on-Lan enabled, MAC handling */
2116                 mutex_lock(&pl->state_mutex);
2117
2118                 /* Stop the resolver bringing the link up */
2119                 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2120
2121                 /* Disable the carrier, to prevent transmit timeouts,
2122                  * but one would hope all packets have been sent. This
2123                  * also means phylink_resolve() will do nothing.
2124                  */
2125                 if (pl->netdev)
2126                         netif_carrier_off(pl->netdev);
2127                 else
2128                         pl->old_link_state = false;
2129
2130                 /* We do not call mac_link_down() here as we want the
2131                  * link to remain up to receive the WoL packets.
2132                  */
2133                 mutex_unlock(&pl->state_mutex);
2134         } else {
2135                 phylink_stop(pl);
2136         }
2137 }
2138 EXPORT_SYMBOL_GPL(phylink_suspend);
2139
2140 /**
2141  * phylink_resume() - handle a network device resume event
2142  * @pl: a pointer to a &struct phylink returned from phylink_create()
2143  *
2144  * Undo the effects of phylink_suspend(), returning the link to an
2145  * operational state.
2146  */
2147 void phylink_resume(struct phylink *pl)
2148 {
2149         ASSERT_RTNL();
2150
2151         if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2152                 /* Wake-on-Lan enabled, MAC handling */
2153
2154                 /* Call mac_link_down() so we keep the overall state balanced.
2155                  * Do this under the state_mutex lock for consistency. This
2156                  * will cause a "Link Down" message to be printed during
2157                  * resume, which is harmless - the true link state will be
2158                  * printed when we run a resolve.
2159                  */
2160                 mutex_lock(&pl->state_mutex);
2161                 phylink_link_down(pl);
2162                 mutex_unlock(&pl->state_mutex);
2163
2164                 /* Re-apply the link parameters so that all the settings get
2165                  * restored to the MAC.
2166                  */
2167                 phylink_mac_initial_config(pl, true);
2168
2169                 /* Re-enable and re-resolve the link parameters */
2170                 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2171         } else {
2172                 phylink_start(pl);
2173         }
2174 }
2175 EXPORT_SYMBOL_GPL(phylink_resume);
2176
2177 /**
2178  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2179  * @pl: a pointer to a &struct phylink returned from phylink_create()
2180  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2181  *
2182  * Read the wake on lan parameters from the PHY attached to the phylink
2183  * instance specified by @pl. If no PHY is currently attached, report no
2184  * support for wake on lan.
2185  */
2186 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2187 {
2188         ASSERT_RTNL();
2189
2190         wol->supported = 0;
2191         wol->wolopts = 0;
2192
2193         if (pl->phydev)
2194                 phy_ethtool_get_wol(pl->phydev, wol);
2195 }
2196 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2197
2198 /**
2199  * phylink_ethtool_set_wol() - set wake on lan parameters
2200  * @pl: a pointer to a &struct phylink returned from phylink_create()
2201  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2202  *
2203  * Set the wake on lan parameters for the PHY attached to the phylink
2204  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2205  * error.
2206  *
2207  * Returns zero on success or negative errno code.
2208  */
2209 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2210 {
2211         int ret = -EOPNOTSUPP;
2212
2213         ASSERT_RTNL();
2214
2215         if (pl->phydev)
2216                 ret = phy_ethtool_set_wol(pl->phydev, wol);
2217
2218         return ret;
2219 }
2220 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2221
2222 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2223 {
2224         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2225
2226         linkmode_zero(mask);
2227         phylink_set_port_modes(mask);
2228
2229         linkmode_and(dst, dst, mask);
2230         linkmode_or(dst, dst, b);
2231 }
2232
2233 static void phylink_get_ksettings(const struct phylink_link_state *state,
2234                                   struct ethtool_link_ksettings *kset)
2235 {
2236         phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2237         linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2238         if (kset->base.rate_matching == RATE_MATCH_NONE) {
2239                 kset->base.speed = state->speed;
2240                 kset->base.duplex = state->duplex;
2241         }
2242         kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2243                                                state->advertising) ?
2244                                 AUTONEG_ENABLE : AUTONEG_DISABLE;
2245 }
2246
2247 /**
2248  * phylink_ethtool_ksettings_get() - get the current link settings
2249  * @pl: a pointer to a &struct phylink returned from phylink_create()
2250  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2251  *
2252  * Read the current link settings for the phylink instance specified by @pl.
2253  * This will be the link settings read from the MAC, PHY or fixed link
2254  * settings depending on the current negotiation mode.
2255  */
2256 int phylink_ethtool_ksettings_get(struct phylink *pl,
2257                                   struct ethtool_link_ksettings *kset)
2258 {
2259         struct phylink_link_state link_state;
2260
2261         ASSERT_RTNL();
2262
2263         if (pl->phydev)
2264                 phy_ethtool_ksettings_get(pl->phydev, kset);
2265         else
2266                 kset->base.port = pl->link_port;
2267
2268         linkmode_copy(kset->link_modes.supported, pl->supported);
2269
2270         switch (pl->cur_link_an_mode) {
2271         case MLO_AN_FIXED:
2272                 /* We are using fixed settings. Report these as the
2273                  * current link settings - and note that these also
2274                  * represent the supported speeds/duplex/pause modes.
2275                  */
2276                 phylink_get_fixed_state(pl, &link_state);
2277                 phylink_get_ksettings(&link_state, kset);
2278                 break;
2279
2280         case MLO_AN_INBAND:
2281                 /* If there is a phy attached, then use the reported
2282                  * settings from the phy with no modification.
2283                  */
2284                 if (pl->phydev)
2285                         break;
2286
2287                 phylink_mac_pcs_get_state(pl, &link_state);
2288
2289                 /* The MAC is reporting the link results from its own PCS
2290                  * layer via in-band status. Report these as the current
2291                  * link settings.
2292                  */
2293                 phylink_get_ksettings(&link_state, kset);
2294                 break;
2295         }
2296
2297         return 0;
2298 }
2299 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2300
2301 /**
2302  * phylink_ethtool_ksettings_set() - set the link settings
2303  * @pl: a pointer to a &struct phylink returned from phylink_create()
2304  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2305  */
2306 int phylink_ethtool_ksettings_set(struct phylink *pl,
2307                                   const struct ethtool_link_ksettings *kset)
2308 {
2309         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2310         struct phylink_link_state config;
2311         const struct phy_setting *s;
2312
2313         ASSERT_RTNL();
2314
2315         if (pl->phydev) {
2316                 struct ethtool_link_ksettings phy_kset = *kset;
2317
2318                 linkmode_and(phy_kset.link_modes.advertising,
2319                              phy_kset.link_modes.advertising,
2320                              pl->supported);
2321
2322                 /* We can rely on phylib for this update; we also do not need
2323                  * to update the pl->link_config settings:
2324                  * - the configuration returned via ksettings_get() will come
2325                  *   from phylib whenever a PHY is present.
2326                  * - link_config.interface will be updated by the PHY calling
2327                  *   back via phylink_phy_change() and a subsequent resolve.
2328                  * - initial link configuration for PHY mode comes from the
2329                  *   last phy state updated via phylink_phy_change().
2330                  * - other configuration changes (e.g. pause modes) are
2331                  *   performed directly via phylib.
2332                  * - if in in-band mode with a PHY, the link configuration
2333                  *   is passed on the link from the PHY, and all of
2334                  *   link_config.{speed,duplex,an_enabled,pause} are not used.
2335                  * - the only possible use would be link_config.advertising
2336                  *   pause modes when in 1000base-X mode with a PHY, but in
2337                  *   the presence of a PHY, this should not be changed as that
2338                  *   should be determined from the media side advertisement.
2339                  */
2340                 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2341         }
2342
2343         config = pl->link_config;
2344         /* Mask out unsupported advertisements */
2345         linkmode_and(config.advertising, kset->link_modes.advertising,
2346                      pl->supported);
2347
2348         /* FIXME: should we reject autoneg if phy/mac does not support it? */
2349         switch (kset->base.autoneg) {
2350         case AUTONEG_DISABLE:
2351                 /* Autonegotiation disabled, select a suitable speed and
2352                  * duplex.
2353                  */
2354                 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2355                                        pl->supported, false);
2356                 if (!s)
2357                         return -EINVAL;
2358
2359                 /* If we have a fixed link, refuse to change link parameters.
2360                  * If the link parameters match, accept them but do nothing.
2361                  */
2362                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2363                         if (s->speed != pl->link_config.speed ||
2364                             s->duplex != pl->link_config.duplex)
2365                                 return -EINVAL;
2366                         return 0;
2367                 }
2368
2369                 config.speed = s->speed;
2370                 config.duplex = s->duplex;
2371                 break;
2372
2373         case AUTONEG_ENABLE:
2374                 /* If we have a fixed link, allow autonegotiation (since that
2375                  * is our default case) but do not allow the advertisement to
2376                  * be changed. If the advertisement matches, simply return.
2377                  */
2378                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2379                         if (!linkmode_equal(config.advertising,
2380                                             pl->link_config.advertising))
2381                                 return -EINVAL;
2382                         return 0;
2383                 }
2384
2385                 config.speed = SPEED_UNKNOWN;
2386                 config.duplex = DUPLEX_UNKNOWN;
2387                 break;
2388
2389         default:
2390                 return -EINVAL;
2391         }
2392
2393         /* We have ruled out the case with a PHY attached, and the
2394          * fixed-link cases.  All that is left are in-band links.
2395          */
2396         linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2397                          kset->base.autoneg == AUTONEG_ENABLE);
2398
2399         /* If this link is with an SFP, ensure that changes to advertised modes
2400          * also cause the associated interface to be selected such that the
2401          * link can be configured correctly.
2402          */
2403         if (pl->sfp_bus) {
2404                 config.interface = sfp_select_interface(pl->sfp_bus,
2405                                                         config.advertising);
2406                 if (config.interface == PHY_INTERFACE_MODE_NA) {
2407                         phylink_err(pl,
2408                                     "selection of interface failed, advertisement %*pb\n",
2409                                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2410                                     config.advertising);
2411                         return -EINVAL;
2412                 }
2413
2414                 /* Revalidate with the selected interface */
2415                 linkmode_copy(support, pl->supported);
2416                 if (phylink_validate(pl, support, &config)) {
2417                         phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2418                                     phylink_an_mode_str(pl->cur_link_an_mode),
2419                                     phy_modes(config.interface),
2420                                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2421                         return -EINVAL;
2422                 }
2423         } else {
2424                 /* Validate without changing the current supported mask. */
2425                 linkmode_copy(support, pl->supported);
2426                 if (phylink_validate(pl, support, &config))
2427                         return -EINVAL;
2428         }
2429
2430         /* If autonegotiation is enabled, we must have an advertisement */
2431         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2432                               config.advertising) &&
2433             phylink_is_empty_linkmode(config.advertising))
2434                 return -EINVAL;
2435
2436         mutex_lock(&pl->state_mutex);
2437         pl->link_config.speed = config.speed;
2438         pl->link_config.duplex = config.duplex;
2439
2440         if (pl->link_config.interface != config.interface) {
2441                 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2442                 /* We need to force the link down, then change the interface */
2443                 if (pl->old_link_state) {
2444                         phylink_link_down(pl);
2445                         pl->old_link_state = false;
2446                 }
2447                 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2448                               &pl->phylink_disable_state))
2449                         phylink_major_config(pl, false, &config);
2450                 pl->link_config.interface = config.interface;
2451                 linkmode_copy(pl->link_config.advertising, config.advertising);
2452         } else if (!linkmode_equal(pl->link_config.advertising,
2453                                    config.advertising)) {
2454                 linkmode_copy(pl->link_config.advertising, config.advertising);
2455                 phylink_change_inband_advert(pl);
2456         }
2457         mutex_unlock(&pl->state_mutex);
2458
2459         return 0;
2460 }
2461 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2462
2463 /**
2464  * phylink_ethtool_nway_reset() - restart negotiation
2465  * @pl: a pointer to a &struct phylink returned from phylink_create()
2466  *
2467  * Restart negotiation for the phylink instance specified by @pl. This will
2468  * cause any attached phy to restart negotiation with the link partner, and
2469  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2470  * negotiation.
2471  *
2472  * Returns zero on success, or negative error code.
2473  */
2474 int phylink_ethtool_nway_reset(struct phylink *pl)
2475 {
2476         int ret = 0;
2477
2478         ASSERT_RTNL();
2479
2480         if (pl->phydev)
2481                 ret = phy_restart_aneg(pl->phydev);
2482         phylink_mac_pcs_an_restart(pl);
2483
2484         return ret;
2485 }
2486 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2487
2488 /**
2489  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2490  * @pl: a pointer to a &struct phylink returned from phylink_create()
2491  * @pause: a pointer to a &struct ethtool_pauseparam
2492  */
2493 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2494                                     struct ethtool_pauseparam *pause)
2495 {
2496         ASSERT_RTNL();
2497
2498         pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2499         pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2500         pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2501 }
2502 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2503
2504 /**
2505  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2506  * @pl: a pointer to a &struct phylink returned from phylink_create()
2507  * @pause: a pointer to a &struct ethtool_pauseparam
2508  */
2509 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2510                                    struct ethtool_pauseparam *pause)
2511 {
2512         struct phylink_link_state *config = &pl->link_config;
2513         bool manual_changed;
2514         int pause_state;
2515
2516         ASSERT_RTNL();
2517
2518         if (pl->cur_link_an_mode == MLO_AN_FIXED)
2519                 return -EOPNOTSUPP;
2520
2521         if (!phylink_test(pl->supported, Pause) &&
2522             !phylink_test(pl->supported, Asym_Pause))
2523                 return -EOPNOTSUPP;
2524
2525         if (!phylink_test(pl->supported, Asym_Pause) &&
2526             pause->rx_pause != pause->tx_pause)
2527                 return -EINVAL;
2528
2529         pause_state = 0;
2530         if (pause->autoneg)
2531                 pause_state |= MLO_PAUSE_AN;
2532         if (pause->rx_pause)
2533                 pause_state |= MLO_PAUSE_RX;
2534         if (pause->tx_pause)
2535                 pause_state |= MLO_PAUSE_TX;
2536
2537         mutex_lock(&pl->state_mutex);
2538         /*
2539          * See the comments for linkmode_set_pause(), wrt the deficiencies
2540          * with the current implementation.  A solution to this issue would
2541          * be:
2542          * ethtool  Local device
2543          *  rx  tx  Pause AsymDir
2544          *  0   0   0     0
2545          *  1   0   1     1
2546          *  0   1   0     1
2547          *  1   1   1     1
2548          * and then use the ethtool rx/tx enablement status to mask the
2549          * rx/tx pause resolution.
2550          */
2551         linkmode_set_pause(config->advertising, pause->tx_pause,
2552                            pause->rx_pause);
2553
2554         manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2555                          (!(pause_state & MLO_PAUSE_AN) &&
2556                            (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2557
2558         config->pause = pause_state;
2559
2560         /* Update our in-band advertisement, triggering a renegotiation if
2561          * the advertisement changed.
2562          */
2563         if (!pl->phydev)
2564                 phylink_change_inband_advert(pl);
2565
2566         mutex_unlock(&pl->state_mutex);
2567
2568         /* If we have a PHY, a change of the pause frame advertisement will
2569          * cause phylib to renegotiate (if AN is enabled) which will in turn
2570          * call our phylink_phy_change() and trigger a resolve.  Note that
2571          * we can't hold our state mutex while calling phy_set_asym_pause().
2572          */
2573         if (pl->phydev)
2574                 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2575                                    pause->tx_pause);
2576
2577         /* If the manual pause settings changed, make sure we trigger a
2578          * resolve to update their state; we can not guarantee that the
2579          * link will cycle.
2580          */
2581         if (manual_changed) {
2582                 pl->mac_link_dropped = true;
2583                 phylink_run_resolve(pl);
2584         }
2585
2586         return 0;
2587 }
2588 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2589
2590 /**
2591  * phylink_get_eee_err() - read the energy efficient ethernet error
2592  *   counter
2593  * @pl: a pointer to a &struct phylink returned from phylink_create().
2594  *
2595  * Read the Energy Efficient Ethernet error counter from the PHY associated
2596  * with the phylink instance specified by @pl.
2597  *
2598  * Returns positive error counter value, or negative error code.
2599  */
2600 int phylink_get_eee_err(struct phylink *pl)
2601 {
2602         int ret = 0;
2603
2604         ASSERT_RTNL();
2605
2606         if (pl->phydev)
2607                 ret = phy_get_eee_err(pl->phydev);
2608
2609         return ret;
2610 }
2611 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2612
2613 /**
2614  * phylink_init_eee() - init and check the EEE features
2615  * @pl: a pointer to a &struct phylink returned from phylink_create()
2616  * @clk_stop_enable: allow PHY to stop receive clock
2617  *
2618  * Must be called either with RTNL held or within mac_link_up()
2619  */
2620 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2621 {
2622         int ret = -EOPNOTSUPP;
2623
2624         if (pl->phydev)
2625                 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2626
2627         return ret;
2628 }
2629 EXPORT_SYMBOL_GPL(phylink_init_eee);
2630
2631 /**
2632  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2633  * @pl: a pointer to a &struct phylink returned from phylink_create()
2634  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2635  */
2636 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2637 {
2638         int ret = -EOPNOTSUPP;
2639
2640         ASSERT_RTNL();
2641
2642         if (pl->phydev)
2643                 ret = phy_ethtool_get_eee(pl->phydev, eee);
2644
2645         return ret;
2646 }
2647 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2648
2649 /**
2650  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2651  * @pl: a pointer to a &struct phylink returned from phylink_create()
2652  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2653  */
2654 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2655 {
2656         int ret = -EOPNOTSUPP;
2657
2658         ASSERT_RTNL();
2659
2660         if (pl->phydev)
2661                 ret = phy_ethtool_set_eee(pl->phydev, eee);
2662
2663         return ret;
2664 }
2665 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2666
2667 /* This emulates MII registers for a fixed-mode phy operating as per the
2668  * passed in state. "aneg" defines if we report negotiation is possible.
2669  *
2670  * FIXME: should deal with negotiation state too.
2671  */
2672 static int phylink_mii_emul_read(unsigned int reg,
2673                                  struct phylink_link_state *state)
2674 {
2675         struct fixed_phy_status fs;
2676         unsigned long *lpa = state->lp_advertising;
2677         int val;
2678
2679         fs.link = state->link;
2680         fs.speed = state->speed;
2681         fs.duplex = state->duplex;
2682         fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2683         fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2684
2685         val = swphy_read_reg(reg, &fs);
2686         if (reg == MII_BMSR) {
2687                 if (!state->an_complete)
2688                         val &= ~BMSR_ANEGCOMPLETE;
2689         }
2690         return val;
2691 }
2692
2693 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2694                             unsigned int reg)
2695 {
2696         struct phy_device *phydev = pl->phydev;
2697         int prtad, devad;
2698
2699         if (mdio_phy_id_is_c45(phy_id)) {
2700                 prtad = mdio_phy_id_prtad(phy_id);
2701                 devad = mdio_phy_id_devad(phy_id);
2702                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2703                                         reg);
2704         }
2705
2706         if (phydev->is_c45) {
2707                 switch (reg) {
2708                 case MII_BMCR:
2709                 case MII_BMSR:
2710                 case MII_PHYSID1:
2711                 case MII_PHYSID2:
2712                         devad = __ffs(phydev->c45_ids.mmds_present);
2713                         break;
2714                 case MII_ADVERTISE:
2715                 case MII_LPA:
2716                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2717                                 return -EINVAL;
2718                         devad = MDIO_MMD_AN;
2719                         if (reg == MII_ADVERTISE)
2720                                 reg = MDIO_AN_ADVERTISE;
2721                         else
2722                                 reg = MDIO_AN_LPA;
2723                         break;
2724                 default:
2725                         return -EINVAL;
2726                 }
2727                 prtad = phy_id;
2728                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2729                                         reg);
2730         }
2731
2732         return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2733 }
2734
2735 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2736                              unsigned int reg, unsigned int val)
2737 {
2738         struct phy_device *phydev = pl->phydev;
2739         int prtad, devad;
2740
2741         if (mdio_phy_id_is_c45(phy_id)) {
2742                 prtad = mdio_phy_id_prtad(phy_id);
2743                 devad = mdio_phy_id_devad(phy_id);
2744                 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2745                                          reg, val);
2746         }
2747
2748         if (phydev->is_c45) {
2749                 switch (reg) {
2750                 case MII_BMCR:
2751                 case MII_BMSR:
2752                 case MII_PHYSID1:
2753                 case MII_PHYSID2:
2754                         devad = __ffs(phydev->c45_ids.mmds_present);
2755                         break;
2756                 case MII_ADVERTISE:
2757                 case MII_LPA:
2758                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2759                                 return -EINVAL;
2760                         devad = MDIO_MMD_AN;
2761                         if (reg == MII_ADVERTISE)
2762                                 reg = MDIO_AN_ADVERTISE;
2763                         else
2764                                 reg = MDIO_AN_LPA;
2765                         break;
2766                 default:
2767                         return -EINVAL;
2768                 }
2769                 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2770                                          reg, val);
2771         }
2772
2773         return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2774 }
2775
2776 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2777                             unsigned int reg)
2778 {
2779         struct phylink_link_state state;
2780         int val = 0xffff;
2781
2782         switch (pl->cur_link_an_mode) {
2783         case MLO_AN_FIXED:
2784                 if (phy_id == 0) {
2785                         phylink_get_fixed_state(pl, &state);
2786                         val = phylink_mii_emul_read(reg, &state);
2787                 }
2788                 break;
2789
2790         case MLO_AN_PHY:
2791                 return -EOPNOTSUPP;
2792
2793         case MLO_AN_INBAND:
2794                 if (phy_id == 0) {
2795                         phylink_mac_pcs_get_state(pl, &state);
2796                         val = phylink_mii_emul_read(reg, &state);
2797                 }
2798                 break;
2799         }
2800
2801         return val & 0xffff;
2802 }
2803
2804 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2805                              unsigned int reg, unsigned int val)
2806 {
2807         switch (pl->cur_link_an_mode) {
2808         case MLO_AN_FIXED:
2809                 break;
2810
2811         case MLO_AN_PHY:
2812                 return -EOPNOTSUPP;
2813
2814         case MLO_AN_INBAND:
2815                 break;
2816         }
2817
2818         return 0;
2819 }
2820
2821 /**
2822  * phylink_mii_ioctl() - generic mii ioctl interface
2823  * @pl: a pointer to a &struct phylink returned from phylink_create()
2824  * @ifr: a pointer to a &struct ifreq for socket ioctls
2825  * @cmd: ioctl cmd to execute
2826  *
2827  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2828  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2829  *
2830  * Returns: zero on success or negative error code.
2831  *
2832  * %SIOCGMIIPHY:
2833  *  read register from the current PHY.
2834  * %SIOCGMIIREG:
2835  *  read register from the specified PHY.
2836  * %SIOCSMIIREG:
2837  *  set a register on the specified PHY.
2838  */
2839 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2840 {
2841         struct mii_ioctl_data *mii = if_mii(ifr);
2842         int  ret;
2843
2844         ASSERT_RTNL();
2845
2846         if (pl->phydev) {
2847                 /* PHYs only exist for MLO_AN_PHY and SGMII */
2848                 switch (cmd) {
2849                 case SIOCGMIIPHY:
2850                         mii->phy_id = pl->phydev->mdio.addr;
2851                         fallthrough;
2852
2853                 case SIOCGMIIREG:
2854                         ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2855                         if (ret >= 0) {
2856                                 mii->val_out = ret;
2857                                 ret = 0;
2858                         }
2859                         break;
2860
2861                 case SIOCSMIIREG:
2862                         ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2863                                                 mii->val_in);
2864                         break;
2865
2866                 default:
2867                         ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2868                         break;
2869                 }
2870         } else {
2871                 switch (cmd) {
2872                 case SIOCGMIIPHY:
2873                         mii->phy_id = 0;
2874                         fallthrough;
2875
2876                 case SIOCGMIIREG:
2877                         ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2878                         if (ret >= 0) {
2879                                 mii->val_out = ret;
2880                                 ret = 0;
2881                         }
2882                         break;
2883
2884                 case SIOCSMIIREG:
2885                         ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2886                                                 mii->val_in);
2887                         break;
2888
2889                 default:
2890                         ret = -EOPNOTSUPP;
2891                         break;
2892                 }
2893         }
2894
2895         return ret;
2896 }
2897 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2898
2899 /**
2900  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2901  *   link partners
2902  * @pl: a pointer to a &struct phylink returned from phylink_create()
2903  * @sync: perform action synchronously
2904  *
2905  * If we have a PHY that is not part of a SFP module, then set the speed
2906  * as described in the phy_speed_down() function. Please see this function
2907  * for a description of the @sync parameter.
2908  *
2909  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2910  */
2911 int phylink_speed_down(struct phylink *pl, bool sync)
2912 {
2913         int ret = 0;
2914
2915         ASSERT_RTNL();
2916
2917         if (!pl->sfp_bus && pl->phydev)
2918                 ret = phy_speed_down(pl->phydev, sync);
2919
2920         return ret;
2921 }
2922 EXPORT_SYMBOL_GPL(phylink_speed_down);
2923
2924 /**
2925  * phylink_speed_up() - restore the advertised speeds prior to the call to
2926  *   phylink_speed_down()
2927  * @pl: a pointer to a &struct phylink returned from phylink_create()
2928  *
2929  * If we have a PHY that is not part of a SFP module, then restore the
2930  * PHY speeds as per phy_speed_up().
2931  *
2932  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2933  */
2934 int phylink_speed_up(struct phylink *pl)
2935 {
2936         int ret = 0;
2937
2938         ASSERT_RTNL();
2939
2940         if (!pl->sfp_bus && pl->phydev)
2941                 ret = phy_speed_up(pl->phydev);
2942
2943         return ret;
2944 }
2945 EXPORT_SYMBOL_GPL(phylink_speed_up);
2946
2947 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2948 {
2949         struct phylink *pl = upstream;
2950
2951         pl->netdev->sfp_bus = bus;
2952 }
2953
2954 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2955 {
2956         struct phylink *pl = upstream;
2957
2958         pl->netdev->sfp_bus = NULL;
2959 }
2960
2961 static const phy_interface_t phylink_sfp_interface_preference[] = {
2962         PHY_INTERFACE_MODE_25GBASER,
2963         PHY_INTERFACE_MODE_USXGMII,
2964         PHY_INTERFACE_MODE_10GBASER,
2965         PHY_INTERFACE_MODE_5GBASER,
2966         PHY_INTERFACE_MODE_2500BASEX,
2967         PHY_INTERFACE_MODE_SGMII,
2968         PHY_INTERFACE_MODE_1000BASEX,
2969         PHY_INTERFACE_MODE_100BASEX,
2970 };
2971
2972 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2973
2974 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2975                                                     const unsigned long *intf)
2976 {
2977         phy_interface_t interface;
2978         size_t i;
2979
2980         interface = PHY_INTERFACE_MODE_NA;
2981         for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2982                 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2983                         interface = phylink_sfp_interface_preference[i];
2984                         break;
2985                 }
2986
2987         return interface;
2988 }
2989
2990 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2991                                    unsigned long *supported,
2992                                    struct phylink_link_state *state)
2993 {
2994         bool changed = false;
2995
2996         phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2997                     phylink_an_mode_str(mode), phy_modes(state->interface),
2998                     __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2999
3000         if (!linkmode_equal(pl->supported, supported)) {
3001                 linkmode_copy(pl->supported, supported);
3002                 changed = true;
3003         }
3004
3005         if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3006                 linkmode_copy(pl->link_config.advertising, state->advertising);
3007                 changed = true;
3008         }
3009
3010         if (pl->cur_link_an_mode != mode ||
3011             pl->link_config.interface != state->interface) {
3012                 pl->cur_link_an_mode = mode;
3013                 pl->link_config.interface = state->interface;
3014
3015                 changed = true;
3016
3017                 phylink_info(pl, "switched to %s/%s link mode\n",
3018                              phylink_an_mode_str(mode),
3019                              phy_modes(state->interface));
3020         }
3021
3022         if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3023                                  &pl->phylink_disable_state))
3024                 phylink_mac_initial_config(pl, false);
3025 }
3026
3027 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3028                                   struct phy_device *phy)
3029 {
3030         __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3031         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3032         struct phylink_link_state config;
3033         phy_interface_t iface;
3034         int ret;
3035
3036         linkmode_copy(support, phy->supported);
3037
3038         memset(&config, 0, sizeof(config));
3039         linkmode_copy(config.advertising, phy->advertising);
3040         config.interface = PHY_INTERFACE_MODE_NA;
3041         config.speed = SPEED_UNKNOWN;
3042         config.duplex = DUPLEX_UNKNOWN;
3043         config.pause = MLO_PAUSE_AN;
3044
3045         /* Ignore errors if we're expecting a PHY to attach later */
3046         ret = phylink_validate(pl, support, &config);
3047         if (ret) {
3048                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3049                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3050                             ERR_PTR(ret));
3051                 return ret;
3052         }
3053
3054         iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3055         if (iface == PHY_INTERFACE_MODE_NA) {
3056                 phylink_err(pl,
3057                             "selection of interface failed, advertisement %*pb\n",
3058                             __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3059                 return -EINVAL;
3060         }
3061
3062         config.interface = iface;
3063         linkmode_copy(support1, support);
3064         ret = phylink_validate(pl, support1, &config);
3065         if (ret) {
3066                 phylink_err(pl,
3067                             "validation of %s/%s with support %*pb failed: %pe\n",
3068                             phylink_an_mode_str(mode),
3069                             phy_modes(config.interface),
3070                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3071                             ERR_PTR(ret));
3072                 return ret;
3073         }
3074
3075         pl->link_port = pl->sfp_port;
3076
3077         phylink_sfp_set_config(pl, mode, support, &config);
3078
3079         return 0;
3080 }
3081
3082 static int phylink_sfp_config_optical(struct phylink *pl)
3083 {
3084         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3085         DECLARE_PHY_INTERFACE_MASK(interfaces);
3086         struct phylink_link_state config;
3087         phy_interface_t interface;
3088         int ret;
3089
3090         phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3091                     (int)PHY_INTERFACE_MODE_MAX,
3092                     pl->config->supported_interfaces,
3093                     (int)PHY_INTERFACE_MODE_MAX,
3094                     pl->sfp_interfaces);
3095
3096         /* Find the union of the supported interfaces by the PCS/MAC and
3097          * the SFP module.
3098          */
3099         phy_interface_and(interfaces, pl->config->supported_interfaces,
3100                           pl->sfp_interfaces);
3101         if (phy_interface_empty(interfaces)) {
3102                 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3103                 return -EINVAL;
3104         }
3105
3106         memset(&config, 0, sizeof(config));
3107         linkmode_copy(support, pl->sfp_support);
3108         linkmode_copy(config.advertising, pl->sfp_support);
3109         config.speed = SPEED_UNKNOWN;
3110         config.duplex = DUPLEX_UNKNOWN;
3111         config.pause = MLO_PAUSE_AN;
3112
3113         /* For all the interfaces that are supported, reduce the sfp_support
3114          * mask to only those link modes that can be supported.
3115          */
3116         ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3117         if (ret) {
3118                 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3119                             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3120                 return ret;
3121         }
3122
3123         interface = phylink_choose_sfp_interface(pl, interfaces);
3124         if (interface == PHY_INTERFACE_MODE_NA) {
3125                 phylink_err(pl, "failed to select SFP interface\n");
3126                 return -EINVAL;
3127         }
3128
3129         phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3130                     phy_modes(interface));
3131
3132         config.interface = interface;
3133
3134         /* Ignore errors if we're expecting a PHY to attach later */
3135         ret = phylink_validate(pl, support, &config);
3136         if (ret) {
3137                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3138                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3139                             ERR_PTR(ret));
3140                 return ret;
3141         }
3142
3143         pl->link_port = pl->sfp_port;
3144
3145         phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3146
3147         return 0;
3148 }
3149
3150 static int phylink_sfp_module_insert(void *upstream,
3151                                      const struct sfp_eeprom_id *id)
3152 {
3153         struct phylink *pl = upstream;
3154
3155         ASSERT_RTNL();
3156
3157         linkmode_zero(pl->sfp_support);
3158         phy_interface_zero(pl->sfp_interfaces);
3159         sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3160         pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3161
3162         /* If this module may have a PHY connecting later, defer until later */
3163         pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3164         if (pl->sfp_may_have_phy)
3165                 return 0;
3166
3167         return phylink_sfp_config_optical(pl);
3168 }
3169
3170 static int phylink_sfp_module_start(void *upstream)
3171 {
3172         struct phylink *pl = upstream;
3173
3174         /* If this SFP module has a PHY, start the PHY now. */
3175         if (pl->phydev) {
3176                 phy_start(pl->phydev);
3177                 return 0;
3178         }
3179
3180         /* If the module may have a PHY but we didn't detect one we
3181          * need to configure the MAC here.
3182          */
3183         if (!pl->sfp_may_have_phy)
3184                 return 0;
3185
3186         return phylink_sfp_config_optical(pl);
3187 }
3188
3189 static void phylink_sfp_module_stop(void *upstream)
3190 {
3191         struct phylink *pl = upstream;
3192
3193         /* If this SFP module has a PHY, stop it. */
3194         if (pl->phydev)
3195                 phy_stop(pl->phydev);
3196 }
3197
3198 static void phylink_sfp_link_down(void *upstream)
3199 {
3200         struct phylink *pl = upstream;
3201
3202         ASSERT_RTNL();
3203
3204         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3205 }
3206
3207 static void phylink_sfp_link_up(void *upstream)
3208 {
3209         struct phylink *pl = upstream;
3210
3211         ASSERT_RTNL();
3212
3213         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3214 }
3215
3216 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3217  * or 802.3z control word, so inband will not work.
3218  */
3219 static bool phylink_phy_no_inband(struct phy_device *phy)
3220 {
3221         return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3222                                              0xae025150, 0xfffffff0);
3223 }
3224
3225 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3226 {
3227         struct phylink *pl = upstream;
3228         phy_interface_t interface;
3229         u8 mode;
3230         int ret;
3231
3232         /*
3233          * This is the new way of dealing with flow control for PHYs,
3234          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3235          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3236          * using our validate call to the MAC, we rely upon the MAC
3237          * clearing the bits from both supported and advertising fields.
3238          */
3239         phy_support_asym_pause(phy);
3240
3241         if (phylink_phy_no_inband(phy))
3242                 mode = MLO_AN_PHY;
3243         else
3244                 mode = MLO_AN_INBAND;
3245
3246         /* Set the PHY's host supported interfaces */
3247         phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3248                           pl->config->supported_interfaces);
3249
3250         /* Do the initial configuration */
3251         ret = phylink_sfp_config_phy(pl, mode, phy);
3252         if (ret < 0)
3253                 return ret;
3254
3255         interface = pl->link_config.interface;
3256         ret = phylink_attach_phy(pl, phy, interface);
3257         if (ret < 0)
3258                 return ret;
3259
3260         ret = phylink_bringup_phy(pl, phy, interface);
3261         if (ret)
3262                 phy_detach(phy);
3263
3264         return ret;
3265 }
3266
3267 static void phylink_sfp_disconnect_phy(void *upstream)
3268 {
3269         phylink_disconnect_phy(upstream);
3270 }
3271
3272 static const struct sfp_upstream_ops sfp_phylink_ops = {
3273         .attach = phylink_sfp_attach,
3274         .detach = phylink_sfp_detach,
3275         .module_insert = phylink_sfp_module_insert,
3276         .module_start = phylink_sfp_module_start,
3277         .module_stop = phylink_sfp_module_stop,
3278         .link_up = phylink_sfp_link_up,
3279         .link_down = phylink_sfp_link_down,
3280         .connect_phy = phylink_sfp_connect_phy,
3281         .disconnect_phy = phylink_sfp_disconnect_phy,
3282 };
3283
3284 /* Helpers for MAC drivers */
3285
3286 static struct {
3287         int bit;
3288         int speed;
3289 } phylink_c73_priority_resolution[] = {
3290         { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3291         { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3292         /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3293         { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3294         { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3295         { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3296         { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3297         /* 5GBASE-KR not supported */
3298         { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3299         { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3300 };
3301
3302 void phylink_resolve_c73(struct phylink_link_state *state)
3303 {
3304         int i;
3305
3306         for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3307                 int bit = phylink_c73_priority_resolution[i].bit;
3308                 if (linkmode_test_bit(bit, state->advertising) &&
3309                     linkmode_test_bit(bit, state->lp_advertising))
3310                         break;
3311         }
3312
3313         if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3314                 state->speed = phylink_c73_priority_resolution[i].speed;
3315                 state->duplex = DUPLEX_FULL;
3316         } else {
3317                 /* negotiation failure */
3318                 state->link = false;
3319         }
3320
3321         phylink_resolve_an_pause(state);
3322 }
3323 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3324
3325 static void phylink_decode_c37_word(struct phylink_link_state *state,
3326                                     uint16_t config_reg, int speed)
3327 {
3328         int fd_bit;
3329
3330         if (speed == SPEED_2500)
3331                 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3332         else
3333                 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3334
3335         mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3336
3337         if (linkmode_test_bit(fd_bit, state->advertising) &&
3338             linkmode_test_bit(fd_bit, state->lp_advertising)) {
3339                 state->speed = speed;
3340                 state->duplex = DUPLEX_FULL;
3341         } else {
3342                 /* negotiation failure */
3343                 state->link = false;
3344         }
3345
3346         phylink_resolve_an_pause(state);
3347 }
3348
3349 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3350                                       uint16_t config_reg)
3351 {
3352         if (!(config_reg & LPA_SGMII_LINK)) {
3353                 state->link = false;
3354                 return;
3355         }
3356
3357         switch (config_reg & LPA_SGMII_SPD_MASK) {
3358         case LPA_SGMII_10:
3359                 state->speed = SPEED_10;
3360                 break;
3361         case LPA_SGMII_100:
3362                 state->speed = SPEED_100;
3363                 break;
3364         case LPA_SGMII_1000:
3365                 state->speed = SPEED_1000;
3366                 break;
3367         default:
3368                 state->link = false;
3369                 return;
3370         }
3371         if (config_reg & LPA_SGMII_FULL_DUPLEX)
3372                 state->duplex = DUPLEX_FULL;
3373         else
3374                 state->duplex = DUPLEX_HALF;
3375 }
3376
3377 /**
3378  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3379  * @state: a pointer to a struct phylink_link_state.
3380  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3381  *
3382  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3383  * code word.  Decode the USXGMII code word and populate the corresponding fields
3384  * (speed, duplex) into the phylink_link_state structure.
3385  */
3386 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3387                                  uint16_t lpa)
3388 {
3389         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3390         case MDIO_USXGMII_10:
3391                 state->speed = SPEED_10;
3392                 break;
3393         case MDIO_USXGMII_100:
3394                 state->speed = SPEED_100;
3395                 break;
3396         case MDIO_USXGMII_1000:
3397                 state->speed = SPEED_1000;
3398                 break;
3399         case MDIO_USXGMII_2500:
3400                 state->speed = SPEED_2500;
3401                 break;
3402         case MDIO_USXGMII_5000:
3403                 state->speed = SPEED_5000;
3404                 break;
3405         case MDIO_USXGMII_10G:
3406                 state->speed = SPEED_10000;
3407                 break;
3408         default:
3409                 state->link = false;
3410                 return;
3411         }
3412
3413         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3414                 state->duplex = DUPLEX_FULL;
3415         else
3416                 state->duplex = DUPLEX_HALF;
3417 }
3418 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3419
3420 /**
3421  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3422  * @state: a pointer to a struct phylink_link_state.
3423  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3424  *
3425  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3426  * code word.  Decode the USGMII code word and populate the corresponding fields
3427  * (speed, duplex) into the phylink_link_state structure. The structure for this
3428  * word is the same as the USXGMII word, except it only supports speeds up to
3429  * 1Gbps.
3430  */
3431 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3432                                        uint16_t lpa)
3433 {
3434         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3435         case MDIO_USXGMII_10:
3436                 state->speed = SPEED_10;
3437                 break;
3438         case MDIO_USXGMII_100:
3439                 state->speed = SPEED_100;
3440                 break;
3441         case MDIO_USXGMII_1000:
3442                 state->speed = SPEED_1000;
3443                 break;
3444         default:
3445                 state->link = false;
3446                 return;
3447         }
3448
3449         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3450                 state->duplex = DUPLEX_FULL;
3451         else
3452                 state->duplex = DUPLEX_HALF;
3453 }
3454
3455 /**
3456  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3457  * @state: a pointer to a &struct phylink_link_state.
3458  * @bmsr: The value of the %MII_BMSR register
3459  * @lpa: The value of the %MII_LPA register
3460  *
3461  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3462  * clause 37 negotiation and/or SGMII control.
3463  *
3464  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3465  * the phylink @state structure. This is suitable to be used for implementing
3466  * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3467  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3468  */
3469 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3470                                       u16 bmsr, u16 lpa)
3471 {
3472         state->link = !!(bmsr & BMSR_LSTATUS);
3473         state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3474         /* If there is no link or autonegotiation is disabled, the LP advertisement
3475          * data is not meaningful, so don't go any further.
3476          */
3477         if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3478                                                state->advertising))
3479                 return;
3480
3481         switch (state->interface) {
3482         case PHY_INTERFACE_MODE_1000BASEX:
3483                 phylink_decode_c37_word(state, lpa, SPEED_1000);
3484                 break;
3485
3486         case PHY_INTERFACE_MODE_2500BASEX:
3487                 phylink_decode_c37_word(state, lpa, SPEED_2500);
3488                 break;
3489
3490         case PHY_INTERFACE_MODE_SGMII:
3491         case PHY_INTERFACE_MODE_QSGMII:
3492                 phylink_decode_sgmii_word(state, lpa);
3493                 break;
3494         case PHY_INTERFACE_MODE_QUSGMII:
3495                 phylink_decode_usgmii_word(state, lpa);
3496                 break;
3497
3498         default:
3499                 state->link = false;
3500                 break;
3501         }
3502 }
3503 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3504
3505 /**
3506  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3507  * @pcs: a pointer to a &struct mdio_device.
3508  * @state: a pointer to a &struct phylink_link_state.
3509  *
3510  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3511  * clause 37 negotiation and/or SGMII control.
3512  *
3513  * Read the MAC PCS state from the MII device configured in @config and
3514  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3515  * the phylink @state structure. This is suitable to be directly plugged
3516  * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3517  * structure.
3518  */
3519 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3520                                    struct phylink_link_state *state)
3521 {
3522         int bmsr, lpa;
3523
3524         bmsr = mdiodev_read(pcs, MII_BMSR);
3525         lpa = mdiodev_read(pcs, MII_LPA);
3526         if (bmsr < 0 || lpa < 0) {
3527                 state->link = false;
3528                 return;
3529         }
3530
3531         phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3532 }
3533 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3534
3535 /**
3536  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3537  *      advertisement
3538  * @interface: the PHY interface mode being configured
3539  * @advertising: the ethtool advertisement mask
3540  *
3541  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3542  * clause 37 negotiation and/or SGMII control.
3543  *
3544  * Encode the clause 37 PCS advertisement as specified by @interface and
3545  * @advertising.
3546  *
3547  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3548  */
3549 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3550                                              const unsigned long *advertising)
3551 {
3552         u16 adv;
3553
3554         switch (interface) {
3555         case PHY_INTERFACE_MODE_1000BASEX:
3556         case PHY_INTERFACE_MODE_2500BASEX:
3557                 adv = ADVERTISE_1000XFULL;
3558                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3559                                       advertising))
3560                         adv |= ADVERTISE_1000XPAUSE;
3561                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3562                                       advertising))
3563                         adv |= ADVERTISE_1000XPSE_ASYM;
3564                 return adv;
3565         case PHY_INTERFACE_MODE_SGMII:
3566         case PHY_INTERFACE_MODE_QSGMII:
3567                 return 0x0001;
3568         default:
3569                 /* Nothing to do for other modes */
3570                 return -EINVAL;
3571         }
3572 }
3573 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3574
3575 /**
3576  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3577  * @pcs: a pointer to a &struct mdio_device.
3578  * @interface: the PHY interface mode being configured
3579  * @advertising: the ethtool advertisement mask
3580  * @neg_mode: PCS negotiation mode
3581  *
3582  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3583  * parameters for the @mode, @interface and @advertising parameters.
3584  * Returns negative error number on failure, zero if the advertisement
3585  * has not changed, or positive if there is a change.
3586  */
3587 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3588                                phy_interface_t interface,
3589                                const unsigned long *advertising,
3590                                unsigned int neg_mode)
3591 {
3592         bool changed = 0;
3593         u16 bmcr;
3594         int ret, adv;
3595
3596         adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3597         if (adv >= 0) {
3598                 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3599                                              MII_ADVERTISE, 0xffff, adv);
3600                 if (ret < 0)
3601                         return ret;
3602                 changed = ret;
3603         }
3604
3605         if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3606                 bmcr = BMCR_ANENABLE;
3607         else
3608                 bmcr = 0;
3609
3610         /* Configure the inband state. Ensure ISOLATE bit is disabled */
3611         ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3612         if (ret < 0)
3613                 return ret;
3614
3615         return changed;
3616 }
3617 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3618
3619 /**
3620  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3621  * @pcs: a pointer to a &struct mdio_device.
3622  *
3623  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3624  * clause 37 negotiation.
3625  *
3626  * Restart the clause 37 negotiation with the link partner. This is
3627  * suitable to be directly plugged into the mac_pcs_get_state() member
3628  * of the struct phylink_mac_ops structure.
3629  */
3630 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3631 {
3632         int val = mdiodev_read(pcs, MII_BMCR);
3633
3634         if (val >= 0) {
3635                 val |= BMCR_ANRESTART;
3636
3637                 mdiodev_write(pcs, MII_BMCR, val);
3638         }
3639 }
3640 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3641
3642 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3643                                    struct phylink_link_state *state)
3644 {
3645         struct mii_bus *bus = pcs->bus;
3646         int addr = pcs->addr;
3647         int stat;
3648
3649         stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3650         if (stat < 0) {
3651                 state->link = false;
3652                 return;
3653         }
3654
3655         state->link = !!(stat & MDIO_STAT1_LSTATUS);
3656         if (!state->link)
3657                 return;
3658
3659         switch (state->interface) {
3660         case PHY_INTERFACE_MODE_10GBASER:
3661                 state->speed = SPEED_10000;
3662                 state->duplex = DUPLEX_FULL;
3663                 break;
3664
3665         default:
3666                 break;
3667         }
3668 }
3669 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3670
3671 static int __init phylink_init(void)
3672 {
3673         for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3674                 __set_bit(phylink_sfp_interface_preference[i],
3675                           phylink_sfp_interfaces);
3676
3677         return 0;
3678 }
3679
3680 module_init(phylink_init);
3681
3682 MODULE_LICENSE("GPL v2");